drm_printf 347 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c drm_printf(printer, "man size:%llu pages, gtt available:%lld pages, usage:%lluMB\n", drm_printf 458 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c drm_printf(printer, "man size:%llu pages, ram usage:%lluMB, vis usage:%lluMB\n", drm_printf 140 drivers/gpu/drm/arm/malidp_planes.c drm_printf(p, "\trotmem_size=%u\n", ms->rotmem_size); drm_printf 141 drivers/gpu/drm/arm/malidp_planes.c drm_printf(p, "\tformat_id=%u\n", ms->format); drm_printf 142 drivers/gpu/drm/arm/malidp_planes.c drm_printf(p, "\tn_planes=%u\n", ms->n_planes); drm_printf 143 drivers/gpu/drm/arm/malidp_planes.c drm_printf(p, "\tmmu_prefetch_mode=%s\n", drm_printf 145 drivers/gpu/drm/arm/malidp_planes.c drm_printf(p, "\tmmu_prefetch_pgsize=%d\n", ms->mmu_prefetch_pgsize); drm_printf 384 drivers/gpu/drm/drm_atomic.c drm_printf(p, "crtc[%u]: %s\n", crtc->base.id, crtc->name); drm_printf 385 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tenable=%d\n", state->enable); drm_printf 386 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tactive=%d\n", state->active); drm_printf 387 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tself_refresh_active=%d\n", state->self_refresh_active); drm_printf 388 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tplanes_changed=%d\n", state->planes_changed); drm_printf 389 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tmode_changed=%d\n", state->mode_changed); drm_printf 390 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tactive_changed=%d\n", state->active_changed); drm_printf 391 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tconnectors_changed=%d\n", state->connectors_changed); drm_printf 392 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tcolor_mgmt_changed=%d\n", state->color_mgmt_changed); drm_printf 393 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tplane_mask=%x\n", state->plane_mask); drm_printf 394 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tconnector_mask=%x\n", state->connector_mask); drm_printf 395 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tencoder_mask=%x\n", state->encoder_mask); drm_printf 396 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tmode: " DRM_MODE_FMT "\n", DRM_MODE_ARG(&state->mode)); drm_printf 656 drivers/gpu/drm/drm_atomic.c drm_printf(p, "plane[%u]: %s\n", plane->base.id, plane->name); drm_printf 657 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tcrtc=%s\n", state->crtc ? state->crtc->name : "(null)"); drm_printf 658 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tfb=%u\n", state->fb ? state->fb->base.id : 0); drm_printf 661 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tcrtc-pos=" DRM_RECT_FMT "\n", DRM_RECT_ARG(&dest)); drm_printf 662 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tsrc-pos=" DRM_RECT_FP_FMT "\n", DRM_RECT_FP_ARG(&src)); drm_printf 663 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\trotation=%x\n", state->rotation); drm_printf 664 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tnormalized-zpos=%x\n", state->normalized_zpos); drm_printf 665 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tcolor-encoding=%s\n", drm_printf 667 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tcolor-range=%s\n", drm_printf 1006 drivers/gpu/drm/drm_atomic.c drm_printf(p, "connector[%u]: %s\n", connector->base.id, connector->name); drm_printf 1007 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tcrtc=%s\n", state->crtc ? state->crtc->name : "(null)"); drm_printf 1008 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tself_refresh_aware=%d\n", state->self_refresh_aware); drm_printf 1012 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tfb=%d\n", state->writeback_job->fb->base.id); drm_printf 450 drivers/gpu/drm/drm_client.c drm_printf(&p, "%s\n", client->name); drm_printf 1076 drivers/gpu/drm/drm_framebuffer.c drm_printf(&p, "framebuffer[%u]:\n", fb->base.id); drm_printf 952 drivers/gpu/drm/drm_mm.c drm_printf(p, "%#018llx-%#018llx: %llu: free\n", drm_printf 971 drivers/gpu/drm/drm_mm.c drm_printf(p, "%#018llx-%#018llx: %llu: used\n", entry->start, drm_printf 978 drivers/gpu/drm/drm_mm.c drm_printf(p, "total: %llu, used %llu free %llu\n", total, drm_printf 498 drivers/gpu/drm/drm_mode_config.c drm_printf(&p, "framebuffer[%u]:\n", fb->base.id); drm_printf 163 drivers/gpu/drm/drm_print.c drm_printf(p, "%s", str); drm_printf 180 drivers/gpu/drm/drm_print.c EXPORT_SYMBOL(drm_printf); drm_printf 283 drivers/gpu/drm/drm_print.c drm_printf(p, "%*s = 0x%08x\n", drm_printf 359 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c drm_printf(p, "Signals:\n"); drm_printf 364 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c drm_printf(p, "\t[%llx:%llx%s] @ %dms\n", drm_printf 1151 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "%s %llx:%llx%s%s %s @ %dms: %s\n", drm_printf 1179 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "*\n"); drm_printf 1189 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "[%04zx] %s\n", pos, line); drm_printf 1204 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID)); drm_printf 1205 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tRING_START: 0x%08x\n", drm_printf 1207 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tRING_HEAD: 0x%08x\n", drm_printf 1209 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tRING_TAIL: 0x%08x\n", drm_printf 1211 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tRING_CTL: 0x%08x%s\n", drm_printf 1215 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tRING_MODE: 0x%08x%s\n", drm_printf 1221 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tRING_IMR: %08x\n", drm_printf 1226 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tACTHD: 0x%08x_%08x\n", drm_printf 1229 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tBBADDR: 0x%08x_%08x\n", drm_printf 1237 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tDMA_FADDR: 0x%08x_%08x\n", drm_printf 1240 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tIPEIR: 0x%08x\n", drm_printf 1242 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tIPEHR: 0x%08x\n", drm_printf 1245 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tIPEIR: 0x%08x\n", ENGINE_READ(engine, IPEIR)); drm_printf 1246 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tIPEHR: 0x%08x\n", ENGINE_READ(engine, IPEHR)); drm_printf 1257 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tExeclist status: 0x%08x %08x, entries %u\n", drm_printf 1265 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tExeclist CSB read %d, write %d, tasklet queued? %s (%s)\n", drm_printf 1278 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tExeclist CSB[%d]: 0x%08x, context: %d\n", drm_printf 1312 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tPP_DIR_BASE: 0x%08x\n", drm_printf 1314 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tPP_DIR_BASE_READ: 0x%08x\n", drm_printf 1316 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tPP_DIR_DCLV: 0x%08x\n", drm_printf 1326 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, drm_printf 1372 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "*** WEDGED ***\n"); drm_printf 1374 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tAwake? %d\n", atomic_read(&engine->wakeref.count)); drm_printf 1375 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tHangcheck: %d ms ago\n", drm_printf 1377 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tReset count: %d (global %d)\n", drm_printf 1381 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tRequests:\n"); drm_printf 1388 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\t\tring->start: 0x%08x\n", drm_printf 1390 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\t\tring->head: 0x%08x\n", drm_printf 1392 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\t\tring->tail: 0x%08x\n", drm_printf 1394 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\t\tring->emit: 0x%08x\n", drm_printf 1396 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\t\tring->space: 0x%08x\n", drm_printf 1398 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\t\tring->hwsp: 0x%08x\n", drm_printf 1405 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tMMIO base: 0x%08x\n", engine->mmio_base); drm_printf 1411 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "\tDevice is asleep; skipping register dump\n"); drm_printf 1416 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "HWSP:\n"); drm_printf 1419 drivers/gpu/drm/i915/gt/intel_engine_cs.c drm_printf(m, "Idle? %s\n", yesno(intel_engine_is_idle(engine))); drm_printf 3939 drivers/gpu/drm/i915/gt/intel_lrc.c drm_printf(m, drm_printf 3949 drivers/gpu/drm/i915/gt/intel_lrc.c drm_printf(m, "\t\tQueue priority hint: %d\n", drm_printf 3964 drivers/gpu/drm/i915/gt/intel_lrc.c drm_printf(m, drm_printf 3987 drivers/gpu/drm/i915/gt/intel_lrc.c drm_printf(m, drm_printf 607 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c drm_printf(p, "%s firmware: %s\n", drm_printf 609 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c drm_printf(p, "\tstatus: %s\n", drm_printf 611 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n", drm_printf 614 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size); drm_printf 615 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size); drm_printf 1486 drivers/gpu/drm/i915/i915_drv.c drm_printf(&p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=0x%x) gen=%i\n", drm_printf 187 drivers/gpu/drm/i915/i915_params.c drm_printf(p, "i915.%s=%s\n", name, yesno(*(const bool *)x)); drm_printf 189 drivers/gpu/drm/i915/i915_params.c drm_printf(p, "i915.%s=%d\n", name, *(const int *)x); drm_printf 191 drivers/gpu/drm/i915/i915_params.c drm_printf(p, "i915.%s=%u\n", name, *(const unsigned int *)x); drm_printf 193 drivers/gpu/drm/i915/i915_params.c drm_printf(p, "i915.%s=%s\n", name, *(const char **)x); drm_printf 79 drivers/gpu/drm/i915/intel_device_info.c #define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, yesno(info->name)); drm_printf 83 drivers/gpu/drm/i915/intel_device_info.c #define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, yesno(info->display.name)); drm_printf 92 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "slice total: %u, mask=%04x\n", drm_printf 94 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "subslice total: %u\n", intel_sseu_subslice_total(sseu)); drm_printf 96 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "slice%d: %u subslices, mask=%04x\n", drm_printf 100 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "EU total: %u\n", sseu->eu_total); drm_printf 101 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "EU per subslice: %u\n", sseu->eu_per_subslice); drm_printf 102 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "has slice power gating: %s\n", drm_printf 104 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "has subslice power gating: %s\n", drm_printf 106 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "has EU power gating: %s\n", yesno(sseu->has_eu_pg)); drm_printf 114 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "CS timestamp frequency: %u kHz\n", drm_printf 158 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "Unavailable\n"); drm_printf 163 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "slice%d: %u subslice(s) (0x%hhx):\n", drm_printf 170 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "\tsubslice%d: %u EUs (0x%hx)\n", drm_printf 983 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "Has logical contexts? %s\n", drm_printf 985 drivers/gpu/drm/i915/intel_device_info.c drm_printf(p, "scheduler: %x\n", caps->scheduler); drm_printf 185 drivers/gpu/drm/i915/intel_runtime_pm.c drm_printf(p, "Wakeref last acquired:\n%s", buf); drm_printf 190 drivers/gpu/drm/i915/intel_runtime_pm.c drm_printf(p, "Wakeref last released:\n%s", buf); drm_printf 193 drivers/gpu/drm/i915/intel_runtime_pm.c drm_printf(p, "Wakeref count: %lu\n", dbg->count); drm_printf 205 drivers/gpu/drm/i915/intel_runtime_pm.c drm_printf(p, "Wakeref x%lu taken at:\n%s", rep, buf); drm_printf 18 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c drm_printf(p, "PFP state:\n"); drm_printf 22 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c drm_printf(p, " %02x: %08x\n", i, drm_printf 33 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c drm_printf(p, "ME state:\n"); drm_printf 37 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c drm_printf(p, " %02x: %08x\n", i, drm_printf 48 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c drm_printf(p, "MEQ state:\n"); drm_printf 52 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c drm_printf(p, " %02x: %08x\n", i, drm_printf 63 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c drm_printf(p, "ROQ state:\n"); drm_printf 71 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c drm_printf(p, " %02x: %08x %08x %08x %08x\n", i, drm_printf 1326 drivers/gpu/drm/msm/adreno/a5xx_gpu.c drm_printf(p, "registers-hlsq:\n"); drm_printf 1343 drivers/gpu/drm/msm/adreno/a5xx_gpu.c drm_printf(p, " - { offset: 0x%04x, value: 0x%08x }\n", drm_printf 945 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c drm_printf(p, " - { offset: 0x%06x, value: 0x%08x }\n", drm_printf 995 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c drm_printf(p, " - bank: %d\n", i); drm_printf 996 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c drm_printf(p, " size: %d\n", block->size); drm_printf 1014 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c drm_printf(p, " - context: %d\n", ctx); drm_printf 1025 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c drm_printf(p, " - { offset: 0x%06x, value: 0x%08x }\n", drm_printf 1065 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c drm_printf(p, " dwords: %d\n", indexed->count); drm_printf 1080 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c drm_printf(p, " count: %d\n", block->count << 1); drm_printf 1101 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c drm_printf(p, " count: %d\n", VBIF_DEBUGBUS_BLOCK_SIZE); drm_printf 704 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, "revision: %d (%d.%d.%d.%d)\n", drm_printf 709 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, "rbbm-status: 0x%08x\n", state->rbbm_status); drm_printf 714 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " - id: %d\n", i); drm_printf 715 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " iova: 0x%016llx\n", state->ring[i].iova); drm_printf 716 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " last-fence: %d\n", state->ring[i].seqno); drm_printf 717 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " retired-fence: %d\n", state->ring[i].fence); drm_printf 718 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " rptr: %d\n", state->ring[i].rptr); drm_printf 719 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " wptr: %d\n", state->ring[i].wptr); drm_printf 720 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " size: %d\n", MSM_GPU_RINGBUFFER_SZ); drm_printf 730 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " - iova: 0x%016llx\n", drm_printf 732 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " size: %zd\n", state->bos[i].size); drm_printf 743 drivers/gpu/drm/msm/adreno/adreno_gpu.c drm_printf(p, " - { offset: 0x%04x, value: 0x%08x }\n", drm_printf 998 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_printf(p, "\tctl=%d\n", mdp5_ctl_get_ctl_id(mdp5_cstate->ctl)); drm_printf 1000 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_printf(p, "\thwmixer=%s\n", pipeline->mixer ? drm_printf 1004 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_printf(p, "\tright hwmixer=%s\n", pipeline->r_mixer ? drm_printf 1007 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_printf(p, "\tcmd_mode=%d\n", mdp5_cstate->cmd_mode); drm_printf 252 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c drm_printf(&p, "no SMP pool\n"); drm_printf 162 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_printf(p, "\thwpipe=%s\n", pstate->hwpipe ? drm_printf 165 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_printf(p, "\tright-hwpipe=%s\n", drm_printf 168 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_printf(p, "\tpremultiplied=%u\n", pstate->premultiplied); drm_printf 169 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_printf(p, "\tzpos=%u\n", pstate->zpos); drm_printf 170 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_printf(p, "\talpha=%u\n", pstate->alpha); drm_printf 171 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c drm_printf(p, "\tstage=%s\n", stage2name(pstate->stage)); drm_printf 338 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c drm_printf(p, "name\tinuse\tplane\n"); drm_printf 339 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c drm_printf(p, "----\t-----\t-----\n"); drm_printf 359 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c drm_printf(p, "%s:%d\t%d\t%s\n", drm_printf 367 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c drm_printf(p, "TOTAL:\t%d\t(of %d)\n", total, smp->blk_cnt); drm_printf 368 drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c drm_printf(p, "AVAIL:\t%d\n", smp->blk_cnt - drm_printf 36 drivers/gpu/drm/msm/msm_debugfs.c drm_printf(&p, "%s Status:\n", gpu->name); drm_printf 281 drivers/gpu/drm/msm/msm_gpu.c drm_printf(&p, "---\n"); drm_printf 282 drivers/gpu/drm/msm/msm_gpu.c drm_printf(&p, "kernel: " UTS_RELEASE "\n"); drm_printf 283 drivers/gpu/drm/msm/msm_gpu.c drm_printf(&p, "module: " KBUILD_MODNAME "\n"); drm_printf 284 drivers/gpu/drm/msm/msm_gpu.c drm_printf(&p, "time: %lld.%09ld\n", drm_printf 287 drivers/gpu/drm/msm/msm_gpu.c drm_printf(&p, "comm: %s\n", state->comm); drm_printf 289 drivers/gpu/drm/msm/msm_gpu.c drm_printf(&p, "cmdline: %s\n", state->cmd); drm_printf 897 drivers/gpu/drm/stm/ltdc.c drm_printf(p, "\tuser_updates=%dfps\n", drm_printf 84 drivers/gpu/drm/ttm/ttm_bo.c drm_printf(p, " has_type: %d\n", man->has_type); drm_printf 85 drivers/gpu/drm/ttm/ttm_bo.c drm_printf(p, " use_type: %d\n", man->use_type); drm_printf 86 drivers/gpu/drm/ttm/ttm_bo.c drm_printf(p, " flags: 0x%08X\n", man->flags); drm_printf 87 drivers/gpu/drm/ttm/ttm_bo.c drm_printf(p, " gpu_offset: 0x%08llX\n", man->gpu_offset); drm_printf 88 drivers/gpu/drm/ttm/ttm_bo.c drm_printf(p, " size: %llu\n", man->size); drm_printf 89 drivers/gpu/drm/ttm/ttm_bo.c drm_printf(p, " available_caching: 0x%08X\n", man->available_caching); drm_printf 90 drivers/gpu/drm/ttm/ttm_bo.c drm_printf(p, " default_caching: 0x%08X\n", man->default_caching); drm_printf 101 drivers/gpu/drm/ttm/ttm_bo.c drm_printf(&p, "No space for %p (%lu pages, %luK, %luM)\n", drm_printf 109 drivers/gpu/drm/ttm/ttm_bo.c drm_printf(&p, " placement[%d]=0x%08X (%d)\n", drm_printf 48 drivers/gpu/drm/vc4/vc4_bo.c drm_printf(p, "%30s: %6dkb BOs (%d)\n", drm_printf 56 drivers/gpu/drm/vc4/vc4_bo.c drm_printf(p, "%30s: %6zdkb BOs (%d)\n", "userspace BO cache", drm_printf 60 drivers/gpu/drm/vc4/vc4_bo.c drm_printf(p, "%30s: %6zdkb BOs (%d)\n", "total purged BO", drm_printf 90 drivers/gpu/drm/vc4/vc4_hvs.c drm_printf(&p, "%d\n", atomic_read(&vc4->underrun)); drm_printf 145 drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c drm_printf(printer, "No debug info available for the GMR id manager\n"); drm_printf 88 include/drm/drm_print.h void drm_printf(struct drm_printer *p, const char *f, ...); drm_printf 114 include/drm/drm_print.h drm_printf((printer), "%.*s" fmt, (indent), "\t\t\t\t\tX", ##__VA_ARGS__)