drm_dp_dpcd_writeb 472 drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb(&amdgpu_connector->ddc_bus->aux, drm_dp_dpcd_writeb 525 drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp); drm_dp_dpcd_writeb 540 drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, drm_dp_dpcd_writeb 543 drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, drm_dp_dpcd_writeb 547 drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, DP_EDP_CONFIGURATION_SET, 1); drm_dp_dpcd_writeb 553 drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, DP_LANE_COUNT_SET, tmp); drm_dp_dpcd_writeb 557 drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, DP_LINK_BW_SET, tmp); drm_dp_dpcd_writeb 564 drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, drm_dp_dpcd_writeb 577 drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, drm_dp_dpcd_writeb 823 drivers/gpu/drm/bridge/analogix-anx78xx.c err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_DOWNSPREAD_CTRL, drm_dp_dpcd_writeb 828 drivers/gpu/drm/bridge/analogix-anx78xx.c err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_DOWNSPREAD_CTRL, 0); drm_dp_dpcd_writeb 133 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); drm_dp_dpcd_writeb 141 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); drm_dp_dpcd_writeb 149 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); drm_dp_dpcd_writeb 178 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, drm_dp_dpcd_writeb 182 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, drm_dp_dpcd_writeb 229 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, drm_dp_dpcd_writeb 308 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, drm_dp_dpcd_writeb 488 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, drm_dp_dpcd_writeb 871 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, drm_dp_dpcd_writeb 880 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, drm_dp_dpcd_writeb 1026 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, DP_SET_POWER_D0); drm_dp_dpcd_writeb 960 drivers/gpu/drm/bridge/tc358767.c ret = drm_dp_dpcd_writeb(aux, DP_EDP_CONFIGURATION_SET, tmp[0]); drm_dp_dpcd_writeb 1084 drivers/gpu/drm/bridge/tc358767.c ret = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, tmp[0]); drm_dp_dpcd_writeb 531 drivers/gpu/drm/bridge/ti-sn65dsi86.c drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET, drm_dp_dpcd_writeb 94 drivers/gpu/drm/drm_dp_cec.c err = drm_dp_dpcd_writeb(aux, DP_CEC_TUNNELING_CONTROL, val); drm_dp_dpcd_writeb 126 drivers/gpu/drm/drm_dp_cec.c err = drm_dp_dpcd_writeb(aux, DP_CEC_TX_MESSAGE_INFO, drm_dp_dpcd_writeb 148 drivers/gpu/drm/drm_dp_cec.c err = drm_dp_dpcd_writeb(aux, DP_CEC_TUNNELING_CONTROL, val); drm_dp_dpcd_writeb 228 drivers/gpu/drm/drm_dp_cec.c drm_dp_dpcd_writeb(aux, DP_CEC_TUNNELING_IRQ_FLAGS, flags); drm_dp_dpcd_writeb 257 drivers/gpu/drm/drm_dp_cec.c drm_dp_dpcd_writeb(aux, DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1, DP_CEC_IRQ); drm_dp_dpcd_writeb 395 drivers/gpu/drm/drm_dp_helper.c err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); drm_dp_dpcd_writeb 433 drivers/gpu/drm/drm_dp_helper.c err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); drm_dp_dpcd_writeb 1203 drivers/gpu/drm/drm_dp_helper.c ret = drm_dp_dpcd_writeb(aux, DP_TEST_SINK, buf | DP_TEST_SINK_START); drm_dp_dpcd_writeb 1230 drivers/gpu/drm/drm_dp_helper.c ret = drm_dp_dpcd_writeb(aux, DP_TEST_SINK, buf & ~DP_TEST_SINK_START); drm_dp_dpcd_writeb 2735 drivers/gpu/drm/drm_dp_mst_topology.c ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, drm_dp_dpcd_writeb 2756 drivers/gpu/drm/drm_dp_mst_topology.c drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, 0); drm_dp_dpcd_writeb 2787 drivers/gpu/drm/drm_dp_mst_topology.c drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, drm_dp_dpcd_writeb 2822 drivers/gpu/drm/drm_dp_mst_topology.c ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, drm_dp_dpcd_writeb 3466 drivers/gpu/drm/drm_dp_mst_topology.c drm_dp_dpcd_writeb(mgr->aux, DP_PAYLOAD_TABLE_UPDATE_STATUS, drm_dp_dpcd_writeb 3128 drivers/gpu/drm/i915/display/intel_ddi.c if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, DP_FEC_READY) <= 0) drm_dp_dpcd_writeb 3029 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_DSC_ENABLE, drm_dp_dpcd_writeb 3049 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, drm_dp_dpcd_writeb 3059 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, drm_dp_dpcd_writeb 4639 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_EDID_CHECKSUM, drm_dp_dpcd_writeb 4697 drivers/gpu/drm/i915/display/intel_dp.c status = drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE, response); drm_dp_dpcd_writeb 4919 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_DEVICE_SERVICE_IRQ_VECTOR, val); drm_dp_dpcd_writeb 47 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, drm_dp_dpcd_writeb 164 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_writeb(&intel_dp->aux, drm_dp_dpcd_writeb 169 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_writeb(&intel_dp->aux, drm_dp_dpcd_writeb 213 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_writeb(&intel_dp->aux, drm_dp_dpcd_writeb 414 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, drm_dp_dpcd_writeb 425 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val); drm_dp_dpcd_writeb 427 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0); drm_dp_dpcd_writeb 833 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0); drm_dp_dpcd_writeb 1087 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&psr->dp->aux, DP_SET_POWER, DP_SET_POWER_D0); drm_dp_dpcd_writeb 1301 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, val); drm_dp_dpcd_writeb 1257 drivers/gpu/drm/nouveau/dispnv50/disp.c ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL, 0); drm_dp_dpcd_writeb 1263 drivers/gpu/drm/nouveau/dispnv50/disp.c ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL, drm_dp_dpcd_writeb 1381 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_dp_dpcd_writeb(aux, DP_MSTM_CTRL, 0); drm_dp_dpcd_writeb 532 drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb(&radeon_connector->ddc_bus->aux, drm_dp_dpcd_writeb 599 drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp); drm_dp_dpcd_writeb 613 drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, drm_dp_dpcd_writeb 616 drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, drm_dp_dpcd_writeb 620 drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, DP_EDP_CONFIGURATION_SET, 1); drm_dp_dpcd_writeb 626 drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, DP_LANE_COUNT_SET, tmp); drm_dp_dpcd_writeb 630 drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, DP_LINK_BW_SET, tmp); drm_dp_dpcd_writeb 641 drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, drm_dp_dpcd_writeb 653 drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb(dp_info->aux, drm_dp_dpcd_writeb 772 drivers/gpu/drm/tegra/dpaux.c err = drm_dp_dpcd_writeb(aux, DP_MAIN_LINK_CHANNEL_CODING_SET, drm_dp_dpcd_writeb 788 drivers/gpu/drm/tegra/dpaux.c err = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, pattern); drm_dp_dpcd_writeb 830 drivers/gpu/drm/tegra/dpaux.c err = drm_dp_dpcd_writeb(aux, DP_EDP_CONFIGURATION_SET, 0);