dpu_mdss           13 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c #define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base)
dpu_mdss           36 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 						struct dpu_mdss *dpu_mdss)
dpu_mdss           44 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->path[0] = path0;
dpu_mdss           45 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->num_paths = 1;
dpu_mdss           48 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		dpu_mdss->path[1] = path1;
dpu_mdss           49 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		dpu_mdss->num_paths++;
dpu_mdss           57 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
dpu_mdss           59 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	u64 avg_bw = dpu_mdss->num_paths ? MAX_BW / dpu_mdss->num_paths : 0;
dpu_mdss           61 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	for (i = 0; i < dpu_mdss->num_paths; i++)
dpu_mdss           62 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		icc_set_bw(dpu_mdss->path[i], avg_bw, kBps_to_icc(MAX_BW));
dpu_mdss           67 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dpu_mdss *dpu_mdss = irq_desc_get_handler_data(desc);
dpu_mdss           73 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	interrupts = readl_relaxed(dpu_mdss->mmio + HW_INTR_STATUS);
dpu_mdss           80 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		mapping = irq_find_mapping(dpu_mdss->irq_controller.domain,
dpu_mdss          102 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
dpu_mdss          106 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	clear_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask);
dpu_mdss          113 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
dpu_mdss          117 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	set_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask);
dpu_mdss          133 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dpu_mdss *dpu_mdss = domain->host_data;
dpu_mdss          137 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	return irq_set_chip_data(irq, dpu_mdss);
dpu_mdss          145 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
dpu_mdss          150 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dev = dpu_mdss->base.dev->dev;
dpu_mdss          153 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 			&dpu_mdss_irqdomain_ops, dpu_mdss);
dpu_mdss          159 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->irq_controller.enabled_mask = 0;
dpu_mdss          160 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->irq_controller.domain = domain;
dpu_mdss          165 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c static void _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
dpu_mdss          167 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	if (dpu_mdss->irq_controller.domain) {
dpu_mdss          168 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		irq_domain_remove(dpu_mdss->irq_controller.domain);
dpu_mdss          169 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		dpu_mdss->irq_controller.domain = NULL;
dpu_mdss          174 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
dpu_mdss          175 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dss_module_power *mp = &dpu_mdss->mp;
dpu_mdss          189 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
dpu_mdss          190 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dss_module_power *mp = &dpu_mdss->mp;
dpu_mdss          197 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	for (i = 0; i < dpu_mdss->num_paths; i++)
dpu_mdss          198 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		icc_set_bw(dpu_mdss->path[i], 0, 0);
dpu_mdss          207 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dpu_mdss *dpu_mdss = to_dpu_mdss(priv->mdss);
dpu_mdss          208 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dss_module_power *mp = &dpu_mdss->mp;
dpu_mdss          214 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	_dpu_mdss_irq_domain_fini(dpu_mdss);
dpu_mdss          220 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	for (i = 0; i < dpu_mdss->num_paths; i++)
dpu_mdss          221 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		icc_put(dpu_mdss->path[i]);
dpu_mdss          223 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	if (dpu_mdss->mmio)
dpu_mdss          224 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		devm_iounmap(&pdev->dev, dpu_mdss->mmio);
dpu_mdss          225 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->mmio = NULL;
dpu_mdss          240 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	struct dpu_mdss *dpu_mdss;
dpu_mdss          245 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss = devm_kzalloc(dev->dev, sizeof(*dpu_mdss), GFP_KERNEL);
dpu_mdss          246 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	if (!dpu_mdss)
dpu_mdss          249 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->mmio = msm_ioremap(pdev, "mdss", "mdss");
dpu_mdss          250 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	if (IS_ERR(dpu_mdss->mmio))
dpu_mdss          251 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		return PTR_ERR(dpu_mdss->mmio);
dpu_mdss          253 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio);
dpu_mdss          260 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->mmio_len = resource_size(res);
dpu_mdss          262 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	ret = dpu_mdss_parse_data_bus_icc_path(dev, dpu_mdss);
dpu_mdss          266 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	mp = &dpu_mdss->mp;
dpu_mdss          273 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->base.dev = dev;
dpu_mdss          274 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->base.funcs = &mdss_funcs;
dpu_mdss          276 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	ret = _dpu_mdss_irq_domain_add(dpu_mdss);
dpu_mdss          285 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 					 dpu_mdss);
dpu_mdss          287 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	priv->mdss = &dpu_mdss->base;
dpu_mdss          296 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	_dpu_mdss_irq_domain_fini(dpu_mdss);
dpu_mdss          301 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	if (dpu_mdss->mmio)
dpu_mdss          302 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 		devm_iounmap(&pdev->dev, dpu_mdss->mmio);
dpu_mdss          303 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c 	dpu_mdss->mmio = NULL;