CG_SCLK_DPM_CTRL_5 780 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_P(CG_SCLK_DPM_CTRL_5, SCLK_FSTATE_BOOTUP(0), ~SCLK_FSTATE_BOOTUP_MASK); CG_SCLK_DPM_CTRL_5 929 drivers/gpu/drm/radeon/sumo_dpm.c u32 cg_sclk_dpm_ctrl_5 = RREG32(CG_SCLK_DPM_CTRL_5); CG_SCLK_DPM_CTRL_5 937 drivers/gpu/drm/radeon/sumo_dpm.c WREG32(CG_SCLK_DPM_CTRL_5, cg_sclk_dpm_ctrl_5);