CG_BIF_REQ_AND_RSP 1345 drivers/gpu/drm/radeon/btc_dpm.c bif = RREG32(CG_BIF_REQ_AND_RSP) & ~CG_CLIENT_REQ_MASK; CG_BIF_REQ_AND_RSP 1347 drivers/gpu/drm/radeon/btc_dpm.c WREG32(CG_BIF_REQ_AND_RSP, bif); CG_BIF_REQ_AND_RSP 1364 drivers/gpu/drm/radeon/btc_dpm.c bif = RREG32(CG_BIF_REQ_AND_RSP) & ~CG_CLIENT_REQ_MASK; CG_BIF_REQ_AND_RSP 1366 drivers/gpu/drm/radeon/btc_dpm.c WREG32(CG_BIF_REQ_AND_RSP, bif); CG_BIF_REQ_AND_RSP 61 drivers/gpu/drm/radeon/cypress_dpm.c bif = RREG32(CG_BIF_REQ_AND_RSP) & ~CG_CLIENT_REQ_MASK; CG_BIF_REQ_AND_RSP 63 drivers/gpu/drm/radeon/cypress_dpm.c WREG32(CG_BIF_REQ_AND_RSP, bif); CG_BIF_REQ_AND_RSP 3470 drivers/gpu/drm/radeon/ni_dpm.c bif = RREG32(CG_BIF_REQ_AND_RSP) & ~CG_CLIENT_REQ_MASK; CG_BIF_REQ_AND_RSP 3472 drivers/gpu/drm/radeon/ni_dpm.c WREG32(CG_BIF_REQ_AND_RSP, bif); CG_BIF_REQ_AND_RSP 3485 drivers/gpu/drm/radeon/ni_dpm.c bif = RREG32(CG_BIF_REQ_AND_RSP) & ~CG_CLIENT_REQ_MASK; CG_BIF_REQ_AND_RSP 3487 drivers/gpu/drm/radeon/ni_dpm.c WREG32(CG_BIF_REQ_AND_RSP, bif);