dmaregs          1036 drivers/ata/pata_macio.c 				  resource_size_t dmaregs,
dmaregs          1077 drivers/ata/pata_macio.c 	if (dmaregs != 0) {
dmaregs          1078 drivers/ata/pata_macio.c 		dma_regs = devm_ioremap(priv->dev, dmaregs,
dmaregs          1119 drivers/ata/pata_macio.c 	resource_size_t		tfregs, dmaregs = 0;
dmaregs          1157 drivers/ata/pata_macio.c 			dmaregs = macio_resource_start(mdev, 1);
dmaregs          1182 drivers/ata/pata_macio.c 				    dmaregs,		/* DBDMA regs */
dmaregs           247 drivers/mailbox/bcm-pdc-mailbox.c 	struct dma64 dmaregs[PDC_NUM_DMA_RINGS];  /* 0x0200 - 0x2fc */
dmaregs          1028 drivers/mailbox/bcm-pdc-mailbox.c 	dma_reg = &pdcs->regs->dmaregs[ringset];
dmaregs          1310 drivers/mailbox/bcm-pdc-mailbox.c 	dma_reg = &pdcs->regs->dmaregs[ringset];
dmaregs          1336 drivers/mailbox/bcm-pdc-mailbox.c 	dma_reg = &pdcs->regs->dmaregs[PDC_RINGSET];
dmaregs            48 drivers/net/ethernet/ti/cpsw_priv.c 		dma_params.dmaregs   = ss_regs + CPSW1_CPDMA_OFFSET;
dmaregs            62 drivers/net/ethernet/ti/cpsw_priv.c 		dma_params.dmaregs   = ss_regs + CPSW2_CPDMA_OFFSET;
dmaregs           103 drivers/net/ethernet/ti/cpsw_priv.c 	dma_params.rxthresh	= dma_params.dmaregs + CPDMA_RXTHRESH;
dmaregs           104 drivers/net/ethernet/ti/cpsw_priv.c 	dma_params.rxfree	= dma_params.dmaregs + CPDMA_RXFREE;
dmaregs           169 drivers/net/ethernet/ti/davinci_cpdma.c #define dmaregs		params.dmaregs
dmaregs           173 drivers/net/ethernet/ti/davinci_cpdma.c #define dma_reg_read(ctlr, ofs)		readl((ctlr)->dmaregs + (ofs))
dmaregs           176 drivers/net/ethernet/ti/davinci_cpdma.c #define dma_reg_write(ctlr, ofs, v)	writel(v, (ctlr)->dmaregs + (ofs))
dmaregs            24 drivers/net/ethernet/ti/davinci_cpdma.h 	void __iomem		*dmaregs;
dmaregs          1849 drivers/net/ethernet/ti/davinci_emac.c 	dma_params.dmaregs		= priv->emac_base;