dma_set_max_seg_size 3674 drivers/block/mtip32xx/mtip32xx.c dma_set_max_seg_size(&dd->pdev->dev, 0x400000); dma_set_max_seg_size 909 drivers/dma/bcm2835-dma.c dma_set_max_seg_size(&pdev->dev, 0x3FFFFFFF); dma_set_max_seg_size 872 drivers/dma/dma-axi-dmac.c dma_set_max_seg_size(&pdev->dev, UINT_MAX); dma_set_max_seg_size 745 drivers/dma/dw-edma/dw-edma-core.c dma_set_max_seg_size(dma->dev, U32_MAX); dma_set_max_seg_size 1376 drivers/dma/ep93xx_dma.c dma_set_max_seg_size(dma_dev->dev, DMA_MAX_CHAN_BYTES); dma_set_max_seg_size 471 drivers/dma/hsu/hsu.c dma_set_max_seg_size(hsu->dma.dev, HSU_CH_DxTSR_MASK); dma_set_max_seg_size 593 drivers/dma/idma64.c dma_set_max_seg_size(idma64->dma.dev, IDMA64C_CTLH_BLOCK_TS_MASK); dma_set_max_seg_size 1200 drivers/dma/imx-dma.c dma_set_max_seg_size(imxdma->dma_device.dev, 0xffffff); dma_set_max_seg_size 2117 drivers/dma/imx-sdma.c dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT); dma_set_max_seg_size 833 drivers/dma/mxs-dma.c dma_set_max_seg_size(mxs_dma->dma_device.dev, MAX_XFER_BYTES); dma_set_max_seg_size 3161 drivers/dma/pl330.c ret = dma_set_max_seg_size(&adev->dev, 1900800); dma_set_max_seg_size 1320 drivers/dma/qcom/bam_dma.c ret = dma_set_max_seg_size(bdev->common.dev, BAM_FIFO_SIZE); dma_set_max_seg_size 1827 drivers/dma/sh/rcar-dmac.c dma_set_max_seg_size(dmac->dev, RCAR_DMATCR_MASK); dma_set_max_seg_size 3643 drivers/dma/ste_dma40.c ret = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE); dma_set_max_seg_size 248 drivers/gpu/drm/arm/display/komeda/komeda_dev.c dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); dma_set_max_seg_size 553 drivers/gpu/drm/etnaviv/etnaviv_drv.c dma_set_max_seg_size(dev, SZ_2G); dma_set_max_seg_size 41 drivers/gpu/drm/exynos/exynos_drm_dma.c dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); dma_set_max_seg_size 1283 drivers/gpu/drm/i915/i915_drv.c dma_set_max_seg_size(&pdev->dev, UINT_MAX); dma_set_max_seg_size 292 drivers/gpu/drm/mediatek/mtk_drm_drv.c ret = dma_set_max_seg_size(dma_dev, (unsigned int)DMA_BIT_MASK(32)); dma_set_max_seg_size 450 drivers/gpu/drm/msm/msm_drv.c dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); dma_set_max_seg_size 753 drivers/gpu/drm/vmwgfx/vmwgfx_drv.c dma_set_max_seg_size(dev->dev, min_t(unsigned int, U32_MAX & PAGE_MASK, dma_set_max_seg_size 448 drivers/gpu/host1x/bus.c dma_set_max_seg_size(&device->dev, SZ_4M); dma_set_max_seg_size 1215 drivers/infiniband/core/device.c dma_set_max_seg_size(device->dma_device, SZ_2G); dma_set_max_seg_size 962 drivers/infiniband/hw/mthca/mthca_main.c dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024); dma_set_max_seg_size 382 drivers/macintosh/macio_asic.c dma_set_max_seg_size(&dev->ofdev.dev, 65536); dma_set_max_seg_size 742 drivers/media/common/videobuf2/videobuf2-dma-contig.c return dma_set_max_seg_size(dev, size); dma_set_max_seg_size 264 drivers/media/platform/qcom/venus/core.c dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); dma_set_max_seg_size 386 drivers/mmc/core/queue.c dma_set_max_seg_size(mmc_dev(host), queue_max_segment_size(mq->queue)); dma_set_max_seg_size 1076 drivers/mmc/host/alcor.c dma_set_max_seg_size(host->dev, mmc->max_seg_size); dma_set_max_seg_size 338 drivers/mmc/host/renesas_sdhi_internal_dmac.c dma_set_max_seg_size(dev, 0xffffffff); dma_set_max_seg_size 3813 drivers/net/ethernet/mellanox/mlx4/main.c dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024); dma_set_max_seg_size 265 drivers/net/ethernet/mellanox/mlx5/core/main.c dma_set_max_seg_size(&pdev->dev, 2u * 1024 * 1024 * 1024); dma_set_max_seg_size 2580 drivers/nvme/host/pci.c dma_set_max_seg_size(dev->dev, 0xffffffff); dma_set_max_seg_size 2407 drivers/pci/probe.c dma_set_max_seg_size(&dev->dev, 65536); dma_set_max_seg_size 519 drivers/s390/net/ism_drv.c dma_set_max_seg_size(&pdev->dev, SZ_1M); dma_set_max_seg_size 1812 drivers/scsi/scsi_lib.c dma_set_max_seg_size(dev, queue_max_segment_size(q)); dma_set_max_seg_size 699 drivers/staging/mt7621-dma/mtk-hsdma.c dma_set_max_seg_size(dd->dev, HSDMA_MAX_PLEN); dma_set_max_seg_size 860 drivers/staging/ralink-gdma/ralink-gdma.c dma_set_max_seg_size(dd->dev, GDMA_REG_CTRL0_TX_MASK);