dma_resv_add_excl_fence  302 drivers/dma-buf/dma-resv.c EXPORT_SYMBOL(dma_resv_add_excl_fence);
dma_resv_add_excl_fence  156 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c 		dma_resv_add_excl_fence(obj, fences[0]);
dma_resv_add_excl_fence  168 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c 		dma_resv_add_excl_fence(obj, &array->base);
dma_resv_add_excl_fence 1396 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 		dma_resv_add_excl_fence(resv, fence);
dma_resv_add_excl_fence  216 drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c 			dma_resv_add_excl_fence(obj->resv,
dma_resv_add_excl_fence  115 drivers/gpu/drm/i915/gem/i915_gem_clflush.c 		dma_resv_add_excl_fence(obj->base.resv, &clflush->base.dma);
dma_resv_add_excl_fence  303 drivers/gpu/drm/i915/gem/i915_gem_client_blt.c 		dma_resv_add_excl_fence(obj->base.resv, &work->dma);
dma_resv_add_excl_fence   80 drivers/gpu/drm/i915/gem/i915_gem_fence.c 	dma_resv_add_excl_fence(obj->base.resv, &stub->dma);
dma_resv_add_excl_fence   89 drivers/gpu/drm/i915/gem/i915_gem_wait.c 			dma_resv_add_excl_fence(resv, NULL);
dma_resv_add_excl_fence   50 drivers/gpu/drm/i915/gt/intel_engine_pool.c 		dma_resv_add_excl_fence(resv, NULL);
dma_resv_add_excl_fence  915 drivers/gpu/drm/i915/i915_vma.c 		dma_resv_add_excl_fence(vma->resv, &rq->fence);
dma_resv_add_excl_fence  299 drivers/gpu/drm/lima/lima_gem.c 			dma_resv_add_excl_fence(bos[i]->gem.resv, fence);
dma_resv_add_excl_fence  743 drivers/gpu/drm/msm/msm_gem.c 		dma_resv_add_excl_fence(obj->resv, fence);
dma_resv_add_excl_fence 1690 drivers/gpu/drm/nouveau/nouveau_bo.c 		dma_resv_add_excl_fence(resv, &fence->base);
dma_resv_add_excl_fence  207 drivers/gpu/drm/panfrost/panfrost_job.c 		dma_resv_add_excl_fence(bos[i]->resv, fence);
dma_resv_add_excl_fence  878 drivers/gpu/drm/radeon/radeon_object.c 		dma_resv_add_excl_fence(resv, &fence->base);
dma_resv_add_excl_fence 1835 drivers/gpu/drm/ttm/ttm_bo.c 	dma_resv_add_excl_fence(bo->base.resv, NULL);
dma_resv_add_excl_fence  692 drivers/gpu/drm/ttm/ttm_bo_util.c 	dma_resv_add_excl_fence(bo->base.resv, fence);
dma_resv_add_excl_fence  719 drivers/gpu/drm/ttm/ttm_bo_util.c 		dma_resv_add_excl_fence(ghost_obj->base.resv, fence);
dma_resv_add_excl_fence  755 drivers/gpu/drm/ttm/ttm_bo_util.c 	dma_resv_add_excl_fence(bo->base.resv, fence);
dma_resv_add_excl_fence  775 drivers/gpu/drm/ttm/ttm_bo_util.c 		dma_resv_add_excl_fence(ghost_obj->base.resv, fence);
dma_resv_add_excl_fence  206 drivers/gpu/drm/ttm/ttm_execbuf_util.c 			dma_resv_add_excl_fence(bo->base.resv, fence);
dma_resv_add_excl_fence  498 drivers/gpu/drm/v3d/v3d_gem.c 		dma_resv_add_excl_fence(job->bo[i]->resv,
dma_resv_add_excl_fence  557 drivers/gpu/drm/vc4/vc4_gem.c 		dma_resv_add_excl_fence(bo->base.base.resv, exec->fence);
dma_resv_add_excl_fence  164 drivers/gpu/drm/vgem/vgem_fence.c 		dma_resv_add_excl_fence(resv, fence);
dma_resv_add_excl_fence  399 drivers/gpu/drm/virtio/virtgpu_ioctl.c 	dma_resv_add_excl_fence(qobj->tbo.base.resv,
dma_resv_add_excl_fence  453 drivers/gpu/drm/virtio/virtgpu_ioctl.c 		dma_resv_add_excl_fence(qobj->tbo.base.resv,
dma_resv_add_excl_fence  215 drivers/gpu/drm/virtio/virtgpu_plane.c 			dma_resv_add_excl_fence(bo->tbo.base.resv,
dma_resv_add_excl_fence 1011 drivers/gpu/drm/vmwgfx/vmwgfx_bo.c 		dma_resv_add_excl_fence(bo->base.resv, &fence->base);
dma_resv_add_excl_fence 1014 drivers/gpu/drm/vmwgfx/vmwgfx_bo.c 		dma_resv_add_excl_fence(bo->base.resv, &fence->base);
dma_resv_add_excl_fence  281 include/linux/dma-resv.h void dma_resv_add_excl_fence(struct dma_resv *obj, struct dma_fence *fence);