dma_reg_write     326 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, info->reg, val);
dma_reg_write     366 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, rate_reg, chan->rate_factor);
dma_reg_write     390 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, chan->int_set, chan->mask);
dma_reg_write     506 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, rate_reg, ch->rate_factor);
dma_reg_write     550 drivers/net/ethernet/ti/davinci_cpdma.c 		dma_reg_write(ctlr, CPDMA_SOFTRESET, 1);
dma_reg_write     567 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, CPDMA_RXINTMASKCLEAR, 0xffffffff);
dma_reg_write     568 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, CPDMA_TXINTMASKCLEAR, 0xffffffff);
dma_reg_write     570 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, CPDMA_TXCONTROL, 1);
dma_reg_write     571 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, CPDMA_RXCONTROL, 1);
dma_reg_write     615 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, CPDMA_RXINTMASKCLEAR, 0xffffffff);
dma_reg_write     616 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, CPDMA_TXINTMASKCLEAR, 0xffffffff);
dma_reg_write     618 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, CPDMA_TXCONTROL, 0);
dma_reg_write     619 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, CPDMA_RXCONTROL, 0);
dma_reg_write     666 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, CPDMA_MACEOIVECTOR, value);
dma_reg_write    1327 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, chan->int_clear, chan->mask);
dma_reg_write    1330 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(ctlr, chan->td, chan_linear(chan));
dma_reg_write    1384 drivers/net/ethernet/ti/davinci_cpdma.c 	dma_reg_write(chan->ctlr, enable ? chan->int_set : chan->int_clear,