dm_read_reg 97 drivers/gpu/drm/amd/display/dc/dc_helper.c reg_val = dm_read_reg(ctx, addr); dm_read_reg 146 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t reg_val = dm_read_reg(ctx, addr); dm_read_reg 155 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t reg_val = dm_read_reg(ctx, addr); dm_read_reg 166 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t reg_val = dm_read_reg(ctx, addr); dm_read_reg 179 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t reg_val = dm_read_reg(ctx, addr); dm_read_reg 194 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t reg_val = dm_read_reg(ctx, addr); dm_read_reg 211 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t reg_val = dm_read_reg(ctx, addr); dm_read_reg 230 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t reg_val = dm_read_reg(ctx, addr); dm_read_reg 251 drivers/gpu/drm/amd/display/dc/dc_helper.c uint32_t reg_val = dm_read_reg(ctx, addr); dm_read_reg 313 drivers/gpu/drm/amd/display/dc/dc_helper.c reg_val = dm_read_reg(ctx, addr); dm_read_reg 350 drivers/gpu/drm/amd/display/dc/dc_helper.c value = dm_read_reg(ctx, addr_data); dm_read_reg 498 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c uint32_t value = dm_read_reg(ctx, addr); dm_read_reg 505 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c value = dm_read_reg(ctx, addr); dm_read_reg 1375 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c uint32_t value = dm_read_reg(ctx, addr); dm_read_reg 1388 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c uint32_t value = dm_read_reg(ctx, addr); dm_read_reg 83 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c status_pos = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION)); dm_read_reg 87 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c if (status_pos != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION))) { dm_read_reg 89 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL)); dm_read_reg 94 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c frame_count = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT)); dm_read_reg 98 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c if (frame_count != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT))) dm_read_reg 106 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL)); dm_read_reg 122 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(cp110->base.ctx, addr); dm_read_reg 148 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 163 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 170 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 201 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 222 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c misc_value = dm_read_reg(compressor->ctx, mmFBC_MISC); dm_read_reg 250 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL); dm_read_reg 275 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, mmFBC_STATUS); dm_read_reg 282 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, mmFBC_MISC); dm_read_reg 284 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, mmFBC_CNTL); dm_read_reg 354 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c uint32_t value = dm_read_reg(compressor->ctx, addr); dm_read_reg 388 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 125 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c value = dm_read_reg(ctx, addr); dm_read_reg 148 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c value = dm_read_reg(ctx, addr); dm_read_reg 44 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg( dm_read_reg 157 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_ENABLE); dm_read_reg 370 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg( dm_read_reg 422 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg( dm_read_reg 442 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg( dm_read_reg 476 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_UPDATE); dm_read_reg 607 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(mem_input110->base.ctx, mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT); dm_read_reg 613 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL); dm_read_reg 619 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL); dm_read_reg 624 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL_C); dm_read_reg 630 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C); dm_read_reg 665 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c wm_mask_cntl = dm_read_reg(ctx, wm_addr); dm_read_reg 672 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c urgency_cntl = dm_read_reg(ctx, urgency_addr); dm_read_reg 688 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c wm_mask_cntl = dm_read_reg(ctx, wm_addr); dm_read_reg 695 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c urgency_cntl = dm_read_reg(ctx, urgency_addr); dm_read_reg 748 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c wm_mask_cntl = dm_read_reg(ctx, wm_addr); dm_read_reg 755 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c stutter_cntl = dm_read_reg(ctx, stutter_addr); dm_read_reg 782 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c wm_mask_cntl = dm_read_reg(ctx, wm_addr); dm_read_reg 789 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c stutter_cntl = dm_read_reg(ctx, stutter_addr); dm_read_reg 828 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(ctx, wm_mask_ctrl_addr); dm_read_reg 837 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(ctx, nbp_pstate_ctrl_addr); dm_read_reg 857 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(ctx, nbp_pstate_ctrl_addr); dm_read_reg 866 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(ctx, wm_mask_ctrl_addr); dm_read_reg 874 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(ctx, nbp_pstate_ctrl_addr); dm_read_reg 893 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(ctx, nbp_pstate_ctrl_addr); dm_read_reg 978 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(mi->ctx, addr); dm_read_reg 988 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c value = dm_read_reg(mi->ctx, addr); dm_read_reg 114 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c uint32_t cntl_value = dm_read_reg(ctx, mmCOL_MAN_OUTPUT_CSC_CONTROL); dm_read_reg 366 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c uint32_t value = dm_read_reg(ctx, addr); dm_read_reg 465 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c uint32_t value = dm_read_reg(xfm->ctx, mmDENORM_CLAMP_CONTROL); dm_read_reg 555 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c value = dm_read_reg(ctx, mmCOL_MAN_INPUT_CSC_CONTROL); dm_read_reg 39 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); dm_read_reg 73 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); dm_read_reg 90 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c value = dm_read_reg(xfm_dce->base.ctx, dm_read_reg 523 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); dm_read_reg 100 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, addr); dm_read_reg 113 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c regval = dm_read_reg(tg->ctx, address); dm_read_reg 157 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 199 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, addr); dm_read_reg 262 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c regval = dm_read_reg(tg->ctx, dm_read_reg 379 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c v_total_min = dm_read_reg(tg->ctx, addr); dm_read_reg 382 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c v_total_max = dm_read_reg(tg->ctx, addr); dm_read_reg 385 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c v_total_cntl = dm_read_reg(tg->ctx, addr); dm_read_reg 479 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c static_screen_cntl = dm_read_reg(tg->ctx, addr); dm_read_reg 512 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 535 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_STATUS_POSITION)); dm_read_reg 547 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_NOM_VERT_POSITION)); dm_read_reg 575 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t value = dm_read_reg(tg->ctx, dm_read_reg 615 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(ctx, addr); dm_read_reg 624 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(ctx, addr); dm_read_reg 636 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(ctx, addr); dm_read_reg 645 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(ctx, addr); dm_read_reg 654 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(ctx, addr); dm_read_reg 677 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(ctx, addr); dm_read_reg 1223 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, address); dm_read_reg 1272 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value_crtc_vtotal = dm_read_reg(tg->ctx, dm_read_reg 1298 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, address); dm_read_reg 1351 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value_crtc_vtotal = dm_read_reg(tg->ctx, dm_read_reg 1416 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 1478 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t value = dm_read_reg(ctx, addr); dm_read_reg 1501 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t pol_value = dm_read_reg(tg->ctx, dm_read_reg 1515 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL)); dm_read_reg 1558 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL)); dm_read_reg 1599 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL)); dm_read_reg 1632 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL)); dm_read_reg 1651 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL)); dm_read_reg 1666 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL)); dm_read_reg 1680 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL)); dm_read_reg 1701 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE)); dm_read_reg 1716 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_FORCE_COUNT_NOW_CNTL)); dm_read_reg 1730 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL)); dm_read_reg 1745 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL)); dm_read_reg 1778 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t value = dm_read_reg(tg->ctx, dm_read_reg 1780 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t value1 = dm_read_reg(tg->ctx, dm_read_reg 1827 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, addr); dm_read_reg 1899 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 1971 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c uint32_t value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_BLANK_CONTROL)); dm_read_reg 2093 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, addr); dm_read_reg 2185 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, addr); dm_read_reg 2193 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, addr); dm_read_reg 2198 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c value = dm_read_reg(tg->ctx, addr); dm_read_reg 85 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(tg->ctx, dm_read_reg 103 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 123 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 148 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(tg->ctx, addr); dm_read_reg 161 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(tg->ctx, mmCRTCV_STATUS_POSITION); dm_read_reg 173 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(tg->ctx, mmCRTCV_STATUS_POSITION); dm_read_reg 260 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(ctx, addr); dm_read_reg 269 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(ctx, addr); dm_read_reg 278 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(ctx, addr); dm_read_reg 301 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(ctx, addr); dm_read_reg 332 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(ctx, addr); dm_read_reg 358 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(ctx, addr); dm_read_reg 375 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c value = dm_read_reg(ctx, addr); dm_read_reg 390 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 456 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 527 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 597 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c regval = dm_read_reg(tg->ctx, address); dm_read_reg 606 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 280 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c value = dm_read_reg(xfm_dce->base.ctx, mmSCLV_UPDATE); dm_read_reg 304 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c power_ctl = dm_read_reg(ctx, mmDCFEV_MEM_PWR_CTRL); dm_read_reg 312 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c dm_read_reg(ctx, mmDCFEV_MEM_PWR_STATUS), dm_read_reg 511 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c value = dm_read_reg(xfm_dce->base.ctx, mmLBV_MEMORY_CTRL); dm_read_reg 302 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(cp110->base.ctx, addr); dm_read_reg 325 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 340 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 347 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 394 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 425 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL); dm_read_reg 449 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, mmFBC_STATUS); dm_read_reg 456 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, mmFBC_MISC); dm_read_reg 458 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, mmFBC_CNTL); dm_read_reg 473 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c uint32_t value = dm_read_reg(compressor->ctx, dm_read_reg 553 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c dm_read_reg( dm_read_reg 568 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 578 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 588 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 606 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, dm_read_reg 618 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 630 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value_control = dm_read_reg(compressor->ctx, addr); dm_read_reg 636 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 647 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 670 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c lpt_control = dm_read_reg(compressor->ctx, dm_read_reg 741 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c uint32_t value = dm_read_reg(compressor->ctx, addr); dm_read_reg 775 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c value = dm_read_reg(compressor->ctx, addr); dm_read_reg 77 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c value = dm_read_reg(ctx, addr); dm_read_reg 113 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c value = dm_read_reg(ctx, addr); dm_read_reg 92 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 130 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c uint32_t value = dm_read_reg(tg->ctx, addr); dm_read_reg 1341 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c dm_read_reg(CTX, HPD_REG(reg_name)) dm_read_reg 1373 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c dm_read_reg(CTX, AUX_REG(reg_name)) dm_read_reg 270 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c dm_read_reg(CTX, AUX_REG(reg_name)) dm_read_reg 40 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h dm_read_reg(CTX, REG(reg_name)) dm_read_reg 48 drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c uint32_t value = dm_read_reg(irq_service->ctx, addr); dm_read_reg 55 drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c value = dm_read_reg(irq_service->ctx, info->enable_reg); dm_read_reg 47 drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c uint32_t value = dm_read_reg(irq_service->ctx, addr); dm_read_reg 56 drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c value = dm_read_reg(irq_service->ctx, info->enable_reg); dm_read_reg 47 drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c uint32_t value = dm_read_reg(irq_service->ctx, addr); dm_read_reg 56 drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c value = dm_read_reg(irq_service->ctx, info->enable_reg); dm_read_reg 128 drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c uint32_t value = dm_read_reg(irq_service->ctx, addr); dm_read_reg 137 drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c value = dm_read_reg(irq_service->ctx, info->enable_reg); dm_read_reg 128 drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c uint32_t value = dm_read_reg(irq_service->ctx, addr); dm_read_reg 137 drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c value = dm_read_reg(irq_service->ctx, info->enable_reg); dm_read_reg 129 drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c uint32_t value = dm_read_reg(irq_service->ctx, addr); dm_read_reg 138 drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c value = dm_read_reg(irq_service->ctx, info->enable_reg); dm_read_reg 95 drivers/gpu/drm/amd/display/dc/irq/irq_service.c uint32_t value = dm_read_reg(irq_service->ctx, addr); dm_read_reg 132 drivers/gpu/drm/amd/display/dc/irq/irq_service.c uint32_t value = dm_read_reg(irq_service->ctx, addr); dm_read_reg 123 drivers/net/usb/dm9601.c ret = dm_read_reg(dev, DM_SHARED_CTRL, &tmp); dm_read_reg 166 drivers/net/usb/dm9601.c ret = dm_read_reg(dev, DM_SHARED_CTRL, &tmp); dm_read_reg 402 drivers/net/usb/dm9601.c if (dm_read_reg(dev, DM_CHIP_ID, &id) < 0) { dm_read_reg 412 drivers/net/usb/dm9601.c if (dm_read_reg(dev, DM_MODE_CTRL, &mode) < 0) {