dm_pp_wm_sets_with_clock_ranges_soc15 550 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; dm_pp_wm_sets_with_clock_ranges_soc15 670 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; dm_pp_wm_sets_with_clock_ranges_soc15 1157 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; dm_pp_wm_sets_with_clock_ranges_soc15 705 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges) dm_pp_wm_sets_with_clock_ranges_soc15 122 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges); dm_pp_wm_sets_with_clock_ranges_soc15 4356 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_range; dm_pp_wm_sets_with_clock_ranges_soc15 1867 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; dm_pp_wm_sets_with_clock_ranges_soc15 2892 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; dm_pp_wm_sets_with_clock_ranges_soc15 452 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h struct dm_pp_wm_sets_with_clock_ranges_soc15 *clock_ranges); dm_pp_wm_sets_with_clock_ranges_soc15 527 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h struct dm_pp_wm_sets_with_clock_ranges_soc15 *clock_ranges); dm_pp_wm_sets_with_clock_ranges_soc15 1294 drivers/gpu/drm/amd/powerplay/navi10_ppt.c dm_pp_wm_sets_with_clock_ranges_soc15 dm_pp_wm_sets_with_clock_ranges_soc15 1337 drivers/gpu/drm/amd/powerplay/smu_v11_0.c dm_pp_wm_sets_with_clock_ranges_soc15 dm_pp_wm_sets_with_clock_ranges_soc15 3062 drivers/gpu/drm/amd/powerplay/vega20_ppt.c dm_pp_wm_sets_with_clock_ranges_soc15