dm_pp_clock_levels_with_latency  278 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		struct dm_pp_clock_levels_with_latency *clk_level_info,
dm_pp_clock_levels_with_latency  420 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	struct dm_pp_clock_levels_with_latency *clk_level_info)
dm_pp_clock_levels_with_latency  987 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	struct dm_pp_clock_levels_with_latency eng_clks = {0};
dm_pp_clock_levels_with_latency  988 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	struct dm_pp_clock_levels_with_latency mem_clks = {0};
dm_pp_clock_levels_with_latency  845 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	struct dm_pp_clock_levels_with_latency eng_clks = {0};
dm_pp_clock_levels_with_latency  846 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	struct dm_pp_clock_levels_with_latency mem_clks = {0};
dm_pp_clock_levels_with_latency  206 drivers/gpu/drm/amd/display/dc/dm_services.h 	struct dm_pp_clock_levels_with_latency *clk_level_info);