divn_shift        253 drivers/clk/tegra/clk-pll.c #define divn_shift(p) (p)->params->div_nmp->divn_shift
divn_shift        257 drivers/clk/tegra/clk-pll.c #define divn_mask_shifted(p) (divn_mask(p) << divn_shift(p))
divn_shift        268 drivers/clk/tegra/clk-pll.c 	.divn_shift = PLL_BASE_DIVN_SHIFT,
divn_shift        670 drivers/clk/tegra/clk-pll.c 		       (cfg->n << divn_shift(pll)) |
divn_shift        701 drivers/clk/tegra/clk-pll.c 		cfg->n = (val >> div_nmp->divn_shift) & divn_mask(pll);
divn_shift        968 drivers/clk/tegra/clk-pll.c 		val |= sel.n << divn_shift(pll);
divn_shift       1002 drivers/clk/tegra/clk-pll.c 	divn = (val >> pll->params->div_nmp->divn_shift) & (divn_mask(pll));
divn_shift       1611 drivers/clk/tegra/clk-pll.c 	val |= sel.n << divn_shift(pll);
divn_shift       1881 drivers/clk/tegra/clk-pll.c 	.divn_shift = PLLE_BASE_DIVN_SHIFT,
divn_shift       2075 drivers/clk/tegra/clk-pll.c 		val |= (pll_params->vco_min / parent_rate) << divn_shift(pll);
divn_shift       2446 drivers/clk/tegra/clk-pll.c 	val |= sel.n << divn_shift(pll);
divn_shift        142 drivers/clk/tegra/clk-tegra114.c 	.divn_shift = 8,
divn_shift        204 drivers/clk/tegra/clk-tegra114.c 	.divn_shift = 8,
divn_shift        276 drivers/clk/tegra/clk-tegra114.c 	.divn_shift = 8,
divn_shift        324 drivers/clk/tegra/clk-tegra114.c 	.divn_shift = 8,
divn_shift        450 drivers/clk/tegra/clk-tegra114.c 	.divn_shift = 8,
divn_shift        548 drivers/clk/tegra/clk-tegra114.c 	.divn_shift = 8,
divn_shift        577 drivers/clk/tegra/clk-tegra114.c 	.divn_shift = 8,
divn_shift        128 drivers/clk/tegra/clk-tegra124.c 	.divn_shift = 8,
divn_shift        224 drivers/clk/tegra/clk-tegra124.c 	.divn_shift = 8,
divn_shift        298 drivers/clk/tegra/clk-tegra124.c 	.divn_shift = 8,
divn_shift        387 drivers/clk/tegra/clk-tegra124.c 	.divn_shift = 8,
divn_shift        446 drivers/clk/tegra/clk-tegra124.c 	.divn_shift = 8,
divn_shift        485 drivers/clk/tegra/clk-tegra124.c 	.divn_shift = 8,
divn_shift        513 drivers/clk/tegra/clk-tegra124.c 	.divn_shift = 8,
divn_shift        578 drivers/clk/tegra/clk-tegra124.c 	.divn_shift = 8,
divn_shift        695 drivers/clk/tegra/clk-tegra124.c 	.divn_shift = 8,
divn_shift       1328 drivers/clk/tegra/clk-tegra210.c #define divn_shift(p) ((p)->params->div_nmp->divn_shift)
divn_shift       1332 drivers/clk/tegra/clk-tegra210.c #define divn_mask_shifted(p) (divn_mask(p) << divn_shift(p))
divn_shift       1358 drivers/clk/tegra/clk-tegra210.c 	ndiv_new_mask = (divn_mask(pllx) >> pllx->params->div_nmp->divn_shift)
divn_shift       1377 drivers/clk/tegra/clk-tegra210.c 	base |= cfg->n << pllx->params->div_nmp->divn_shift;
divn_shift       1492 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 8,
divn_shift       1614 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 10,
divn_shift       1660 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 10,
divn_shift       1729 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 8,
divn_shift       1807 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 8,
divn_shift       1881 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 8,
divn_shift       1918 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 8,
divn_shift       1951 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 10,
divn_shift       2017 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 8,
divn_shift       2070 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 11,
divn_shift       2205 drivers/clk/tegra/clk-tegra210.c 	.divn_shift = 8,
divn_shift        369 drivers/clk/tegra/clk-tegra30.c 	.divn_shift = 8,
divn_shift        140 drivers/clk/tegra/clk.h 	u8		divn_shift;