divider 585 arch/m68k/coldfire/m53xx.c int divider; divider 589 arch/m68k/coldfire/m53xx.c divider = readw(MCF_CCM_CDR) & MCF_CCM_CDR_LPDIV(0xF); divider 590 arch/m68k/coldfire/m53xx.c return (FREF/(2 << divider)); divider 57 arch/mips/include/asm/sgi/mc.h volatile u32 divider; /* Divider reg for RPSS */ divider 171 arch/mips/sgi-ip22/ip22-mc.c sgimc->divider = 0x101; divider 501 arch/sh/boards/mach-ecovec24/setup.c .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ divider 506 arch/sh/boards/mach-ecovec24/setup.c .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ divider 39 arch/x86/kernel/tsc_msr.c u32 divider; divider 191 arch/x86/kernel/tsc_msr.c if (md->divider) { divider 193 arch/x86/kernel/tsc_msr.c freq = DIV_ROUND_CLOSEST(tscref, md->divider); divider 198 arch/x86/kernel/tsc_msr.c res = DIV_ROUND_CLOSEST(tscref * ratio, md->divider); divider 784 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw); divider 785 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = divider->cprman; divider 786 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_pll_divider_data *data = divider->data; divider 806 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw); divider 807 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = divider->cprman; divider 808 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_pll_divider_data *data = divider->data; divider 822 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw); divider 823 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = divider->cprman; divider 824 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_pll_divider_data *data = divider->data; divider 842 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw); divider 843 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = divider->cprman; divider 844 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_pll_divider_data *data = divider->data; divider 864 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw); divider 865 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = divider->cprman; divider 866 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_pll_divider_data *data = divider->data; divider 1332 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_pll_divider *divider; divider 1354 drivers/clk/bcm/clk-bcm2835.c divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL); divider 1355 drivers/clk/bcm/clk-bcm2835.c if (!divider) divider 1358 drivers/clk/bcm/clk-bcm2835.c divider->div.reg = cprman->regs + data->a2w_reg; divider 1359 drivers/clk/bcm/clk-bcm2835.c divider->div.shift = A2W_PLL_DIV_SHIFT; divider 1360 drivers/clk/bcm/clk-bcm2835.c divider->div.width = A2W_PLL_DIV_BITS; divider 1361 drivers/clk/bcm/clk-bcm2835.c divider->div.flags = CLK_DIVIDER_MAX_AT_ZERO; divider 1362 drivers/clk/bcm/clk-bcm2835.c divider->div.lock = &cprman->regs_lock; divider 1363 drivers/clk/bcm/clk-bcm2835.c divider->div.hw.init = &init; divider 1364 drivers/clk/bcm/clk-bcm2835.c divider->div.table = NULL; divider 1366 drivers/clk/bcm/clk-bcm2835.c divider->cprman = cprman; divider 1367 drivers/clk/bcm/clk-bcm2835.c divider->data = data; divider 1369 drivers/clk/bcm/clk-bcm2835.c ret = devm_clk_hw_register(cprman->dev, ÷r->div.hw); divider 1385 drivers/clk/bcm/clk-bcm2835.c return ÷r->div.hw; divider 616 drivers/clk/bcm/clk-kona.c reg_div = divider(div, div->u.s.scaled_div); divider 255 drivers/clk/berlin/berlin2-avpll.c u32 reg, div_av2, div_av3, divider = 1; divider 271 drivers/clk/berlin/berlin2-avpll.c divider = reg & VCO_SYNC1_MASK; divider 287 drivers/clk/berlin/berlin2-avpll.c divider *= div_hdmi[reg & 0x3]; divider 301 drivers/clk/berlin/berlin2-avpll.c divider *= div_av1[reg & 0x3]; divider 318 drivers/clk/berlin/berlin2-avpll.c divider *= div_av2; divider 336 drivers/clk/berlin/berlin2-avpll.c do_div(freq, divider); divider 181 drivers/clk/berlin/berlin2-div.c u32 divsw, div3sw, divider = 1; divider 193 drivers/clk/berlin/berlin2-div.c divider = 3; divider 196 drivers/clk/berlin/berlin2-div.c divider = 1; divider 203 drivers/clk/berlin/berlin2-div.c divider = clk_div[reg]; divider 209 drivers/clk/berlin/berlin2-div.c return parent_rate / divider; divider 147 drivers/clk/clk-axi-clkgen.c static void axi_clkgen_calc_clk_params(unsigned int divider, unsigned int *low, divider 150 drivers/clk/clk-axi-clkgen.c if (divider == 1) divider 155 drivers/clk/clk-axi-clkgen.c *high = divider / 2; divider 156 drivers/clk/clk-axi-clkgen.c *edge = divider % 2; divider 157 drivers/clk/clk-axi-clkgen.c *low = divider - *high; divider 84 drivers/clk/clk-cdce706.c struct cdce706_hw_data divider[6]; divider 563 drivers/clk/clk-cdce706.c for (i = 0; i < ARRAY_SIZE(cdce->divider); ++i) { divider 569 drivers/clk/clk-cdce706.c cdce->divider[i].parent = divider 576 drivers/clk/clk-cdce706.c cdce->divider[i].div = val & CDCE706_DIVIDER_DIVIDER_MASK; divider 579 drivers/clk/clk-cdce706.c cdce->divider[i].parent, cdce->divider[i].div); divider 582 drivers/clk/clk-cdce706.c ret = cdce706_register_hw(cdce, cdce->divider, divider 583 drivers/clk/clk-cdce706.c ARRAY_SIZE(cdce->divider), divider 381 drivers/clk/clk-cdce925.c unsigned long divider; divider 388 drivers/clk/clk-cdce925.c divider = DIV_ROUND_CLOSEST(parent_rate, rate); divider 389 drivers/clk/clk-cdce925.c if (divider > 0x7F) divider 390 drivers/clk/clk-cdce925.c divider = 0x7F; divider 392 drivers/clk/clk-cdce925.c return (u16)divider; divider 442 drivers/clk/clk-cdce925.c u16 divider = cdce925_calc_divider(rate, l_parent_rate); divider 444 drivers/clk/clk-cdce925.c if (l_parent_rate / divider != rate) { divider 446 drivers/clk/clk-cdce925.c divider = cdce925_calc_divider(rate, l_parent_rate); divider 450 drivers/clk/clk-cdce925.c if (divider) divider 451 drivers/clk/clk-cdce925.c return (long)(l_parent_rate / divider); divider 477 drivers/clk/clk-cdce925.c unsigned long divider; divider 484 drivers/clk/clk-cdce925.c divider = DIV_ROUND_CLOSEST(parent_rate, rate); divider 485 drivers/clk/clk-cdce925.c if (divider > 0x3FF) /* Y1 has 10-bit divider */ divider 486 drivers/clk/clk-cdce925.c divider = 0x3FF; divider 488 drivers/clk/clk-cdce925.c return (u16)divider; divider 495 drivers/clk/clk-cdce925.c u16 divider = cdce925_y1_calc_divider(rate, l_parent_rate); divider 497 drivers/clk/clk-cdce925.c if (divider) divider 498 drivers/clk/clk-cdce925.c return (long)(l_parent_rate / divider); divider 28 drivers/clk/clk-divider.c static inline u32 clk_div_readl(struct clk_divider *divider) divider 30 drivers/clk/clk-divider.c if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) divider 31 drivers/clk/clk-divider.c return ioread32be(divider->reg); divider 33 drivers/clk/clk-divider.c return readl(divider->reg); divider 36 drivers/clk/clk-divider.c static inline void clk_div_writel(struct clk_divider *divider, u32 val) divider 38 drivers/clk/clk-divider.c if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) divider 39 drivers/clk/clk-divider.c iowrite32be(val, divider->reg); divider 41 drivers/clk/clk-divider.c writel(val, divider->reg); divider 151 drivers/clk/clk-divider.c struct clk_divider *divider = to_clk_divider(hw); divider 154 drivers/clk/clk-divider.c val = clk_div_readl(divider) >> divider->shift; divider 155 drivers/clk/clk-divider.c val &= clk_div_mask(divider->width); divider 157 drivers/clk/clk-divider.c return divider_recalc_rate(hw, parent_rate, val, divider->table, divider 158 drivers/clk/clk-divider.c divider->flags, divider->width); divider 383 drivers/clk/clk-divider.c struct clk_divider *divider = to_clk_divider(hw); divider 386 drivers/clk/clk-divider.c if (divider->flags & CLK_DIVIDER_READ_ONLY) { divider 389 drivers/clk/clk-divider.c val = clk_div_readl(divider) >> divider->shift; divider 390 drivers/clk/clk-divider.c val &= clk_div_mask(divider->width); divider 392 drivers/clk/clk-divider.c return divider_ro_round_rate(hw, rate, prate, divider->table, divider 393 drivers/clk/clk-divider.c divider->width, divider->flags, divider 397 drivers/clk/clk-divider.c return divider_round_rate(hw, rate, prate, divider->table, divider 398 drivers/clk/clk-divider.c divider->width, divider->flags); divider 421 drivers/clk/clk-divider.c struct clk_divider *divider = to_clk_divider(hw); divider 426 drivers/clk/clk-divider.c value = divider_get_val(rate, parent_rate, divider->table, divider 427 drivers/clk/clk-divider.c divider->width, divider->flags); divider 431 drivers/clk/clk-divider.c if (divider->lock) divider 432 drivers/clk/clk-divider.c spin_lock_irqsave(divider->lock, flags); divider 434 drivers/clk/clk-divider.c __acquire(divider->lock); divider 436 drivers/clk/clk-divider.c if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { divider 437 drivers/clk/clk-divider.c val = clk_div_mask(divider->width) << (divider->shift + 16); divider 439 drivers/clk/clk-divider.c val = clk_div_readl(divider); divider 440 drivers/clk/clk-divider.c val &= ~(clk_div_mask(divider->width) << divider->shift); divider 442 drivers/clk/clk-divider.c val |= (u32)value << divider->shift; divider 443 drivers/clk/clk-divider.c clk_div_writel(divider, val); divider 445 drivers/clk/clk-divider.c if (divider->lock) divider 446 drivers/clk/clk-divider.c spin_unlock_irqrestore(divider->lock, flags); divider 448 drivers/clk/clk-divider.c __release(divider->lock); divider 379 drivers/clk/clk-milbeaut.c struct m10v_clk_divider *divider = to_m10v_div(hw); divider 382 drivers/clk/clk-milbeaut.c val = readl(divider->reg) >> divider->shift; divider 383 drivers/clk/clk-milbeaut.c val &= clk_div_mask(divider->width); divider 385 drivers/clk/clk-milbeaut.c return divider_recalc_rate(hw, parent_rate, val, divider->table, divider 386 drivers/clk/clk-milbeaut.c divider->flags, divider->width); divider 392 drivers/clk/clk-milbeaut.c struct m10v_clk_divider *divider = to_m10v_div(hw); divider 395 drivers/clk/clk-milbeaut.c if (divider->flags & CLK_DIVIDER_READ_ONLY) { divider 398 drivers/clk/clk-milbeaut.c val = readl(divider->reg) >> divider->shift; divider 399 drivers/clk/clk-milbeaut.c val &= clk_div_mask(divider->width); divider 401 drivers/clk/clk-milbeaut.c return divider_ro_round_rate(hw, rate, prate, divider->table, divider 402 drivers/clk/clk-milbeaut.c divider->width, divider->flags, divider 406 drivers/clk/clk-milbeaut.c return divider_round_rate(hw, rate, prate, divider->table, divider 407 drivers/clk/clk-milbeaut.c divider->width, divider->flags); divider 413 drivers/clk/clk-milbeaut.c struct m10v_clk_divider *divider = to_m10v_div(hw); divider 417 drivers/clk/clk-milbeaut.c u32 write_en = BIT(divider->width - 1); divider 419 drivers/clk/clk-milbeaut.c value = divider_get_val(rate, parent_rate, divider->table, divider 420 drivers/clk/clk-milbeaut.c divider->width, divider->flags); divider 424 drivers/clk/clk-milbeaut.c if (divider->lock) divider 425 drivers/clk/clk-milbeaut.c spin_lock_irqsave(divider->lock, flags); divider 427 drivers/clk/clk-milbeaut.c __acquire(divider->lock); divider 429 drivers/clk/clk-milbeaut.c val = readl(divider->reg); divider 430 drivers/clk/clk-milbeaut.c val &= ~(clk_div_mask(divider->width) << divider->shift); divider 432 drivers/clk/clk-milbeaut.c val |= ((u32)value | write_en) << divider->shift; divider 433 drivers/clk/clk-milbeaut.c writel(val, divider->reg); divider 435 drivers/clk/clk-milbeaut.c if (divider->write_valid_reg) { divider 436 drivers/clk/clk-milbeaut.c writel(M10V_DCHREQ, divider->write_valid_reg); divider 437 drivers/clk/clk-milbeaut.c if (readl_poll_timeout(divider->write_valid_reg, val, divider 443 drivers/clk/clk-milbeaut.c if (divider->lock) divider 444 drivers/clk/clk-milbeaut.c spin_unlock_irqrestore(divider->lock, flags); divider 446 drivers/clk/clk-milbeaut.c __release(divider->lock); divider 563 drivers/clk/clk-xgene.c u32 divider; divider 573 drivers/clk/clk-xgene.c divider_save = divider = parent_rate / rate; /* Rounded down */ divider 574 drivers/clk/clk-xgene.c divider &= (1 << pclk->param.reg_divider_width) - 1; divider 575 drivers/clk/clk-xgene.c divider <<= pclk->param.reg_divider_shift; divider 582 drivers/clk/clk-xgene.c data |= divider; divider 602 drivers/clk/clk-xgene.c u32 divider; divider 608 drivers/clk/clk-xgene.c divider = parent_rate / rate; /* Rounded down */ divider 610 drivers/clk/clk-xgene.c divider = 1; divider 613 drivers/clk/clk-xgene.c return parent_rate / divider; divider 244 drivers/clk/davinci/pll.c struct clk_divider *divider; divider 255 drivers/clk/davinci/pll.c divider = kzalloc(sizeof(*divider), GFP_KERNEL); divider 256 drivers/clk/davinci/pll.c if (!divider) { divider 261 drivers/clk/davinci/pll.c divider->reg = reg; divider 262 drivers/clk/davinci/pll.c divider->shift = DIV_RATIO_SHIFT; divider 263 drivers/clk/davinci/pll.c divider->width = DIV_RATIO_WIDTH; divider 266 drivers/clk/davinci/pll.c divider->flags |= CLK_DIVIDER_READ_ONLY; divider 271 drivers/clk/davinci/pll.c NULL, NULL, ÷r->hw, divider_ops, divider 281 drivers/clk/davinci/pll.c kfree(divider); divider 579 drivers/clk/davinci/pll.c struct clk_divider *divider; divider 601 drivers/clk/davinci/pll.c divider = kzalloc(sizeof(*divider), GFP_KERNEL); divider 602 drivers/clk/davinci/pll.c if (!divider) { divider 607 drivers/clk/davinci/pll.c divider->reg = base + OSCDIV; divider 608 drivers/clk/davinci/pll.c divider->shift = DIV_RATIO_SHIFT; divider 609 drivers/clk/davinci/pll.c divider->width = DIV_RATIO_WIDTH; divider 619 drivers/clk/davinci/pll.c ÷r->hw, &clk_divider_ops, divider 630 drivers/clk/davinci/pll.c kfree(divider); divider 683 drivers/clk/davinci/pll.c struct clk_divider *divider; divider 702 drivers/clk/davinci/pll.c divider = kzalloc(sizeof(*divider), GFP_KERNEL); divider 703 drivers/clk/davinci/pll.c if (!divider) { divider 708 drivers/clk/davinci/pll.c divider->reg = base + reg; divider 709 drivers/clk/davinci/pll.c divider->shift = DIV_RATIO_SHIFT; divider 710 drivers/clk/davinci/pll.c divider->width = info->ratio_width; divider 711 drivers/clk/davinci/pll.c divider->flags = 0; divider 714 drivers/clk/davinci/pll.c divider->flags |= CLK_DIVIDER_READ_ONLY; divider 726 drivers/clk/davinci/pll.c NULL, NULL, ÷r->hw, divider_ops, divider 738 drivers/clk/davinci/pll.c kfree(divider); divider 154 drivers/clk/hisilicon/clk.h hisi_clk_unregister(divider) divider 29 drivers/clk/imx/clk-composite-8m.c struct clk_divider *divider = to_clk_divider(hw); divider 34 drivers/clk/imx/clk-composite-8m.c prediv_value = readl(divider->reg) >> divider->shift; divider 35 drivers/clk/imx/clk-composite-8m.c prediv_value &= clk_div_mask(divider->width); divider 38 drivers/clk/imx/clk-composite-8m.c NULL, divider->flags, divider 39 drivers/clk/imx/clk-composite-8m.c divider->width); divider 41 drivers/clk/imx/clk-composite-8m.c div_value = readl(divider->reg) >> PCG_DIV_SHIFT; divider 45 drivers/clk/imx/clk-composite-8m.c divider->flags, PCG_DIV_WIDTH); divider 93 drivers/clk/imx/clk-composite-8m.c struct clk_divider *divider = to_clk_divider(hw); divider 105 drivers/clk/imx/clk-composite-8m.c spin_lock_irqsave(divider->lock, flags); divider 107 drivers/clk/imx/clk-composite-8m.c val = readl(divider->reg); divider 108 drivers/clk/imx/clk-composite-8m.c val &= ~((clk_div_mask(divider->width) << divider->shift) | divider 111 drivers/clk/imx/clk-composite-8m.c val |= (u32)(prediv_value - 1) << divider->shift; divider 113 drivers/clk/imx/clk-composite-8m.c writel(val, divider->reg); divider 115 drivers/clk/imx/clk-composite-8m.c spin_unlock_irqrestore(divider->lock, flags); divider 15 drivers/clk/imx/clk-divider-gate.c struct clk_divider divider; divider 23 drivers/clk/imx/clk-divider-gate.c return container_of(div, struct clk_divider_gate, divider); divider 201 drivers/clk/imx/clk-divider-gate.c div_gate->divider.reg = reg; divider 202 drivers/clk/imx/clk-divider-gate.c div_gate->divider.shift = shift; divider 203 drivers/clk/imx/clk-divider-gate.c div_gate->divider.width = width; divider 204 drivers/clk/imx/clk-divider-gate.c div_gate->divider.lock = lock; divider 205 drivers/clk/imx/clk-divider-gate.c div_gate->divider.table = table; divider 206 drivers/clk/imx/clk-divider-gate.c div_gate->divider.hw.init = &init; divider 207 drivers/clk/imx/clk-divider-gate.c div_gate->divider.flags = CLK_DIVIDER_ONE_BASED | clk_divider_flags; divider 213 drivers/clk/imx/clk-divider-gate.c hw = &div_gate->divider.hw; divider 24 drivers/clk/imx/clk-fixup-div.c struct clk_divider divider; divider 31 drivers/clk/imx/clk-fixup-div.c struct clk_divider *divider = to_clk_divider(hw); divider 33 drivers/clk/imx/clk-fixup-div.c return container_of(divider, struct clk_fixup_div, divider); divider 41 drivers/clk/imx/clk-fixup-div.c return fixup_div->ops->recalc_rate(&fixup_div->divider.hw, parent_rate); divider 49 drivers/clk/imx/clk-fixup-div.c return fixup_div->ops->round_rate(&fixup_div->divider.hw, rate, prate); divider 57 drivers/clk/imx/clk-fixup-div.c unsigned int divider, value; divider 61 drivers/clk/imx/clk-fixup-div.c divider = parent_rate / rate; divider 64 drivers/clk/imx/clk-fixup-div.c value = divider - 1; divider 110 drivers/clk/imx/clk-fixup-div.c fixup_div->divider.reg = reg; divider 111 drivers/clk/imx/clk-fixup-div.c fixup_div->divider.shift = shift; divider 112 drivers/clk/imx/clk-fixup-div.c fixup_div->divider.width = width; divider 113 drivers/clk/imx/clk-fixup-div.c fixup_div->divider.lock = &imx_ccm_lock; divider 114 drivers/clk/imx/clk-fixup-div.c fixup_div->divider.hw.init = &init; divider 118 drivers/clk/imx/clk-fixup-div.c hw = &fixup_div->divider.hw; divider 29 drivers/clk/meson/vid-pll-div.c unsigned int divider; divider 37 drivers/clk/meson/vid-pll-div.c .divider = (_ft), \ divider 84 drivers/clk/meson/vid-pll-div.c if (!div || !div->divider) { divider 89 drivers/clk/meson/vid-pll-div.c return DIV_ROUND_UP_ULL(parent_rate * div->multiplier, div->divider); divider 164 drivers/clk/mvebu/ap-cpu-clk.c int ret, reg, divider = parent_rate / rate; divider 176 drivers/clk/mvebu/ap-cpu-clk.c reg |= (divider << clk->pll_regs->divider_offset); divider 184 drivers/clk/mvebu/ap-cpu-clk.c reg |= ((divider * clk->pll_regs->divider_ratio) << divider 217 drivers/clk/mvebu/ap-cpu-clk.c int divider = *parent_rate / rate; divider 219 drivers/clk/mvebu/ap-cpu-clk.c divider = min(divider, APN806_MAX_DIVIDER); divider 221 drivers/clk/mvebu/ap-cpu-clk.c return *parent_rate / divider; divider 53 drivers/clk/mvebu/dove-divider.c unsigned int divider; divider 59 drivers/clk/mvebu/dove-divider.c divider = val & ~(~0 << dc->div_bit_size); divider 62 drivers/clk/mvebu/dove-divider.c divider = dc->divider_table[divider]; divider 64 drivers/clk/mvebu/dove-divider.c return divider; divider 70 drivers/clk/mvebu/dove-divider.c unsigned int divider, max; divider 72 drivers/clk/mvebu/dove-divider.c divider = DIV_ROUND_CLOSEST(parent_rate, rate); divider 78 drivers/clk/mvebu/dove-divider.c if (divider == dc->divider_table[i]) { divider 79 drivers/clk/mvebu/dove-divider.c divider = i; divider 88 drivers/clk/mvebu/dove-divider.c if (set && (divider == 0 || divider >= max)) divider 90 drivers/clk/mvebu/dove-divider.c if (divider >= max) divider 91 drivers/clk/mvebu/dove-divider.c divider = max - 1; divider 92 drivers/clk/mvebu/dove-divider.c else if (divider == 0) divider 93 drivers/clk/mvebu/dove-divider.c divider = 1; divider 96 drivers/clk/mvebu/dove-divider.c return divider; divider 102 drivers/clk/mvebu/dove-divider.c unsigned int divider = dove_get_divider(dc); divider 103 drivers/clk/mvebu/dove-divider.c unsigned long rate = DIV_ROUND_CLOSEST(parent, divider); divider 106 drivers/clk/mvebu/dove-divider.c __func__, dc->name, divider, parent, rate); divider 116 drivers/clk/mvebu/dove-divider.c int divider; divider 118 drivers/clk/mvebu/dove-divider.c divider = dove_calc_divider(dc, rate, parent_rate, false); divider 119 drivers/clk/mvebu/dove-divider.c if (divider < 0) divider 120 drivers/clk/mvebu/dove-divider.c return divider; divider 122 drivers/clk/mvebu/dove-divider.c rate = DIV_ROUND_CLOSEST(parent_rate, divider); divider 125 drivers/clk/mvebu/dove-divider.c __func__, dc->name, divider, parent_rate, rate); divider 135 drivers/clk/mvebu/dove-divider.c int divider; divider 137 drivers/clk/mvebu/dove-divider.c divider = dove_calc_divider(dc, rate, parent_rate, true); divider 138 drivers/clk/mvebu/dove-divider.c if (divider < 0) divider 139 drivers/clk/mvebu/dove-divider.c return divider; divider 142 drivers/clk/mvebu/dove-divider.c __func__, dc->name, divider, parent_rate, rate); divider 144 drivers/clk/mvebu/dove-divider.c div = (u32)divider << dc->div_bit_start; divider 22 drivers/clk/mxs/clk-div.c struct clk_divider divider; divider 30 drivers/clk/mxs/clk-div.c struct clk_divider *divider = to_clk_divider(hw); divider 32 drivers/clk/mxs/clk-div.c return container_of(divider, struct clk_div, divider); divider 40 drivers/clk/mxs/clk-div.c return div->ops->recalc_rate(&div->divider.hw, parent_rate); divider 48 drivers/clk/mxs/clk-div.c return div->ops->round_rate(&div->divider.hw, rate, prate); divider 57 drivers/clk/mxs/clk-div.c ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); divider 90 drivers/clk/mxs/clk-div.c div->divider.reg = reg; divider 91 drivers/clk/mxs/clk-div.c div->divider.shift = shift; divider 92 drivers/clk/mxs/clk-div.c div->divider.width = width; divider 93 drivers/clk/mxs/clk-div.c div->divider.flags = CLK_DIVIDER_ONE_BASED; divider 94 drivers/clk/mxs/clk-div.c div->divider.lock = &mxs_lock; divider 95 drivers/clk/mxs/clk-div.c div->divider.hw.init = &init; divider 98 drivers/clk/mxs/clk-div.c clk = clk_register(NULL, &div->divider.hw); divider 946 drivers/clk/nxp/clk-lpc32xx.c struct lpc32xx_clk_div *divider = to_lpc32xx_div(hw); divider 949 drivers/clk/nxp/clk-lpc32xx.c regmap_read(clk_regmap, divider->reg, &val); divider 951 drivers/clk/nxp/clk-lpc32xx.c val >>= divider->shift; divider 952 drivers/clk/nxp/clk-lpc32xx.c val &= div_mask(divider->width); divider 954 drivers/clk/nxp/clk-lpc32xx.c return divider_recalc_rate(hw, parent_rate, val, divider->table, divider 955 drivers/clk/nxp/clk-lpc32xx.c divider->flags, divider->width); divider 961 drivers/clk/nxp/clk-lpc32xx.c struct lpc32xx_clk_div *divider = to_lpc32xx_div(hw); divider 965 drivers/clk/nxp/clk-lpc32xx.c if (divider->flags & CLK_DIVIDER_READ_ONLY) { divider 966 drivers/clk/nxp/clk-lpc32xx.c regmap_read(clk_regmap, divider->reg, &bestdiv); divider 967 drivers/clk/nxp/clk-lpc32xx.c bestdiv >>= divider->shift; divider 968 drivers/clk/nxp/clk-lpc32xx.c bestdiv &= div_mask(divider->width); divider 969 drivers/clk/nxp/clk-lpc32xx.c bestdiv = _get_div(divider->table, bestdiv, divider->flags, divider 970 drivers/clk/nxp/clk-lpc32xx.c divider->width); divider 974 drivers/clk/nxp/clk-lpc32xx.c return divider_round_rate(hw, rate, prate, divider->table, divider 975 drivers/clk/nxp/clk-lpc32xx.c divider->width, divider->flags); divider 981 drivers/clk/nxp/clk-lpc32xx.c struct lpc32xx_clk_div *divider = to_lpc32xx_div(hw); divider 984 drivers/clk/nxp/clk-lpc32xx.c value = divider_get_val(rate, parent_rate, divider->table, divider 985 drivers/clk/nxp/clk-lpc32xx.c divider->width, divider->flags); divider 987 drivers/clk/nxp/clk-lpc32xx.c return regmap_update_bits(clk_regmap, divider->reg, divider 988 drivers/clk/nxp/clk-lpc32xx.c div_mask(divider->width) << divider->shift, divider 989 drivers/clk/nxp/clk-lpc32xx.c value << divider->shift); divider 21 drivers/clk/qcom/clk-regmap-divider.c struct clk_regmap_div *divider = to_clk_regmap_div(hw); divider 22 drivers/clk/qcom/clk-regmap-divider.c struct clk_regmap *clkr = ÷r->clkr; divider 25 drivers/clk/qcom/clk-regmap-divider.c regmap_read(clkr->regmap, divider->reg, &val); divider 26 drivers/clk/qcom/clk-regmap-divider.c val >>= divider->shift; divider 27 drivers/clk/qcom/clk-regmap-divider.c val &= BIT(divider->width) - 1; divider 29 drivers/clk/qcom/clk-regmap-divider.c return divider_ro_round_rate(hw, rate, prate, NULL, divider->width, divider 36 drivers/clk/qcom/clk-regmap-divider.c struct clk_regmap_div *divider = to_clk_regmap_div(hw); divider 38 drivers/clk/qcom/clk-regmap-divider.c return divider_round_rate(hw, rate, prate, NULL, divider->width, divider 45 drivers/clk/qcom/clk-regmap-divider.c struct clk_regmap_div *divider = to_clk_regmap_div(hw); divider 46 drivers/clk/qcom/clk-regmap-divider.c struct clk_regmap *clkr = ÷r->clkr; divider 49 drivers/clk/qcom/clk-regmap-divider.c div = divider_get_val(rate, parent_rate, NULL, divider->width, divider 52 drivers/clk/qcom/clk-regmap-divider.c return regmap_update_bits(clkr->regmap, divider->reg, divider 53 drivers/clk/qcom/clk-regmap-divider.c (BIT(divider->width) - 1) << divider->shift, divider 54 drivers/clk/qcom/clk-regmap-divider.c div << divider->shift); divider 60 drivers/clk/qcom/clk-regmap-divider.c struct clk_regmap_div *divider = to_clk_regmap_div(hw); divider 61 drivers/clk/qcom/clk-regmap-divider.c struct clk_regmap *clkr = ÷r->clkr; divider 64 drivers/clk/qcom/clk-regmap-divider.c regmap_read(clkr->regmap, divider->reg, &div); divider 65 drivers/clk/qcom/clk-regmap-divider.c div >>= divider->shift; divider 66 drivers/clk/qcom/clk-regmap-divider.c div &= BIT(divider->width) - 1; divider 69 drivers/clk/qcom/clk-regmap-divider.c CLK_DIVIDER_ROUND_CLOSEST, divider->width); divider 25 drivers/clk/rockchip/clk-half-divider.c struct clk_divider *divider = to_clk_divider(hw); divider 28 drivers/clk/rockchip/clk-half-divider.c val = readl(divider->reg) >> divider->shift; divider 29 drivers/clk/rockchip/clk-half-divider.c val &= div_mask(divider->width); divider 98 drivers/clk/rockchip/clk-half-divider.c struct clk_divider *divider = to_clk_divider(hw); divider 102 drivers/clk/rockchip/clk-half-divider.c divider->width, divider 103 drivers/clk/rockchip/clk-half-divider.c divider->flags); divider 111 drivers/clk/rockchip/clk-half-divider.c struct clk_divider *divider = to_clk_divider(hw); divider 118 drivers/clk/rockchip/clk-half-divider.c value = min_t(unsigned int, value, div_mask(divider->width)); divider 120 drivers/clk/rockchip/clk-half-divider.c if (divider->lock) divider 121 drivers/clk/rockchip/clk-half-divider.c spin_lock_irqsave(divider->lock, flags); divider 123 drivers/clk/rockchip/clk-half-divider.c __acquire(divider->lock); divider 125 drivers/clk/rockchip/clk-half-divider.c if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { divider 126 drivers/clk/rockchip/clk-half-divider.c val = div_mask(divider->width) << (divider->shift + 16); divider 128 drivers/clk/rockchip/clk-half-divider.c val = readl(divider->reg); divider 129 drivers/clk/rockchip/clk-half-divider.c val &= ~(div_mask(divider->width) << divider->shift); divider 131 drivers/clk/rockchip/clk-half-divider.c val |= value << divider->shift; divider 132 drivers/clk/rockchip/clk-half-divider.c writel(val, divider->reg); divider 134 drivers/clk/rockchip/clk-half-divider.c if (divider->lock) divider 135 drivers/clk/rockchip/clk-half-divider.c spin_unlock_irqrestore(divider->lock, flags); divider 137 drivers/clk/rockchip/clk-half-divider.c __release(divider->lock); divider 954 drivers/clk/sunxi/clk-sunxi.c struct clk_divider *divider; divider 1059 drivers/clk/sunxi/clk-sunxi.c divider = kzalloc(sizeof(*divider), GFP_KERNEL); divider 1060 drivers/clk/sunxi/clk-sunxi.c if (!divider) divider 1065 drivers/clk/sunxi/clk-sunxi.c divider->reg = reg; divider 1066 drivers/clk/sunxi/clk-sunxi.c divider->shift = data->div[i].shift; divider 1067 drivers/clk/sunxi/clk-sunxi.c divider->width = SUNXI_DIVISOR_WIDTH; divider 1068 drivers/clk/sunxi/clk-sunxi.c divider->flags = flags; divider 1069 drivers/clk/sunxi/clk-sunxi.c divider->lock = &clk_lock; divider 1070 drivers/clk/sunxi/clk-sunxi.c divider->table = data->div[i].table; divider 1072 drivers/clk/sunxi/clk-sunxi.c rate_hw = ÷r->hw; divider 21 drivers/clk/tegra/clk-divider.c static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate, divider 26 drivers/clk/tegra/clk-divider.c div = div_frac_get(rate, parent_rate, divider->width, divider 27 drivers/clk/tegra/clk-divider.c divider->frac_width, divider->flags); divider 38 drivers/clk/tegra/clk-divider.c struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); divider 43 drivers/clk/tegra/clk-divider.c reg = readl_relaxed(divider->reg) >> divider->shift; divider 44 drivers/clk/tegra/clk-divider.c div = reg & div_mask(divider); divider 46 drivers/clk/tegra/clk-divider.c mul = get_mul(divider); divider 59 drivers/clk/tegra/clk-divider.c struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); divider 66 drivers/clk/tegra/clk-divider.c div = get_div(divider, rate, output_rate); divider 70 drivers/clk/tegra/clk-divider.c mul = get_mul(divider); divider 78 drivers/clk/tegra/clk-divider.c struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); divider 83 drivers/clk/tegra/clk-divider.c div = get_div(divider, rate, parent_rate); divider 87 drivers/clk/tegra/clk-divider.c if (divider->lock) divider 88 drivers/clk/tegra/clk-divider.c spin_lock_irqsave(divider->lock, flags); divider 90 drivers/clk/tegra/clk-divider.c val = readl_relaxed(divider->reg); divider 91 drivers/clk/tegra/clk-divider.c val &= ~(div_mask(divider) << divider->shift); divider 92 drivers/clk/tegra/clk-divider.c val |= div << divider->shift; divider 94 drivers/clk/tegra/clk-divider.c if (divider->flags & TEGRA_DIVIDER_UART) { divider 101 drivers/clk/tegra/clk-divider.c if (divider->flags & TEGRA_DIVIDER_FIXED) divider 102 drivers/clk/tegra/clk-divider.c val |= pll_out_override(divider); divider 104 drivers/clk/tegra/clk-divider.c writel_relaxed(val, divider->reg); divider 106 drivers/clk/tegra/clk-divider.c if (divider->lock) divider 107 drivers/clk/tegra/clk-divider.c spin_unlock_irqrestore(divider->lock, flags); divider 123 drivers/clk/tegra/clk-divider.c struct tegra_clk_frac_div *divider; divider 127 drivers/clk/tegra/clk-divider.c divider = kzalloc(sizeof(*divider), GFP_KERNEL); divider 128 drivers/clk/tegra/clk-divider.c if (!divider) { divider 140 drivers/clk/tegra/clk-divider.c divider->reg = reg; divider 141 drivers/clk/tegra/clk-divider.c divider->shift = shift; divider 142 drivers/clk/tegra/clk-divider.c divider->width = width; divider 143 drivers/clk/tegra/clk-divider.c divider->frac_width = frac_width; divider 144 drivers/clk/tegra/clk-divider.c divider->lock = lock; divider 145 drivers/clk/tegra/clk-divider.c divider->flags = clk_divider_flags; divider 148 drivers/clk/tegra/clk-divider.c divider->hw.init = &init; divider 150 drivers/clk/tegra/clk-divider.c clk = clk_register(NULL, ÷r->hw); divider 152 drivers/clk/tegra/clk-divider.c kfree(divider); divider 40 drivers/clk/tegra/clk-periph.c struct clk_hw *div_hw = &periph->divider.hw; divider 52 drivers/clk/tegra/clk-periph.c struct clk_hw *div_hw = &periph->divider.hw; divider 64 drivers/clk/tegra/clk-periph.c struct clk_hw *div_hw = &periph->divider.hw; divider 161 drivers/clk/tegra/clk-periph.c periph->divider.reg = div ? (clk_base + offset) : NULL; divider 171 drivers/clk/tegra/clk-periph.c periph->divider.hw.clk = div ? clk : NULL; divider 942 drivers/clk/tegra/clk-tegra-periph.c data->flags, data->periph.divider.flags, divider 943 drivers/clk/tegra/clk-tegra-periph.c data->periph.divider.shift, divider 944 drivers/clk/tegra/clk-tegra-periph.c data->periph.divider.width, divider 945 drivers/clk/tegra/clk-tegra-periph.c data->periph.divider.frac_width, divider 946 drivers/clk/tegra/clk-tegra-periph.c data->periph.divider.lock); divider 559 drivers/clk/tegra/clk.h struct tegra_clk_frac_div divider; divider 593 drivers/clk/tegra/clk.h .divider = { \ divider 456 drivers/clk/ti/adpll.c u32 frac_m, divider, v; divider 469 drivers/clk/ti/adpll.c divider = (readw_relaxed(d->regs + ADPLL_M2NDIV_OFFSET) + 1) << 18; divider 472 drivers/clk/ti/adpll.c do_div(rate, divider); divider 57 drivers/clk/ti/clk-dra7-atl.c u32 divider; /* Cached divider value */ divider 93 drivers/clk/ti/clk-dra7-atl.c cdesc->divider - 1); divider 128 drivers/clk/ti/clk-dra7-atl.c return parent_rate / cdesc->divider; divider 134 drivers/clk/ti/clk-dra7-atl.c unsigned divider; divider 136 drivers/clk/ti/clk-dra7-atl.c divider = (*parent_rate + rate / 2) / rate; divider 137 drivers/clk/ti/clk-dra7-atl.c if (divider > DRA7_ATL_DIVIDER_MASK + 1) divider 138 drivers/clk/ti/clk-dra7-atl.c divider = DRA7_ATL_DIVIDER_MASK + 1; divider 140 drivers/clk/ti/clk-dra7-atl.c return *parent_rate / divider; divider 147 drivers/clk/ti/clk-dra7-atl.c u32 divider; divider 153 drivers/clk/ti/clk-dra7-atl.c divider = ((parent_rate + rate / 2) / rate) - 1; divider 154 drivers/clk/ti/clk-dra7-atl.c if (divider > DRA7_ATL_DIVIDER_MASK) divider 155 drivers/clk/ti/clk-dra7-atl.c divider = DRA7_ATL_DIVIDER_MASK; divider 157 drivers/clk/ti/clk-dra7-atl.c cdesc->divider = divider + 1; divider 185 drivers/clk/ti/clk-dra7-atl.c clk_hw->divider = 1; divider 42 drivers/clk/ti/divider.c static unsigned int _get_maxdiv(struct clk_omap_divider *divider) divider 44 drivers/clk/ti/divider.c if (divider->flags & CLK_DIVIDER_ONE_BASED) divider 45 drivers/clk/ti/divider.c return div_mask(divider); divider 46 drivers/clk/ti/divider.c if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) divider 47 drivers/clk/ti/divider.c return 1 << div_mask(divider); divider 48 drivers/clk/ti/divider.c if (divider->table) divider 49 drivers/clk/ti/divider.c return _get_table_maxdiv(divider->table); divider 50 drivers/clk/ti/divider.c return div_mask(divider) + 1; divider 64 drivers/clk/ti/divider.c static unsigned int _get_div(struct clk_omap_divider *divider, unsigned int val) divider 66 drivers/clk/ti/divider.c if (divider->flags & CLK_DIVIDER_ONE_BASED) divider 68 drivers/clk/ti/divider.c if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) divider 70 drivers/clk/ti/divider.c if (divider->table) divider 71 drivers/clk/ti/divider.c return _get_table_div(divider->table, val); divider 86 drivers/clk/ti/divider.c static unsigned int _get_val(struct clk_omap_divider *divider, u8 div) divider 88 drivers/clk/ti/divider.c if (divider->flags & CLK_DIVIDER_ONE_BASED) divider 90 drivers/clk/ti/divider.c if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) divider 92 drivers/clk/ti/divider.c if (divider->table) divider 93 drivers/clk/ti/divider.c return _get_table_val(divider->table, div); divider 100 drivers/clk/ti/divider.c struct clk_omap_divider *divider = to_clk_omap_divider(hw); divider 103 drivers/clk/ti/divider.c val = ti_clk_ll_ops->clk_readl(÷r->reg) >> divider->shift; divider 104 drivers/clk/ti/divider.c val &= div_mask(divider); divider 106 drivers/clk/ti/divider.c div = _get_div(divider, val); divider 108 drivers/clk/ti/divider.c WARN(!(divider->flags & CLK_DIVIDER_ALLOW_ZERO), divider 134 drivers/clk/ti/divider.c static bool _is_valid_div(struct clk_omap_divider *divider, unsigned int div) divider 136 drivers/clk/ti/divider.c if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) divider 138 drivers/clk/ti/divider.c if (divider->table) divider 139 drivers/clk/ti/divider.c return _is_valid_table_div(divider->table, div); divider 175 drivers/clk/ti/divider.c struct clk_omap_divider *divider = to_clk_omap_divider(hw); divider 183 drivers/clk/ti/divider.c maxdiv = _get_maxdiv(divider); divider 187 drivers/clk/ti/divider.c bestdiv = _div_round(divider->table, parent_rate, rate); divider 200 drivers/clk/ti/divider.c if (!_is_valid_div(divider, i)) divider 222 drivers/clk/ti/divider.c bestdiv = _get_maxdiv(divider); divider 242 drivers/clk/ti/divider.c struct clk_omap_divider *divider; divider 249 drivers/clk/ti/divider.c divider = to_clk_omap_divider(hw); divider 252 drivers/clk/ti/divider.c value = _get_val(divider, div); divider 254 drivers/clk/ti/divider.c if (value > div_mask(divider)) divider 255 drivers/clk/ti/divider.c value = div_mask(divider); divider 257 drivers/clk/ti/divider.c if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { divider 258 drivers/clk/ti/divider.c val = div_mask(divider) << (divider->shift + 16); divider 260 drivers/clk/ti/divider.c val = ti_clk_ll_ops->clk_readl(÷r->reg); divider 261 drivers/clk/ti/divider.c val &= ~(div_mask(divider) << divider->shift); divider 263 drivers/clk/ti/divider.c val |= value << divider->shift; divider 264 drivers/clk/ti/divider.c ti_clk_ll_ops->clk_writel(val, ÷r->reg); divider 266 drivers/clk/ti/divider.c ti_clk_latch(÷r->reg, divider->latch); divider 279 drivers/clk/ti/divider.c struct clk_omap_divider *divider = to_clk_omap_divider(hw); divider 282 drivers/clk/ti/divider.c val = ti_clk_ll_ops->clk_readl(÷r->reg) >> divider->shift; divider 283 drivers/clk/ti/divider.c divider->context = val & div_mask(divider); divider 296 drivers/clk/ti/divider.c struct clk_omap_divider *divider = to_clk_omap_divider(hw); divider 299 drivers/clk/ti/divider.c val = ti_clk_ll_ops->clk_readl(÷r->reg); divider 300 drivers/clk/ti/divider.c val &= ~(div_mask(divider) << divider->shift); divider 301 drivers/clk/ti/divider.c val |= divider->context << divider->shift; divider 302 drivers/clk/ti/divider.c ti_clk_ll_ops->clk_writel(val, ÷r->reg); divider 62 drivers/clk/zynqmp/divider.c struct zynqmp_clk_divider *divider = to_zynqmp_clk_divider(hw); divider 64 drivers/clk/zynqmp/divider.c u32 clk_id = divider->clk_id; divider 65 drivers/clk/zynqmp/divider.c u32 div_type = divider->div_type; divider 82 drivers/clk/zynqmp/divider.c WARN(!(divider->flags & CLK_DIVIDER_ALLOW_ZERO), divider 103 drivers/clk/zynqmp/divider.c struct zynqmp_clk_divider *divider = to_zynqmp_clk_divider(hw); divider 105 drivers/clk/zynqmp/divider.c u32 clk_id = divider->clk_id; divider 106 drivers/clk/zynqmp/divider.c u32 div_type = divider->div_type; divider 112 drivers/clk/zynqmp/divider.c if (divider->flags & CLK_DIVIDER_READ_ONLY) { divider 128 drivers/clk/zynqmp/divider.c if ((clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) && divider->is_frac) divider 146 drivers/clk/zynqmp/divider.c struct zynqmp_clk_divider *divider = to_zynqmp_clk_divider(hw); divider 148 drivers/clk/zynqmp/divider.c u32 clk_id = divider->clk_id; divider 149 drivers/clk/zynqmp/divider.c u32 div_type = divider->div_type; divider 795 drivers/clocksource/arm_arch_timer.c static void arch_timer_evtstrm_enable(int divider) divider 801 drivers/clocksource/arm_arch_timer.c cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT) divider 94 drivers/cpufreq/armada-37xx-cpufreq.c u8 divider[LOAD_LEVEL_NR]; divider 99 drivers/cpufreq/armada-37xx-cpufreq.c {.cpu_freq_max = 1200*1000*1000, .divider = {1, 2, 4, 6} }, divider 100 drivers/cpufreq/armada-37xx-cpufreq.c {.cpu_freq_max = 1000*1000*1000, .divider = {1, 2, 4, 5} }, divider 101 drivers/cpufreq/armada-37xx-cpufreq.c {.cpu_freq_max = 800*1000*1000, .divider = {1, 2, 3, 4} }, divider 102 drivers/cpufreq/armada-37xx-cpufreq.c {.cpu_freq_max = 600*1000*1000, .divider = {2, 4, 5, 6} }, divider 123 drivers/cpufreq/armada-37xx-cpufreq.c struct clk *clk, u8 *divider) divider 149 drivers/cpufreq/armada-37xx-cpufreq.c val |= divider[load_lvl] << ARMADA_37XX_NB_TBG_DIV_OFF; divider 442 drivers/cpufreq/armada-37xx-cpufreq.c armada37xx_cpufreq_dvfs_setup(nb_pm_base, clk, dvfs->divider); divider 448 drivers/cpufreq/armada-37xx-cpufreq.c freq = base_frequency / dvfs->divider[load_lvl]; divider 475 drivers/cpufreq/armada-37xx-cpufreq.c freq = cur_frequency / dvfs->divider[load_lvl]; divider 359 drivers/firmware/xilinx/zynqmp.c static int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) divider 361 drivers/firmware/xilinx/zynqmp.c return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider, divider 375 drivers/firmware/xilinx/zynqmp.c static int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) divider 382 drivers/firmware/xilinx/zynqmp.c *divider = ret_payload[1]; divider 71 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c uint32_t dentist_get_did_from_divider(int divider) divider 76 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c if (divider < DENTIST_DIVIDER_RANGE_2_START) { divider 77 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c if (divider < DENTIST_DIVIDER_RANGE_1_START) divider 81 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c + (divider - DENTIST_DIVIDER_RANGE_1_START) divider 83 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c } else if (divider < DENTIST_DIVIDER_RANGE_3_START) { divider 85 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c + (divider - DENTIST_DIVIDER_RANGE_2_START) divider 87 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c } else if (divider < DENTIST_DIVIDER_RANGE_4_START) { divider 89 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c + (divider - DENTIST_DIVIDER_RANGE_3_START) divider 93 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c + (divider - DENTIST_DIVIDER_RANGE_4_START) divider 46 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h uint32_t dentist_get_did_from_divider(int divider); divider 61 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c int divider = (ref_dppclk + 0xfe) / 0xff; divider 63 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c ref_dppclk /= divider; divider 64 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c req_dppclk = (req_dppclk + divider - 1) / divider; divider 238 drivers/gpu/drm/amd/display/dc/inc/hw/opp.h uint32_t divider; /* (actually HW range is min/divider; divider !=0) */ divider 341 drivers/gpu/drm/exynos/exynos_drm_scaler.c unsigned int timer, unsigned int divider) divider 347 drivers/gpu/drm/exynos/exynos_drm_scaler.c val |= SCALER_TIMEOUT_CTRL_SET_TIMER_DIV(divider); divider 569 drivers/gpu/drm/i915/display/intel_cdclk.c u32 divider; divider 571 drivers/gpu/drm/i915/display/intel_cdclk.c divider = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, divider 577 drivers/gpu/drm/i915/display/intel_cdclk.c val |= divider; divider 581 drivers/gpu/drm/i915/display/intel_cdclk.c CCK_FREQUENCY_STATUS) == (divider << CCK_FREQUENCY_STATUS_SHIFT), divider 1261 drivers/gpu/drm/i915/display/intel_cdclk.c u32 divider; divider 1271 drivers/gpu/drm/i915/display/intel_cdclk.c divider = I915_READ(CDCLK_CTL) & BXT_CDCLK_CD2X_DIV_SEL_MASK; divider 1273 drivers/gpu/drm/i915/display/intel_cdclk.c switch (divider) { divider 1288 drivers/gpu/drm/i915/display/intel_cdclk.c MISSING_CASE(divider); divider 1341 drivers/gpu/drm/i915/display/intel_cdclk.c u32 val, divider; divider 1351 drivers/gpu/drm/i915/display/intel_cdclk.c divider = BXT_CDCLK_CD2X_DIV_SEL_1; divider 1355 drivers/gpu/drm/i915/display/intel_cdclk.c divider = BXT_CDCLK_CD2X_DIV_SEL_1_5; divider 1358 drivers/gpu/drm/i915/display/intel_cdclk.c divider = BXT_CDCLK_CD2X_DIV_SEL_2; divider 1361 drivers/gpu/drm/i915/display/intel_cdclk.c divider = BXT_CDCLK_CD2X_DIV_SEL_4; divider 1386 drivers/gpu/drm/i915/display/intel_cdclk.c val = divider | skl_cdclk_decimal(cdclk); divider 1553 drivers/gpu/drm/i915/display/intel_cdclk.c u32 divider; divider 1563 drivers/gpu/drm/i915/display/intel_cdclk.c divider = I915_READ(CDCLK_CTL) & BXT_CDCLK_CD2X_DIV_SEL_MASK; divider 1565 drivers/gpu/drm/i915/display/intel_cdclk.c switch (divider) { divider 1573 drivers/gpu/drm/i915/display/intel_cdclk.c MISSING_CASE(divider); divider 1627 drivers/gpu/drm/i915/display/intel_cdclk.c u32 val, divider; divider 1647 drivers/gpu/drm/i915/display/intel_cdclk.c divider = BXT_CDCLK_CD2X_DIV_SEL_1; divider 1650 drivers/gpu/drm/i915/display/intel_cdclk.c divider = BXT_CDCLK_CD2X_DIV_SEL_2; divider 1661 drivers/gpu/drm/i915/display/intel_cdclk.c val = divider | skl_cdclk_decimal(cdclk); divider 2718 drivers/gpu/drm/i915/display/intel_cdclk.c int divider, fraction; divider 2722 drivers/gpu/drm/i915/display/intel_cdclk.c divider = 24000; divider 2726 drivers/gpu/drm/i915/display/intel_cdclk.c divider = 19000; divider 2730 drivers/gpu/drm/i915/display/intel_cdclk.c rawclk = CNP_RAWCLK_DIV(divider / 1000); divider 2741 drivers/gpu/drm/i915/display/intel_cdclk.c return divider + fraction; divider 176 drivers/gpu/drm/i915/display/intel_display.c int divider; divider 179 drivers/gpu/drm/i915/display/intel_display.c divider = val & CCK_FREQUENCY_VALUES; divider 182 drivers/gpu/drm/i915/display/intel_display.c (divider << CCK_FREQUENCY_STATUS_SHIFT), divider 185 drivers/gpu/drm/i915/display/intel_display.c return DIV_ROUND_CLOSEST(ref_freq << 1, divider + 1); divider 1136 drivers/gpu/drm/i915/display/intel_dpll_mgr.c unsigned int divider) divider 1150 drivers/gpu/drm/i915/display/intel_dpll_mgr.c ctx->p = divider; divider 1158 drivers/gpu/drm/i915/display/intel_dpll_mgr.c ctx->p = divider; divider 59 drivers/gpu/drm/i915/display/intel_lvds.c int divider; divider 171 drivers/gpu/drm/i915/display/intel_lvds.c pps->divider = REG_FIELD_GET(PP_REFERENCE_DIVIDER_MASK, val); divider 198 drivers/gpu/drm/i915/display/intel_lvds.c pps->divider, pps->port, pps->powerdown_on_reset); divider 222 drivers/gpu/drm/i915/display/intel_lvds.c REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, pps->divider) | divider 1213 drivers/gpu/drm/i915/display/vlv_dsi.c static u16 txclkesc(u32 divider, unsigned int us) divider 1215 drivers/gpu/drm/i915/display/vlv_dsi.c switch (divider) { divider 161 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c u64 divider; divider 169 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c divider = fref; divider 171 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c divider = fref * 2; divider 174 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c dec_multiple = div_u64(pll_freq * multiplier, divider); divider 92 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c u32 divider; divider 95 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c divider = pll->m * clk->pl_to_div(pll->pl); divider 97 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c return rate / divider / 2; divider 479 drivers/gpu/drm/radeon/r600_dpm.c u32 index, u32 divider) divider 482 drivers/gpu/drm/radeon/r600_dpm.c STEP_0_SPLL_POST_DIV(divider), ~STEP_0_SPLL_POST_DIV_MASK); divider 486 drivers/gpu/drm/radeon/r600_dpm.c u32 index, u32 divider) divider 489 drivers/gpu/drm/radeon/r600_dpm.c STEP_0_SPLL_REF_DIV(divider), ~STEP_0_SPLL_REF_DIV_MASK); divider 493 drivers/gpu/drm/radeon/r600_dpm.c u32 index, u32 divider) divider 496 drivers/gpu/drm/radeon/r600_dpm.c STEP_0_SPLL_FB_DIV(divider), ~STEP_0_SPLL_FB_DIV_MASK); divider 181 drivers/gpu/drm/radeon/r600_dpm.h u32 index, u32 divider); divider 183 drivers/gpu/drm/radeon/r600_dpm.h u32 index, u32 divider); divider 185 drivers/gpu/drm/radeon/r600_dpm.h u32 index, u32 divider); divider 754 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int divider; divider 822 drivers/gpu/drm/radeon/radeon_legacy_crtc.c for (post_div = &post_divs[0]; post_div->divider; ++post_div) { divider 823 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (post_div->divider == post_divider) divider 827 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (!post_div->divider) divider 380 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 index, u32 divider) divider 383 drivers/gpu/drm/radeon/rv6xx_dpm.c LEVEL0_MPLL_POST_DIV(divider), ~LEVEL0_MPLL_POST_DIV_MASK); divider 387 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 index, u32 divider) divider 389 drivers/gpu/drm/radeon/rv6xx_dpm.c WREG32_P(MPLL_FREQ_LEVEL_0 + (index * 4), LEVEL0_MPLL_FB_DIV(divider), divider 394 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 index, u32 divider) divider 397 drivers/gpu/drm/radeon/rv6xx_dpm.c LEVEL0_MPLL_REF_DIV(divider), ~LEVEL0_MPLL_REF_DIV_MASK); divider 474 drivers/gpu/drm/radeon/sumo_dpm.c u32 index, u32 divider) divider 481 drivers/gpu/drm/radeon/sumo_dpm.c SCLK_FSTATE_0_DIV(divider), ~SCLK_FSTATE_0_DIV_MASK); divider 484 drivers/gpu/drm/radeon/sumo_dpm.c SCLK_FSTATE_1_DIV(divider), ~SCLK_FSTATE_1_DIV_MASK); divider 487 drivers/gpu/drm/radeon/sumo_dpm.c SCLK_FSTATE_2_DIV(divider), ~SCLK_FSTATE_2_DIV_MASK); divider 490 drivers/gpu/drm/radeon/sumo_dpm.c SCLK_FSTATE_3_DIV(divider), ~SCLK_FSTATE_3_DIV_MASK); divider 494 drivers/gpu/drm/radeon/sumo_dpm.c u32 index, u32 divider) divider 502 drivers/gpu/drm/radeon/sumo_dpm.c dpm_ctrl |= (divider << (index * 3)); divider 508 drivers/gpu/drm/radeon/sumo_dpm.c u32 index, u32 divider) divider 516 drivers/gpu/drm/radeon/sumo_dpm.c dpm_ctrl |= (divider << (index * 3)); divider 614 drivers/gpu/drm/radeon/trinity_dpm.c u32 index, u32 divider) divider 621 drivers/gpu/drm/radeon/trinity_dpm.c value |= DS_DIV(divider); divider 626 drivers/gpu/drm/radeon/trinity_dpm.c u32 index, u32 divider) divider 633 drivers/gpu/drm/radeon/trinity_dpm.c value |= DS_SH_DIV(divider); divider 1831 drivers/gpu/drm/radeon/trinity_dpm.c u32 divider; divider 1834 drivers/gpu/drm/radeon/trinity_dpm.c divider = did * 25; divider 1836 drivers/gpu/drm/radeon/trinity_dpm.c divider = (did - 64) * 50 + 1600; divider 1838 drivers/gpu/drm/radeon/trinity_dpm.c divider = (did - 96) * 100 + 3200; divider 1840 drivers/gpu/drm/radeon/trinity_dpm.c divider = 128 * 100; divider 1844 drivers/gpu/drm/radeon/trinity_dpm.c return ((pi->sys_info.dentist_vco_freq * 100) + (divider - 1)) / divider; divider 516 drivers/gpu/drm/vc4/vc4_dsi.c u32 divider; divider 788 drivers/gpu/drm/vc4/vc4_dsi.c unsigned long pll_clock = pixel_clock_hz * dsi->divider; divider 789 drivers/gpu/drm/vc4/vc4_dsi.c int divider; divider 794 drivers/gpu/drm/vc4/vc4_dsi.c for (divider = 1; divider < 8; divider++) { divider 795 drivers/gpu/drm/vc4/vc4_dsi.c if (parent_rate / divider < pll_clock) { divider 796 drivers/gpu/drm/vc4/vc4_dsi.c divider--; divider 804 drivers/gpu/drm/vc4/vc4_dsi.c pll_clock = parent_rate / divider; divider 805 drivers/gpu/drm/vc4/vc4_dsi.c pixel_clock_hz = pll_clock / dsi->divider; divider 850 drivers/gpu/drm/vc4/vc4_dsi.c phy_clock = (pixel_clock_hz + 1000) * dsi->divider; divider 1061 drivers/gpu/drm/vc4/vc4_dsi.c VC4_SET_FIELD(dsi->divider, divider 1251 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 24 / dsi->lanes; divider 1255 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 24 / dsi->lanes; divider 1259 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 18 / dsi->lanes; divider 1263 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 16 / dsi->lanes; divider 107 drivers/hwmon/mlxreg-fan.c int divider; divider 130 drivers/hwmon/mlxreg-fan.c *val = MLXREG_FAN_GET_RPM(regval, fan->divider, divider 383 drivers/hwmon/mlxreg-fan.c fan->divider = regval * MLXREG_FAN_TACHO_DIV_MIN; divider 397 drivers/hwmon/mlxreg-fan.c fan->divider = MLXREG_FAN_TACHO_DIV_DEF; divider 447 drivers/hwmon/mlxreg-fan.c fan->divider = data->bit; divider 88 drivers/i2c/busses/i2c-bcm2835.c u32 divider = DIV_ROUND_UP(parent_rate, rate); divider 95 drivers/i2c/busses/i2c-bcm2835.c if (divider & 1) divider 96 drivers/i2c/busses/i2c-bcm2835.c divider++; divider 97 drivers/i2c/busses/i2c-bcm2835.c if ((divider < BCM2835_I2C_CDIV_MIN) || divider 98 drivers/i2c/busses/i2c-bcm2835.c (divider > BCM2835_I2C_CDIV_MAX)) divider 101 drivers/i2c/busses/i2c-bcm2835.c return divider; divider 109 drivers/i2c/busses/i2c-bcm2835.c u32 divider = clk_bcm2835_i2c_calc_divider(rate, parent_rate); divider 111 drivers/i2c/busses/i2c-bcm2835.c if (divider == -EINVAL) divider 114 drivers/i2c/busses/i2c-bcm2835.c bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DIV, divider); divider 121 drivers/i2c/busses/i2c-bcm2835.c fedl = max(divider / 16, 1u); divider 127 drivers/i2c/busses/i2c-bcm2835.c redl = max(divider / 4, 1u); divider 138 drivers/i2c/busses/i2c-bcm2835.c u32 divider = clk_bcm2835_i2c_calc_divider(rate, *parent_rate); divider 140 drivers/i2c/busses/i2c-bcm2835.c return DIV_ROUND_UP(*parent_rate, divider); divider 147 drivers/i2c/busses/i2c-bcm2835.c u32 divider = bcm2835_i2c_readl(div->i2c_dev, BCM2835_I2C_DIV); divider 149 drivers/i2c/busses/i2c-bcm2835.c return DIV_ROUND_UP(parent_rate, divider); divider 76 drivers/i2c/busses/i2c-mpc.c u16 divider; divider 206 drivers/i2c/busses/i2c-mpc.c u32 divider; divider 216 drivers/i2c/busses/i2c-mpc.c divider = mpc5xxx_get_bus_frequency(node) / clock; divider 227 drivers/i2c/busses/i2c-mpc.c if (div->divider >= divider) divider 231 drivers/i2c/busses/i2c-mpc.c *real_clk = mpc5xxx_get_bus_frequency(node) / div->divider; divider 393 drivers/i2c/busses/i2c-mpc.c u32 divider; divider 402 drivers/i2c/busses/i2c-mpc.c divider = fsl_get_sys_freq() / clock / prescaler; divider 405 drivers/i2c/busses/i2c-mpc.c fsl_get_sys_freq(), clock, divider); divider 413 drivers/i2c/busses/i2c-mpc.c if (div->divider >= divider) divider 417 drivers/i2c/busses/i2c-mpc.c *real_clk = fsl_get_sys_freq() / prescaler / div->divider; divider 691 drivers/i2c/busses/i2c-mxs.c uint32_t divider; divider 696 drivers/i2c/busses/i2c-mxs.c divider = DIV_ROUND_UP(clk, speed); divider 698 drivers/i2c/busses/i2c-mxs.c if (divider < 25) { divider 703 drivers/i2c/busses/i2c-mxs.c divider = 25; divider 707 drivers/i2c/busses/i2c-mxs.c clk / divider / 1000, clk / divider % 1000); divider 708 drivers/i2c/busses/i2c-mxs.c } else if (divider > 1897) { divider 713 drivers/i2c/busses/i2c-mxs.c divider = 1897; divider 717 drivers/i2c/busses/i2c-mxs.c clk / divider / 1000, clk / divider % 1000); divider 736 drivers/i2c/busses/i2c-mxs.c low_count = DIV_ROUND_CLOSEST(divider * 13, (13 + 6)); divider 737 drivers/i2c/busses/i2c-mxs.c high_count = DIV_ROUND_CLOSEST(divider * 6, (13 + 6)); divider 742 drivers/i2c/busses/i2c-mxs.c low_count = DIV_ROUND_CLOSEST(divider * 47, (47 + 40)); divider 743 drivers/i2c/busses/i2c-mxs.c high_count = DIV_ROUND_CLOSEST(divider * 40, (47 + 40)); divider 752 drivers/i2c/busses/i2c-mxs.c speed, clk / divider, divider, low_count, high_count, divider 178 drivers/iio/adc/cpcap-adc.c unsigned short divider; divider 198 drivers/iio/adc/cpcap-adc.c int divider; divider 686 drivers/iio/adc/cpcap-adc.c if (phase_tbl[index].divider == 0) divider 688 drivers/iio/adc/cpcap-adc.c req->result /= phase_tbl[index].divider; divider 698 drivers/iio/adc/cpcap-adc.c if (phase_tbl[index].divider == 0) divider 700 drivers/iio/adc/cpcap-adc.c req->result /= phase_tbl[index].divider; divider 776 drivers/iio/adc/cpcap-adc.c if (conv_tbl[index].divider == 0) divider 778 drivers/iio/adc/cpcap-adc.c req->result /= conv_tbl[index].divider; divider 222 drivers/iio/adc/stm32-dfsdm-core.c unsigned long clk_freq, divider; divider 270 drivers/iio/adc/stm32-dfsdm-core.c divider = div_u64_rem(clk_freq, spi_freq, &rem); divider 273 drivers/iio/adc/stm32-dfsdm-core.c divider++; divider 276 drivers/iio/adc/stm32-dfsdm-core.c if (divider < 2 || divider > 256) { divider 282 drivers/iio/adc/stm32-dfsdm-core.c priv->spi_clk_out_div = divider - 1; divider 103 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE), divider 706 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c if (d == st->chip_config.divider) { divider 717 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c st->chip_config.divider = d; divider 745 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); divider 93 drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h u8 divider; divider 262 drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h ((st)->chip_config.divider + 1) divider 266 drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h #define INV_MPU6050_DIVIDER_TO_FIFO_RATE(divider) \ divider 267 drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h (INV_MPU6050_INTERNAL_FREQ_HZ / ((divider) + 1)) divider 37 drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c const s32 divider = INV_MPU6050_FREQ_DIVIDER(st); divider 52 drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c delta = div_s64(timestamp - st->it_timestamp, divider); divider 66 drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c interval = (nb - 1) * st->chip_period * divider; divider 226 drivers/media/dvb-frontends/stv6110.c u32 nbsteps, divider, psd2, freq; divider 231 drivers/media/dvb-frontends/stv6110.c divider = (priv->regs[RSTV6110_TUNING2] & 0x0f) << 8; divider 232 drivers/media/dvb-frontends/stv6110.c divider += priv->regs[RSTV6110_TUNING1]; divider 239 drivers/media/dvb-frontends/stv6110.c freq = divider * (priv->mclk / 1000); divider 252 drivers/media/dvb-frontends/stv6110.c u32 divider, ref, p, presc, i, result_freq, vco_freq; divider 300 drivers/media/dvb-frontends/stv6110.c divider = (((frequency * 1000) + (ref >> 1)) / ref); divider 308 drivers/media/dvb-frontends/stv6110.c priv->regs[RSTV6110_TUNING2] |= (((divider) >> 8) & 0x0f); divider 311 drivers/media/dvb-frontends/stv6110.c priv->regs[RSTV6110_TUNING1] = (divider & 0xff); divider 329 drivers/media/dvb-frontends/stv6110.c vco_freq = divider * ((priv->mclk / 1000) / ((1 << (r_div_opt + 1)))); divider 111 drivers/media/dvb-frontends/stv6110x.c u32 rDiv, divider; divider 144 drivers/media/dvb-frontends/stv6110x.c divider = (frequency * R_DIV(rDivOpt) * pVal) / REFCLOCK_kHz; divider 145 drivers/media/dvb-frontends/stv6110x.c divider = (divider + 5) / 10; divider 148 drivers/media/dvb-frontends/stv6110x.c STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_N_DIV_11_8, MSB(divider)); divider 149 drivers/media/dvb-frontends/stv6110x.c STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG0], TNG0_N_DIV_7_0, LSB(divider)); divider 145 drivers/media/i2c/cx25840/cx25840-ir.c static inline unsigned int clock_divider_to_ns(unsigned int divider) divider 148 drivers/media/i2c/cx25840/cx25840-ir.c return DIV_ROUND_CLOSEST((divider + 1) * 1000, divider 158 drivers/media/i2c/cx25840/cx25840-ir.c static inline unsigned int clock_divider_to_carrier_freq(unsigned int divider) divider 160 drivers/media/i2c/cx25840/cx25840-ir.c return DIV_ROUND_CLOSEST(CX25840_IR_REFCLK_FREQ, (divider + 1) * 16); divider 170 drivers/media/i2c/cx25840/cx25840-ir.c static inline unsigned int clock_divider_to_freq(unsigned int divider, divider 174 drivers/media/i2c/cx25840/cx25840-ir.c (divider + 1) * rollovers); divider 215 drivers/media/i2c/cx25840/cx25840-ir.c static u32 clock_divider_to_resolution(u16 divider) divider 222 drivers/media/i2c/cx25840/cx25840-ir.c return DIV_ROUND_CLOSEST((1 << 2) * ((u32) divider + 1) * 1000, divider 226 drivers/media/i2c/cx25840/cx25840-ir.c static u64 pulse_width_count_to_ns(u16 count, u16 divider) divider 235 drivers/media/i2c/cx25840/cx25840-ir.c n = (((u64) count << 2) | 0x3) * (divider + 1) * 1000; /* millicycles */ divider 244 drivers/media/i2c/cx25840/cx25840-ir.c static u16 ns_to_pulse_width_count(u32 ns, u16 divider) divider 255 drivers/media/i2c/cx25840/cx25840-ir.c d = (1 << 2) * ((u32) divider + 1) * 1000; /* millicycles/count */ divider 268 drivers/media/i2c/cx25840/cx25840-ir.c static unsigned int pulse_width_count_to_us(u16 count, u16 divider) divider 277 drivers/media/i2c/cx25840/cx25840-ir.c n = (((u64) count << 2) | 0x3) * (divider + 1); /* cycles */ divider 413 drivers/media/i2c/cx25840/cx25840-ir.c u16 *divider) divider 415 drivers/media/i2c/cx25840/cx25840-ir.c *divider = carrier_freq_to_clock_divider(freq); divider 416 drivers/media/i2c/cx25840/cx25840-ir.c cx25840_write4(c, CX25840_IR_TXCLK_REG, *divider); divider 417 drivers/media/i2c/cx25840/cx25840-ir.c return clock_divider_to_carrier_freq(*divider); divider 422 drivers/media/i2c/cx25840/cx25840-ir.c u16 *divider) divider 424 drivers/media/i2c/cx25840/cx25840-ir.c *divider = carrier_freq_to_clock_divider(freq); divider 425 drivers/media/i2c/cx25840/cx25840-ir.c cx25840_write4(c, CX25840_IR_RXCLK_REG, *divider); divider 426 drivers/media/i2c/cx25840/cx25840-ir.c return clock_divider_to_carrier_freq(*divider); divider 430 drivers/media/i2c/cx25840/cx25840-ir.c u16 *divider) divider 437 drivers/media/i2c/cx25840/cx25840-ir.c *divider = pulse_clocks_to_clock_divider(pulse_clocks); divider 438 drivers/media/i2c/cx25840/cx25840-ir.c cx25840_write4(c, CX25840_IR_TXCLK_REG, *divider); divider 439 drivers/media/i2c/cx25840/cx25840-ir.c return (u32) pulse_width_count_to_ns(FIFO_RXTX, *divider); divider 443 drivers/media/i2c/cx25840/cx25840-ir.c u16 *divider) divider 450 drivers/media/i2c/cx25840/cx25840-ir.c *divider = pulse_clocks_to_clock_divider(pulse_clocks); divider 451 drivers/media/i2c/cx25840/cx25840-ir.c cx25840_write4(c, CX25840_IR_RXCLK_REG, *divider); divider 452 drivers/media/i2c/cx25840/cx25840-ir.c return (u32) pulse_width_count_to_ns(FIFO_RXTX, *divider); divider 653 drivers/media/i2c/cx25840/cx25840-ir.c u16 divider; divider 662 drivers/media/i2c/cx25840/cx25840-ir.c divider = (u16) atomic_read(&ir_state->rxclk_divider); divider 691 drivers/media/i2c/cx25840/cx25840-ir.c (u16) (p->hw_fifo_data & FIFO_RXTX), divider); divider 409 drivers/media/i2c/mt9t112.c priv->info->divider.m, priv->info->divider.n, divider 410 drivers/media/i2c/mt9t112.c priv->info->divider.p1, priv->info->divider.p2, divider 411 drivers/media/i2c/mt9t112.c priv->info->divider.p3, priv->info->divider.p4, divider 412 drivers/media/i2c/mt9t112.c priv->info->divider.p5, priv->info->divider.p6, divider 413 drivers/media/i2c/mt9t112.c priv->info->divider.p7); divider 184 drivers/media/pci/cx23885/cx23888-ir.c static inline unsigned int clock_divider_to_ns(unsigned int divider) divider 187 drivers/media/pci/cx23885/cx23888-ir.c return DIV_ROUND_CLOSEST((divider + 1) * 1000, divider 197 drivers/media/pci/cx23885/cx23888-ir.c static inline unsigned int clock_divider_to_carrier_freq(unsigned int divider) divider 199 drivers/media/pci/cx23885/cx23888-ir.c return DIV_ROUND_CLOSEST(CX23888_IR_REFCLK_FREQ, (divider + 1) * 16); divider 209 drivers/media/pci/cx23885/cx23888-ir.c static inline unsigned int clock_divider_to_freq(unsigned int divider, divider 213 drivers/media/pci/cx23885/cx23888-ir.c (divider + 1) * rollovers); divider 254 drivers/media/pci/cx23885/cx23888-ir.c static u32 clock_divider_to_resolution(u16 divider) divider 261 drivers/media/pci/cx23885/cx23888-ir.c return DIV_ROUND_CLOSEST((1 << 2) * ((u32) divider + 1) * 1000, divider 265 drivers/media/pci/cx23885/cx23888-ir.c static u64 pulse_width_count_to_ns(u16 count, u16 divider) divider 274 drivers/media/pci/cx23885/cx23888-ir.c n = (((u64) count << 2) | 0x3) * (divider + 1) * 1000; /* millicycles */ divider 281 drivers/media/pci/cx23885/cx23888-ir.c static unsigned int pulse_width_count_to_us(u16 count, u16 divider) divider 290 drivers/media/pci/cx23885/cx23888-ir.c n = (((u64) count << 2) | 0x3) * (divider + 1); /* cycles */ divider 433 drivers/media/pci/cx23885/cx23888-ir.c u16 *divider) divider 435 drivers/media/pci/cx23885/cx23888-ir.c *divider = carrier_freq_to_clock_divider(freq); divider 436 drivers/media/pci/cx23885/cx23888-ir.c cx23888_ir_write4(dev, CX23888_IR_TXCLK_REG, *divider); divider 437 drivers/media/pci/cx23885/cx23888-ir.c return clock_divider_to_carrier_freq(*divider); divider 442 drivers/media/pci/cx23885/cx23888-ir.c u16 *divider) divider 444 drivers/media/pci/cx23885/cx23888-ir.c *divider = carrier_freq_to_clock_divider(freq); divider 445 drivers/media/pci/cx23885/cx23888-ir.c cx23888_ir_write4(dev, CX23888_IR_RXCLK_REG, *divider); divider 446 drivers/media/pci/cx23885/cx23888-ir.c return clock_divider_to_carrier_freq(*divider); divider 450 drivers/media/pci/cx23885/cx23888-ir.c u16 *divider) divider 457 drivers/media/pci/cx23885/cx23888-ir.c *divider = pulse_clocks_to_clock_divider(pulse_clocks); divider 458 drivers/media/pci/cx23885/cx23888-ir.c cx23888_ir_write4(dev, CX23888_IR_TXCLK_REG, *divider); divider 459 drivers/media/pci/cx23885/cx23888-ir.c return (u32) pulse_width_count_to_ns(FIFO_RXTX, *divider); divider 463 drivers/media/pci/cx23885/cx23888-ir.c u16 *divider) divider 470 drivers/media/pci/cx23885/cx23888-ir.c *divider = pulse_clocks_to_clock_divider(pulse_clocks); divider 471 drivers/media/pci/cx23885/cx23888-ir.c cx23888_ir_write4(dev, CX23888_IR_RXCLK_REG, *divider); divider 472 drivers/media/pci/cx23885/cx23888-ir.c return (u32) pulse_width_count_to_ns(FIFO_RXTX, *divider); divider 654 drivers/media/pci/cx23885/cx23888-ir.c u16 divider = (u16) atomic_read(&state->rxclk_divider); divider 686 drivers/media/pci/cx23885/cx23888-ir.c (u16) (p->hw_fifo_data & FIFO_RXTX), divider); divider 161 drivers/media/platform/omap3isp/isp.c static void isp_xclk_update(struct isp_xclk *xclk, u32 divider) divider 167 drivers/media/platform/omap3isp/isp.c divider << ISPTCTRL_CTRL_DIVA_SHIFT); divider 172 drivers/media/platform/omap3isp/isp.c divider << ISPTCTRL_CTRL_DIVB_SHIFT); divider 199 drivers/media/platform/omap3isp/isp.c isp_xclk_update(xclk, xclk->divider); divider 222 drivers/media/platform/omap3isp/isp.c return parent_rate / xclk->divider; divider 227 drivers/media/platform/omap3isp/isp.c u32 divider; divider 237 drivers/media/platform/omap3isp/isp.c divider = DIV_ROUND_CLOSEST(parent_rate, *rate); divider 238 drivers/media/platform/omap3isp/isp.c if (divider >= ISPTCTRL_CTRL_DIV_BYPASS) divider 239 drivers/media/platform/omap3isp/isp.c divider = ISPTCTRL_CTRL_DIV_BYPASS - 1; divider 241 drivers/media/platform/omap3isp/isp.c *rate = parent_rate / divider; divider 242 drivers/media/platform/omap3isp/isp.c return divider; divider 257 drivers/media/platform/omap3isp/isp.c u32 divider; divider 259 drivers/media/platform/omap3isp/isp.c divider = isp_xclk_calc_divider(&rate, parent_rate); divider 263 drivers/media/platform/omap3isp/isp.c xclk->divider = divider; divider 265 drivers/media/platform/omap3isp/isp.c isp_xclk_update(xclk, divider); divider 270 drivers/media/platform/omap3isp/isp.c __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider); divider 311 drivers/media/platform/omap3isp/isp.c xclk->divider = 1; divider 133 drivers/media/platform/omap3isp/isp.h unsigned int divider; divider 74 drivers/media/rc/ir-xmp-decoder.c int divider, i; divider 92 drivers/media/rc/ir-xmp-decoder.c divider = (n[3] - XMP_NIBBLE_PREFIX) / 15 - 2000; divider 93 drivers/media/rc/ir-xmp-decoder.c if (divider < 50) { divider 95 drivers/media/rc/ir-xmp-decoder.c divider); divider 102 drivers/media/rc/ir-xmp-decoder.c n[i] = (n[i] - XMP_NIBBLE_PREFIX) / divider; divider 431 drivers/media/usb/dvb-usb/dib0700_core.c u16 divider; divider 443 drivers/media/usb/dvb-usb/dib0700_core.c divider = (u16) (30000 / scl_kHz); divider 445 drivers/media/usb/dvb-usb/dib0700_core.c st->buf[2] = (u8) (divider >> 8); divider 446 drivers/media/usb/dvb-usb/dib0700_core.c st->buf[3] = (u8) (divider & 0xff); divider 447 drivers/media/usb/dvb-usb/dib0700_core.c divider = (u16) (72000 / scl_kHz); divider 448 drivers/media/usb/dvb-usb/dib0700_core.c st->buf[4] = (u8) (divider >> 8); divider 449 drivers/media/usb/dvb-usb/dib0700_core.c st->buf[5] = (u8) (divider & 0xff); divider 450 drivers/media/usb/dvb-usb/dib0700_core.c divider = (u16) (72000 / scl_kHz); /* clock: 72MHz */ divider 451 drivers/media/usb/dvb-usb/dib0700_core.c st->buf[6] = (u8) (divider >> 8); divider 452 drivers/media/usb/dvb-usb/dib0700_core.c st->buf[7] = (u8) (divider & 0xff); divider 392 drivers/mfd/sm501.c int divider; divider 411 drivers/mfd/sm501.c int divider; divider 418 drivers/mfd/sm501.c for (divider = 1; divider <= max_div; divider += 2) { divider 422 drivers/mfd/sm501.c diff = DIV_ROUND_CLOSEST(mclk, divider << shift) - freq; divider 431 drivers/mfd/sm501.c clock->divider = divider; divider 476 drivers/mfd/sm501.c return clock->mclk / (clock->divider << clock->shift); divider 499 drivers/mfd/sm501.c return clock->mclk / (clock->divider << clock->shift); divider 537 drivers/mfd/sm501.c if (to.divider == 3) divider 539 drivers/mfd/sm501.c else if (to.divider == 5) divider 547 drivers/mfd/sm501.c if (to.divider == 3) divider 549 drivers/mfd/sm501.c else if (to.divider == 5) divider 562 drivers/mfd/sm501.c if (to.divider == 3) divider 574 drivers/mfd/sm501.c if (to.divider == 3) divider 792 drivers/mmc/host/mxcmmc.c unsigned int divider; divider 797 drivers/mmc/host/mxcmmc.c for (divider = 1; divider <= 0xF; divider++) { divider 800 drivers/mmc/host/mxcmmc.c x = (clk_in / (divider + 1)); divider 808 drivers/mmc/host/mxcmmc.c if (divider < 0x10) divider 817 drivers/mmc/host/mxcmmc.c mxcmci_writew(host, (prescaler << 4) | divider, MMC_REG_CLK_RATE); divider 820 drivers/mmc/host/mxcmmc.c prescaler, divider, clk_in, clk_ios); divider 179 drivers/net/can/sja1000/sja1000_platform.c u32 divider = priv->can.clock.freq * 2 / prop; divider 181 drivers/net/can/sja1000/sja1000_platform.c if (divider > 1) divider 182 drivers/net/can/sja1000/sja1000_platform.c priv->cdr |= divider / 2 - 1; divider 2370 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c static int normalize_vports_min_rate(struct mlx5_eswitch *esw, u32 divider) divider 2389 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c divider, divider 2412 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c u32 divider; divider 2437 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c divider = calculate_vports_min_rate_divider(esw); divider 2438 drivers/net/ethernet/mellanox/mlx5/core/eswitch.c err = normalize_vports_min_rate(esw, divider); divider 56 drivers/net/ethernet/mellanox/mlx5/core/eswitch.h #define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \ divider 57 drivers/net/ethernet/mellanox/mlx5/core/eswitch.h min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit) divider 217 drivers/power/supply/cpcap-battery.c s16 offset, u32 divider) divider 224 drivers/power/supply/cpcap-battery.c if (!divider) divider 248 drivers/power/supply/cpcap-battery.c do_div(tmp, divider); divider 578 drivers/soc/qcom/qcom-geni-se.c unsigned int divider; divider 589 drivers/soc/qcom/qcom-geni-se.c divider = DIV_ROUND_UP(tbl[i], req_freq); divider 590 drivers/soc/qcom/qcom-geni-se.c new_delta = req_freq - tbl[i] / divider; divider 947 drivers/soundwire/cadence_master.c int divider; divider 959 drivers/soundwire/cadence_master.c divider = (prop->mclk_freq / prop->max_clk_freq) - 1; divider 962 drivers/soundwire/cadence_master.c CDNS_MCP_CLK_MCLKD_MASK, divider); divider 964 drivers/soundwire/cadence_master.c CDNS_MCP_CLK_MCLKD_MASK, divider); divider 1015 drivers/soundwire/cadence_master.c int divider; divider 1022 drivers/soundwire/cadence_master.c divider = prop->mclk_freq * SDW_DOUBLE_RATE_FACTOR / divider 1024 drivers/soundwire/cadence_master.c divider--; /* divider is 1/(N+1) */ divider 1031 drivers/soundwire/cadence_master.c cdns_updatel(cdns, mcp_clkctrl_off, CDNS_MCP_CLK_MCLKD_MASK, divider); divider 159 drivers/spi/spi-orion.c unsigned divider = DIV_ROUND_UP(tclk_hz, speed); divider 162 drivers/spi/spi-orion.c if (divider < 16) { divider 164 drivers/spi/spi-orion.c spr = divider; divider 175 drivers/spi/spi-orion.c sppr = fls(divider) - 4; divider 182 drivers/spi/spi-orion.c divider = (divider + two_pow_sppr - 1) & -two_pow_sppr; divider 191 drivers/spi/spi-orion.c sppr = fls(divider) - 4; divider 192 drivers/spi/spi-orion.c spr = divider >> sppr; divider 79 drivers/spi/spi-xcomm.c unsigned int divider; divider 81 drivers/spi/spi-xcomm.c divider = DIV_ROUND_UP(SPI_XCOMM_CLOCK, t->speed_hz); divider 82 drivers/spi/spi-xcomm.c if (divider >= 64) divider 84 drivers/spi/spi-xcomm.c else if (divider >= 16) divider 326 drivers/staging/comedi/drivers/dt2811.c unsigned long long divider = div * mult; divider 336 drivers/staging/comedi/drivers/dt2811.c ns = divider * DT2811_OSC_BASE; divider 368 drivers/staging/comedi/drivers/dt282x.c unsigned int prescale, base, divider; divider 377 drivers/staging/comedi/drivers/dt282x.c divider = DIV_ROUND_CLOSEST(*ns, base); divider 380 drivers/staging/comedi/drivers/dt282x.c divider = (*ns) / base; divider 383 drivers/staging/comedi/drivers/dt282x.c divider = DIV_ROUND_UP(*ns, base); divider 386 drivers/staging/comedi/drivers/dt282x.c if (divider <= DT2821_DIVIDER_MAX) divider 389 drivers/staging/comedi/drivers/dt282x.c if (divider > DT2821_DIVIDER_MAX) { divider 391 drivers/staging/comedi/drivers/dt282x.c divider = DT2821_DIVIDER_MAX; divider 394 drivers/staging/comedi/drivers/dt282x.c *ns = divider * base; divider 396 drivers/staging/comedi/drivers/dt282x.c DT2821_TMRCTR_DIVIDER(divider); divider 345 drivers/staging/comedi/drivers/dt3000.c unsigned int divider, base, prescale; divider 355 drivers/staging/comedi/drivers/dt3000.c divider = DIV_ROUND_CLOSEST(*nanosec, base); divider 358 drivers/staging/comedi/drivers/dt3000.c divider = (*nanosec) / base; divider 361 drivers/staging/comedi/drivers/dt3000.c divider = DIV_ROUND_UP(*nanosec, base); divider 364 drivers/staging/comedi/drivers/dt3000.c if (divider < 65536) { divider 365 drivers/staging/comedi/drivers/dt3000.c *nanosec = divider * base; divider 366 drivers/staging/comedi/drivers/dt3000.c return (prescale << 16) | (divider); divider 372 drivers/staging/comedi/drivers/dt3000.c divider = 65535; divider 373 drivers/staging/comedi/drivers/dt3000.c *nanosec = divider * base; divider 374 drivers/staging/comedi/drivers/dt3000.c return (prescale << 16) | (divider); divider 459 drivers/staging/comedi/drivers/dt3000.c unsigned int divider; divider 473 drivers/staging/comedi/drivers/dt3000.c divider = dt3k_ns_to_timer(50, &cmd->convert_arg, cmd->flags); divider 474 drivers/staging/comedi/drivers/dt3000.c writew((divider >> 16), dev->mmio + DPR_PARAMS(1)); divider 475 drivers/staging/comedi/drivers/dt3000.c writew((divider & 0xffff), dev->mmio + DPR_PARAMS(2)); divider 1931 drivers/staging/comedi/drivers/ni_mio_common.c int divider; divider 1936 drivers/staging/comedi/drivers/ni_mio_common.c divider = DIV_ROUND_CLOSEST(nanosec, devpriv->clock_ns); divider 1939 drivers/staging/comedi/drivers/ni_mio_common.c divider = (nanosec) / devpriv->clock_ns; divider 1942 drivers/staging/comedi/drivers/ni_mio_common.c divider = DIV_ROUND_UP(nanosec, devpriv->clock_ns); divider 1945 drivers/staging/comedi/drivers/ni_mio_common.c return divider - 1; divider 507 drivers/staging/comedi/drivers/ni_pcidio.c int divider, base; divider 514 drivers/staging/comedi/drivers/ni_pcidio.c divider = DIV_ROUND_CLOSEST(*nanosec, base); divider 517 drivers/staging/comedi/drivers/ni_pcidio.c divider = (*nanosec) / base; divider 520 drivers/staging/comedi/drivers/ni_pcidio.c divider = DIV_ROUND_UP(*nanosec, base); divider 524 drivers/staging/comedi/drivers/ni_pcidio.c *nanosec = base * divider; divider 525 drivers/staging/comedi/drivers/ni_pcidio.c return divider; divider 377 drivers/staging/comedi/drivers/rtd520.c int divider; divider 382 drivers/staging/comedi/drivers/rtd520.c divider = DIV_ROUND_CLOSEST(*nanosec, base); divider 385 drivers/staging/comedi/drivers/rtd520.c divider = (*nanosec) / base; divider 388 drivers/staging/comedi/drivers/rtd520.c divider = DIV_ROUND_UP(*nanosec, base); divider 391 drivers/staging/comedi/drivers/rtd520.c if (divider < 2) divider 392 drivers/staging/comedi/drivers/rtd520.c divider = 2; /* min is divide by 2 */ divider 399 drivers/staging/comedi/drivers/rtd520.c *nanosec = base * divider; divider 400 drivers/staging/comedi/drivers/rtd520.c return divider - 1; /* countdown is divisor+1 */ divider 1629 drivers/staging/comedi/drivers/s626.c int divider, base; divider 1636 drivers/staging/comedi/drivers/s626.c divider = DIV_ROUND_CLOSEST(*nanosec, base); divider 1639 drivers/staging/comedi/drivers/s626.c divider = (*nanosec) / base; divider 1642 drivers/staging/comedi/drivers/s626.c divider = DIV_ROUND_UP(*nanosec, base); divider 1646 drivers/staging/comedi/drivers/s626.c *nanosec = base * divider; divider 1647 drivers/staging/comedi/drivers/s626.c return divider - 1; divider 29 drivers/staging/media/ipu3/ipu3-css-params.c unsigned int divider) divider 31 drivers/staging/media/ipu3/ipu3-css-params.c int i = fls(divider) - fls(counter); divider 36 drivers/staging/media/ipu3/ipu3-css-params.c if (divider >> i < counter) divider 123 drivers/video/fbdev/aty/mach64_ct.c u32 multiplier, divider, ras_multiplier, ras_divider, tmp; divider 128 drivers/video/fbdev/aty/mach64_ct.c divider = ((u32)pll->vclk_fb_div) * pll->xclk_ref_div; divider 134 drivers/video/fbdev/aty/mach64_ct.c divider = divider * (bpp >> 2); divider 146 drivers/video/fbdev/aty/mach64_ct.c divider = divider * pll->xres & ~7; divider 154 drivers/video/fbdev/aty/mach64_ct.c while (((multiplier | divider) & 1) == 0) { divider 156 drivers/video/fbdev/aty/mach64_ct.c divider = divider >> 1; divider 160 drivers/video/fbdev/aty/mach64_ct.c tmp = ((multiplier * pll->fifo_size) << vshift) / divider; divider 173 drivers/video/fbdev/aty/mach64_ct.c dsp_off = ((multiplier * (pll->fifo_size - 1)) << vshift) / divider - divider 180 drivers/video/fbdev/aty/mach64_ct.c dsp_on = ((multiplier << vshift) + divider) / divider; divider 192 drivers/video/fbdev/aty/mach64_ct.c dsp_on = dsp_off - (multiplier << vshift) / divider; divider 197 drivers/video/fbdev/aty/mach64_ct.c dsp_xclks = ((multiplier << (vshift + 5)) + divider) / divider; divider 506 drivers/video/fbdev/aty/mach64_gx.c short divider = 0, tempA; divider 523 drivers/video/fbdev/aty/mach64_gx.c divider = 0; divider 526 drivers/video/fbdev/aty/mach64_gx.c divider += 0x20; divider 544 drivers/video/fbdev/aty/mach64_gx.c divider &= ~0x1f; divider 545 drivers/video/fbdev/aty/mach64_gx.c divider |= tempA; divider 546 drivers/video/fbdev/aty/mach64_gx.c divider = divider 547 drivers/video/fbdev/aty/mach64_gx.c (divider & 0x00ff) + divider 555 drivers/video/fbdev/aty/mach64_gx.c program_bits = divider; divider 560 drivers/video/fbdev/aty/mach64_gx.c pll->ics2595.post_divider = divider; /* fuer nix */ divider 746 drivers/video/fbdev/aty/mach64_gx.c short divider = 0, tempA; divider 765 drivers/video/fbdev/aty/mach64_gx.c divider += 0x40; divider 782 drivers/video/fbdev/aty/mach64_gx.c divider &= ~0x3f; divider 783 drivers/video/fbdev/aty/mach64_gx.c divider |= tempA; divider 784 drivers/video/fbdev/aty/mach64_gx.c divider = divider 785 drivers/video/fbdev/aty/mach64_gx.c (divider & 0x00FF) + divider 792 drivers/video/fbdev/aty/mach64_gx.c program_bits = divider; divider 797 drivers/video/fbdev/aty/mach64_gx.c pll->ics2595.post_divider = divider; /* fuer nix */ divider 1534 drivers/video/fbdev/aty/radeon_base.c int divider; divider 1605 drivers/video/fbdev/aty/radeon_base.c for (post_div = &post_divs[0]; post_div->divider; ++post_div) { divider 1606 drivers/video/fbdev/aty/radeon_base.c pll_output_freq = post_div->divider * freq; divider 1610 drivers/video/fbdev/aty/radeon_base.c if (uses_dvo && (post_div->divider & 1)) divider 1619 drivers/video/fbdev/aty/radeon_base.c if ( !post_div->divider ) { divider 1621 drivers/video/fbdev/aty/radeon_base.c pll_output_freq = post_div->divider * freq; divider 1629 drivers/video/fbdev/aty/radeon_base.c if ( !post_div->divider ) { divider 1631 drivers/video/fbdev/aty/radeon_base.c pll_output_freq = post_div->divider * freq; divider 1243 drivers/video/fbdev/au1200fb.c unsigned int hi1, divider; divider 1256 drivers/video/fbdev/au1200fb.c divider = (lcd->pwmdiv & 0x3FFFF) + 1; divider 1257 drivers/video/fbdev/au1200fb.c hi1 = (((pdata->brightness & 0xFF)+1) * divider >> 8); divider 1272 drivers/video/fbdev/au1200fb.c unsigned int hi1, divider; divider 1283 drivers/video/fbdev/au1200fb.c divider = (lcd->pwmdiv & 0x3FFFF) + 1; divider 1284 drivers/video/fbdev/au1200fb.c pdata->brightness = ((hi1 << 8) / divider) - 1; divider 195 drivers/video/fbdev/matrox/matroxfb_misc.c unsigned int divider; divider 247 drivers/video/fbdev/matrox/matroxfb_misc.c divider = minfo->curr.final_bppShift; divider 248 drivers/video/fbdev/matrox/matroxfb_misc.c while (divider & 3) { divider 253 drivers/video/fbdev/matrox/matroxfb_misc.c divider <<= 1; divider 255 drivers/video/fbdev/matrox/matroxfb_misc.c divider = divider / 4; divider 257 drivers/video/fbdev/matrox/matroxfb_misc.c while (divider > 8) { divider 262 drivers/video/fbdev/matrox/matroxfb_misc.c divider >>= 1; divider 301 drivers/video/fbdev/matrox/matroxfb_misc.c hw->CRTCEXT[3] = (divider - 1) | 0x80; divider 1415 drivers/video/fbdev/w100fb.c unsigned long rot=0, divider, offset=0; divider 1424 drivers/video/fbdev/w100fb.c divider = par->mode->pixclk_divider; divider 1433 drivers/video/fbdev/w100fb.c divider = par->mode->pixclk_divider_rotated; divider 1492 drivers/video/fbdev/w100fb.c w100_pwr_state.pclk_cntl.f.pclk_post_div = divider; divider 53 drivers/watchdog/nic7018_wdt.c u8 divider; divider 95 drivers/watchdog/nic7018_wdt.c outb(counter << 4 | config->divider, divider 1010 fs/gfs2/dir.c u32 start, len, half_len, divider; divider 1081 fs/gfs2/dir.c divider = (start + half_len) << (32 - dip->i_depth); divider 1092 fs/gfs2/dir.c be32_to_cpu(dent->de_hash) < divider) { divider 276 include/linux/firmware/xlnx-zynqmp.h int (*clock_setdivider)(u32 clock_id, u32 divider); divider 277 include/linux/firmware/xlnx-zynqmp.h int (*clock_getdivider)(u32 clock_id, u32 *divider); divider 504 include/linux/mfd/db8500-prcmu.h int prcmu_set_clock_divider(u8 clock, u8 divider); divider 616 include/linux/mfd/db8500-prcmu.h static inline int prcmu_set_clock_divider(u8 clock, u8 divider) divider 24 include/media/i2c/mt9t112.h struct mt9t112_pll_divider divider; divider 2893 kernel/sched/fair.c u32 divider = LOAD_AVG_MAX - 1024 + se->avg.period_contrib; divider 2895 kernel/sched/fair.c se->avg.load_avg = div_u64(se_weight(se) * se->avg.load_sum, divider); divider 2897 kernel/sched/fair.c div_u64(se_runnable(se) * se->avg.runnable_load_sum, divider); divider 3478 kernel/sched/fair.c u32 divider = LOAD_AVG_MAX - 1024 + sa->period_contrib; divider 3489 kernel/sched/fair.c sub_positive(&sa->load_sum, r * divider); divider 3493 kernel/sched/fair.c sub_positive(&sa->util_sum, r * divider); divider 3521 kernel/sched/fair.c u32 divider = LOAD_AVG_MAX - 1024 + cfs_rq->avg.period_contrib; divider 3539 kernel/sched/fair.c se->avg.util_sum = se->avg.util_avg * divider; divider 3541 kernel/sched/fair.c se->avg.load_sum = divider; divider 229 kernel/sched/pelt.c u32 divider = LOAD_AVG_MAX - 1024 + sa->period_contrib; divider 234 kernel/sched/pelt.c sa->load_avg = div_u64(load * sa->load_sum, divider); divider 235 kernel/sched/pelt.c sa->runnable_load_avg = div_u64(runnable * sa->runnable_load_sum, divider); divider 236 kernel/sched/pelt.c WRITE_ONCE(sa->util_avg, sa->util_sum / divider); divider 99 kernel/sched/pelt.h u32 divider = ((LOAD_AVG_MAX - 1024) << SCHED_CAPACITY_SHIFT) - LOAD_AVG_MAX; divider 113 kernel/sched/pelt.h if (util_sum >= divider) divider 93 lib/zstd/compress.c U32 const divider = (cParams.searchLength == 3) ? 3 : 4; divider 94 lib/zstd/compress.c size_t const maxNbSeq = blockSize / divider; divider 253 lib/zstd/compress.c U32 const divider = (params.cParams.searchLength == 3) ? 3 : 4; divider 254 lib/zstd/compress.c size_t const maxNbSeq = blockSize / divider; divider 299 sound/isa/es1688/es1688_lib.c unsigned int bits, divider; divider 306 sound/isa/es1688/es1688_lib.c divider = 256 - 7160000*20/(8*82*runtime->rate); divider 309 sound/isa/es1688/es1688_lib.c snd_es1688_write(chip, 0xa2, divider); divider 1035 sound/oss/dmasound/dmasound_atari.c int divider, i, idx; divider 1065 sound/oss/dmasound/dmasound_atari.c divider = 1; divider 1069 sound/oss/dmasound/dmasound_atari.c divider = 1; divider 1072 sound/oss/dmasound/dmasound_atari.c divider = 2; divider 1075 sound/oss/dmasound/dmasound_atari.c divider = 3; divider 1078 sound/oss/dmasound/dmasound_atari.c divider = 4; divider 1081 sound/oss/dmasound/dmasound_atari.c divider = 5; divider 1084 sound/oss/dmasound/dmasound_atari.c divider = 7; divider 1087 sound/oss/dmasound/dmasound_atari.c divider = 9; divider 1090 sound/oss/dmasound/dmasound_atari.c divider = 11; divider 1092 sound/oss/dmasound/dmasound_atari.c tt_dmasnd.int_div = divider; divider 94 sound/soc/spear/spdif_out.c u32 divider, ctrl; divider 97 sound/soc/spear/spdif_out.c divider = DIV_ROUND_CLOSEST(clk_get_rate(host->clk), (rate * 128)); divider 101 sound/soc/spear/spdif_out.c ctrl |= (divider << SPDIF_DIVIDER_SHIFT) & SPDIF_DIVIDER_MASK; divider 125 sound/soc/ti/omap-dmic.c int divider = -EINVAL; divider 133 sound/soc/ti/omap-dmic.c divider = 0x6; /* Divider: 5 (192KHz sampling rate) */ divider 138 sound/soc/ti/omap-dmic.c return divider; divider 145 sound/soc/ti/omap-dmic.c divider = 0x4; /* Divider: 16 */ divider 150 sound/soc/ti/omap-dmic.c divider = 0x5; /* Divider: 5 */ divider 153 sound/soc/ti/omap-dmic.c divider = 0x0; /* Divider: 8 */ divider 156 sound/soc/ti/omap-dmic.c divider = 0x2; /* Divider: 10 */ divider 165 sound/soc/ti/omap-dmic.c divider = 0x3; /* Divider: 8 */ divider 170 sound/soc/ti/omap-dmic.c divider = 0x1; /* Divider: 5 (96KHz sampling rate) */ divider 178 sound/soc/ti/omap-dmic.c return divider; divider 959 sound/soc/ti/omap-mcbsp.c int divider = 0; divider 973 sound/soc/ti/omap-mcbsp.c divider = period_words / max_thrsh; divider 975 sound/soc/ti/omap-mcbsp.c divider++; divider 976 sound/soc/ti/omap-mcbsp.c while (period_words % divider && divider 977 sound/soc/ti/omap-mcbsp.c divider < period_words) divider 978 sound/soc/ti/omap-mcbsp.c divider++; divider 979 sound/soc/ti/omap-mcbsp.c if (divider == period_words) divider 982 sound/soc/ti/omap-mcbsp.c pkt_size = period_words / divider;