div2 372 arch/mips/alchemy/common/clock.c long div1, div2; div2 383 arch/mips/alchemy/common/clock.c div2 = (div1 / scale) - 1; /* value to write to register */ div2 385 arch/mips/alchemy/common/clock.c if (div2 > maxdiv) div2 386 arch/mips/alchemy/common/clock.c div2 = maxdiv; div2 388 arch/mips/alchemy/common/clock.c *rv = div2; div2 390 arch/mips/alchemy/common/clock.c div1 = ((div2 + 1) * scale); div2 63 arch/sh/kernel/cpu/sh2a/clock-sh7264.c static int div2[] = { 1, 2, 3, 4, 6, 8, 12 }; div2 66 arch/sh/kernel/cpu/sh2a/clock-sh7264.c .divisors = div2, div2 67 arch/sh/kernel/cpu/sh2a/clock-sh7264.c .nr_divisors = ARRAY_SIZE(div2), div2 91 arch/sh/kernel/cpu/sh2a/clock-sh7269.c static int div2[] = { 1, 2, 0, 4 }; div2 94 arch/sh/kernel/cpu/sh2a/clock-sh7269.c .divisors = div2, div2 95 arch/sh/kernel/cpu/sh2a/clock-sh7269.c .nr_divisors = ARRAY_SIZE(div2), div2 48 arch/sh/kernel/cpu/sh4a/clock-sh7757.c static unsigned int div2[] = { 1, 1, 2, 1, 1, 4, 1, 6, div2 52 arch/sh/kernel/cpu/sh4a/clock-sh7757.c .divisors = div2, div2 53 arch/sh/kernel/cpu/sh4a/clock-sh7757.c .nr_divisors = ARRAY_SIZE(div2), div2 51 arch/sh/kernel/cpu/sh4a/clock-sh7785.c static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, div2 55 arch/sh/kernel/cpu/sh4a/clock-sh7785.c .divisors = div2, div2 56 arch/sh/kernel/cpu/sh4a/clock-sh7785.c .nr_divisors = ARRAY_SIZE(div2), div2 53 arch/sh/kernel/cpu/sh4a/clock-sh7786.c static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, div2 57 arch/sh/kernel/cpu/sh4a/clock-sh7786.c .divisors = div2, div2 58 arch/sh/kernel/cpu/sh4a/clock-sh7786.c .nr_divisors = ARRAY_SIZE(div2), div2 47 arch/sh/kernel/cpu/sh4a/clock-shx3.c static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, div2 51 arch/sh/kernel/cpu/sh4a/clock-shx3.c .divisors = div2, div2 52 arch/sh/kernel/cpu/sh4a/clock-shx3.c .nr_divisors = ARRAY_SIZE(div2), div2 456 drivers/clk/clk-vt8500.c int div1, div2; div2 463 drivers/clk/clk-vt8500.c for (div2 = 7; div2 >= 0; div2--) div2 465 drivers/clk/clk-vt8500.c tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2)); div2 474 drivers/clk/clk-vt8500.c *divisor2 = div2; div2 482 drivers/clk/clk-vt8500.c *divisor2 = div2; div2 504 drivers/clk/clk-vt8500.c int div1, div2; div2 511 drivers/clk/clk-vt8500.c for (div2 = 3; div2 >= 0; div2--) div2 514 drivers/clk/clk-vt8500.c ((div1 + 1) * (1 << div2)); div2 522 drivers/clk/clk-vt8500.c *divisor2 = div2; div2 530 drivers/clk/clk-vt8500.c *divisor2 = div2; div2 550 drivers/clk/clk-vt8500.c u32 filter, mul, div1, div2; div2 564 drivers/clk/clk-vt8500.c ret = wm8650_find_pll_bits(rate, parent_rate, &mul, &div1, &div2); div2 566 drivers/clk/clk-vt8500.c pll_val = WM8650_BITS_TO_VAL(mul, div1, div2); div2 569 drivers/clk/clk-vt8500.c ret = wm8750_find_pll_bits(rate, parent_rate, &filter, &mul, &div1, &div2); div2 571 drivers/clk/clk-vt8500.c pll_val = WM8750_BITS_TO_VAL(filter, mul, div1, div2); div2 574 drivers/clk/clk-vt8500.c ret = wm8850_find_pll_bits(rate, parent_rate, &mul, &div1, &div2); div2 576 drivers/clk/clk-vt8500.c pll_val = WM8850_BITS_TO_VAL(mul, div1, div2); div2 601 drivers/clk/clk-vt8500.c u32 filter, mul, div1, div2; div2 612 drivers/clk/clk-vt8500.c ret = wm8650_find_pll_bits(rate, *prate, &mul, &div1, &div2); div2 614 drivers/clk/clk-vt8500.c round_rate = WM8650_BITS_TO_FREQ(*prate, mul, div1, div2); div2 617 drivers/clk/clk-vt8500.c ret = wm8750_find_pll_bits(rate, *prate, &filter, &mul, &div1, &div2); div2 619 drivers/clk/clk-vt8500.c round_rate = WM8750_BITS_TO_FREQ(*prate, mul, div1, div2); div2 622 drivers/clk/clk-vt8500.c ret = wm8850_find_pll_bits(rate, *prate, &mul, &div1, &div2); div2 624 drivers/clk/clk-vt8500.c round_rate = WM8850_BITS_TO_FREQ(*prate, mul, div1, div2); div2 52 drivers/clk/imx/clk-composite-8m.c int div1, div2; div2 60 drivers/clk/imx/clk-composite-8m.c for (div2 = 1; div2 <= PCG_DIV_MAX; div2++) { div2 61 drivers/clk/imx/clk-composite-8m.c int new_error = ((parent_rate / div1) / div2) - rate; div2 65 drivers/clk/imx/clk-composite-8m.c *postdiv = div2; div2 179 drivers/clk/pxa/clk-pxa.c if (freq->div2) { div2 138 drivers/clk/pxa/clk-pxa.h unsigned int div2; div2 114 drivers/clk/uniphier/clk-uniphier.h #define UNIPHIER_CLK_DIV3(parent, div0, div1, div2) \ div2 116 drivers/clk/uniphier/clk-uniphier.h UNIPHIER_CLK_DIV(parent, div2) div2 118 drivers/clk/uniphier/clk-uniphier.h #define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ div2 120 drivers/clk/uniphier/clk-uniphier.h UNIPHIER_CLK_DIV2(parent, div2, div3) div2 1411 drivers/gpu/drm/i915/display/intel_ddi.c u32 m1, m2_int, m2_frac, div1, div2, ref_clock; div2 1441 drivers/gpu/drm/i915/display/intel_ddi.c div2 = (pll_state->mg_clktop2_hsclkctl & div2 1446 drivers/gpu/drm/i915/display/intel_ddi.c if (div2 == 0) div2 1447 drivers/gpu/drm/i915/display/intel_ddi.c div2 = 1; div2 1455 drivers/gpu/drm/i915/display/intel_ddi.c tmp = div_u64(tmp, 5 * div1 * div2); div2 2630 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int div2; div2 2638 drivers/gpu/drm/i915/display/intel_dpll_mgr.c for (div2 = 10; div2 > 0; div2--) { div2 2639 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int dco = div1 * div2 * clock_khz * 5; div2 2646 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (div2 >= 2) { div2 2684 drivers/gpu/drm/i915/display/intel_dpll_mgr.c MG_CLKTOP2_HSCLKCTL_DSDIV_RATIO(div2); div2 125 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c u32 div2 = sor->asy.link == 3; div2 130 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c div2 = 1; div2 132 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c nvkm_mask(device, 0x612300 + soff, 0x00000707, (div2 << 8) | div1); div2 1274 drivers/media/dvb-frontends/stb0899_algo.c int div1, div2, rem1, rem2; div2 1277 drivers/media/dvb-frontends/stb0899_algo.c div2 = config->btr_nco_bits - div1 - 1; div2 1286 drivers/media/dvb-frontends/stb0899_algo.c intval2 = bTrNomFreq / (1 << div2); div2 1289 drivers/media/dvb-frontends/stb0899_algo.c rem2 = bTrNomFreq % (1 << div2); div2 1291 drivers/media/dvb-frontends/stb0899_algo.c srate = (intval1 * intval2) + ((intval1 * rem2) / (1 << div2)) + ((intval2 * rem1) / (1 << div1)); div2 196 drivers/media/tuners/mt2060.c u32 div1,num1,div2,num2; div2 233 drivers/media/tuners/mt2060.c div2 = num2 / 8192; div2 252 drivers/media/tuners/mt2060.c b[5] = ((num2 >>12) & 1) | (div2 << 1); div2 256 drivers/media/tuners/mt2060.c dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2); div2 89 drivers/media/tuners/mt2131.c u32 div1, num1, div2, num2; div2 111 drivers/media/tuners/mt2131.c div2 = num2 / 8192; div2 140 drivers/media/tuners/mt2131.c b[6] = div2; div2 146 drivers/media/tuners/mt2131.c (int)div1, (int)num1, (int)div2, (int)num2); div2 318 drivers/spi/spi-omap-uwire.c int div2; div2 375 drivers/spi/spi-omap-uwire.c div2 = (rate / div1 + hz - 1) / hz; div2 376 drivers/spi/spi-omap-uwire.c if (div2 <= 8) div2 394 drivers/spi/spi-omap-uwire.c switch (div2) { div2 533 drivers/staging/comedi/drivers/adl_pci9118.c unsigned int *div1, unsigned int *div2, div2 540 drivers/staging/comedi/drivers/adl_pci9118.c *div2 = *tim1 / pacer->osc_base; /* scan timer */ div2 541 drivers/staging/comedi/drivers/adl_pci9118.c *div2 = *div2 / *div1; /* major timer is c1*c2 */ div2 542 drivers/staging/comedi/drivers/adl_pci9118.c if (*div2 < chans) div2 543 drivers/staging/comedi/drivers/adl_pci9118.c *div2 = chans; div2 549 drivers/staging/comedi/drivers/adl_pci9118.c if (*div2 < (chans + 2)) div2 550 drivers/staging/comedi/drivers/adl_pci9118.c *div2 = chans + 2; div2 553 drivers/staging/comedi/drivers/adl_pci9118.c *tim1 = *div1 * *div2 * pacer->osc_base; div2 1022 drivers/video/fbdev/amifb.c #define vsstrt2hw(vsstrt) (div2(vsstrt)) div2 1023 drivers/video/fbdev/amifb.c #define vsstop2hw(vsstop) (div2(vsstop)) div2 1024 drivers/video/fbdev/amifb.c #define vtotal2hw(vtotal) (div2(vtotal) - 1) div2 1031 drivers/video/fbdev/amifb.c #define vbstrt2hw(vbstrt) (div2(vbstrt)) div2 1032 drivers/video/fbdev/amifb.c #define vbstop2hw(vbstop) (div2(vbstop)) div2 666 drivers/video/fbdev/cyber2000fb.c u_int div2, t_div1, best_div1, best_mult; div2 675 drivers/video/fbdev/cyber2000fb.c for (div2 = 0; div2 < 4; div2++) { div2 678 drivers/video/fbdev/cyber2000fb.c new_pll = pll_ps / cfb->divisors[div2]; div2 685 drivers/video/fbdev/cyber2000fb.c if (div2 == 4) div2 741 drivers/video/fbdev/cyber2000fb.c hw->clock_div = div2 << 6 | (best_div1 - 1); div2 215 sound/soc/codecs/da7210.c u8 div2; div2 1003 sound/soc/codecs/da7210.c pll_div2 = da7210_pll_div[cnt].div2; div2 988 sound/soc/codecs/sgtl5000.c int div2; div2 993 sound/soc/codecs/sgtl5000.c div2 = 1; div2 996 sound/soc/codecs/sgtl5000.c div2 = 0; div2 1012 sound/soc/codecs/sgtl5000.c if (div2) div2 693 sound/soc/codecs/wm8753.c u32 div2:1; div2 711 sound/soc/codecs/wm8753.c pll_div->div2 = 1; div2 714 sound/soc/codecs/wm8753.c pll_div->div2 = 0; div2 784 sound/soc/codecs/wm8753.c (pll_div.div2 << 3)); div2 403 sound/soc/codecs/wm8978.c u8 div2; div2 417 sound/soc/codecs/wm8978.c pll_div->div2 = 1; div2 420 sound/soc/codecs/wm8978.c pll_div->div2 = 0; div2 539 sound/soc/codecs/wm8978.c __func__, pll_div.n, pll_div.k, pll_div.div2); div2 544 sound/soc/codecs/wm8978.c snd_soc_component_write(component, WM8978_PLL_N, (pll_div.div2 << 4) | pll_div.n); div2 744 sound/soc/codecs/wm8983.c u32 div2:1; div2 756 sound/soc/codecs/wm8983.c pll_div->div2 = 0; div2 760 sound/soc/codecs/wm8983.c pll_div->div2 = 1; div2 809 sound/soc/codecs/wm8983.c (pll_div.div2 << WM8983_PLL_PRESCALE_SHIFT) div2 841 sound/soc/codecs/wm8985.c u32 div2:1; div2 853 sound/soc/codecs/wm8985.c pll_div->div2 = 0; div2 857 sound/soc/codecs/wm8985.c pll_div->div2 = 1; div2 902 sound/soc/codecs/wm8985.c (pll_div.div2 << WM8985_PLL_PRESCALE_SHIFT) div2 884 sound/soc/codecs/wm8990.c u32 div2; div2 903 sound/soc/codecs/wm8990.c pll_div->div2 = 1; div2 906 sound/soc/codecs/wm8990.c pll_div->div2 = 0; div2 949 sound/soc/codecs/wm8990.c (pll_div.div2?WM8990_PRESCALE:0)); div2 876 sound/soc/codecs/wm8991.c u32 div2; div2 895 sound/soc/codecs/wm8991.c pll_div->div2 = 1; div2 898 sound/soc/codecs/wm8991.c pll_div->div2 = 0; div2 943 sound/soc/codecs/wm8991.c (pll_div.div2 ? WM8991_PRESCALE : 0)); div2 679 sound/soc/fsl/fsl_ssi.c u32 pm = 999, div2, psr, stccr, mask, afreq, factor, i; div2 715 sound/soc/fsl/fsl_ssi.c div2 = 0; div2 717 sound/soc/fsl/fsl_ssi.c factor = (div2 + 1) * (7 * psr + 1) * 2; div2 743 sound/soc/fsl/fsl_ssi.c if (sub < savesub && !(i == 0 && psr == 0 && div2 == 0)) { div2 760 sound/soc/fsl/fsl_ssi.c stccr = SSI_SxCCR_PM(pm + 1) | (div2 ? SSI_SxCCR_DIV2 : 0) |