dispc_write_reg 54 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, idx, \ dispc_write_reg 429 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_##reg, dispc->ctx[DISPC_##reg / sizeof(u32)]) dispc_write_reg 765 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_H(plane, reg), value); dispc_write_reg 772 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_HV(plane, reg), value); dispc_write_reg 779 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_V(plane, reg), value); dispc_write_reg 788 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_H2(plane, reg), value); dispc_write_reg 797 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_HV2(plane, reg), value); dispc_write_reg 806 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR_COEF_V2(plane, reg), value); dispc_write_reg 877 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 0), CVAL(ct->rcr, ct->ry)); dispc_write_reg 878 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 1), CVAL(ct->gy, ct->rcb)); dispc_write_reg 879 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 2), CVAL(ct->gcb, ct->gcr)); dispc_write_reg 880 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->bcr, ct->by)); dispc_write_reg 881 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 4), CVAL(0, ct->bcb)); dispc_write_reg 895 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 0), CVAL(ct->yg, ct->yr)); dispc_write_reg 896 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 1), CVAL(ct->crr, ct->yb)); dispc_write_reg 897 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 2), CVAL(ct->crb, ct->crg)); dispc_write_reg 898 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->cbg, ct->cbr)); dispc_write_reg 899 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 4), CVAL(0, ct->cbb)); dispc_write_reg 937 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_BA0(plane), paddr); dispc_write_reg 943 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_BA1(plane), paddr); dispc_write_reg 949 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_BA0_UV(plane), paddr); dispc_write_reg 955 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_BA1_UV(plane), paddr); dispc_write_reg 969 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_POSITION(plane), val); dispc_write_reg 979 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_SIZE(plane), val); dispc_write_reg 981 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_PICTURE_SIZE(plane), val); dispc_write_reg 995 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_PICTURE_SIZE(plane), val); dispc_write_reg 997 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_SIZE(plane), val); dispc_write_reg 1050 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_PIXEL_INC(plane), inc); dispc_write_reg 1056 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ROW_INC(plane), inc); dispc_write_reg 1205 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), val); dispc_write_reg 1327 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_CPR_COEF_R(channel), coef_r); dispc_write_reg 1328 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_CPR_COEF_G(channel), coef_g); dispc_write_reg 1329 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_CPR_COEF_B(channel), coef_b); dispc_write_reg 1341 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), val); dispc_write_reg 1367 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_SIZE_MGR(channel), val); dispc_write_reg 1412 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_GLOBAL_BUFFER, v); dispc_write_reg 1487 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIFO_THRESHOLD(plane), dispc_write_reg 1498 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_PRELOAD(plane), dispc_write_reg 1577 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_MFLAG_THRESHOLD(plane), dispc_write_reg 1595 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_GLOBAL_MFLAG_ATTRIBUTE, dispc_write_reg 1655 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR(plane), val); dispc_write_reg 1658 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_FIR2(plane), val); dispc_write_reg 1677 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ACCU0(plane), val); dispc_write_reg 1695 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ACCU1(plane), val); dispc_write_reg 1705 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ACCU2_0(plane), val); dispc_write_reg 1715 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ACCU2_1(plane), val); dispc_write_reg 1860 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), l); dispc_write_reg 2846 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_OVL_ATTRIBUTES(plane), l); dispc_write_reg 2936 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_DEFAULT_COLOR(channel), color); dispc_write_reg 2946 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_TRANS_COLOR(ch), trans_key); dispc_write_reg 3038 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_CONTROL, l); dispc_write_reg 3135 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_TIMING_H(channel), timing_h); dispc_write_reg 3136 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_TIMING_V(channel), timing_v); dispc_write_reg 3177 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_POL_FREQ(channel), l); dispc_write_reg 3266 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_DIVISORo(channel), dispc_write_reg 3761 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_IRQSTATUS, mask); dispc_write_reg 3771 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_IRQENABLE, mask); dispc_write_reg 3816 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, gdesc->reg, v); dispc_write_reg 3932 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_write_reg(dispc, DISPC_DIVISOR, l); dispc_write_reg 52 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(idx, FLD_MOD(dispc_read_reg(idx), val, start, end)) dispc_write_reg 285 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_##reg, dispc.ctx[DISPC_##reg / sizeof(u32)]) dispc_write_reg 608 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_H(plane, reg), value); dispc_write_reg 613 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_HV(plane, reg), value); dispc_write_reg 618 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_V(plane, reg), value); dispc_write_reg 625 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_H2(plane, reg), value); dispc_write_reg 633 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_HV2(plane, reg), value); dispc_write_reg 640 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR_COEF_V2(plane, reg), value); dispc_write_reg 694 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 0), CVAL(ct->rcr, ct->ry)); dispc_write_reg 695 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 1), CVAL(ct->gy, ct->rcb)); dispc_write_reg 696 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 2), CVAL(ct->gcb, ct->gcr)); dispc_write_reg 697 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->bcr, ct->by)); dispc_write_reg 698 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 4), CVAL(0, ct->bcb)); dispc_write_reg 727 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_BA0(plane), paddr); dispc_write_reg 732 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_BA1(plane), paddr); dispc_write_reg 737 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_BA0_UV(plane), paddr); dispc_write_reg 742 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_BA1_UV(plane), paddr); dispc_write_reg 755 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_POSITION(plane), val); dispc_write_reg 764 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_SIZE(plane), val); dispc_write_reg 766 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val); dispc_write_reg 779 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val); dispc_write_reg 781 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_SIZE(plane), val); dispc_write_reg 828 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_PIXEL_INC(plane), inc); dispc_write_reg 833 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ROW_INC(plane), inc); dispc_write_reg 987 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); dispc_write_reg 1104 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_CPR_COEF_R(channel), coef_r); dispc_write_reg 1105 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_CPR_COEF_G(channel), coef_g); dispc_write_reg 1106 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_CPR_COEF_B(channel), coef_b); dispc_write_reg 1117 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); dispc_write_reg 1141 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_SIZE_MGR(channel), val); dispc_write_reg 1185 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_GLOBAL_BUFFER, v); dispc_write_reg 1254 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIFO_THRESHOLD(plane), dispc_write_reg 1265 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_PRELOAD(plane), min(high, 0xfffu)); dispc_write_reg 1341 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_MFLAG_THRESHOLD(plane), dispc_write_reg 1359 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_GLOBAL_MFLAG_ATTRIBUTE, dispc_write_reg 1418 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR(plane), val); dispc_write_reg 1421 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_FIR2(plane), val); dispc_write_reg 1436 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ACCU0(plane), val); dispc_write_reg 1450 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ACCU1(plane), val); dispc_write_reg 1459 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ACCU2_0(plane), val); dispc_write_reg 1468 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ACCU2_1(plane), val); dispc_write_reg 1610 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l); dispc_write_reg 2858 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l); dispc_write_reg 2959 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_DEFAULT_COLOR(channel), color); dispc_write_reg 2968 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_TRANS_COLOR(ch), trans_key); dispc_write_reg 3054 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_CONTROL, l); dispc_write_reg 3150 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_TIMING_H(channel), timing_h); dispc_write_reg 3151 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_TIMING_V(channel), timing_v); dispc_write_reg 3222 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_POL_FREQ(channel), l); dispc_write_reg 3293 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_DIVISORo(channel), dispc_write_reg 3796 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_IRQSTATUS, mask); dispc_write_reg 3813 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_IRQENABLE, mask); dispc_write_reg 3837 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(DISPC_DIVISOR, l);