dispc_read_reg 51 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_GET(dispc_read_reg(dispc, idx), start, end) dispc_read_reg 55 drivers/gpu/drm/omapdrm/dss/dispc.c FLD_MOD(dispc_read_reg(dispc, idx), val, start, end)) dispc_read_reg 427 drivers/gpu/drm/omapdrm/dss/dispc.c dispc->ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(dispc, DISPC_##reg) dispc_read_reg 1167 drivers/gpu/drm/omapdrm/dss/dispc.c val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 1228 drivers/gpu/drm/omapdrm/dss/dispc.c val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 1339 drivers/gpu/drm/omapdrm/dss/dispc.c val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 1405 drivers/gpu/drm/omapdrm/dss/dispc.c v = dispc_read_reg(dispc, DISPC_GLOBAL_BUFFER); dispc_read_reg 1839 drivers/gpu/drm/omapdrm/dss/dispc.c l = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 2838 drivers/gpu/drm/omapdrm/dss/dispc.c l = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 3035 drivers/gpu/drm/omapdrm/dss/dispc.c l = dispc_read_reg(dispc, DISPC_CONTROL); dispc_read_reg 3279 drivers/gpu/drm/omapdrm/dss/dispc.c l = dispc_read_reg(dispc, DISPC_DIVISORo(channel)); dispc_read_reg 3345 drivers/gpu/drm/omapdrm/dss/dispc.c l = dispc_read_reg(dispc, DISPC_DIVISORo(channel)); dispc_read_reg 3434 drivers/gpu/drm/omapdrm/dss/dispc.c l = dispc_read_reg(dispc, DISPC_DIVISOR); dispc_read_reg 3471 drivers/gpu/drm/omapdrm/dss/dispc.c seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(dispc, r)) dispc_read_reg 3506 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_read_reg(dispc, DISPC_REG(i, r))) dispc_read_reg 3610 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_read_reg(dispc, DISPC_REG(plane, name, i))) dispc_read_reg 3756 drivers/gpu/drm/omapdrm/dss/dispc.c return dispc_read_reg(dispc, DISPC_IRQSTATUS); dispc_read_reg 3766 drivers/gpu/drm/omapdrm/dss/dispc.c u32 old_mask = dispc_read_reg(dispc, DISPC_IRQENABLE); dispc_read_reg 3774 drivers/gpu/drm/omapdrm/dss/dispc.c dispc_read_reg(dispc, DISPC_IRQENABLE); dispc_read_reg 3928 drivers/gpu/drm/omapdrm/dss/dispc.c l = dispc_read_reg(dispc, DISPC_DIVISOR); dispc_read_reg 4829 drivers/gpu/drm/omapdrm/dss/dispc.c rev = dispc_read_reg(dispc, DISPC_REVISION); dispc_read_reg 49 drivers/video/fbdev/omap2/omapfb/dss/dispc.c FLD_GET(dispc_read_reg(idx), start, end) dispc_read_reg 52 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_write_reg(idx, FLD_MOD(dispc_read_reg(idx), val, start, end)) dispc_read_reg 283 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc.ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(DISPC_##reg) dispc_read_reg 949 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 1010 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 1115 drivers/video/fbdev/omap2/omapfb/dss/dispc.c val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 1178 drivers/video/fbdev/omap2/omapfb/dss/dispc.c v = dispc_read_reg(DISPC_GLOBAL_BUFFER); dispc_read_reg 1589 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 2851 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); dispc_read_reg 3051 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_CONTROL); dispc_read_reg 3305 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_DIVISORo(channel)); dispc_read_reg 3349 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_DIVISORo(channel)); dispc_read_reg 3390 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_DIVISORo(channel)); dispc_read_reg 3476 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_DIVISOR); dispc_read_reg 3511 drivers/video/fbdev/omap2/omapfb/dss/dispc.c #define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r)) dispc_read_reg 3546 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_read_reg(DISPC_REG(i, r))) dispc_read_reg 3650 drivers/video/fbdev/omap2/omapfb/dss/dispc.c dispc_read_reg(DISPC_REG(plane, name, i))) dispc_read_reg 3790 drivers/video/fbdev/omap2/omapfb/dss/dispc.c return dispc_read_reg(DISPC_IRQSTATUS); dispc_read_reg 3802 drivers/video/fbdev/omap2/omapfb/dss/dispc.c return dispc_read_reg(DISPC_IRQENABLE); dispc_read_reg 3808 drivers/video/fbdev/omap2/omapfb/dss/dispc.c u32 old_mask = dispc_read_reg(DISPC_IRQENABLE); dispc_read_reg 3833 drivers/video/fbdev/omap2/omapfb/dss/dispc.c l = dispc_read_reg(DISPC_DIVISOR); dispc_read_reg 4098 drivers/video/fbdev/omap2/omapfb/dss/dispc.c rev = dispc_read_reg(DISPC_REVISION);