CFG_DMA_ENA 135 drivers/gpu/drm/armada/armada_overlay.c cfg |= CFG_DMA_ENA; CFG_DMA_ENA 152 drivers/gpu/drm/armada/armada_overlay.c CFG_DMA_ENA; CFG_DMA_ENA 154 drivers/gpu/drm/armada/armada_overlay.c cfg = state->visible ? CFG_DMA_ENA : 0; CFG_DMA_ENA 155 drivers/gpu/drm/armada/armada_overlay.c cfg_mask = CFG_DMA_ENA; CFG_DMA_ENA 235 drivers/gpu/drm/armada/armada_overlay.c armada_reg_queue_mod(regs, idx, 0, CFG_DMA_ENA, LCD_SPU_DMA_CTRL0); CFG_DMA_ENA 162 drivers/video/fbdev/mmp/hw/mmp_ctrl.c u32 enable = overlay_is_vid(overlay) ? CFG_DMA_ENA(1) : CFG_GRA_ENA(1);