ddc_data_regs      86 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c static const struct ddc_registers ddc_data_regs[] = {
ddc_data_regs      87 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	ddc_data_regs(1),
ddc_data_regs      88 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	ddc_data_regs(2),
ddc_data_regs      89 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	ddc_data_regs(3),
ddc_data_regs      90 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	ddc_data_regs(4),
ddc_data_regs      91 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	ddc_data_regs(5),
ddc_data_regs      92 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	ddc_data_regs(6),
ddc_data_regs     124 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 		ddc->regs = &ddc_data_regs[en];
ddc_data_regs     125 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 		ddc->base.regs = &ddc_data_regs[en].gpio;
ddc_data_regs      99 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c static const struct ddc_registers ddc_data_regs[] = {
ddc_data_regs     100 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	ddc_data_regs(1),
ddc_data_regs     101 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	ddc_data_regs(2),
ddc_data_regs     102 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	ddc_data_regs(3),
ddc_data_regs     103 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	ddc_data_regs(4),
ddc_data_regs     104 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	ddc_data_regs(5),
ddc_data_regs     105 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	ddc_data_regs(6),
ddc_data_regs     137 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 		ddc->regs = &ddc_data_regs[en];
ddc_data_regs     138 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 		ddc->base.regs = &ddc_data_regs[en].gpio;
ddc_data_regs      86 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c static const struct ddc_registers ddc_data_regs[] = {
ddc_data_regs      87 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	ddc_data_regs(1),
ddc_data_regs      88 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	ddc_data_regs(2),
ddc_data_regs      89 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	ddc_data_regs(3),
ddc_data_regs      90 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	ddc_data_regs(4),
ddc_data_regs      91 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	ddc_data_regs(5),
ddc_data_regs      92 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	ddc_data_regs(6),
ddc_data_regs     124 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 		ddc->regs = &ddc_data_regs[en];
ddc_data_regs     125 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 		ddc->base.regs = &ddc_data_regs[en].gpio;
ddc_data_regs      95 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c static const struct ddc_registers ddc_data_regs[] = {
ddc_data_regs      96 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	ddc_data_regs(1),
ddc_data_regs      97 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	ddc_data_regs(2),
ddc_data_regs      98 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	ddc_data_regs(3),
ddc_data_regs      99 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	ddc_data_regs(4),
ddc_data_regs     100 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	ddc_data_regs(5),
ddc_data_regs     101 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	ddc_data_regs(6),
ddc_data_regs     169 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 		ddc->regs = &ddc_data_regs[en];
ddc_data_regs     170 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 		ddc->base.regs = &ddc_data_regs[en].gpio;