dcn_bw_yes         44 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->allow_different_hratio_vratio == dcn_bw_yes) {
dcn_bw_yes        130 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->scale_ratio_support = dcn_bw_yes;
dcn_bw_yes        138 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->source_format_pixel_and_scan_support = dcn_bw_yes;
dcn_bw_yes        177 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes        180 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->pte_enable == dcn_bw_yes && v->source_scan[k] != dcn_bw_hor && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x)) {
dcn_bw_yes        183 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		else if (v->pte_enable == dcn_bw_yes && v->source_scan[k] == dcn_bw_hor && (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32) && (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x)) {
dcn_bw_yes        186 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		else if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes        207 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes        208 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dcc_enabled_in_any_plane = dcn_bw_yes;
dcn_bw_yes        214 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->return_bw_todcn_per_state > v->dcfclk_per_state[i] * v->return_bus_width / 4.0) {
dcn_bw_yes        218 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->critical_point > 1.0 && v->critical_point < 4.0) {
dcn_bw_yes        222 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->return_bw_todcn_per_state > v->dcfclk_per_state[i] * v->return_bus_width / 4.0) {
dcn_bw_yes        226 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enabled_in_any_plane == dcn_bw_yes && v->critical_point > 1.0 && v->critical_point < 4.0) {
dcn_bw_yes        232 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->bandwidth_support[i] = dcn_bw_yes;
dcn_bw_yes        240 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->writeback_latency_support = dcn_bw_yes;
dcn_bw_yes        254 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->rob_support[i] = dcn_bw_yes;
dcn_bw_yes        263 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->output[k] == dcn_bw_dp && v->dsc_capability == dcn_bw_yes) {
dcn_bw_yes        299 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->dio_support[i] = dcn_bw_yes;
dcn_bw_yes        315 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->total_available_writeback_support = dcn_bw_yes;
dcn_bw_yes        398 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes) {
dcn_bw_yes        407 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes) {
dcn_bw_yes        438 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dispclk_dppclk_support[i][j] = dcn_bw_yes;
dcn_bw_yes        441 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->odm_capability == dcn_bw_yes) {
dcn_bw_yes        469 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->dispclk_dppclk_support[i][j] = dcn_bw_yes;
dcn_bw_yes        498 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->viewport_size_support = dcn_bw_yes;
dcn_bw_yes        509 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->total_available_pipes_support[i][j] = dcn_bw_yes;
dcn_bw_yes        569 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->urgent_latency_support[i][j] = dcn_bw_yes;
dcn_bw_yes        583 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes        618 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes        623 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes        640 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes        678 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes        683 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes        700 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes        791 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes        794 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one == dcn_bw_yes) {
dcn_bw_yes        806 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes        815 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes        846 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes        852 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes        928 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->prefetch_supported_with_immediate_flip[i][j] = dcn_bw_yes;
dcn_bw_yes        937 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->prefetch_supported_without_immediate_flip[i][j] = dcn_bw_yes;
dcn_bw_yes        950 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->v_ratio_in_prefetch_supported_with_immediate_flip[i][j] = dcn_bw_yes;
dcn_bw_yes        956 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->v_ratio_in_prefetch_supported_without_immediate_flip[i][j] = dcn_bw_yes;
dcn_bw_yes        968 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->scale_ratio_support == dcn_bw_yes && v->source_format_pixel_and_scan_support == dcn_bw_yes && v->viewport_size_support == dcn_bw_yes && v->bandwidth_support[i] == dcn_bw_yes && v->dio_support[i] == dcn_bw_yes && v->urgent_latency_support[i][j] == dcn_bw_yes && v->rob_support[i] == dcn_bw_yes && v->dispclk_dppclk_support[i][j] == dcn_bw_yes && v->total_available_pipes_support[i][j] == dcn_bw_yes && v->total_available_writeback_support == dcn_bw_yes && v->writeback_latency_support == dcn_bw_yes) {
dcn_bw_yes        969 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->prefetch_supported_with_immediate_flip[i][j] == dcn_bw_yes && v->v_ratio_in_prefetch_supported_with_immediate_flip[i][j] == dcn_bw_yes) {
dcn_bw_yes        970 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->mode_support_with_immediate_flip[i][j] = dcn_bw_yes;
dcn_bw_yes        975 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->prefetch_supported_without_immediate_flip[i][j] == dcn_bw_yes && v->v_ratio_in_prefetch_supported_without_immediate_flip[i][j] == dcn_bw_yes) {
dcn_bw_yes        976 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->mode_support_without_immediate_flip[i][j] = dcn_bw_yes;
dcn_bw_yes        989 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if ((i == number_of_states_plus_one || v->mode_support_with_immediate_flip[i][1] == dcn_bw_yes || v->mode_support_with_immediate_flip[i][0] == dcn_bw_yes) && i >= v->voltage_override_level) {
dcn_bw_yes        994 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if ((i == number_of_states_plus_one || v->mode_support_without_immediate_flip[i][1] == dcn_bw_yes || v->mode_support_without_immediate_flip[i][0] == dcn_bw_yes) && i >= v->voltage_override_level) {
dcn_bw_yes       1003 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->immediate_flip_supported = dcn_bw_yes;
dcn_bw_yes       1029 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	if ((v->dispclk_dppclk_support_per_ratio[0] == dcn_bw_yes && v->dispclk_dppclk_support_per_ratio[1] == dcn_bw_no) || (v->dispclk_dppclk_support_per_ratio[0] == v->dispclk_dppclk_support_per_ratio[1] && (v->total_number_of_active_dpp_per_ratio[0] < v->total_number_of_active_dpp_per_ratio[1] || (((v->total_number_of_active_dpp_per_ratio[0] == v->total_number_of_active_dpp_per_ratio[1]) && v->required_dispclk_per_ratio[0] <= 0.5 * v->required_dispclk_per_ratio[1]))))) {
dcn_bw_yes       1115 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes) {
dcn_bw_yes       1124 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes) {
dcn_bw_yes       1205 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->odm_capable == dcn_bw_yes) {
dcn_bw_yes       1229 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes       1230 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dcc_enabled_any_plane = dcn_bw_yes;
dcn_bw_yes       1234 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_bus_width / 4.0) {
dcn_bw_yes       1238 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	if (v->dcc_enabled_any_plane == dcn_bw_yes && v->critical_compression > 1.0 && v->critical_compression < 4.0) {
dcn_bw_yes       1242 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_bus_width / 4.0) {
dcn_bw_yes       1246 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	if (v->dcc_enabled_any_plane == dcn_bw_yes && v->critical_compression > 1.0 && v->critical_compression < 4.0) {
dcn_bw_yes       1289 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes       1319 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes       1369 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes       1375 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes       1378 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes       1392 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->synchronized_vblank == dcn_bw_yes || v->number_of_active_planes == 1) {
dcn_bw_yes       1470 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes       1474 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes       1491 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes       1529 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes       1533 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes       1550 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->pte_enable == dcn_bw_yes) {
dcn_bw_yes       1625 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one == dcn_bw_yes) {
dcn_bw_yes       1636 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->planes_with_room_to_increase_vstartup_prefetch_bw_less_than_active_bw = dcn_bw_yes;
dcn_bw_yes       1682 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
dcn_bw_yes       1688 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) {
dcn_bw_yes       1689 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
dcn_bw_yes       1700 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if ((v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes)) {
dcn_bw_yes       1701 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
dcn_bw_yes       1750 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
dcn_bw_yes       1754 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->v_ratio_prefetch_more_than4 = dcn_bw_yes;
dcn_bw_yes       1757 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->destination_line_times_for_prefetch_less_than2 = dcn_bw_yes;
dcn_bw_yes       1764 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->planes_with_room_to_increase_vstartup_vratio_prefetch_more_than4 = dcn_bw_yes;
dcn_bw_yes       1767 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->planes_with_room_to_increase_vstartup_destination_line_times_for_prefetch_less_than2 = dcn_bw_yes;
dcn_bw_yes       1772 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->prefetch_mode_supported = dcn_bw_yes;
dcn_bw_yes       1778 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		} while (!(v->prefetch_mode_supported == dcn_bw_yes || (v->planes_with_room_to_increase_vstartup_prefetch_bw_less_than_active_bw == dcn_bw_yes && v->planes_with_room_to_increase_vstartup_vratio_prefetch_more_than4 == dcn_bw_no && v->planes_with_room_to_increase_vstartup_destination_line_times_for_prefetch_less_than2 == dcn_bw_no)));
dcn_bw_yes       1780 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	} while (!(v->prefetch_mode_supported == dcn_bw_yes || v->prefetch_mode == 2.0));
dcn_bw_yes       1804 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->allow_dram_clock_change_during_vblank[k] = dcn_bw_yes;
dcn_bw_yes       1805 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->allow_dram_self_refresh_during_vblank[k] = dcn_bw_yes;
dcn_bw_yes       1810 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->allow_dram_self_refresh_during_vblank[k] = dcn_bw_yes;
dcn_bw_yes       1877 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->allow_dram_clock_change_during_vblank[k] == dcn_bw_yes) {
dcn_bw_yes       1903 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	if (v->synchronized_vblank == dcn_bw_yes || v->number_of_active_planes == 1) {
dcn_bw_yes        134 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		.pte_enable = dcn_bw_yes,
dcn_bw_yes        505 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			v->pte_enable == dcn_bw_yes,
dcn_bw_yes        863 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	v->allow_different_hratio_vratio = dcn_bw_yes;
dcn_bw_yes        888 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			v->dcc_enable[input_idx] = dcn_bw_yes;
dcn_bw_yes        965 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 				v->dcc_enable[input_idx] = pipe->plane_state->dcc.enable ? dcn_bw_yes : dcn_bw_no;
dcn_bw_yes        976 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 						pipe->plane_state->format, &bpe) ? dcn_bw_yes : dcn_bw_no;
dcn_bw_yes        999 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		if (v->is_line_buffer_bpp_fixed == dcn_bw_yes)
dcn_bw_yes       1726 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	dc->dml.ip.pte_enable = dc->dcn_ip->pte_enable == dcn_bw_yes;
dcn_bw_yes       1732 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	dc->dml.ip.IsLineBufferBppFixed = dc->dcn_ip->is_line_buffer_bpp_fixed == dcn_bw_yes;
dcn_bw_yes       1751 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		dc->dcn_ip->can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one == dcn_bw_yes;
dcn_bw_yes       1753 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		dc->dcn_ip->bug_forcing_luma_and_chroma_request_to_same_size_fixed == dcn_bw_yes;