dcn_bw_sw_4_kb_s  180 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->pte_enable == dcn_bw_yes && v->source_scan[k] != dcn_bw_hor && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x)) {
dcn_bw_sw_4_kb_s  383 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) {
dcn_bw_sw_4_kb_s  645 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) {
dcn_bw_sw_4_kb_s  705 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) {
dcn_bw_sw_4_kb_s 1100 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) {
dcn_bw_sw_4_kb_s 1496 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) {
dcn_bw_sw_4_kb_s 1555 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) {
dcn_bw_sw_4_kb_s  171 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		return dcn_bw_sw_4_kb_s;
dcn_bw_sw_4_kb_s  209 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		return dcn_bw_sw_4_kb_s;
dcn_bw_sw_4_kb_s  890 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			v->source_surface_mode[input_idx] = dcn_bw_sw_4_kb_s;