dcn_bw_max2        56 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k] / v->scaler_recout_height[k]);
dcn_bw_max2        59 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->h_ratio[k] =dcn_bw_max2(v->viewport_height[k] / v->scaler_rec_out_width[k], v->viewport_width[k] / v->scaler_recout_height[k]);
dcn_bw_max2       427 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->number_of_dpp_required_for_lb_size =dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0);
dcn_bw_max2       430 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->number_of_dpp_required_for_lb_size =dcn_bw_max2(dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0),dcn_bw_ceil2((v->vta_pschroma[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k] / 2.0, 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0));
dcn_bw_max2       432 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->number_of_dpp_required_for_det_and_lb_size[k] =dcn_bw_max2(v->number_of_dpp_required_for_det_size, v->number_of_dpp_required_for_lb_size);
dcn_bw_max2       440 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->min_dispclk_using_single_dpp =dcn_bw_max2(v->pixel_clock[k], v->min_dppclk_using_single_dpp[k] * (j + 1)) * (1.0 + v->downspreading / 100.0);
dcn_bw_max2       442 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->min_dispclk_using_dual_dpp =dcn_bw_max2(v->pixel_clock[k] / 2.0, v->min_dppclk_using_single_dpp[k] / 2.0 * (j + 1)) * (1.0 + v->downspreading / 100.0);
dcn_bw_max2       445 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->min_dispclk_using_dual_dpp =dcn_bw_max2(v->pixel_clock[k], v->min_dppclk_using_single_dpp[k] / 2.0 * (j + 1)) * (1.0 + v->downspreading / 100.0);
dcn_bw_max2       453 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_single_dpp);
dcn_bw_max2       457 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_dual_dpp);
dcn_bw_max2       461 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_dual_dpp);
dcn_bw_max2       471 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->min_dispclk_using_single_dpp =dcn_bw_max2(v->pixel_clock[k], v->min_dppclk_using_single_dpp[k] * (j + 1)) * (1.0 + v->downspreading / 100.0);
dcn_bw_max2       472 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->min_dispclk_using_dual_dpp =dcn_bw_max2(v->pixel_clock[k], v->min_dppclk_using_single_dpp[k] / 2.0 * (j + 1)) * (1.0 + v->downspreading / 100.0);
dcn_bw_max2       479 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_single_dpp);
dcn_bw_max2       486 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->required_dispclk[i][j] =dcn_bw_max2(v->required_dispclk[i][j], v->min_dispclk_using_dual_dpp);
dcn_bw_max2       554 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->effective_lb_latency_hiding_source_lines_luma =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_yper_state[i][j][k] /dcn_bw_max2(v->h_ratio[k], 1.0)), 1.0)) - (v->vtaps[k] - 1.0);
dcn_bw_max2       555 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->effective_lb_latency_hiding_source_lines_chroma =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_yper_state[i][j][k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0)), 1.0)) - (v->vta_pschroma[k] - 1.0);
dcn_bw_max2       593 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, v->pixel_clock[k] / 16.0);
dcn_bw_max2       596 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 64.0 * v->h_ratio[k] * v->pixel_clock[k] / v->no_of_dpp[i][j][k]);
dcn_bw_max2       599 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 64.0 * v->pscl_factor[k] * v->required_dispclk[i][j] / (1 + j));
dcn_bw_max2       604 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 32.0 * v->h_ratio[k] * v->pixel_clock[k] / v->no_of_dpp[i][j][k]);
dcn_bw_max2       607 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 32.0 * v->pscl_factor[k] * v->required_dispclk[i][j] / (1 + j));
dcn_bw_max2       610 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 32.0 * v->h_ratio[k] / 2.0 * v->pixel_clock[k] / v->no_of_dpp[i][j][k]);
dcn_bw_max2       613 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 32.0 * v->pscl_factor_chroma[k] * v->required_dispclk[i][j] / (1 + j));
dcn_bw_max2       756 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->max_partial_sw_y =dcn_bw_max2(1.0, v->max_partial_sw_y);
dcn_bw_max2       768 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->max_partial_sw_c =dcn_bw_max2(1.0, v->max_partial_sw_c);
dcn_bw_max2       788 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->v_ready_offset[k][j] = dcn_bw_max2(150.0 / (v->required_dispclk[i][j] / (j + 1)), v->total_repeater_delay + 20.0 / v->projected_dcfclk_deep_sleep + 10.0 / (v->required_dispclk[i][j] / (j + 1))) * v->pixel_clock[k];
dcn_bw_max2       821 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						v->time_for_meta_and_dpte_row_without_immediate_flip = dcn_bw_max2(
dcn_bw_max2       837 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->bw_available_for_immediate_flip = v->bw_available_for_immediate_flip -dcn_bw_max2(v->read_bandwidth[k], v->prefetch_bw[k]);
dcn_bw_max2       856 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->time_for_meta_and_dpte_row_with_immediate_flip =dcn_bw_max2(v->htotal[k] / v->pixel_clock[k] - v->time_for_meta_pte_with_immediate_flip, v->extra_latency - v->time_for_meta_pte_with_immediate_flip);
dcn_bw_max2       866 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 							v->v_ratio_pre_ywith_immediate_flip[i][j][k] =dcn_bw_max2(v->v_ratio_pre_ywith_immediate_flip[i][j][k], (v->max_num_sw_y[k] * v->swath_height_yper_state[i][j][k]) / (v->line_times_to_request_prefetch_pixel_data_with_immediate_flip - (v->prefill_y[k] - 3.0) / 2.0));
dcn_bw_max2       875 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 							v->v_ratio_pre_cwith_immediate_flip[i][j][k] =dcn_bw_max2(v->v_ratio_pre_cwith_immediate_flip[i][j][k], (v->max_num_sw_c[k] * v->swath_height_cper_state[i][j][k]) / (v->line_times_to_request_prefetch_pixel_data_with_immediate_flip - (v->prefill_c[k] - 3.0) / 2.0));
dcn_bw_max2       892 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 							v->v_ratio_pre_ywithout_immediate_flip[i][j][k] =dcn_bw_max2(v->v_ratio_pre_ywithout_immediate_flip[i][j][k], (v->max_num_sw_y[k] * v->swath_height_yper_state[i][j][k]) / (v->line_times_to_request_prefetch_pixel_data_without_immediate_flip - (v->prefill_y[k] - 3.0) / 2.0));
dcn_bw_max2       901 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 							v->v_ratio_pre_cwithout_immediate_flip[i][j][k] =dcn_bw_max2(v->v_ratio_pre_cwithout_immediate_flip[i][j][k], (v->max_num_sw_c[k] * v->swath_height_cper_state[i][j][k]) / (v->line_times_to_request_prefetch_pixel_data_without_immediate_flip - (v->prefill_c[k] - 3.0) / 2.0));
dcn_bw_max2       918 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->maximum_read_bandwidth_with_prefetch_with_immediate_flip = v->maximum_read_bandwidth_with_prefetch_with_immediate_flip +dcn_bw_max2(v->read_bandwidth[k], v->required_prefetch_pixel_data_bw_with_immediate_flip[i][j][k]) +dcn_bw_max2(v->meta_pte_bytes_per_frame[k] / (v->lines_for_meta_pte_with_immediate_flip[k] * v->htotal[k] / v->pixel_clock[k]), (v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]) / (v->lines_for_meta_and_dpte_row_with_immediate_flip[k] * v->htotal[k] / v->pixel_clock[k]));
dcn_bw_max2       921 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->maximum_read_bandwidth_with_prefetch_with_immediate_flip = v->maximum_read_bandwidth_with_prefetch_with_immediate_flip +dcn_bw_max2(v->read_bandwidth[k], v->required_prefetch_pixel_data_bw_without_immediate_flip[i][j][k]);
dcn_bw_max2       926 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->maximum_read_bandwidth_with_prefetch_without_immediate_flip = v->maximum_read_bandwidth_with_prefetch_without_immediate_flip +dcn_bw_max2(v->read_bandwidth[k], v->required_prefetch_pixel_data_bw_without_immediate_flip[i][j][k]);
dcn_bw_max2      1203 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dppclk_using_single_dpp =dcn_bw_max2(v->dppclk_using_single_dpp_luma, v->dppclk_using_single_dpp_chroma);
dcn_bw_max2      1206 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dispclk_with_ramping =dcn_bw_max2(v->dispclk_with_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k] / v->dpp_per_plane[k]) * (1.0 + v->downspreading / 100.0) * (1.0 + v->dispclk_ramping_margin / 100.0));
dcn_bw_max2      1207 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dispclk_without_ramping =dcn_bw_max2(v->dispclk_without_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k] / v->dpp_per_plane[k]) * (1.0 + v->downspreading / 100.0));
dcn_bw_max2      1210 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dispclk_with_ramping =dcn_bw_max2(v->dispclk_with_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k]) * (1.0 + v->downspreading / 100.0) * (1.0 + v->dispclk_ramping_margin / 100.0));
dcn_bw_max2      1211 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dispclk_without_ramping =dcn_bw_max2(v->dispclk_without_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k]) * (1.0 + v->downspreading / 100.0));
dcn_bw_max2      1303 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->last_pixel_of_line_extra_watermark =dcn_bw_max2(v->last_pixel_of_line_extra_watermark, v->data_fabric_line_delivery_time_luma - v->display_pipe_line_delivery_time_luma[k]);
dcn_bw_max2      1315 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->last_pixel_of_line_extra_watermark =dcn_bw_max2(v->last_pixel_of_line_extra_watermark, v->data_fabric_line_delivery_time_chroma - v->display_pipe_line_delivery_time_chroma[k]);
dcn_bw_max2      1405 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dcfclk_deep_sleep_per_plane[k] =dcn_bw_max2(1.1 * v->swath_width_y[k] *dcn_bw_ceil2(v->byte_per_pixel_dety[k], 1.0) / 32.0 / v->display_pipe_line_delivery_time_luma[k], 1.1 * v->swath_width_y[k] / 2.0 *dcn_bw_ceil2(v->byte_per_pixel_detc[k], 2.0) / 32.0 / v->display_pipe_line_delivery_time_chroma[k]);
dcn_bw_max2      1410 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->dcfclk_deep_sleep_per_plane[k] =dcn_bw_max2(v->dcfclk_deep_sleep_per_plane[k], v->pixel_clock[k] / 16.0);
dcn_bw_max2      1414 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->dcf_clk_deep_sleep =dcn_bw_max2(v->dcf_clk_deep_sleep, v->dcfclk_deep_sleep_per_plane[k]);
dcn_bw_max2      1604 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->max_partial_swath_y =dcn_bw_max2(1.0, v->max_partial_swath_y);
dcn_bw_max2      1615 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->max_partial_swath_c =dcn_bw_max2(1.0, v->max_partial_swath_c);
dcn_bw_max2      1656 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->v_ready_offset_pix[k] = dcn_bw_max2(150.0 / v->dppclk, v->total_repeater_delay_time + 20.0 / v->dcf_clk_deep_sleep + 10.0 / v->dppclk) * v->pixel_clock[k];
dcn_bw_max2      1663 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->t_wait =dcn_bw_max2(v->sr_enter_plus_exit_time, v->urgent_latency);
dcn_bw_max2      1678 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->bandwidth_available_for_immediate_flip = v->bandwidth_available_for_immediate_flip -dcn_bw_max2(v->read_bandwidth_plane_luma[k] + v->read_bandwidth_plane_chroma[k], v->prefetch_bandwidth[k]);
dcn_bw_max2      1709 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->time_for_fetching_row_in_vblank =dcn_bw_max2(v->urgent_extra_latency - v->time_for_fetching_meta_pte, v->htotal[k] / v->pixel_clock[k] - v->time_for_fetching_meta_pte);
dcn_bw_max2      1717 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 							v->v_ratio_prefetch_y[k] =dcn_bw_max2(v->v_ratio_prefetch_y[k], v->max_num_swath_y[k] * v->swath_height_y[k] / (v->lines_to_request_prefetch_pixel_data - (v->v_init_pre_fill_y[k] - 3.0) / 2.0));
dcn_bw_max2      1727 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->v_ratio_prefetch_y[k] =dcn_bw_max2(v->v_ratio_prefetch_y[k], 1.0);
dcn_bw_max2      1732 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 							v->v_ratio_prefetch_c[k] =dcn_bw_max2(v->v_ratio_prefetch_c[k], v->max_num_swath_c[k] * v->swath_height_c[k] / (v->lines_to_request_prefetch_pixel_data - (v->v_init_pre_fill_c[k] - 3.0) / 2.0));
dcn_bw_max2      1742 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->v_ratio_prefetch_c[k] =dcn_bw_max2(v->v_ratio_prefetch_c[k], 1.0);
dcn_bw_max2      1749 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->max_rd_bandwidth = v->max_rd_bandwidth +dcn_bw_max2(v->read_bandwidth_plane_luma[k] + v->read_bandwidth_plane_chroma[k], v->required_prefetch_pix_data_bw);
dcn_bw_max2      1751 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					v->max_rd_bandwidth = v->max_rd_bandwidth +dcn_bw_max2(v->meta_pte_bytes_frame[k] / (v->destination_lines_to_request_vm_inv_blank[k] * v->htotal[k] / v->pixel_clock[k]), (v->meta_row_byte[k] + v->pixel_pte_bytes_per_row[k]) / (v->destination_lines_to_request_row_in_vblank[k] * v->htotal[k] / v->pixel_clock[k]));
dcn_bw_max2      1811 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->min_ttuv_blank[k] = v->t_calc +dcn_bw_max2(v->stutter_enter_plus_exit_watermark, v->urgent_watermark);
dcn_bw_max2      1826 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->lb_latency_hiding_source_lines_y =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_y[k] /dcn_bw_max2(v->h_ratio[k], 1.0)), 1.0)) - (v->vtaps[k] - 1.0);
dcn_bw_max2      1827 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->lb_latency_hiding_source_lines_c =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_y[k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0)), 1.0)) - (v->vta_pschroma[k] - 1.0);
dcn_bw_max2      1878 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->v_blank_dram_clock_change_latency_margin[k] = (v->vtotal[k] - v->scaler_recout_height[k]) * (v->htotal[k] / v->pixel_clock[k]) -dcn_bw_max2(v->dram_clock_change_watermark, v->writeback_dram_clock_change_watermark);
dcn_bw_max2      1904 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->dram_clock_change_margin =dcn_bw_max2(v->min_active_dram_clock_change_margin, v->min_vblank_dram_clock_change_margin);
dcn_bw_max2        98 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c 	return v3 > dcn_bw_max2(v1, v2) ? v3 : dcn_bw_max2(v1, v2);
dcn_bw_max2       103 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_math.c 	return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, v2, v3) : dcn_bw_max2(v4, v5);
dcn_bw_max2       468 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	dlg_sys_param.total_flip_bw = v->return_bw - dcn_bw_max2(total_active_bw, total_prefetch_bw);
dcn_bw_max2        50 drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h 	return (double) dcn_bw_max2(a, b);
dcn_bw_max2        32 drivers/gpu/drm/amd/display/dc/inc/dcn_calc_math.h float dcn_bw_max2(const float arg1, const float arg2);