dcn10_dpp 97 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 123 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c void dpp_set_gamut_remap_bypass(struct dcn10_dpp *dpp) dcn10_dpp 205 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 221 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 277 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 306 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 432 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 455 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 494 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 507 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 562 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c struct dcn10_dpp *dpp, dcn10_dpp 31 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h container_of(dpp, struct dcn10_dpp, base) dcn10_dpp 1507 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h void dpp1_construct(struct dcn10_dpp *dpp1, dcn10_dpp 112 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp, dcn10_dpp 184 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 205 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp, dcn10_dpp 263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 277 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp, dcn10_dpp 304 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp, dcn10_dpp 333 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 341 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 353 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 372 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 386 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 415 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 444 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 518 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 539 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 568 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 595 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 605 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 615 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 639 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 654 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 677 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 719 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 748 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 779 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 827 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 89 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c struct dcn10_dpp *dpp, dcn10_dpp 117 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c struct dcn10_dpp *dpp, const struct scaler_data *data) dcn10_dpp 202 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c struct dcn10_dpp *dpp, dcn10_dpp 261 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c struct dcn10_dpp *dpp, dcn10_dpp 299 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c struct dcn10_dpp *dpp, dcn10_dpp 479 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c static enum lb_memory_config dpp1_dscl_find_lb_memory_config(struct dcn10_dpp *dpp, dcn10_dpp 531 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 580 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c struct dcn10_dpp *dpp, const struct scaler_data *data) dcn10_dpp 644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c struct dcn10_dpp *dpp, const struct rect *recout) dcn10_dpp 670 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dcn10_dpp 589 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c struct dcn10_dpp *dpp = dcn10_dpp 590 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c kzalloc(sizeof(struct dcn10_dpp), GFP_KERNEL);