dce_i2c_sw 34 drivers/gpu/drm/amd/display/dc/dce/dce_i2c.c struct dce_i2c_sw *dce_i2c_sw; dce_i2c_sw 47 drivers/gpu/drm/amd/display/dc/dce/dce_i2c.c dce_i2c_sw = dce_i2c_acquire_i2c_sw_engine(pool, ddc); dce_i2c_sw 49 drivers/gpu/drm/amd/display/dc/dce/dce_i2c.c if (!dce_i2c_sw) { dce_i2c_sw 58 drivers/gpu/drm/amd/display/dc/dce/dce_i2c.c return dce_i2c_submit_command_sw(pool, ddc, cmd, dce_i2c_sw); dce_i2c_sw 35 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *dce_i2c_sw, dce_i2c_sw 38 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c dce_i2c_sw->ctx = ctx; dce_i2c_sw 70 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *dce_i2c_sw) dce_i2c_sw 72 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c dal_ddc_close(dce_i2c_sw->ddc); dce_i2c_sw 73 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c dce_i2c_sw->ddc = NULL; dce_i2c_sw 368 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *engine, dce_i2c_sw 382 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *engine, dce_i2c_sw 398 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *dce_i2c_sw, dce_i2c_sw 407 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c dce_i2c_sw, ddc_handle); dce_i2c_sw 426 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *engine, dce_i2c_sw 469 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *engine, dce_i2c_sw 500 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *dce_i2c_sw) dce_i2c_sw 505 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c dce_i2c_sw_engine_set_speed(dce_i2c_sw, cmd->speed); dce_i2c_sw 515 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c dce_i2c_sw, payload, mot)) { dce_i2c_sw 523 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c release_engine_dce_sw(pool, dce_i2c_sw); dce_i2c_sw 527 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *dce_i2c_acquire_i2c_sw_engine( dce_i2c_sw 532 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c struct dce_i2c_sw *engine = NULL; dce_i2c_sw 43 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.h struct dce_i2c_sw *dce_i2c_sw, dce_i2c_sw 50 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.h struct dce_i2c_sw *dce_i2c_sw); dce_i2c_sw 52 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.h struct dce_i2c_sw *dce_i2c_acquire_i2c_sw_engine( dce_i2c_sw 533 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c struct dce_i2c_sw *dce80_i2c_sw_create( dce_i2c_sw 536 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c struct dce_i2c_sw *dce_i2c_sw = dce_i2c_sw 537 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c kzalloc(sizeof(struct dce_i2c_sw), GFP_KERNEL); dce_i2c_sw 539 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (!dce_i2c_sw) dce_i2c_sw 542 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c dce_i2c_sw_construct(dce_i2c_sw, ctx); dce_i2c_sw 544 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c return dce_i2c_sw; dce_i2c_sw 178 drivers/gpu/drm/amd/display/dc/inc/core_types.h struct dce_i2c_sw *sw_i2cs[MAX_PIPES];