CFGCHIP1_CAP1SRC   48 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_MASK			CFGCHIP1_CAP1SRC(0x1f)
CFGCHIP1_CAP1SRC   49 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_ECAP_PIN		CFGCHIP1_CAP1SRC(0x0)
CFGCHIP1_CAP1SRC   50 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_MCASP0_TX		CFGCHIP1_CAP1SRC(0x1)
CFGCHIP1_CAP1SRC   51 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_MCASP0_RX		CFGCHIP1_CAP1SRC(0x2)
CFGCHIP1_CAP1SRC   52 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C0_RX_THRESHOLD	CFGCHIP1_CAP1SRC(0x7)
CFGCHIP1_CAP1SRC   53 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C0_RX		CFGCHIP1_CAP1SRC(0x8)
CFGCHIP1_CAP1SRC   54 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C0_TX		CFGCHIP1_CAP1SRC(0x9)
CFGCHIP1_CAP1SRC   55 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C0_MISC		CFGCHIP1_CAP1SRC(0xa)
CFGCHIP1_CAP1SRC   56 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C1_RX_THRESHOLD	CFGCHIP1_CAP1SRC(0xb)
CFGCHIP1_CAP1SRC   57 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C1_RX		CFGCHIP1_CAP1SRC(0xc)
CFGCHIP1_CAP1SRC   58 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C1_TX		CFGCHIP1_CAP1SRC(0xd)
CFGCHIP1_CAP1SRC   59 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C1_MISC		CFGCHIP1_CAP1SRC(0xe)
CFGCHIP1_CAP1SRC   60 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C2_RX_THRESHOLD	CFGCHIP1_CAP1SRC(0xf)
CFGCHIP1_CAP1SRC   61 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C2_RX		CFGCHIP1_CAP1SRC(0x10)
CFGCHIP1_CAP1SRC   62 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C2_TX		CFGCHIP1_CAP1SRC(0x11)
CFGCHIP1_CAP1SRC   63 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP1SRC_EMAC_C2_MISC		CFGCHIP1_CAP1SRC(0x12)