CFGCHIP1_CAP0SRC 65 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_MASK CFGCHIP1_CAP0SRC(0x1f) CFGCHIP1_CAP0SRC 66 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_ECAP_PIN CFGCHIP1_CAP0SRC(0x0) CFGCHIP1_CAP0SRC 67 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_MCASP0_TX CFGCHIP1_CAP0SRC(0x1) CFGCHIP1_CAP0SRC 68 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_MCASP0_RX CFGCHIP1_CAP0SRC(0x2) CFGCHIP1_CAP0SRC 69 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C0_RX_THRESHOLD CFGCHIP1_CAP0SRC(0x7) CFGCHIP1_CAP0SRC 70 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C0_RX CFGCHIP1_CAP0SRC(0x8) CFGCHIP1_CAP0SRC 71 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C0_TX CFGCHIP1_CAP0SRC(0x9) CFGCHIP1_CAP0SRC 72 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C0_MISC CFGCHIP1_CAP0SRC(0xa) CFGCHIP1_CAP0SRC 73 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C1_RX_THRESHOLD CFGCHIP1_CAP0SRC(0xb) CFGCHIP1_CAP0SRC 74 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C1_RX CFGCHIP1_CAP0SRC(0xc) CFGCHIP1_CAP0SRC 75 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C1_TX CFGCHIP1_CAP0SRC(0xd) CFGCHIP1_CAP0SRC 76 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C1_MISC CFGCHIP1_CAP0SRC(0xe) CFGCHIP1_CAP0SRC 77 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C2_RX_THRESHOLD CFGCHIP1_CAP0SRC(0xf) CFGCHIP1_CAP0SRC 78 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C2_RX CFGCHIP1_CAP0SRC(0x10) CFGCHIP1_CAP0SRC 79 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C2_TX CFGCHIP1_CAP0SRC(0x11) CFGCHIP1_CAP0SRC 80 include/linux/mfd/da8xx-cfgchip.h #define CFGCHIP1_CAP0SRC_EMAC_C2_MISC CFGCHIP1_CAP0SRC(0x12)