dc_state          450 arch/mips/mm/cerr-sb1.c static struct dc_state dc_states[] = {
dc_state          466 arch/mips/mm/cerr-sb1.c 	struct dc_state *dsc = dc_states;
dc_state         1252 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		if (dm_new_plane_state->dc_state) {
dc_state         1253 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 			WARN_ON(kref_read(&dm_new_plane_state->dc_state->refcount) > 1);
dc_state         1254 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 			dc_plane_state_release(dm_new_plane_state->dc_state);
dc_state         1255 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 			dm_new_plane_state->dc_state = NULL;
dc_state         3525 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void dm_enable_per_frame_crtc_master_sync(struct dc_state *context)
dc_state         4458 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	if (old_dm_plane_state->dc_state) {
dc_state         4459 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dm_plane_state->dc_state = old_dm_plane_state->dc_state;
dc_state         4460 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dc_plane_state_retain(dm_plane_state->dc_state);
dc_state         4471 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	if (dm_plane_state->dc_state)
dc_state         4472 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dc_plane_state_release(dm_plane_state->dc_state);
dc_state         4555 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	if (dm_plane_state_new->dc_state &&
dc_state         4556 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 			dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) {
dc_state         4557 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		struct dc_plane_state *plane_state = dm_plane_state_new->dc_state;
dc_state         4603 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	if (!dm_plane_state->dc_state)
dc_state         4610 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	if (dc_validate_plane(dc, dm_plane_state->dc_state) == DC_OK)
dc_state         5669 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 				    struct dc_state *dc_state,
dc_state         5736 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dc_plane = dm_new_plane_state->dc_state;
dc_state         5939 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 						     dc_state);
dc_state         6160 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	struct dc_state *dc_state = NULL, *dc_state_temp = NULL;
dc_state         6175 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dc_state = dm_state->context;
dc_state         6180 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dc_state = dc_state_temp;
dc_state         6181 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dc_resource_state_copy_construct_current(dm->dc, dc_state);
dc_state         6255 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	if (dc_state) {
dc_state         6256 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dm_enable_per_frame_crtc_master_sync(dc_state);
dc_state         6258 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		WARN_ON(!dc_commit_state(dm->dc, dc_state));
dc_state         6272 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 				status = dc_stream_get_status_from_state(dc_state,
dc_state         6358 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 						     dc_state);
dc_state         6391 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 			amdgpu_dm_commit_planes(state, dc_state, dev,
dc_state         6985 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 				dm_old_plane_state->dc_state,
dc_state         6993 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dc_plane_state_release(dm_old_plane_state->dc_state);
dc_state         6994 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dm_new_plane_state->dc_state = NULL;
dc_state         7016 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		WARN_ON(dm_new_plane_state->dc_state);
dc_state         7058 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dm_new_plane_state->dc_state = dc_new_plane_state;
dc_state         7063 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		dm_new_plane_state->dc_state->update_flags.bits.full_update = 1;
dc_state         7135 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 			if (new_dm_plane_state->dc_state != old_dm_plane_state->dc_state) {
dc_state         7143 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 			updates[num_plane].surface = new_dm_plane_state->dc_state;
dc_state         7152 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 						new_dm_plane_state->dc_state->gamma_correction;
dc_state         7154 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 						new_dm_plane_state->dc_state->in_transfer_func;
dc_state          303 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 	struct dc_plane_state *dc_state;
dc_state          336 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 	struct dc_state *context;
dc_state          543 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		struct dc_state *context,
dc_state          694 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		struct dc_state *context)
dc_state          721 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		struct dc_state *context,
dc_state           47 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c 		struct dc_state *context)
dc_state          165 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context)
dc_state          196 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	struct dc_state *context)
dc_state          383 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	struct dc_state *context)
dc_state          396 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 			struct dc_state *context,
dc_state           37 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.h 	struct dc_state *context);
dc_state           39 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.h uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context);
dc_state           92 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context)
dc_state          120 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c 	const struct dc_state *context,
dc_state          174 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c 	struct dc_state *context)
dc_state          249 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c 			struct dc_state *context,
dc_state           34 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.h 	const struct dc_state *context,
dc_state           40 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.h 	struct dc_state *context);
dc_state           42 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.h uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
dc_state          194 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c 			struct dc_state *context,
dc_state           85 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c 			struct dc_state *context,
dc_state          126 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c 			struct dc_state *context,
dc_state          103 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c 		struct dc_state *context)
dc_state          187 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c 			struct dc_state *context,
dc_state          320 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c 		struct dc_state *context,
dc_state          399 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c 		struct dc_state *context,
dc_state           30 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h 			struct dc_state *context,
dc_state           34 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h 			struct dc_state *context,
dc_state           37 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h 		struct dc_state *context);
dc_state           49 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h 		struct dc_state *context,
dc_state           56 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c 			struct dc_state *context,
dc_state          732 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_state *context)
dc_state          743 drivers/gpu/drm/amd/display/dc/core/dc.c static void disable_dangling_plane(struct dc *dc, struct dc_state *context)
dc_state          746 drivers/gpu/drm/amd/display/dc/core/dc.c 	struct dc_state *dangling_context = dc_create_state(dc);
dc_state          747 drivers/gpu/drm/amd/display/dc/core/dc.c 	struct dc_state *current_ctx;
dc_state          843 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_state *ctx)
dc_state          867 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_state *ctx)
dc_state          955 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_state *context)
dc_state         1028 drivers/gpu/drm/amd/display/dc/core/dc.c 	struct dc_state *context,
dc_state         1055 drivers/gpu/drm/amd/display/dc/core/dc.c static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *context)
dc_state         1163 drivers/gpu/drm/amd/display/dc/core/dc.c bool dc_commit_state(struct dc *dc, struct dc_state *context)
dc_state         1185 drivers/gpu/drm/amd/display/dc/core/dc.c static bool is_flip_pending_in_pipes(struct dc *dc, struct dc_state *context)
dc_state         1208 drivers/gpu/drm/amd/display/dc/core/dc.c 	struct dc_state *context = dc->current_state;
dc_state         1231 drivers/gpu/drm/amd/display/dc/core/dc.c struct dc_state *dc_create_state(struct dc *dc)
dc_state         1233 drivers/gpu/drm/amd/display/dc/core/dc.c 	struct dc_state *context = kvzalloc(sizeof(struct dc_state),
dc_state         1251 drivers/gpu/drm/amd/display/dc/core/dc.c struct dc_state *dc_copy_state(struct dc_state *src_ctx)
dc_state         1254 drivers/gpu/drm/amd/display/dc/core/dc.c 	struct dc_state *new_ctx = kvmalloc(sizeof(struct dc_state), GFP_KERNEL);
dc_state         1258 drivers/gpu/drm/amd/display/dc/core/dc.c 	memcpy(new_ctx, src_ctx, sizeof(struct dc_state));
dc_state         1289 drivers/gpu/drm/amd/display/dc/core/dc.c void dc_retain_state(struct dc_state *context)
dc_state         1296 drivers/gpu/drm/amd/display/dc/core/dc.c 	struct dc_state *context = container_of(kref, struct dc_state, refcount);
dc_state         1301 drivers/gpu/drm/amd/display/dc/core/dc.c void dc_release_state(struct dc_state *context)
dc_state         1356 drivers/gpu/drm/amd/display/dc/core/dc.c 		const struct dc_state *context,
dc_state         1519 drivers/gpu/drm/amd/display/dc/core/dc.c 	const struct dc_state *context = dc->current_state;
dc_state         1665 drivers/gpu/drm/amd/display/dc/core/dc.c 	struct dc_state *ctx,
dc_state         1799 drivers/gpu/drm/amd/display/dc/core/dc.c 					 struct dc_state *context,
dc_state         1897 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_state *context)
dc_state         1999 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_state *context)
dc_state         2174 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_state *state)
dc_state         2178 drivers/gpu/drm/amd/display/dc/core/dc.c 	struct dc_state *context;
dc_state         2244 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_state *old = dc->current_state;
dc_state         2515 drivers/gpu/drm/amd/display/dc/core/dc.c void get_clock_requirements_for_state(struct dc_state *state, struct AsicStateEx *info)
dc_state          348 drivers/gpu/drm/amd/display/dc/core/dc_debug.c 		struct dc_state *context)
dc_state         1451 drivers/gpu/drm/amd/display/dc/core/dc_link.c 		struct dc_state *state,
dc_state         1545 drivers/gpu/drm/amd/display/dc/core/dc_link.c 		struct dc_state *state,
dc_state         1556 drivers/gpu/drm/amd/display/dc/core/dc_link.c 		struct dc_state *state,
dc_state         2107 drivers/gpu/drm/amd/display/dc/core/dc_link.c 		struct dc_state *state,
dc_state         2673 drivers/gpu/drm/amd/display/dc/core/dc_link.c 		struct dc_state *state,
dc_state         1054 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	struct dc_state *context)
dc_state         1164 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *context,
dc_state         1234 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *context)
dc_state         1312 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *context)
dc_state         1383 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *context)
dc_state         1417 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *context)
dc_state         1442 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *context)
dc_state         1667 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	struct dc_state *old_context, struct dc_stream_state *stream)
dc_state         1686 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *new_ctx,
dc_state         1713 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 			struct dc_state *new_ctx,
dc_state         1787 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *context)
dc_state         1907 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *context,
dc_state         2012 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *dst_ctx)
dc_state         2020 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *dst_ctx)
dc_state         2036 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *new_ctx,
dc_state         2429 drivers/gpu/drm/amd/display/dc/core/dc_resource.c void dc_resource_state_destruct(struct dc_state *context)
dc_state         2445 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		const struct dc_state *src_ctx,
dc_state         2446 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *dst_ctx)
dc_state         2533 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_state *context,
dc_state          211 drivers/gpu/drm/amd/display/dc/core/dc_stream.c 	struct dc_state *state,
dc_state          200 drivers/gpu/drm/amd/display/dc/dc.h struct dc_state;
dc_state          454 drivers/gpu/drm/amd/display/dc/dc.h struct dc_state;
dc_state          476 drivers/gpu/drm/amd/display/dc/dc.h 	struct dc_state *current_state;
dc_state          875 drivers/gpu/drm/amd/display/dc/dc.h void get_clock_requirements_for_state(struct dc_state *state, struct AsicStateEx *info);
dc_state          886 drivers/gpu/drm/amd/display/dc/dc.h 		struct dc_state *new_ctx,
dc_state          892 drivers/gpu/drm/amd/display/dc/dc.h 		struct dc_state *dst_ctx);
dc_state          895 drivers/gpu/drm/amd/display/dc/dc.h 		const struct dc_state *src_ctx,
dc_state          896 drivers/gpu/drm/amd/display/dc/dc.h 		struct dc_state *dst_ctx);
dc_state          900 drivers/gpu/drm/amd/display/dc/dc.h 		struct dc_state *dst_ctx);
dc_state          902 drivers/gpu/drm/amd/display/dc/dc.h void dc_resource_state_destruct(struct dc_state *context);
dc_state          913 drivers/gpu/drm/amd/display/dc/dc.h bool dc_commit_state(struct dc *dc, struct dc_state *context);
dc_state          916 drivers/gpu/drm/amd/display/dc/dc.h struct dc_state *dc_create_state(struct dc *dc);
dc_state          917 drivers/gpu/drm/amd/display/dc/dc.h struct dc_state *dc_copy_state(struct dc_state *src_ctx);
dc_state          918 drivers/gpu/drm/amd/display/dc/dc.h void dc_retain_state(struct dc_state *context);
dc_state          919 drivers/gpu/drm/amd/display/dc/dc.h void dc_release_state(struct dc_state *context);
dc_state          270 drivers/gpu/drm/amd/display/dc/dc_stream.h 		struct dc_state *state);
dc_state          303 drivers/gpu/drm/amd/display/dc/dc_stream.h 		struct dc_state *new_ctx,
dc_state          308 drivers/gpu/drm/amd/display/dc/dc_stream.h 			struct dc_state *new_ctx,
dc_state          316 drivers/gpu/drm/amd/display/dc/dc_stream.h 		struct dc_state *context);
dc_state          322 drivers/gpu/drm/amd/display/dc/dc_stream.h 		struct dc_state *context);
dc_state          327 drivers/gpu/drm/amd/display/dc/dc_stream.h 		struct dc_state *context);
dc_state          334 drivers/gpu/drm/amd/display/dc/dc_stream.h 		struct dc_state *context);
dc_state          365 drivers/gpu/drm/amd/display/dc/dc_stream.h 	struct dc_state *context,
dc_state          390 drivers/gpu/drm/amd/display/dc/dc_stream.h 	struct dc_state *state,
dc_state          184 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c static uint32_t get_max_pixel_clock_for_all_paths(struct dc_state *context)
dc_state          215 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	struct dc_state *context)
dc_state          492 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	const struct dc_state *context,
dc_state          544 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c static uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context)
dc_state          596 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	struct dc_state *context)
dc_state          610 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	struct dc_state *context)
dc_state          669 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 			struct dc_state *context,
dc_state          696 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 			struct dc_state *context,
dc_state          723 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 			struct dc_state *context,
dc_state          750 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 			struct dc_state *context,
dc_state          111 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c 		struct dc_state *context)
dc_state          123 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c 		struct dc_state *context)
dc_state           32 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h struct dc_state;
dc_state           38 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h 		struct dc_state *context);
dc_state           42 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h 		struct dc_state *context);
dc_state          750 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		struct dc_state *context,
dc_state          767 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 	struct dc_state *context,
dc_state          791 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		struct dc_state *context)
dc_state          812 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		struct dc_state *context)
dc_state          822 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		struct dc_state *new_ctx,
dc_state           46 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h 		struct dc_state *new_ctx,
dc_state         1113 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	struct dc_state *state,
dc_state         1271 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context,
dc_state         1326 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context,
dc_state         1521 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c static struct dc_stream_state *get_edp_stream(struct dc_state *context)
dc_state         1546 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context)
dc_state         1570 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context)
dc_state         1648 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	struct dc_state *context)
dc_state         1791 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context,
dc_state         1856 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context)
dc_state         1880 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context)
dc_state         1950 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context)
dc_state         2031 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context)
dc_state         2361 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c static void init_pipes(struct dc *dc, struct dc_state *context)
dc_state         2437 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context)
dc_state         2451 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context)
dc_state         2580 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct dc_state *context)
dc_state           33 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h struct dc_state;
dc_state           40 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h 		struct dc_state *context);
dc_state           58 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);
dc_state           68 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h 		struct dc_state *context);
dc_state           72 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h 		struct dc_state *context);
dc_state          869 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		struct dc_state *context,
dc_state          892 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	struct dc_state *context,
dc_state          975 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		struct dc_state *context)
dc_state         1021 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		struct dc_state *context)
dc_state         1031 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		struct dc_state *new_ctx,
dc_state         1049 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		struct dc_state *context,
dc_state          797 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		struct dc_state *context,
dc_state          814 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	struct dc_state *context,
dc_state          886 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		struct dc_state *context,
dc_state          918 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		struct dc_state *context)
dc_state          939 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		struct dc_state *new_ctx,
dc_state          958 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		struct dc_state *context)
dc_state           42 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.h 		struct dc_state *context,
dc_state           43 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.h 		struct dc_state *old_context);
dc_state           47 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.h 	struct dc_state *context,
dc_state           52 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.h 		struct dc_state *new_ctx,
dc_state          801 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	struct dc_state *context,
dc_state          825 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		struct dc_state *context)
dc_state          846 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		struct dc_state *context)
dc_state          733 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct dc_state *context,
dc_state          819 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct dc_state *context)
dc_state         1076 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c static void dcn10_init_pipes(struct dc *dc, struct dc_state *context)
dc_state         1307 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct dc_state *context)
dc_state         1828 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dc_state *context)
dc_state         2282 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dc_state *context)
dc_state         2473 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct dc_state *context)
dc_state         2500 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct dc_state *context)
dc_state         2528 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct dc_state *context,
dc_state         2554 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct dc_state *context)
dc_state         2669 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c static void dcn10_stereo_hw_frame_pack_wa(struct dc *dc, struct dc_state *context)
dc_state         2687 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct dc_state *context)
dc_state         2719 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		struct dc_state *context)
dc_state         3105 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dc_state *context,
dc_state         3263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dc_state *context = dc->current_state;
dc_state         3302 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dc_state *context = dc->current_state;
dc_state           35 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h 	const struct dc_state *context,
dc_state           47 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h 		struct dc_state *context);
dc_state           79 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h 	struct dc_state *context);
dc_state           83 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h 		struct dc_state *context,
dc_state           91 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h 	struct dc_state *context,
dc_state         1039 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		struct dc_state *context,
dc_state         1071 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		struct dc_state *new_ctx,
dc_state         1089 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		struct dc_state *context,
dc_state         1147 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c static enum dc_status dcn10_validate_global(struct dc *dc, struct dc_state *context)
dc_state          525 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context,
dc_state          826 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c static void dcn20_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx)
dc_state          928 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	struct dc_state *context)
dc_state         1004 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context)
dc_state         1034 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context)
dc_state         1149 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context)
dc_state         1274 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context)
dc_state         1292 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context)
dc_state         1310 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context)
dc_state         1359 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context)
dc_state         1627 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context)
dc_state         1695 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		struct dc_state *context)
dc_state         1998 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	struct dc_state  *context = dc->current_state;
dc_state           35 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h 		struct dc_state *context,
dc_state           51 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h 		struct dc_state *context);
dc_state           55 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h 		struct dc_state *context);
dc_state           59 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h 		struct dc_state *context);
dc_state         1497 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream)
dc_state         1575 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct dc_state *dc_ctx,
dc_state         1605 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct dc_state *new_ctx,
dc_state         1628 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream)
dc_state         1650 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream)
dc_state         2201 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct dc_state *context,
dc_state         2253 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c static bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx)
dc_state         2366 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct dc_state *context,
dc_state         2629 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct dc *dc, struct dc_state *context,
dc_state         2735 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct dc *dc, struct dc_state *context,
dc_state         2838 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c static bool dcn20_validate_bandwidth_internal(struct dc *dc, struct dc_state *context,
dc_state         2891 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
dc_state         2935 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct dc_state *state,
dc_state           55 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h 		struct dc_state *state,
dc_state          115 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h 		struct dc_state *context,
dc_state          118 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);
dc_state          121 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h 		struct dc_state *context,
dc_state          127 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h 		struct dc *dc, struct dc_state *context,
dc_state          132 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);
dc_state          133 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
dc_state          134 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
dc_state          980 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 		struct dc *dc, struct dc_state *context,
dc_state         1062 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c bool dcn21_validate_bandwidth(struct dc *dc, struct dc_state *context,
dc_state           77 drivers/gpu/drm/amd/display/dc/inc/core_types.h 		struct dc_state *state,
dc_state           88 drivers/gpu/drm/amd/display/dc/inc/core_types.h struct dc_state;
dc_state          101 drivers/gpu/drm/amd/display/dc/inc/core_types.h 					struct dc_state *context,
dc_state          111 drivers/gpu/drm/amd/display/dc/inc/core_types.h 		struct dc_state *context);
dc_state          114 drivers/gpu/drm/amd/display/dc/inc/core_types.h 			struct dc_state *context,
dc_state          122 drivers/gpu/drm/amd/display/dc/inc/core_types.h 			struct dc_state *new_ctx,
dc_state          127 drivers/gpu/drm/amd/display/dc/inc/core_types.h 				struct dc_state *new_ctx,
dc_state          144 drivers/gpu/drm/amd/display/dc/inc/core_types.h 			struct dc_state *context,
dc_state           37 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h struct dc_state;
dc_state           38 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h struct dc_state;
dc_state          624 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 		struct dc_state *context,
dc_state          171 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h 			struct dc_state *context,
dc_state          180 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h 			struct dc_state *context,
dc_state          296 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h 		struct dc_state *context);
dc_state           68 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h struct dc_state;
dc_state           93 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 	void (*init_pipes)(struct dc *dc, struct dc_state *context);
dc_state           96 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc *dc, struct dc_state *context);
dc_state           99 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc *dc, struct dc_state *context);
dc_state          105 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc_state *context);
dc_state          166 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 	void (*enable_accelerated_mode)(struct dc *dc, struct dc_state *context);
dc_state          227 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc_state *context);
dc_state          230 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc_state *context);
dc_state          235 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc_state *context);
dc_state          252 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc_state *context,
dc_state          317 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 	void (*update_odm)(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);
dc_state          321 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc_state *context);
dc_state          325 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc_state *context);
dc_state          329 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct dc_state *context);
dc_state           91 drivers/gpu/drm/amd/display/dc/inc/resource.h 		struct dc_state *context,
dc_state           98 drivers/gpu/drm/amd/display/dc/inc/resource.h 		struct dc_state *context);
dc_state          137 drivers/gpu/drm/amd/display/dc/inc/resource.h 		struct dc_state *context,
dc_state          146 drivers/gpu/drm/amd/display/dc/inc/resource.h 	struct dc_state *old_context, struct dc_stream_state *stream);
dc_state          151 drivers/gpu/drm/amd/display/dc/inc/resource.h 		const struct dc_state *old_context,
dc_state          152 drivers/gpu/drm/amd/display/dc/inc/resource.h 		struct dc_state *context,
dc_state          156 drivers/gpu/drm/amd/display/dc/inc/resource.h 		const struct dc_state *src_ctx,
dc_state          157 drivers/gpu/drm/amd/display/dc/inc/resource.h 		struct dc_state *dst_ctx);
dc_state          161 drivers/gpu/drm/amd/display/dc/inc/resource.h 		struct dc_state *context,
dc_state          166 drivers/gpu/drm/amd/display/dc/inc/resource.h 		struct dc_state *context,
dc_state           35 drivers/gpu/drm/amd/display/include/logger_interface.h struct dc_state;
dc_state           63 drivers/gpu/drm/amd/display/include/logger_interface.h 		struct dc_state *context);
dc_state          734 drivers/gpu/drm/i915/display/intel_display_power.c 		      dev_priv->csr.dc_state, val);
dc_state          735 drivers/gpu/drm/i915/display/intel_display_power.c 	dev_priv->csr.dc_state = val;
dc_state          775 drivers/gpu/drm/i915/display/intel_display_power.c 	if ((val & mask) != dev_priv->csr.dc_state)
dc_state          777 drivers/gpu/drm/i915/display/intel_display_power.c 			  dev_priv->csr.dc_state, val & mask);
dc_state          784 drivers/gpu/drm/i915/display/intel_display_power.c 	dev_priv->csr.dc_state = val & mask;
dc_state          333 drivers/gpu/drm/i915/i915_drv.h 	u32 dc_state;
dc_state          325 drivers/gpu/drm/i915/intel_csr.c 	dev_priv->csr.dc_state = 0;