dc_plane_state   3068 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 				    struct dc_plane_state *dc_plane_state,
dc_plane_state   3085 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->src_rect = scaling_info.src_rect;
dc_plane_state   3086 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->dst_rect = scaling_info.dst_rect;
dc_plane_state   3087 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->clip_rect = scaling_info.clip_rect;
dc_plane_state   3088 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->scaling_quality = scaling_info.scaling_quality;
dc_plane_state   3097 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 					  &dc_plane_state->address,
dc_plane_state   3102 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->format = plane_info.format;
dc_plane_state   3103 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->color_space = plane_info.color_space;
dc_plane_state   3104 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->format = plane_info.format;
dc_plane_state   3105 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->plane_size = plane_info.plane_size;
dc_plane_state   3106 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->rotation = plane_info.rotation;
dc_plane_state   3107 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->horizontal_mirror = plane_info.horizontal_mirror;
dc_plane_state   3108 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->stereo_format = plane_info.stereo_format;
dc_plane_state   3109 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->tiling_info = plane_info.tiling_info;
dc_plane_state   3110 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->visible = plane_info.visible;
dc_plane_state   3111 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->per_pixel_alpha = plane_info.per_pixel_alpha;
dc_plane_state   3112 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->global_alpha = plane_info.global_alpha;
dc_plane_state   3113 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->global_alpha_value = plane_info.global_alpha_value;
dc_plane_state   3114 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->dcc = plane_info.dcc;
dc_plane_state   3115 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	dc_plane_state->layer_index = plane_info.layer_index; // Always returns 0
dc_plane_state   3121 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dc_plane_state);
dc_plane_state   4557 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		struct dc_plane_state *plane_state = dm_plane_state_new->dc_state;
dc_plane_state   5501 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	struct dc_plane_state *surface,
dc_plane_state   5722 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		struct dc_plane_state *dc_plane;
dc_plane_state   6999 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		struct dc_plane_state *dc_new_plane_state;
dc_plane_state    299 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h struct dc_plane_state;
dc_plane_state    303 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 	struct dc_plane_state *dc_state;
dc_plane_state    392 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 				      struct dc_plane_state *dc_plane_state);
dc_plane_state    417 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 				      struct dc_plane_state *dc_plane_state)
dc_plane_state    428 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 		dc_plane_state->in_transfer_func->type =
dc_plane_state    456 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 			dc_plane_state->in_transfer_func->tf =
dc_plane_state    459 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 			dc_plane_state->in_transfer_func->tf =
dc_plane_state    462 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 		r = __set_input_tf(dc_plane_state->in_transfer_func,
dc_plane_state    471 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 		dc_plane_state->in_transfer_func->type = TF_TYPE_PREDEFINED;
dc_plane_state    472 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 		dc_plane_state->in_transfer_func->tf = TRANSFER_FUNCTION_SRGB;
dc_plane_state    475 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 		dc_plane_state->in_transfer_func->type = TF_TYPE_BYPASS;
dc_plane_state    476 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c 		dc_plane_state->in_transfer_func->tf = TRANSFER_FUNCTION_LINEAR;
dc_plane_state   1357 drivers/gpu/drm/amd/display/dc/core/dc.c 		const struct dc_plane_state *plane_state)
dc_plane_state   1682 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_plane_state *surface,
dc_plane_state   2039 drivers/gpu/drm/amd/display/dc/core/dc.c 			struct dc_plane_state *plane_state = srf_updates[i].surface;
dc_plane_state   2108 drivers/gpu/drm/amd/display/dc/core/dc.c 				struct dc_plane_state *plane_state = srf_updates[i].surface;
dc_plane_state   2127 drivers/gpu/drm/amd/display/dc/core/dc.c 			struct dc_plane_state *plane_state = srf_updates[i].surface;
dc_plane_state   2214 drivers/gpu/drm/amd/display/dc/core/dc.c 		struct dc_plane_state *surface = srf_updates[i].surface;
dc_plane_state     60 drivers/gpu/drm/amd/display/dc/core/dc_debug.c 		const struct dc_plane_state *const *plane_states,
dc_plane_state     67 drivers/gpu/drm/amd/display/dc/core/dc_debug.c 		const struct dc_plane_state *plane_state = plane_states[i];
dc_plane_state    549 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state    657 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state    715 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state    845 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state    964 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	const struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state   1233 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_plane_state *plane_state,
dc_plane_state   1311 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_plane_state *plane_state,
dc_plane_state   1387 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 };
dc_plane_state   1440 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		struct dc_plane_state * const *plane_states,
dc_plane_state   2773 drivers/gpu/drm/amd/display/dc/core/dc_resource.c enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state)
dc_plane_state     40 drivers/gpu/drm/amd/display/dc/core/dc_surface.c static void construct(struct dc_context *ctx, struct dc_plane_state *plane_state)
dc_plane_state     73 drivers/gpu/drm/amd/display/dc/core/dc_surface.c static void destruct(struct dc_plane_state *plane_state)
dc_plane_state    106 drivers/gpu/drm/amd/display/dc/core/dc_surface.c void enable_surface_flip_reporting(struct dc_plane_state *plane_state,
dc_plane_state    113 drivers/gpu/drm/amd/display/dc/core/dc_surface.c struct dc_plane_state *dc_create_plane_state(struct dc *dc)
dc_plane_state    117 drivers/gpu/drm/amd/display/dc/core/dc_surface.c 	struct dc_plane_state *plane_state = kvzalloc(sizeof(*plane_state),
dc_plane_state    141 drivers/gpu/drm/amd/display/dc/core/dc_surface.c 		const struct dc_plane_state *plane_state)
dc_plane_state    186 drivers/gpu/drm/amd/display/dc/core/dc_surface.c void dc_plane_state_retain(struct dc_plane_state *plane_state)
dc_plane_state    193 drivers/gpu/drm/amd/display/dc/core/dc_surface.c 	struct dc_plane_state *plane_state = container_of(kref, struct dc_plane_state, refcount);
dc_plane_state    198 drivers/gpu/drm/amd/display/dc/core/dc_surface.c void dc_plane_state_release(struct dc_plane_state *plane_state)
dc_plane_state    199 drivers/gpu/drm/amd/display/dc/dc.h struct dc_plane_state;
dc_plane_state    798 drivers/gpu/drm/amd/display/dc/dc.h 	struct dc_plane_state *surface;
dc_plane_state    823 drivers/gpu/drm/amd/display/dc/dc.h struct dc_plane_state *dc_create_plane_state(struct dc *dc);
dc_plane_state    825 drivers/gpu/drm/amd/display/dc/dc.h 		const struct dc_plane_state *plane_state);
dc_plane_state    827 drivers/gpu/drm/amd/display/dc/dc.h void dc_plane_state_retain(struct dc_plane_state *plane_state);
dc_plane_state    828 drivers/gpu/drm/amd/display/dc/dc.h void dc_plane_state_release(struct dc_plane_state *plane_state);
dc_plane_state    865 drivers/gpu/drm/amd/display/dc/dc.h 	struct dc_plane_state *plane_states[MAX_SURFACES];
dc_plane_state    873 drivers/gpu/drm/amd/display/dc/dc.h enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state);
dc_plane_state     47 drivers/gpu/drm/amd/display/dc/dc_stream.h 	struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
dc_plane_state    315 drivers/gpu/drm/amd/display/dc/dc_stream.h 		struct dc_plane_state *plane_state,
dc_plane_state    321 drivers/gpu/drm/amd/display/dc/dc_stream.h 		struct dc_plane_state *plane_state,
dc_plane_state    332 drivers/gpu/drm/amd/display/dc/dc_stream.h 		struct dc_plane_state * const *plane_states,
dc_plane_state     37 drivers/gpu/drm/amd/display/dc/dc_types.h struct dc_plane_state;
dc_plane_state    847 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)
dc_plane_state     42 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps);
dc_plane_state    244 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		const struct dc_plane_state *plane_state)
dc_plane_state    272 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 			       const struct dc_plane_state *plane_state)
dc_plane_state   2203 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state   2218 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state   2468 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state    964 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c enum dc_status dce110_validate_plane(const struct dc_plane_state *plane_state,
dc_plane_state    987 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			struct dc_plane_state *plane =
dc_plane_state   1339 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state   1368 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state   1390 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 					  const struct dc_plane_state *plane_state)
dc_plane_state   2141 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		const struct dc_plane_state *plane_state)
dc_plane_state   2161 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c static void update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state)
dc_plane_state   2286 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state   2924 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state     89 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h 		const struct dc_plane_state *plane_state);
dc_plane_state   1137 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c static enum dc_status dcn10_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)
dc_plane_state   1163 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 			struct dc_plane_state *plane =
dc_plane_state   1197 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c static enum dc_status dcn10_get_default_swizzle_mode(struct dc_plane_state *plane_state)
dc_plane_state    691 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)
dc_plane_state    713 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)
dc_plane_state    750 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 					  const struct dc_plane_state *plane_state)
dc_plane_state   1530 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state   1558 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
dc_plane_state     72 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h 			const struct dc_plane_state *plane_state);
dc_plane_state   2071 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			struct dc_plane_state *pln = res_ctx->pipe_ctx[i].plane_state;
dc_plane_state   2986 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c enum dc_status dcn20_get_default_swizzle_mode(struct dc_plane_state *plane_state)
dc_plane_state    135 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h enum dc_status dcn20_get_default_swizzle_mode(struct dc_plane_state *plane_state);
dc_plane_state     46 drivers/gpu/drm/amd/display/dc/inc/core_types.h void enable_surface_flip_reporting(struct dc_plane_state *plane_state,
dc_plane_state    118 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state, struct dc_caps *caps);
dc_plane_state    130 drivers/gpu/drm/amd/display/dc/inc/core_types.h 			struct dc_plane_state *plane_state);
dc_plane_state    289 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	struct dc_plane_state *plane_state;
dc_plane_state    158 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 				const struct dc_plane_state *plane_state);
dc_plane_state    134 drivers/gpu/drm/amd/display/dc/inc/resource.h 		struct dc_plane_state *const *plane_state,
dc_plane_state     47 drivers/gpu/drm/amd/display/include/logger_interface.h 		const struct dc_plane_state *const *plane_states,
dc_plane_state    858 drivers/gpu/drm/amd/display/modules/freesync/freesync.c 		const struct dc_plane_state *plane,
dc_plane_state    157 drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h 		const struct dc_plane_state *plane,