dc_lane_count 316 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c static bool is_cr_done(enum dc_lane_count ln_count, dc_lane_count 330 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c static bool is_ch_eq_done(enum dc_lane_count ln_count, dc_lane_count 665 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c enum dc_lane_count lane_count = dc_lane_count 750 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c static enum link_training_result get_cr_failure(enum dc_lane_count ln_count, dc_lane_count 773 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c enum dc_lane_count lane_count = lt_settings->link_settings.lane_count; dc_lane_count 835 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c enum dc_lane_count lane_count = lt_settings->link_settings.lane_count; dc_lane_count 1714 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c static inline bool reached_minimum_lane_count(enum dc_lane_count lane_count) dc_lane_count 1724 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c static enum dc_lane_count reduce_lane_count(enum dc_lane_count lane_count) dc_lane_count 1754 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c static enum dc_lane_count increase_lane_count(enum dc_lane_count lane_count) dc_lane_count 101 drivers/gpu/drm/amd/display/dc/dc_dp_types.h enum dc_lane_count lane_count; dc_lane_count 652 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c enum dc_lane_count lane_count = dc_lane_count 1923 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c enum dc_lane_count lane_count = dc_lane_count 109 drivers/gpu/drm/amd/display/include/bios_parser_types.h enum dc_lane_count lanes_number; dc_lane_count 119 drivers/gpu/drm/amd/display/include/bios_parser_types.h enum dc_lane_count lanes_number; dc_lane_count 143 drivers/gpu/drm/amd/display/include/bios_parser_types.h enum dc_lane_count lanes_number;