cvmx_sysinfo_get   65 arch/mips/cavium-octeon/executive/cvmx-helper-board.c 	switch (cvmx_sysinfo_get()->board_type) {
cvmx_sysinfo_get  188 arch/mips/cavium-octeon/executive/cvmx-helper-board.c 	     cvmx_sysinfo_get()->board_type);
cvmx_sysinfo_get  300 arch/mips/cavium-octeon/executive/cvmx-helper-board.c 	switch (cvmx_sysinfo_get()->board_type) {
cvmx_sysinfo_get  331 arch/mips/cavium-octeon/executive/cvmx-helper-board.c 	switch (cvmx_sysinfo_get()->board_type) {
cvmx_sysinfo_get   50 arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c 	uint32_t divisor = cvmx_sysinfo_get()->cpu_clock_hz / (25 * 1000000);
cvmx_sysinfo_get  163 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c 	struct cvmx_sysinfo *sys_info_ptr = cvmx_sysinfo_get();
cvmx_sysinfo_get  309 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c 	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
cvmx_sysinfo_get   54 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c 	const uint64_t clock_mhz = cvmx_sysinfo_get()->cpu_clock_hz / 1000000;
cvmx_sysinfo_get  151 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c 	if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {
cvmx_sysinfo_get  181 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c 	if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&
cvmx_sysinfo_get  321 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c 		if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
cvmx_sysinfo_get  407 arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c 	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
cvmx_sysinfo_get   54 arch/mips/cavium-octeon/executive/cvmx-helper-spi.c 	if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&
cvmx_sysinfo_get   75 arch/mips/cavium-octeon/executive/cvmx-helper-spi.c 	if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&
cvmx_sysinfo_get  121 arch/mips/cavium-octeon/executive/cvmx-helper-spi.c 	if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {
cvmx_sysinfo_get  150 arch/mips/cavium-octeon/executive/cvmx-helper-spi.c 	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
cvmx_sysinfo_get  992 arch/mips/cavium-octeon/executive/cvmx-helper.c 	    && (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM))
cvmx_sysinfo_get  595 arch/mips/cavium-octeon/executive/cvmx-pko.c 	    cvmx_sysinfo_get()->cpu_clock_hz / packets_s / 16;
cvmx_sysinfo_get  624 arch/mips/cavium-octeon/executive/cvmx-pko.c 	uint64_t clock_rate = cvmx_sysinfo_get()->cpu_clock_hz;
cvmx_sysinfo_get  204 arch/mips/cavium-octeon/executive/cvmx-spi.c 	uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;
cvmx_sysinfo_get  435 arch/mips/cavium-octeon/executive/cvmx-spi.c 	uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;
cvmx_sysinfo_get  512 arch/mips/cavium-octeon/executive/cvmx-spi.c 	uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;
cvmx_sysinfo_get  579 arch/mips/cavium-octeon/executive/cvmx-spi.c 	uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;
cvmx_sysinfo_get   52 arch/mips/cavium-octeon/executive/cvmx-sysinfo.c EXPORT_SYMBOL(cvmx_sysinfo_get);
cvmx_sysinfo_get  463 arch/mips/cavium-octeon/octeon-platform.c 	switch (cvmx_sysinfo_get()->board_type) {
cvmx_sysinfo_get  616 arch/mips/cavium-octeon/octeon-platform.c 	switch (cvmx_sysinfo_get()->board_type) {
cvmx_sysinfo_get  334 arch/mips/cavium-octeon/setup.c 	struct cvmx_sysinfo *sysinfo = cvmx_sysinfo_get();
cvmx_sysinfo_get  679 arch/mips/cavium-octeon/setup.c 	sysinfo = cvmx_sysinfo_get();
cvmx_sysinfo_get  144 arch/mips/cavium-octeon/smp.c 	struct cvmx_sysinfo *sysinfo = cvmx_sysinfo_get();
cvmx_sysinfo_get  123 arch/mips/include/asm/octeon/cvmx-sysinfo.h extern struct cvmx_sysinfo *cvmx_sysinfo_get(void);
cvmx_sysinfo_get  462 arch/mips/include/asm/octeon/cvmx.h 			cvmx_sysinfo_get()->cpu_clock_hz / 1000000;	\
cvmx_sysinfo_get  748 arch/mips/pci/pcie-octeon.c 	if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBH5200) {
cvmx_sysinfo_get 1065 arch/mips/pci/pcie-octeon.c 			if ((cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBH5200) &&