cvmx_build_mask   179 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c 	asx_tx.s.prt_en = cvmx_build_mask(num_ports);
cvmx_build_mask   183 arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c 	asx_rx.s.prt_en = cvmx_build_mask(num_ports);
cvmx_build_mask  2152 arch/mips/include/asm/octeon/cvmx-pow.h 	return ((sw_bits & cvmx_build_mask(CVMX_TAG_SW_BITS)) <<
cvmx_build_mask  2154 arch/mips/include/asm/octeon/cvmx-pow.h 		(hw_bits & cvmx_build_mask(32 - CVMX_TAG_SW_BITS));
cvmx_build_mask  2168 arch/mips/include/asm/octeon/cvmx-pow.h 		cvmx_build_mask(CVMX_TAG_SW_BITS);
cvmx_build_mask  2182 arch/mips/include/asm/octeon/cvmx-pow.h 	return tag & cvmx_build_mask(32 - CVMX_TAG_SW_BITS);
cvmx_build_mask   152 arch/mips/include/asm/octeon/cvmx.h 	return (value & cvmx_build_mask(high_bit - low_bit + 1)) << low_bit;
cvmx_build_mask   175 arch/mips/include/asm/octeon/cvmx.h 			return CAST64(ptr) & cvmx_build_mask(30);
cvmx_build_mask   177 arch/mips/include/asm/octeon/cvmx.h 			return CAST64(ptr) & cvmx_build_mask(40);