ctl_reg           238 arch/x86/kernel/cpu/mce/core.c 	.ctl	= ctl_reg,
ctl_reg           488 drivers/clk/bcm/clk-bcm2835.c 	u32 ctl_reg;
ctl_reg           509 drivers/clk/bcm/clk-bcm2835.c 	u32 ctl_reg;
ctl_reg           914 drivers/clk/bcm/clk-bcm2835.c 	return (cprman_read(cprman, data->ctl_reg) & CM_ENABLE) != 0;
ctl_reg          1008 drivers/clk/bcm/clk-bcm2835.c 	while (cprman_read(cprman, data->ctl_reg) & CM_BUSY) {
ctl_reg          1025 drivers/clk/bcm/clk-bcm2835.c 	cprman_write(cprman, data->ctl_reg,
ctl_reg          1026 drivers/clk/bcm/clk-bcm2835.c 		     cprman_read(cprman, data->ctl_reg) & ~CM_ENABLE);
ctl_reg          1040 drivers/clk/bcm/clk-bcm2835.c 	cprman_write(cprman, data->ctl_reg,
ctl_reg          1041 drivers/clk/bcm/clk-bcm2835.c 		     cprman_read(cprman, data->ctl_reg) |
ctl_reg          1079 drivers/clk/bcm/clk-bcm2835.c 	ctl = cprman_read(cprman, data->ctl_reg) & ~CM_FRAC;
ctl_reg          1081 drivers/clk/bcm/clk-bcm2835.c 	cprman_write(cprman, data->ctl_reg, ctl);
ctl_reg          1229 drivers/clk/bcm/clk-bcm2835.c 	cprman_write(cprman, data->ctl_reg, src);
ctl_reg          1238 drivers/clk/bcm/clk-bcm2835.c 	u32 src = cprman_read(cprman, data->ctl_reg);
ctl_reg          1261 drivers/clk/bcm/clk-bcm2835.c 	bcm2835_debugfs_regset(cprman, data->ctl_reg,
ctl_reg          1433 drivers/clk/bcm/clk-bcm2835.c 		if (!(cprman_read(cprman, data->ctl_reg) & CM_ENABLE))
ctl_reg          1456 drivers/clk/bcm/clk-bcm2835.c 				 cprman->regs + data->ctl_reg,
ctl_reg          1873 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_OTPCTL,
ctl_reg          1885 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_TIMERCTL,
ctl_reg          1896 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_TSENSCTL,
ctl_reg          1903 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_TECCTL,
ctl_reg          1912 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_H264CTL,
ctl_reg          1920 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_ISPCTL,
ctl_reg          1933 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_SDCCTL,
ctl_reg          1941 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_V3DCTL,
ctl_reg          1955 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_VPUCTL,
ctl_reg          1967 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_AVEOCTL,
ctl_reg          1975 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_CAM0CTL,
ctl_reg          1983 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_CAM1CTL,
ctl_reg          1991 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_DFTCTL,
ctl_reg          1998 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_DPICTL,
ctl_reg          2008 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_EMMCCTL,
ctl_reg          2018 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_EMMC2CTL,
ctl_reg          2028 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_GP0CTL,
ctl_reg          2037 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_GP1CTL,
ctl_reg          2047 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_GP2CTL,
ctl_reg          2057 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_HSMCTL,
ctl_reg          2065 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_PCMCTL,
ctl_reg          2075 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_PWMCTL,
ctl_reg          2084 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_SLIMCTL,
ctl_reg          2093 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_SMICTL,
ctl_reg          2101 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_UARTCTL,
ctl_reg          2111 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_VECCTL,
ctl_reg          2126 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_DSI0ECTL,
ctl_reg          2134 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_DSI1ECTL,
ctl_reg          2142 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_DSI0PCTL,
ctl_reg          2150 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_DSI1PCTL,
ctl_reg          2168 drivers/clk/bcm/clk-bcm2835.c 		.ctl_reg = CM_PERIICTL),
ctl_reg           512 drivers/gpu/drm/i915/display/intel_hdmi.c 	i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder);
ctl_reg           515 drivers/gpu/drm/i915/display/intel_hdmi.c 	u32 val = I915_READ(ctl_reg);
ctl_reg           520 drivers/gpu/drm/i915/display/intel_hdmi.c 	I915_WRITE(ctl_reg, val);
ctl_reg           533 drivers/gpu/drm/i915/display/intel_hdmi.c 	I915_WRITE(ctl_reg, val);
ctl_reg           534 drivers/gpu/drm/i915/display/intel_hdmi.c 	POSTING_READ(ctl_reg);
ctl_reg            84 drivers/i2c/busses/i2c-brcmstb.c 	u32	ctl_reg;		/* control register */
ctl_reg           207 drivers/i2c/busses/i2c-brcmstb.c 		dev->bsc_regmap->ctl_reg |= BSC_CTL_REG_INT_EN_MASK;
ctl_reg           210 drivers/i2c/busses/i2c-brcmstb.c 		dev->bsc_regmap->ctl_reg &= ~BSC_CTL_REG_INT_EN_MASK;
ctl_reg           213 drivers/i2c/busses/i2c-brcmstb.c 	bsc_writel(dev, dev->bsc_regmap->ctl_reg, ctl_reg);
ctl_reg           219 drivers/i2c/busses/i2c-brcmstb.c 	u32 status_bsc_ctl = bsc_readl(dev, ctl_reg);
ctl_reg           340 drivers/i2c/busses/i2c-brcmstb.c 	u32 ctl_reg;
ctl_reg           357 drivers/i2c/busses/i2c-brcmstb.c 	ctl_reg = pi2creg->ctl_reg & ~BSC_CTL_REG_DTF_MASK;
ctl_reg           359 drivers/i2c/busses/i2c-brcmstb.c 		pi2creg->ctl_reg = ctl_reg | DTF_WR_MASK;
ctl_reg           361 drivers/i2c/busses/i2c-brcmstb.c 		pi2creg->ctl_reg = ctl_reg | DTF_RD_MASK;
ctl_reg           552 drivers/i2c/busses/i2c-brcmstb.c 			dev->bsc_regmap->ctl_reg &= ~(BSC_CTL_REG_SCL_SEL_MASK
ctl_reg           554 drivers/i2c/busses/i2c-brcmstb.c 			dev->bsc_regmap->ctl_reg |= (bsc_clk[i].scl_mask |
ctl_reg           556 drivers/i2c/busses/i2c-brcmstb.c 			bsc_writel(dev, dev->bsc_regmap->ctl_reg, ctl_reg);
ctl_reg           563 drivers/i2c/busses/i2c-brcmstb.c 		i = (bsc_readl(dev, ctl_reg) & BSC_CTL_REG_SCL_SEL_MASK) >>
ctl_reg            57 drivers/misc/phantom.c 	u32 ctl_reg;
ctl_reg           116 drivers/misc/phantom.c 			r.value |= dev->ctl_reg & PHN_CTL_AMP;
ctl_reg           117 drivers/misc/phantom.c 			dev->ctl_reg = r.value;
ctl_reg           306 drivers/misc/phantom.c 		dev->ctl_reg ^= PHN_CTL_AMP;
ctl_reg           307 drivers/misc/phantom.c 		iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
ctl_reg           297 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c 	u32 ctl_reg = PF_REG(mbox, CIM_PF_MAILBOX_CTRL_A);
ctl_reg           366 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c 	v = MBOWNER_G(t4_read_reg(adap, ctl_reg));
ctl_reg           368 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c 		v = MBOWNER_G(t4_read_reg(adap, ctl_reg));
ctl_reg           383 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c 	t4_write_reg(adap, ctl_reg, MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW));
ctl_reg           384 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c 	t4_read_reg(adap, ctl_reg);          /* flush write */
ctl_reg           401 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c 		v = t4_read_reg(adap, ctl_reg);
ctl_reg           404 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c 				t4_write_reg(adap, ctl_reg, 0);
ctl_reg           418 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c 			t4_write_reg(adap, ctl_reg, 0);
ctl_reg           175 drivers/net/ethernet/dnet.c 	u32 mode_reg, ctl_reg;
ctl_reg           182 drivers/net/ethernet/dnet.c 	ctl_reg = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG);
ctl_reg           187 drivers/net/ethernet/dnet.c 				ctl_reg &=
ctl_reg           190 drivers/net/ethernet/dnet.c 				ctl_reg |=
ctl_reg           235 drivers/net/ethernet/dnet.c 		dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, ctl_reg);
ctl_reg           238 drivers/pinctrl/qcom/pinctrl-apq8064.c 		.ctl_reg = 0x1000 + 0x10 * id,		\
ctl_reg           265 drivers/pinctrl/qcom/pinctrl-apq8064.c 		.ctl_reg = ctl,				\
ctl_reg           350 drivers/pinctrl/qcom/pinctrl-apq8084.c 		.ctl_reg = 0x1000 + 0x10 * id,		\
ctl_reg           377 drivers/pinctrl/qcom/pinctrl-apq8084.c 		.ctl_reg = ctl,                         \
ctl_reg           249 drivers/pinctrl/qcom/pinctrl-ipq4019.c 		.ctl_reg = 0x0 + 0x1000 * id,		\
ctl_reg           190 drivers/pinctrl/qcom/pinctrl-ipq8064.c 		.ctl_reg = 0x1000 + 0x10 * id,		\
ctl_reg           217 drivers/pinctrl/qcom/pinctrl-ipq8064.c 		.ctl_reg = ctl,                         \
ctl_reg            39 drivers/pinctrl/qcom/pinctrl-ipq8074.c 		.ctl_reg = REG_SIZE * id,		\
ctl_reg           225 drivers/pinctrl/qcom/pinctrl-mdm9615.c 		.ctl_reg = 0x1000 + 0x10 * id,		\
ctl_reg           541 drivers/pinctrl/qcom/pinctrl-msm.c 	u32 ctl_reg, io_reg;
ctl_reg           560 drivers/pinctrl/qcom/pinctrl-msm.c 	ctl_reg = msm_readl_ctl(pctrl, g);
ctl_reg           563 drivers/pinctrl/qcom/pinctrl-msm.c 	is_out = !!(ctl_reg & BIT(g->oe_bit));
ctl_reg           564 drivers/pinctrl/qcom/pinctrl-msm.c 	func = (ctl_reg >> g->mux_bit) & 7;
ctl_reg           565 drivers/pinctrl/qcom/pinctrl-msm.c 	drive = (ctl_reg >> g->drv_bit) & 7;
ctl_reg           566 drivers/pinctrl/qcom/pinctrl-msm.c 	pull = (ctl_reg >> g->pull_bit) & 3;
ctl_reg            65 drivers/pinctrl/qcom/pinctrl-msm.h 	u32 ctl_reg;
ctl_reg           401 drivers/pinctrl/qcom/pinctrl-msm8660.c 		.ctl_reg = 0x1000 + 0x10 * id,		\
ctl_reg           428 drivers/pinctrl/qcom/pinctrl-msm8660.c 		.ctl_reg = ctl,				\
ctl_reg           314 drivers/pinctrl/qcom/pinctrl-msm8916.c 		.ctl_reg = 0x1000 * id,	        		\
ctl_reg           340 drivers/pinctrl/qcom/pinctrl-msm8916.c 		.ctl_reg = ctl,				\
ctl_reg           364 drivers/pinctrl/qcom/pinctrl-msm8960.c 		.ctl_reg = 0x1000 + 0x10 * id,		\
ctl_reg           391 drivers/pinctrl/qcom/pinctrl-msm8960.c 		.ctl_reg = ctl,				\
ctl_reg            40 drivers/pinctrl/qcom/pinctrl-msm8994.c 		.ctl_reg = 0x1000 + 0x10 * id,		\
ctl_reg            66 drivers/pinctrl/qcom/pinctrl-msm8994.c 		.ctl_reg = ctl,				\
ctl_reg            40 drivers/pinctrl/qcom/pinctrl-msm8996.c 		.ctl_reg = REG_BASE + REG_SIZE * id,	\
ctl_reg            66 drivers/pinctrl/qcom/pinctrl-msm8996.c 		.ctl_reg = ctl,				\
ctl_reg            42 drivers/pinctrl/qcom/pinctrl-msm8998.c 		.ctl_reg = base + 0x1000 * id,	\
ctl_reg            68 drivers/pinctrl/qcom/pinctrl-msm8998.c 		.ctl_reg = ctl,				\
ctl_reg            93 drivers/pinctrl/qcom/pinctrl-msm8998.c 		.ctl_reg = offset,			\
ctl_reg           351 drivers/pinctrl/qcom/pinctrl-msm8x74.c 		.ctl_reg = 0x1000 + 0x10 * id,		\
ctl_reg           377 drivers/pinctrl/qcom/pinctrl-msm8x74.c 		.ctl_reg = ctl,				\
ctl_reg           408 drivers/pinctrl/qcom/pinctrl-msm8x74.c 		.ctl_reg = ctl,				\
ctl_reg            50 drivers/pinctrl/qcom/pinctrl-qcs404.c 		.ctl_reg = 0x1000 * id,		\
ctl_reg            77 drivers/pinctrl/qcom/pinctrl-qcs404.c 		.ctl_reg = ctl,				\
ctl_reg           105 drivers/pinctrl/qcom/pinctrl-qdf2xxx.c 		groups[gpio].ctl_reg = 0x10000 * gpio;
ctl_reg            48 drivers/pinctrl/qcom/pinctrl-sc7180.c 		.ctl_reg = 0x1000 * id,		\
ctl_reg            75 drivers/pinctrl/qcom/pinctrl-sc7180.c 		.ctl_reg = ctl,				\
ctl_reg           101 drivers/pinctrl/qcom/pinctrl-sc7180.c 		.ctl_reg = offset,			\
ctl_reg            54 drivers/pinctrl/qcom/pinctrl-sdm660.c 		.ctl_reg = REG_SIZE * id,		\
ctl_reg            81 drivers/pinctrl/qcom/pinctrl-sdm660.c 		.ctl_reg = ctl,				\
ctl_reg            44 drivers/pinctrl/qcom/pinctrl-sdm845.c 		.ctl_reg = base + REG_SIZE * id,		\
ctl_reg            70 drivers/pinctrl/qcom/pinctrl-sdm845.c 		.ctl_reg = ctl,				\
ctl_reg            95 drivers/pinctrl/qcom/pinctrl-sdm845.c 		.ctl_reg = offset,			\
ctl_reg            50 drivers/pinctrl/qcom/pinctrl-sm8150.c 		.ctl_reg = 0x1000 * id,		\
ctl_reg            77 drivers/pinctrl/qcom/pinctrl-sm8150.c 		.ctl_reg = ctl,				\
ctl_reg           103 drivers/pinctrl/qcom/pinctrl-sm8150.c 		.ctl_reg = offset,			\
ctl_reg          1162 drivers/scsi/csiostor/csio_mb.c 	uint32_t ctl_reg = PF_REG(hw->pfn, CIM_PF_MAILBOX_CTRL_A);
ctl_reg          1174 drivers/scsi/csiostor/csio_mb.c 		      MBOWNER_V(CSIO_MBOWNER_FW), ctl_reg);
ctl_reg          1176 drivers/scsi/csiostor/csio_mb.c 	csio_rd_reg32(hw, ctl_reg);
ctl_reg          1196 drivers/scsi/csiostor/csio_mb.c 	uint32_t ctl_reg = PF_REG(hw->pfn, CIM_PF_MAILBOX_CTRL_A);
ctl_reg          1233 drivers/scsi/csiostor/csio_mb.c 	owner = MBOWNER_G(csio_rd_reg32(hw, ctl_reg));
ctl_reg          1238 drivers/scsi/csiostor/csio_mb.c 			owner = MBOWNER_G(csio_rd_reg32(hw, ctl_reg));
ctl_reg          1281 drivers/scsi/csiostor/csio_mb.c 			      MBOWNER_V(CSIO_MBOWNER_FW), ctl_reg);
ctl_reg          1284 drivers/scsi/csiostor/csio_mb.c 			      ctl_reg);
ctl_reg          1287 drivers/scsi/csiostor/csio_mb.c 	csio_rd_reg32(hw, ctl_reg);
ctl_reg          1302 drivers/scsi/csiostor/csio_mb.c 		ctl = csio_rd_reg32(hw, ctl_reg);
ctl_reg          1306 drivers/scsi/csiostor/csio_mb.c 				csio_wr_reg32(hw, 0, ctl_reg);
ctl_reg          1325 drivers/scsi/csiostor/csio_mb.c 			csio_wr_reg32(hw, 0, ctl_reg);
ctl_reg          1479 drivers/scsi/csiostor/csio_mb.c 	uint32_t	ctl_reg = PF_REG(hw->pfn, CIM_PF_MAILBOX_CTRL_A);
ctl_reg          1502 drivers/scsi/csiostor/csio_mb.c 	ctl = csio_rd_reg32(hw, ctl_reg);
ctl_reg          1512 drivers/scsi/csiostor/csio_mb.c 			csio_wr_reg32(hw, 0, ctl_reg);
ctl_reg          1514 drivers/scsi/csiostor/csio_mb.c 			csio_rd_reg32(hw, ctl_reg);
ctl_reg          1540 drivers/scsi/csiostor/csio_mb.c 		csio_wr_reg32(hw, 0, ctl_reg);
ctl_reg          1542 drivers/scsi/csiostor/csio_mb.c 		csio_rd_reg32(hw, ctl_reg);
ctl_reg          4707 drivers/scsi/lpfc/lpfc_debugfs.c 	void __iomem *ctl_reg;
ctl_reg          4743 drivers/scsi/lpfc/lpfc_debugfs.c 			ctl_reg = phba->sli4_hba.conf_regs_memmap_p +
ctl_reg          4747 drivers/scsi/lpfc/lpfc_debugfs.c 			ctl_reg = phba->sli4_hba.conf_regs_memmap_p +
ctl_reg          4751 drivers/scsi/lpfc/lpfc_debugfs.c 			ctl_reg = phba->sli4_hba.conf_regs_memmap_p +
ctl_reg          4755 drivers/scsi/lpfc/lpfc_debugfs.c 			ctl_reg = phba->sli4_hba.conf_regs_memmap_p +
ctl_reg          4759 drivers/scsi/lpfc/lpfc_debugfs.c 			ctl_reg = phba->sli4_hba.conf_regs_memmap_p +
ctl_reg          4763 drivers/scsi/lpfc/lpfc_debugfs.c 			ctl_reg = phba->sli4_hba.conf_regs_memmap_p +
ctl_reg          4773 drivers/scsi/lpfc/lpfc_debugfs.c 			reg_val = readl(ctl_reg);
ctl_reg          4777 drivers/scsi/lpfc/lpfc_debugfs.c 			reg_val = readl(ctl_reg);
ctl_reg          4780 drivers/scsi/lpfc/lpfc_debugfs.c 		writel(reg_val, ctl_reg);
ctl_reg          4781 drivers/scsi/lpfc/lpfc_debugfs.c 		readl(ctl_reg); /* flush */
ctl_reg            76 sound/pci/echoaudio/echoaudio_3g.c 	__le32 ctl_reg, frq_reg;
ctl_reg            84 sound/pci/echoaudio/echoaudio_3g.c 	ctl_reg = cpu_to_le32(ctl);
ctl_reg            87 sound/pci/echoaudio/echoaudio_3g.c 	if (ctl_reg != chip->comm_page->control_register ||
ctl_reg            90 sound/pci/echoaudio/echoaudio_3g.c 		chip->comm_page->control_register = ctl_reg;
ctl_reg           159 sound/soc/ti/davinci-mcasp.c static void mcasp_set_ctl_reg(struct davinci_mcasp *mcasp, u32 ctl_reg, u32 val)
ctl_reg           163 sound/soc/ti/davinci-mcasp.c 	mcasp_set_bits(mcasp, ctl_reg, val);
ctl_reg           168 sound/soc/ti/davinci-mcasp.c 		if ((mcasp_get_reg(mcasp, ctl_reg) & val) == val)
ctl_reg           172 sound/soc/ti/davinci-mcasp.c 	if (i == 1000 && ((mcasp_get_reg(mcasp, ctl_reg) & val) != val))