csr_set            22 arch/riscv/include/asm/irqflags.h 	csr_set(CSR_SSTATUS, SR_SIE);
csr_set            52 arch/riscv/include/asm/irqflags.h 	csr_set(CSR_SSTATUS, flags & SR_SIE);
csr_set            22 drivers/clocksource/timer-riscv.c 	csr_set(sie, SIE_STIE);
csr_set            64 drivers/clocksource/timer-riscv.c 	csr_set(sie, SIE_STIE);
csr_set           194 drivers/irqchip/irq-sifive-plic.c 	csr_set(sie, SIE_SEIE);