csr 342 arch/alpha/include/asm/core_apecs.h unsigned long csr; /* D-stream fault info. */ csr 30 arch/alpha/include/asm/core_marvel.h volatile unsigned long csr __attribute__((aligned(16))); csr 65 arch/alpha/include/asm/core_marvel.h #define EV7_CSR_OFFSET(name) ((unsigned long)&((ev7_csrs *)NULL)->name.csr) csr 71 arch/alpha/include/asm/core_marvel.h volatile unsigned long csr __attribute__((aligned(64))); csr 32 arch/alpha/include/asm/core_titan.h volatile unsigned long csr __attribute__((aligned(64))); csr 31 arch/alpha/include/asm/core_tsunami.h volatile unsigned long csr __attribute__((aligned(64))); csr 37 arch/alpha/include/asm/core_wildfire.h volatile unsigned long csr __attribute__((aligned(64))); csr 41 arch/alpha/include/asm/core_wildfire.h volatile unsigned long csr __attribute__((aligned(256))); csr 45 arch/alpha/include/asm/core_wildfire.h volatile unsigned long csr __attribute__((aligned(2048))); csr 62 arch/alpha/kernel/core_marvel.c q = ev7csr->csr; csr 74 arch/alpha/kernel/core_marvel.c ev7csr->csr = q; csr 185 arch/alpha/kernel/core_marvel.c csrs->POx_ERR_SUM.csr = -1UL; csr 186 arch/alpha/kernel/core_marvel.c csrs->POx_TLB_ERR.csr = -1UL; csr 187 arch/alpha/kernel/core_marvel.c csrs->POx_SPL_COMPLT.csr = -1UL; csr 188 arch/alpha/kernel/core_marvel.c csrs->POx_TRANS_SUM.csr = -1UL; csr 196 arch/alpha/kernel/core_marvel.c p7csrs->PO7_ERROR_SUM.csr = -1UL; csr 197 arch/alpha/kernel/core_marvel.c p7csrs->PO7_UNCRR_SYM.csr = -1UL; csr 198 arch/alpha/kernel/core_marvel.c p7csrs->PO7_CRRCT_SYM.csr = -1UL; csr 269 arch/alpha/kernel/core_marvel.c io7_port->saved_wbase[i] = csrs->POx_WBASE[i].csr; csr 270 arch/alpha/kernel/core_marvel.c io7_port->saved_wmask[i] = csrs->POx_WMASK[i].csr; csr 271 arch/alpha/kernel/core_marvel.c io7_port->saved_tbase[i] = csrs->POx_TBASE[i].csr; csr 294 arch/alpha/kernel/core_marvel.c csrs->POx_WBASE[0].csr = csr 296 arch/alpha/kernel/core_marvel.c csrs->POx_WMASK[0].csr = (hose->sg_isa->size - 1) & wbase_m_addr; csr 297 arch/alpha/kernel/core_marvel.c csrs->POx_TBASE[0].csr = virt_to_phys(hose->sg_isa->ptes); csr 302 arch/alpha/kernel/core_marvel.c csrs->POx_WBASE[1].csr = __direct_map_base | wbase_m_ena; csr 303 arch/alpha/kernel/core_marvel.c csrs->POx_WMASK[1].csr = (__direct_map_size - 1) & wbase_m_addr; csr 304 arch/alpha/kernel/core_marvel.c csrs->POx_TBASE[1].csr = 0; csr 312 arch/alpha/kernel/core_marvel.c csrs->POx_WBASE[2].csr = csr 314 arch/alpha/kernel/core_marvel.c csrs->POx_WMASK[2].csr = (hose->sg_pci->size - 1) & wbase_m_addr; csr 315 arch/alpha/kernel/core_marvel.c csrs->POx_TBASE[2].csr = virt_to_phys(hose->sg_pci->ptes); csr 320 arch/alpha/kernel/core_marvel.c csrs->POx_WBASE[3].csr = 0; csr 325 arch/alpha/kernel/core_marvel.c csrs->POx_CTRL.csr &= ~(1UL << 61); csr 329 arch/alpha/kernel/core_marvel.c csrs->POx_MSK_HEI.csr &= ~(3UL << 14); csr 354 arch/alpha/kernel/core_marvel.c if (csrs->POx_CACHE_CTL.csr == 8) { csr 615 arch/alpha/kernel/core_marvel.c csrs->POx_SG_TBIA.csr = 0; csr 617 arch/alpha/kernel/core_marvel.c csrs->POx_SG_TBIA.csr; csr 971 arch/alpha/kernel/core_marvel.c agp_pll = io7->csrs->POx_RST[IO7_AGP_PORT].csr; csr 1017 arch/alpha/kernel/core_marvel.c csrs->AGP_CMD.csr = agp->mode.lw; csr 1138 arch/alpha/kernel/core_marvel.c agp->capability.lw = csrs->AGP_STAT.csr; csr 1144 arch/alpha/kernel/core_marvel.c agp->mode.lw = csrs->AGP_CMD.csr; csr 208 arch/alpha/kernel/core_titan.c volatile unsigned long *csr; csr 221 arch/alpha/kernel/core_titan.c csr = &port->port_specific.g.gtlbia.csr; csr 223 arch/alpha/kernel/core_titan.c csr = &port->port_specific.g.gtlbiv.csr; csr 230 arch/alpha/kernel/core_titan.c *csr = value; csr 232 arch/alpha/kernel/core_titan.c *csr; csr 241 arch/alpha/kernel/core_titan.c pctl.pctl_q_whole = port->pctl.csr; csr 294 arch/alpha/kernel/core_titan.c saved_config[index].wsba[0] = port->wsba[0].csr; csr 295 arch/alpha/kernel/core_titan.c saved_config[index].wsm[0] = port->wsm[0].csr; csr 296 arch/alpha/kernel/core_titan.c saved_config[index].tba[0] = port->tba[0].csr; csr 298 arch/alpha/kernel/core_titan.c saved_config[index].wsba[1] = port->wsba[1].csr; csr 299 arch/alpha/kernel/core_titan.c saved_config[index].wsm[1] = port->wsm[1].csr; csr 300 arch/alpha/kernel/core_titan.c saved_config[index].tba[1] = port->tba[1].csr; csr 302 arch/alpha/kernel/core_titan.c saved_config[index].wsba[2] = port->wsba[2].csr; csr 303 arch/alpha/kernel/core_titan.c saved_config[index].wsm[2] = port->wsm[2].csr; csr 304 arch/alpha/kernel/core_titan.c saved_config[index].tba[2] = port->tba[2].csr; csr 306 arch/alpha/kernel/core_titan.c saved_config[index].wsba[3] = port->wsba[3].csr; csr 307 arch/alpha/kernel/core_titan.c saved_config[index].wsm[3] = port->wsm[3].csr; csr 308 arch/alpha/kernel/core_titan.c saved_config[index].tba[3] = port->tba[3].csr; csr 327 arch/alpha/kernel/core_titan.c port->wsba[0].csr = hose->sg_isa->dma_base | 3; csr 328 arch/alpha/kernel/core_titan.c port->wsm[0].csr = (hose->sg_isa->size - 1) & 0xfff00000; csr 329 arch/alpha/kernel/core_titan.c port->tba[0].csr = virt_to_phys(hose->sg_isa->ptes); csr 331 arch/alpha/kernel/core_titan.c port->wsba[1].csr = __direct_map_base | 1; csr 332 arch/alpha/kernel/core_titan.c port->wsm[1].csr = (__direct_map_size - 1) & 0xfff00000; csr 333 arch/alpha/kernel/core_titan.c port->tba[1].csr = 0; csr 335 arch/alpha/kernel/core_titan.c port->wsba[2].csr = hose->sg_pci->dma_base | 3; csr 336 arch/alpha/kernel/core_titan.c port->wsm[2].csr = (hose->sg_pci->size - 1) & 0xfff00000; csr 337 arch/alpha/kernel/core_titan.c port->tba[2].csr = virt_to_phys(hose->sg_pci->ptes); csr 339 arch/alpha/kernel/core_titan.c port->wsba[3].csr = 0; csr 342 arch/alpha/kernel/core_titan.c port->pctl.csr |= pctl_m_mwin; csr 348 arch/alpha/kernel/core_titan.c port->port_specific.a.agplastwr.csr = __direct_map_base; csr 356 arch/alpha/kernel/core_titan.c titan_pchip1_present = TITAN_cchip->csc.csr & 1L<<14; csr 373 arch/alpha/kernel/core_titan.c printk("%s: CSR_CSC 0x%lx\n", __func__, TITAN_cchip->csc.csr); csr 374 arch/alpha/kernel/core_titan.c printk("%s: CSR_MTR 0x%lx\n", __func__, TITAN_cchip->mtr.csr); csr 375 arch/alpha/kernel/core_titan.c printk("%s: CSR_MISC 0x%lx\n", __func__, TITAN_cchip->misc.csr); csr 376 arch/alpha/kernel/core_titan.c printk("%s: CSR_DIM0 0x%lx\n", __func__, TITAN_cchip->dim0.csr); csr 377 arch/alpha/kernel/core_titan.c printk("%s: CSR_DIM1 0x%lx\n", __func__, TITAN_cchip->dim1.csr); csr 378 arch/alpha/kernel/core_titan.c printk("%s: CSR_DIR0 0x%lx\n", __func__, TITAN_cchip->dir0.csr); csr 379 arch/alpha/kernel/core_titan.c printk("%s: CSR_DIR1 0x%lx\n", __func__, TITAN_cchip->dir1.csr); csr 380 arch/alpha/kernel/core_titan.c printk("%s: CSR_DRIR 0x%lx\n", __func__, TITAN_cchip->drir.csr); csr 383 arch/alpha/kernel/core_titan.c printk("%s: CSR_DSC 0x%lx\n", __func__, TITAN_dchip->dsc.csr); csr 384 arch/alpha/kernel/core_titan.c printk("%s: CSR_STR 0x%lx\n", __func__, TITAN_dchip->str.csr); csr 385 arch/alpha/kernel/core_titan.c printk("%s: CSR_DREV 0x%lx\n", __func__, TITAN_dchip->drev.csr); csr 408 arch/alpha/kernel/core_titan.c port->wsba[0].csr = saved_config[index].wsba[0]; csr 409 arch/alpha/kernel/core_titan.c port->wsm[0].csr = saved_config[index].wsm[0]; csr 410 arch/alpha/kernel/core_titan.c port->tba[0].csr = saved_config[index].tba[0]; csr 412 arch/alpha/kernel/core_titan.c port->wsba[1].csr = saved_config[index].wsba[1]; csr 413 arch/alpha/kernel/core_titan.c port->wsm[1].csr = saved_config[index].wsm[1]; csr 414 arch/alpha/kernel/core_titan.c port->tba[1].csr = saved_config[index].tba[1]; csr 416 arch/alpha/kernel/core_titan.c port->wsba[2].csr = saved_config[index].wsba[2]; csr 417 arch/alpha/kernel/core_titan.c port->wsm[2].csr = saved_config[index].wsm[2]; csr 418 arch/alpha/kernel/core_titan.c port->tba[2].csr = saved_config[index].tba[2]; csr 420 arch/alpha/kernel/core_titan.c port->wsba[3].csr = saved_config[index].wsba[3]; csr 421 arch/alpha/kernel/core_titan.c port->wsm[3].csr = saved_config[index].wsm[3]; csr 422 arch/alpha/kernel/core_titan.c port->tba[3].csr = saved_config[index].tba[3]; csr 646 arch/alpha/kernel/core_titan.c pctl.pctl_q_whole = port->pctl.csr; csr 675 arch/alpha/kernel/core_titan.c port->pctl.csr = pctl.pctl_q_whole; csr 795 arch/alpha/kernel/core_titan.c pctl.pctl_q_whole = port->pctl.csr; csr 181 arch/alpha/kernel/core_tsunami.c volatile unsigned long *csr; csr 186 arch/alpha/kernel/core_tsunami.c csr = &pchip->tlbia.csr; csr 188 arch/alpha/kernel/core_tsunami.c csr = &pchip->tlbiv.csr; csr 194 arch/alpha/kernel/core_tsunami.c *csr = value; csr 196 arch/alpha/kernel/core_tsunami.c *csr; csr 227 arch/alpha/kernel/core_tsunami.c TSUNAMI_cchip->misc.csr |= (1L << 28); /* clear NXM... */ csr 231 arch/alpha/kernel/core_tsunami.c if (TSUNAMI_cchip->misc.csr & (1L << 28)) { csr 232 arch/alpha/kernel/core_tsunami.c int source = (TSUNAMI_cchip->misc.csr >> 29) & 7; csr 233 arch/alpha/kernel/core_tsunami.c TSUNAMI_cchip->misc.csr |= (1L << 28); /* ...and unlock NXS. */ csr 251 arch/alpha/kernel/core_tsunami.c if (tsunami_probe_read(&pchip->pctl.csr) == 0) csr 294 arch/alpha/kernel/core_tsunami.c saved_config[index].wsba[0] = pchip->wsba[0].csr; csr 295 arch/alpha/kernel/core_tsunami.c saved_config[index].wsm[0] = pchip->wsm[0].csr; csr 296 arch/alpha/kernel/core_tsunami.c saved_config[index].tba[0] = pchip->tba[0].csr; csr 298 arch/alpha/kernel/core_tsunami.c saved_config[index].wsba[1] = pchip->wsba[1].csr; csr 299 arch/alpha/kernel/core_tsunami.c saved_config[index].wsm[1] = pchip->wsm[1].csr; csr 300 arch/alpha/kernel/core_tsunami.c saved_config[index].tba[1] = pchip->tba[1].csr; csr 302 arch/alpha/kernel/core_tsunami.c saved_config[index].wsba[2] = pchip->wsba[2].csr; csr 303 arch/alpha/kernel/core_tsunami.c saved_config[index].wsm[2] = pchip->wsm[2].csr; csr 304 arch/alpha/kernel/core_tsunami.c saved_config[index].tba[2] = pchip->tba[2].csr; csr 306 arch/alpha/kernel/core_tsunami.c saved_config[index].wsba[3] = pchip->wsba[3].csr; csr 307 arch/alpha/kernel/core_tsunami.c saved_config[index].wsm[3] = pchip->wsm[3].csr; csr 308 arch/alpha/kernel/core_tsunami.c saved_config[index].tba[3] = pchip->tba[3].csr; csr 335 arch/alpha/kernel/core_tsunami.c pchip->wsba[0].csr = hose->sg_isa->dma_base | 3; csr 336 arch/alpha/kernel/core_tsunami.c pchip->wsm[0].csr = (hose->sg_isa->size - 1) & 0xfff00000; csr 337 arch/alpha/kernel/core_tsunami.c pchip->tba[0].csr = virt_to_phys(hose->sg_isa->ptes); csr 339 arch/alpha/kernel/core_tsunami.c pchip->wsba[1].csr = hose->sg_pci->dma_base | 3; csr 340 arch/alpha/kernel/core_tsunami.c pchip->wsm[1].csr = (hose->sg_pci->size - 1) & 0xfff00000; csr 341 arch/alpha/kernel/core_tsunami.c pchip->tba[1].csr = virt_to_phys(hose->sg_pci->ptes); csr 343 arch/alpha/kernel/core_tsunami.c pchip->wsba[2].csr = 0x80000000 | 1; csr 344 arch/alpha/kernel/core_tsunami.c pchip->wsm[2].csr = (0x80000000 - 1) & 0xfff00000; csr 345 arch/alpha/kernel/core_tsunami.c pchip->tba[2].csr = 0; csr 347 arch/alpha/kernel/core_tsunami.c pchip->wsba[3].csr = 0; csr 350 arch/alpha/kernel/core_tsunami.c pchip->pctl.csr |= pctl_m_mwin; csr 396 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_CSC 0x%lx\n", __func__, TSUNAMI_cchip->csc.csr); csr 397 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_MTR 0x%lx\n", __func__, TSUNAMI_cchip.mtr.csr); csr 398 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_MISC 0x%lx\n", __func__, TSUNAMI_cchip->misc.csr); csr 399 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_DIM0 0x%lx\n", __func__, TSUNAMI_cchip->dim0.csr); csr 400 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_DIM1 0x%lx\n", __func__, TSUNAMI_cchip->dim1.csr); csr 401 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_DIR0 0x%lx\n", __func__, TSUNAMI_cchip->dir0.csr); csr 402 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_DIR1 0x%lx\n", __func__, TSUNAMI_cchip->dir1.csr); csr 403 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_DRIR 0x%lx\n", __func__, TSUNAMI_cchip->drir.csr); csr 406 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_DSC 0x%lx\n", __func__, TSUNAMI_dchip->dsc.csr); csr 407 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_STR 0x%lx\n", __func__, TSUNAMI_dchip->str.csr); csr 408 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_DREV 0x%lx\n", __func__, TSUNAMI_dchip->drev.csr); csr 417 arch/alpha/kernel/core_tsunami.c if (TSUNAMI_cchip->csc.csr & 1L<<14) csr 427 arch/alpha/kernel/core_tsunami.c pchip->wsba[0].csr = saved_config[index].wsba[0]; csr 428 arch/alpha/kernel/core_tsunami.c pchip->wsm[0].csr = saved_config[index].wsm[0]; csr 429 arch/alpha/kernel/core_tsunami.c pchip->tba[0].csr = saved_config[index].tba[0]; csr 431 arch/alpha/kernel/core_tsunami.c pchip->wsba[1].csr = saved_config[index].wsba[1]; csr 432 arch/alpha/kernel/core_tsunami.c pchip->wsm[1].csr = saved_config[index].wsm[1]; csr 433 arch/alpha/kernel/core_tsunami.c pchip->tba[1].csr = saved_config[index].tba[1]; csr 435 arch/alpha/kernel/core_tsunami.c pchip->wsba[2].csr = saved_config[index].wsba[2]; csr 436 arch/alpha/kernel/core_tsunami.c pchip->wsm[2].csr = saved_config[index].wsm[2]; csr 437 arch/alpha/kernel/core_tsunami.c pchip->tba[2].csr = saved_config[index].tba[2]; csr 439 arch/alpha/kernel/core_tsunami.c pchip->wsba[3].csr = saved_config[index].wsba[3]; csr 440 arch/alpha/kernel/core_tsunami.c pchip->wsm[3].csr = saved_config[index].wsm[3]; csr 441 arch/alpha/kernel/core_tsunami.c pchip->tba[3].csr = saved_config[index].tba[3]; csr 448 arch/alpha/kernel/core_tsunami.c if (TSUNAMI_cchip->csc.csr & 1L<<14) csr 455 arch/alpha/kernel/core_tsunami.c pchip->perror.csr; csr 456 arch/alpha/kernel/core_tsunami.c pchip->perror.csr = 0x040; csr 458 arch/alpha/kernel/core_tsunami.c pchip->perror.csr; csr 467 arch/alpha/kernel/core_tsunami.c if (TSUNAMI_cchip->csc.csr & 1L<<14) csr 121 arch/alpha/kernel/core_wildfire.c pci->pci_window[0].wbase.csr = hose->sg_isa->dma_base | 3; csr 122 arch/alpha/kernel/core_wildfire.c pci->pci_window[0].wmask.csr = (hose->sg_isa->size - 1) & 0xfff00000; csr 123 arch/alpha/kernel/core_wildfire.c pci->pci_window[0].tbase.csr = virt_to_phys(hose->sg_isa->ptes); csr 125 arch/alpha/kernel/core_wildfire.c pci->pci_window[1].wbase.csr = 0x40000000 | 1; csr 126 arch/alpha/kernel/core_wildfire.c pci->pci_window[1].wmask.csr = (0x40000000 -1) & 0xfff00000; csr 127 arch/alpha/kernel/core_wildfire.c pci->pci_window[1].tbase.csr = 0; csr 129 arch/alpha/kernel/core_wildfire.c pci->pci_window[2].wbase.csr = 0x80000000 | 1; csr 130 arch/alpha/kernel/core_wildfire.c pci->pci_window[2].wmask.csr = (0x40000000 -1) & 0xfff00000; csr 131 arch/alpha/kernel/core_wildfire.c pci->pci_window[2].tbase.csr = 0x40000000; csr 133 arch/alpha/kernel/core_wildfire.c pci->pci_window[3].wbase.csr = hose->sg_pci->dma_base | 3; csr 134 arch/alpha/kernel/core_wildfire.c pci->pci_window[3].wmask.csr = (hose->sg_pci->size - 1) & 0xfff00000; csr 135 arch/alpha/kernel/core_wildfire.c pci->pci_window[3].tbase.csr = virt_to_phys(hose->sg_pci->ptes); csr 193 arch/alpha/kernel/core_wildfire.c temp = fast->qsd_whami.csr; csr 220 arch/alpha/kernel/core_wildfire.c temp = qsa->qsa_qbb_id.csr; csr 232 arch/alpha/kernel/core_wildfire.c temp |= gp->gpa_qbb_map[i].csr << (i * 8); csr 254 arch/alpha/kernel/core_wildfire.c temp = qsd->qsd_whami.csr; csr 263 arch/alpha/kernel/core_wildfire.c temp = qsa->qsa_qbb_pop[0].csr; csr 270 arch/alpha/kernel/core_wildfire.c temp = qsa->qsa_qbb_pop[1].csr; csr 277 arch/alpha/kernel/core_wildfire.c temp = qsa->qsa_qbb_id.csr; csr 290 arch/alpha/kernel/core_wildfire.c if ((iop->iop_hose[i].init.csr & 1) == 1 && csr 291 arch/alpha/kernel/core_wildfire.c ((ne->ne_what_am_i.csr & 0xf00000300UL) == 0x100000300UL) && csr 292 arch/alpha/kernel/core_wildfire.c ((fe->fe_what_am_i.csr & 0xf00000300UL) == 0x100000200UL)) csr 354 arch/alpha/kernel/core_wildfire.c pci->pci_flush_tlb.csr; /* reading does the trick */ csr 482 arch/alpha/kernel/core_wildfire.c pci->pci_io_addr_ext.csr); csr 483 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCI_CTRL: 0x%16lx\n", pci->pci_ctrl.csr); csr 484 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCI_ERR_SUM: 0x%16lx\n", pci->pci_err_sum.csr); csr 485 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCI_ERR_ADDR: 0x%16lx\n", pci->pci_err_addr.csr); csr 486 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCI_STALL_CNT: 0x%16lx\n", pci->pci_stall_cnt.csr); csr 487 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCI_PEND_INT: 0x%16lx\n", pci->pci_pend_int.csr); csr 488 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCI_SENT_INT: 0x%16lx\n", pci->pci_sent_int.csr); csr 494 arch/alpha/kernel/core_wildfire.c pci->pci_window[i].wbase.csr, csr 495 arch/alpha/kernel/core_wildfire.c pci->pci_window[i].wmask.csr, csr 496 arch/alpha/kernel/core_wildfire.c pci->pci_window[i].tbase.csr); csr 510 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCA_WHAT_AM_I: 0x%16lx\n", pca->pca_what_am_i.csr); csr 511 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCA_ERR_SUM: 0x%16lx\n", pca->pca_err_sum.csr); csr 512 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCA_PEND_INT: 0x%16lx\n", pca->pca_pend_int.csr); csr 513 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " PCA_SENT_INT: 0x%16lx\n", pca->pca_sent_int.csr); csr 515 arch/alpha/kernel/core_wildfire.c pca->pca_stdio_edge_level.csr); csr 521 arch/alpha/kernel/core_wildfire.c pca->pca_int[i].target.csr, csr 522 arch/alpha/kernel/core_wildfire.c pca->pca_int[i].enable.csr); csr 536 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " QSA_QBB_ID: 0x%16lx\n", qsa->qsa_qbb_id.csr); csr 537 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " QSA_PORT_ENA: 0x%16lx\n", qsa->qsa_port_ena.csr); csr 538 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " QSA_REF_INT: 0x%16lx\n", qsa->qsa_ref_int.csr); csr 542 arch/alpha/kernel/core_wildfire.c i, qsa->qsa_config[i].csr); csr 546 arch/alpha/kernel/core_wildfire.c i, qsa->qsa_qbb_pop[0].csr); csr 558 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " QSD_WHAMI: 0x%16lx\n", qsd->qsd_whami.csr); csr 559 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " QSD_REV: 0x%16lx\n", qsd->qsd_rev.csr); csr 561 arch/alpha/kernel/core_wildfire.c qsd->qsd_port_present.csr); csr 563 arch/alpha/kernel/core_wildfire.c qsd->qsd_port_active.csr); csr 565 arch/alpha/kernel/core_wildfire.c qsd->qsd_fault_ena.csr); csr 567 arch/alpha/kernel/core_wildfire.c qsd->qsd_cpu_int_ena.csr); csr 569 arch/alpha/kernel/core_wildfire.c qsd->qsd_mem_config.csr); csr 571 arch/alpha/kernel/core_wildfire.c qsd->qsd_err_sum.csr); csr 584 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " IOA_CONFIG: 0x%16lx\n", iop->ioa_config.csr); csr 585 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " IOD_CONFIG: 0x%16lx\n", iop->iod_config.csr); csr 587 arch/alpha/kernel/core_wildfire.c iop->iop_switch_credits.csr); csr 589 arch/alpha/kernel/core_wildfire.c iop->iop_hose_credits.csr); csr 593 arch/alpha/kernel/core_wildfire.c i, iop->iop_hose[i].init.csr); csr 596 arch/alpha/kernel/core_wildfire.c i, iop->iop_dev_int[i].target.csr); csr 610 arch/alpha/kernel/core_wildfire.c i, gp->gpa_qbb_map[i].csr); csr 613 arch/alpha/kernel/core_wildfire.c gp->gpa_mem_pop_map.csr); csr 614 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " GPA_SCRATCH: 0x%16lx\n", gp->gpa_scratch.csr); csr 615 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " GPA_DIAG: 0x%16lx\n", gp->gpa_diag.csr); csr 616 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " GPA_CONFIG_0: 0x%16lx\n", gp->gpa_config_0.csr); csr 617 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " GPA_INIT_ID: 0x%16lx\n", gp->gpa_init_id.csr); csr 618 arch/alpha/kernel/core_wildfire.c printk(KERN_ERR " GPA_CONFIG_2: 0x%16lx\n", gp->gpa_config_2.csr); csr 818 arch/alpha/kernel/err_marvel.c err_sum |= io7->csrs->PO7_ERROR_SUM.csr; csr 822 arch/alpha/kernel/err_marvel.c err_sum |= io7->ports[i].csrs->POx_ERR_SUM.csr; csr 843 arch/alpha/kernel/err_marvel.c io->io_asic_rev = io7->csrs->IO_ASIC_REV.csr; csr 844 arch/alpha/kernel/err_marvel.c io->io_sys_rev = io7->csrs->IO_SYS_REV.csr; csr 845 arch/alpha/kernel/err_marvel.c io->io7_uph = io7->csrs->IO7_UPH.csr; csr 846 arch/alpha/kernel/err_marvel.c io->hpi_ctl = io7->csrs->HPI_CTL.csr; csr 847 arch/alpha/kernel/err_marvel.c io->crd_ctl = io7->csrs->CRD_CTL.csr; csr 848 arch/alpha/kernel/err_marvel.c io->hei_ctl = io7->csrs->HEI_CTL.csr; csr 849 arch/alpha/kernel/err_marvel.c io->po7_error_sum = io7->csrs->PO7_ERROR_SUM.csr; csr 850 arch/alpha/kernel/err_marvel.c io->po7_uncrr_sym = io7->csrs->PO7_UNCRR_SYM.csr; csr 851 arch/alpha/kernel/err_marvel.c io->po7_crrct_sym = io7->csrs->PO7_CRRCT_SYM.csr; csr 852 arch/alpha/kernel/err_marvel.c io->po7_ugbge_sym = io7->csrs->PO7_UGBGE_SYM.csr; csr 853 arch/alpha/kernel/err_marvel.c io->po7_err_pkt0 = io7->csrs->PO7_ERR_PKT[0].csr; csr 854 arch/alpha/kernel/err_marvel.c io->po7_err_pkt1 = io7->csrs->PO7_ERR_PKT[1].csr; csr 862 arch/alpha/kernel/err_marvel.c io->ports[i].pox_err_sum = csrs->POx_ERR_SUM.csr; csr 863 arch/alpha/kernel/err_marvel.c io->ports[i].pox_tlb_err = csrs->POx_TLB_ERR.csr; csr 864 arch/alpha/kernel/err_marvel.c io->ports[i].pox_spl_cmplt = csrs->POx_SPL_COMPLT.csr; csr 865 arch/alpha/kernel/err_marvel.c io->ports[i].pox_trans_sum = csrs->POx_TRANS_SUM.csr; csr 866 arch/alpha/kernel/err_marvel.c io->ports[i].pox_first_err = csrs->POx_FIRST_ERR.csr; csr 867 arch/alpha/kernel/err_marvel.c io->ports[i].pox_mult_err = csrs->POx_MULT_ERR.csr; csr 868 arch/alpha/kernel/err_marvel.c io->ports[i].pox_dm_source = csrs->POx_DM_SOURCE.csr; csr 869 arch/alpha/kernel/err_marvel.c io->ports[i].pox_dm_dest = csrs->POx_DM_DEST.csr; csr 870 arch/alpha/kernel/err_marvel.c io->ports[i].pox_dm_size = csrs->POx_DM_SIZE.csr; csr 871 arch/alpha/kernel/err_marvel.c io->ports[i].pox_dm_ctrl = csrs->POx_DM_CTRL.csr; csr 881 arch/alpha/kernel/err_marvel.c csrs->POx_TLB_ERR.csr = io->ports[i].pox_tlb_err; csr 882 arch/alpha/kernel/err_marvel.c csrs->POx_ERR_SUM.csr = io->ports[i].pox_err_sum; csr 884 arch/alpha/kernel/err_marvel.c csrs->POx_ERR_SUM.csr; csr 890 arch/alpha/kernel/err_marvel.c io7->csrs->PO7_ERROR_SUM.csr = io->po7_error_sum; csr 892 arch/alpha/kernel/err_marvel.c io7->csrs->PO7_ERROR_SUM.csr; csr 69 arch/alpha/kernel/sys_dp264.c dim0 = &cchip->dim0.csr; csr 70 arch/alpha/kernel/sys_dp264.c dim1 = &cchip->dim1.csr; csr 71 arch/alpha/kernel/sys_dp264.c dim2 = &cchip->dim2.csr; csr 72 arch/alpha/kernel/sys_dp264.c dim3 = &cchip->dim3.csr; csr 89 arch/alpha/kernel/sys_dp264.c if (bcpu == 0) dimB = &cchip->dim0.csr; csr 90 arch/alpha/kernel/sys_dp264.c else if (bcpu == 1) dimB = &cchip->dim1.csr; csr 91 arch/alpha/kernel/sys_dp264.c else if (bcpu == 2) dimB = &cchip->dim2.csr; csr 92 arch/alpha/kernel/sys_dp264.c else dimB = &cchip->dim3.csr; csr 198 arch/alpha/kernel/sys_dp264.c pld = TSUNAMI_cchip->dir0.csr; csr 97 arch/alpha/kernel/sys_marvel.c ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */ csr 99 arch/alpha/kernel/sys_marvel.c ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr; csr 175 arch/alpha/kernel/sys_marvel.c volatile unsigned long *csr, csr 180 arch/alpha/kernel/sys_marvel.c val = *csr; csr 184 arch/alpha/kernel/sys_marvel.c *csr = val; csr 186 arch/alpha/kernel/sys_marvel.c *csr; csr 197 arch/alpha/kernel/sys_marvel.c val = io7->csrs->PO7_LSI_CTL[which].csr; csr 201 arch/alpha/kernel/sys_marvel.c io7->csrs->PO7_LSI_CTL[which].csr = val; csr 203 arch/alpha/kernel/sys_marvel.c io7->csrs->PO7_LSI_CTL[which].csr; csr 214 arch/alpha/kernel/sys_marvel.c val = io7->csrs->PO7_MSI_CTL[which].csr; csr 218 arch/alpha/kernel/sys_marvel.c io7->csrs->PO7_MSI_CTL[which].csr = val; csr 220 arch/alpha/kernel/sys_marvel.c io7->csrs->PO7_MSI_CTL[which].csr; csr 229 arch/alpha/kernel/sys_marvel.c io7->csrs->PO7_LSI_CTL[which].csr = ((unsigned long)where << 14); csr 231 arch/alpha/kernel/sys_marvel.c io7->csrs->PO7_LSI_CTL[which].csr; csr 240 arch/alpha/kernel/sys_marvel.c io7->csrs->PO7_MSI_CTL[which].csr = ((unsigned long)where << 14); csr 242 arch/alpha/kernel/sys_marvel.c io7->csrs->PO7_MSI_CTL[which].csr; csr 270 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, boot_cpuid); csr 271 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, boot_cpuid); csr 272 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, boot_cpuid); csr 273 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, boot_cpuid); csr 274 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, boot_cpuid); csr 419 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid); csr 420 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid); csr 421 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid); csr 422 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid); csr 423 arch/alpha/kernel/sys_marvel.c io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid); csr 84 arch/alpha/kernel/sys_titan.c dim0 = &cchip->dim0.csr; csr 85 arch/alpha/kernel/sys_titan.c dim1 = &cchip->dim1.csr; csr 86 arch/alpha/kernel/sys_titan.c dim2 = &cchip->dim2.csr; csr 87 arch/alpha/kernel/sys_titan.c dim3 = &cchip->dim3.csr; csr 104 arch/alpha/kernel/sys_titan.c dimB = &cchip->dim0.csr; csr 105 arch/alpha/kernel/sys_titan.c if (bcpu == 1) dimB = &cchip->dim1.csr; csr 106 arch/alpha/kernel/sys_titan.c else if (bcpu == 2) dimB = &cchip->dim2.csr; csr 107 arch/alpha/kernel/sys_titan.c else if (bcpu == 3) dimB = &cchip->dim3.csr; csr 1085 arch/arm/plat-omap/dma.c u32 csr; csr 1088 arch/arm/plat-omap/dma.c csr = dma_chan[ch].saved_csr; csr 1091 arch/arm/plat-omap/dma.c csr = p->dma_read(CSR, ch); csr 1092 arch/arm/plat-omap/dma.c if (enable_1510_mode && ch <= 2 && (csr >> 7) != 0) { csr 1093 arch/arm/plat-omap/dma.c dma_chan[ch + 6].saved_csr = csr >> 7; csr 1094 arch/arm/plat-omap/dma.c csr &= 0x7f; csr 1096 arch/arm/plat-omap/dma.c if ((csr & 0x3f) == 0) csr 1100 arch/arm/plat-omap/dma.c ch, csr); csr 1103 arch/arm/plat-omap/dma.c if (unlikely(csr & OMAP1_DMA_TOUT_IRQ)) csr 1105 arch/arm/plat-omap/dma.c if (unlikely(csr & OMAP_DMA_DROP_IRQ)) csr 1108 arch/arm/plat-omap/dma.c if (likely(csr & OMAP_DMA_BLOCK_IRQ)) csr 1111 arch/arm/plat-omap/dma.c dma_chan[ch].callback(ch, csr, dma_chan[ch].data); csr 123 arch/c6x/include/uapi/asm/ptrace.h REG_PAIR(pc, csr); csr 90 arch/c6x/kernel/setup.c unsigned cpu_id, rev_id, csr; csr 113 arch/c6x/kernel/setup.c csr = get_creg(CSR); csr 114 arch/c6x/kernel/setup.c cpu_id = csr >> 24; csr 115 arch/c6x/kernel/setup.c rev_id = (csr >> 16) & 0xff; csr 55 arch/c6x/kernel/signal.c COPY(csr); COPY(pc); csr 120 arch/c6x/kernel/signal.c COPY(csr); COPY(pc); csr 33 arch/c6x/kernel/traps.c pr_err("Status: %08lx ORIG_A4: %08lx\n", regs->csr, regs->orig_a4); csr 49 arch/m68k/sun3x/time.c h->csr |= C_WRITE; csr 57 arch/m68k/sun3x/time.c h->csr &= ~C_WRITE; csr 59 arch/m68k/sun3x/time.c h->csr |= C_READ; csr 67 arch/m68k/sun3x/time.c h->csr &= ~C_READ; csr 9 arch/m68k/sun3x/time.h volatile unsigned char csr; csr 53 arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c union cvmx_asxx_int_en csr; csr 65 arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c csr.u64 = cvmx_read_csr(CVMX_ASXX_INT_EN(block)); csr 66 arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c csr.s.txpsh = mask; csr 67 arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c csr.s.txpop = mask; csr 68 arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c csr.s.ovrflw = mask; csr 69 arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c cvmx_write_csr(CVMX_ASXX_INT_EN(block), csr.u64); csr 227 arch/mips/dec/ecc-berr.c volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); csr 233 arch/mips/dec/ecc-berr.c cached_kn02_csr = *csr | KN02_CSR_LEDS; csr 239 arch/mips/dec/ecc-berr.c *csr = cached_kn02_csr; csr 49 arch/mips/dec/kn01-berr.c volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); csr 54 arch/mips/dec/kn01-berr.c *csr = cached_kn01_csr | KN01_CSR_MEMERR; /* Clear bus IRQ. */ csr 150 arch/mips/dec/kn01-berr.c volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); csr 154 arch/mips/dec/kn01-berr.c if (!(*csr & KN01_CSR_MEMERR)) csr 177 arch/mips/dec/kn01-berr.c volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); csr 183 arch/mips/dec/kn01-berr.c cached_kn01_csr = *csr; csr 189 arch/mips/dec/kn01-berr.c *csr = cached_kn01_csr; csr 30 arch/mips/dec/kn02-irq.c volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + csr 34 arch/mips/dec/kn02-irq.c *csr = cached_kn02_csr; csr 39 arch/mips/dec/kn02-irq.c volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + csr 43 arch/mips/dec/kn02-irq.c *csr = cached_kn02_csr; csr 62 arch/mips/dec/kn02-irq.c volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + csr 68 arch/mips/dec/kn02-irq.c *csr = cached_kn02_csr; csr 201 arch/mips/include/asm/msa.h __BUILD_MSA_CTL_REG(csr, 1) csr 3791 arch/mips/include/asm/octeon/cvmx-npei-defs.h uint64_t csr:39; csr 3793 arch/mips/include/asm/octeon/cvmx-npei-defs.h uint64_t csr:39; csr 1295 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t csr:1; csr 1323 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t csr:1; csr 1330 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t csr:1; csr 1360 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t csr:1; csr 1368 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t csr:1; csr 1404 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t csr:1; csr 1412 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t csr:1; csr 1448 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t csr:1; csr 242 arch/mips/include/asm/sibyte/sb1250_defs.h #define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val) csr 243 arch/mips/include/asm/sibyte/sb1250_defs.h #define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr))) csr 45 arch/mips/include/asm/txx9/tx3927.h volatile unsigned long csr; csr 105 arch/mips/include/asm/txx9/tx4939.h struct tx4939_le_reg csr; csr 158 arch/mips/include/asm/txx9/tx4939.h struct tx4939_le_reg csr; csr 40 arch/mips/include/uapi/asm/ucontext.h unsigned int csr; csr 34 arch/mips/kernel/irq_txx9.c u32 csr; csr 186 arch/mips/kernel/irq_txx9.c u32 csr = __raw_readl(&txx9_ircptr->csr); csr 188 arch/mips/kernel/irq_txx9.c if (likely(!(csr & TXx9_IRCSR_IF))) csr 189 arch/mips/kernel/irq_txx9.c return TXX9_IRQ_BASE + (csr & (TXx9_MAX_IR - 1)); csr 201 arch/mips/kernel/mips-r2-to-r6-emul.c u32 csr; csr 204 arch/mips/kernel/mips-r2-to-r6-emul.c csr = current->thread.fpu.fcr31; csr 207 arch/mips/kernel/mips-r2-to-r6-emul.c if (((csr & cond) == 0) && MIPSInst_RD(ir)) csr 224 arch/mips/kernel/mips-r2-to-r6-emul.c u32 csr; csr 227 arch/mips/kernel/mips-r2-to-r6-emul.c csr = current->thread.fpu.fcr31; csr 230 arch/mips/kernel/mips-r2-to-r6-emul.c if (((csr & cond) != 0) && MIPSInst_RD(ir)) csr 36 arch/mips/kernel/signal-common.h _save_fp_context(void __user *fpregs, void __user *csr); csr 38 arch/mips/kernel/signal-common.h _restore_fp_context(void __user *fpregs, void __user *csr); csr 75 arch/mips/kernel/signal.c uint32_t __user *csr = sc + abi->off_sc_fpc_csr; csr 85 arch/mips/kernel/signal.c err |= __put_user(current->thread.fpu.fcr31, csr); csr 94 arch/mips/kernel/signal.c uint32_t __user *csr = sc + abi->off_sc_fpc_csr; csr 104 arch/mips/kernel/signal.c err |= __get_user(current->thread.fpu.fcr31, csr); csr 130 arch/mips/kernel/signal.c uint32_t __user *csr = sc + abi->off_sc_fpc_csr; csr 132 arch/mips/kernel/signal.c return _save_fp_context(fpregs, csr); csr 139 arch/mips/kernel/signal.c uint32_t __user *csr = sc + abi->off_sc_fpc_csr; csr 141 arch/mips/kernel/signal.c return _restore_fp_context(fpregs, csr); csr 188 arch/mips/kernel/signal.c err = __put_user(read_msa_csr(), &msa->csr); csr 195 arch/mips/kernel/signal.c err = __put_user(current->thread.fpu.msacsr, &msa->csr); csr 213 arch/mips/kernel/signal.c unsigned int csr; csr 219 arch/mips/kernel/signal.c err = get_user(csr, &msa->csr); csr 235 arch/mips/kernel/signal.c write_msa_csr(csr); csr 241 arch/mips/kernel/signal.c current->thread.fpu.msacsr = csr; csr 329 arch/mips/kernel/signal.c uint32_t __user *csr = sc + abi->off_sc_fpc_csr; csr 364 arch/mips/kernel/signal.c __put_user(0, csr); csr 382 arch/mips/kernel/signal.c uint32_t __user *csr = sc + abi->off_sc_fpc_csr; csr 401 arch/mips/kernel/signal.c err = sig = fpcsr_pending(csr); csr 427 arch/mips/kernel/signal.c __get_user(tmp, csr); csr 500 arch/mips/kernel/signal.c unsigned int csr, enabled; csr 502 arch/mips/kernel/signal.c err = __get_user(csr, fpcsr); csr 503 arch/mips/kernel/signal.c enabled = FPU_CSR_UNI_X | ((csr & FPU_CSR_ALL_E) << 5); csr 508 arch/mips/kernel/signal.c if (csr & enabled) { csr 509 arch/mips/kernel/signal.c csr &= ~enabled; csr 510 arch/mips/kernel/signal.c err |= __put_user(csr, fpcsr); csr 211 arch/mips/txx9/generic/irq_tx4939.c u32 csr = __raw_readl(&tx4939_ircptr->cs.r); csr 213 arch/mips/txx9/generic/irq_tx4939.c if (likely(!(csr & TXx9_IRCSR_IF))) csr 214 arch/mips/txx9/generic/irq_tx4939.c return TXX9_IRQ_BASE + (csr & (TX4939_NUM_IR - 1)); csr 43 arch/powerpc/boot/ugecon.c u32 csr, data, cr; csr 46 arch/powerpc/boot/ugecon.c csr = EXI_CSR_CLK_32MHZ | EXI_CSR_CS_0; csr 47 arch/powerpc/boot/ugecon.c out_be32(csr_reg, csr); csr 50 arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c u32 csr, data, cr; csr 53 arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c csr = EXI_CSR_CLK_32MHZ | EXI_CSR_CS_0; csr 54 arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c out_be32(csr_reg, csr); csr 94 arch/riscv/include/asm/csr.h #define csr_swap(csr, val) \ csr 97 arch/riscv/include/asm/csr.h __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\ csr 103 arch/riscv/include/asm/csr.h #define csr_read(csr) \ csr 106 arch/riscv/include/asm/csr.h __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ csr 112 arch/riscv/include/asm/csr.h #define csr_write(csr, val) \ csr 115 arch/riscv/include/asm/csr.h __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ csr 120 arch/riscv/include/asm/csr.h #define csr_read_set(csr, val) \ csr 123 arch/riscv/include/asm/csr.h __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\ csr 129 arch/riscv/include/asm/csr.h #define csr_set(csr, val) \ csr 132 arch/riscv/include/asm/csr.h __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \ csr 137 arch/riscv/include/asm/csr.h #define csr_read_clear(csr, val) \ csr 140 arch/riscv/include/asm/csr.h __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\ csr 146 arch/riscv/include/asm/csr.h #define csr_clear(csr, val) \ csr 149 arch/riscv/include/asm/csr.h __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \ csr 40 arch/sh/boards/mach-hp6xx/pm.c u8 stbcr, csr; csr 47 arch/sh/boards/mach-hp6xx/pm.c csr = sh_wdt_read_csr(); csr 48 arch/sh/boards/mach-hp6xx/pm.c csr &= ~WTCSR_TME; csr 49 arch/sh/boards/mach-hp6xx/pm.c csr |= WTCSR_CKS_4096; csr 50 arch/sh/boards/mach-hp6xx/pm.c sh_wdt_write_csr(csr); csr 51 arch/sh/boards/mach-hp6xx/pm.c csr = sh_wdt_read_csr(); csr 16 arch/sh/kernel/cpu/adc.c unsigned char csr; csr 22 arch/sh/kernel/cpu/adc.c csr = __raw_readb(ADCSR); csr 23 arch/sh/kernel/cpu/adc.c csr = channel | ADCSR_ADST | ADCSR_CKS; csr 24 arch/sh/kernel/cpu/adc.c __raw_writeb(csr, ADCSR); csr 27 arch/sh/kernel/cpu/adc.c csr = __raw_readb(ADCSR); csr 28 arch/sh/kernel/cpu/adc.c } while ((csr & ADCSR_ADF) == 0); csr 30 arch/sh/kernel/cpu/adc.c csr &= ~(ADCSR_ADF | ADCSR_ADST); csr 31 arch/sh/kernel/cpu/adc.c __raw_writeb(csr, ADCSR); csr 74 arch/sparc/kernel/ebus.c u32 csr = 0; csr 77 arch/sparc/kernel/ebus.c csr = readl(p->regs + EBDMA_CSR); csr 78 arch/sparc/kernel/ebus.c writel(csr, p->regs + EBDMA_CSR); csr 81 arch/sparc/kernel/ebus.c if (csr & EBDMA_CSR_ERR_PEND) { csr 85 arch/sparc/kernel/ebus.c } else if (csr & EBDMA_CSR_INT_PEND) { csr 87 arch/sparc/kernel/ebus.c (csr & EBDMA_CSR_TC) ? csr 99 arch/sparc/kernel/ebus.c u32 csr; csr 113 arch/sparc/kernel/ebus.c csr = EBDMA_CSR_BURST_SZ_16 | EBDMA_CSR_EN_CNT; csr 116 arch/sparc/kernel/ebus.c csr |= EBDMA_CSR_TCI_DIS; csr 118 arch/sparc/kernel/ebus.c writel(csr, p->regs + EBDMA_CSR); csr 127 arch/sparc/kernel/ebus.c u32 csr; csr 136 arch/sparc/kernel/ebus.c csr = readl(p->regs + EBDMA_CSR); csr 137 arch/sparc/kernel/ebus.c csr |= EBDMA_CSR_INT_EN; csr 138 arch/sparc/kernel/ebus.c writel(csr, p->regs + EBDMA_CSR); csr 142 arch/sparc/kernel/ebus.c csr = readl(p->regs + EBDMA_CSR); csr 143 arch/sparc/kernel/ebus.c csr &= ~EBDMA_CSR_INT_EN; csr 144 arch/sparc/kernel/ebus.c writel(csr, p->regs + EBDMA_CSR); csr 159 arch/sparc/kernel/ebus.c u32 csr; csr 163 arch/sparc/kernel/ebus.c csr = readl(p->regs + EBDMA_CSR); csr 164 arch/sparc/kernel/ebus.c if (csr & EBDMA_CSR_INT_EN) { csr 165 arch/sparc/kernel/ebus.c csr &= ~EBDMA_CSR_INT_EN; csr 166 arch/sparc/kernel/ebus.c writel(csr, p->regs + EBDMA_CSR); csr 179 arch/sparc/kernel/ebus.c u32 csr; csr 186 arch/sparc/kernel/ebus.c csr = readl(p->regs + EBDMA_CSR); csr 188 arch/sparc/kernel/ebus.c if (!(csr & EBDMA_CSR_EN_DMA)) csr 191 arch/sparc/kernel/ebus.c if (csr & EBDMA_CSR_NA_LOADED) csr 208 arch/sparc/kernel/ebus.c u32 csr; csr 213 arch/sparc/kernel/ebus.c csr = (EBDMA_CSR_INT_EN | csr 219 arch/sparc/kernel/ebus.c csr |= EBDMA_CSR_WRITE; csr 221 arch/sparc/kernel/ebus.c csr |= EBDMA_CSR_TCI_DIS; csr 223 arch/sparc/kernel/ebus.c writel(csr, p->regs + EBDMA_CSR); csr 244 arch/sparc/kernel/ebus.c u32 orig_csr, csr; csr 247 arch/sparc/kernel/ebus.c orig_csr = csr = readl(p->regs + EBDMA_CSR); csr 249 arch/sparc/kernel/ebus.c csr |= EBDMA_CSR_EN_DMA; csr 251 arch/sparc/kernel/ebus.c csr &= ~EBDMA_CSR_EN_DMA; csr 253 arch/sparc/kernel/ebus.c (csr & EBDMA_CSR_EN_DMA)) csr 254 arch/sparc/kernel/ebus.c writel(csr, p->regs + EBDMA_CSR); csr 584 arch/sparc/kernel/pci_schizo.c unsigned long csr_reg, csr, csr_error_bits; csr 589 arch/sparc/kernel/pci_schizo.c csr = upa_readq(csr_reg); csr 591 arch/sparc/kernel/pci_schizo.c csr & (SCHIZO_PCICTRL_BUS_UNUS | csr 599 arch/sparc/kernel/pci_schizo.c upa_writeq(csr, csr_reg); csr 256 arch/sparc/kernel/psycho_common.c u64 csr, csr_error_bits; csr 259 arch/sparc/kernel/psycho_common.c csr = upa_readq(pbm->pci_csr); csr 260 arch/sparc/kernel/psycho_common.c csr_error_bits = csr & (PSYCHO_PCICTRL_SBH_ERR | PSYCHO_PCICTRL_SERR); csr 263 arch/sparc/kernel/psycho_common.c upa_writeq(csr, pbm->pci_csr); csr 815 arch/x86/kernel/pci-calgary_64.c u32 csr, plssr; csr 818 arch/x86/kernel/pci-calgary_64.c csr = be32_to_cpu(readl(target)); csr 825 arch/x86/kernel/pci-calgary_64.c tbl->it_busno, csr, plssr); csr 831 arch/x86/kernel/pci-calgary_64.c u32 csr, csmr, plssr, mck, rcstat; csr 840 arch/x86/kernel/pci-calgary_64.c csr = be32_to_cpu(readl(target)); csr 854 arch/x86/kernel/pci-calgary_64.c csr, plssr, csmr, mck); csr 782 drivers/ata/ahci_xgene.c void __iomem *csr = devm_ioremap_resource(dev, res); csr 783 drivers/ata/ahci_xgene.c if (IS_ERR(csr)) csr 784 drivers/ata/ahci_xgene.c return PTR_ERR(csr); csr 786 drivers/ata/ahci_xgene.c ctx->csr_mux = csr; csr 31 drivers/clk/clk-xgene.c static inline u32 xgene_clk_read(void __iomem *csr) csr 33 drivers/clk/clk-xgene.c return readl_relaxed(csr); csr 36 drivers/clk/clk-xgene.c static inline void xgene_clk_write(u32 data, void __iomem *csr) csr 38 drivers/clk/clk-xgene.c writel_relaxed(data, csr); csr 51 drivers/clk/imx/clk-pllv4.c u32 csr; csr 54 drivers/clk/imx/clk-pllv4.c csr, csr & PLL_VLD, 0, LOCK_TIMEOUT_US); csr 156 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c void __iomem *csr = misc_bar->virt_addr; csr 161 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c val = ADF_CSR_RD(csr, ADF_C3XXX_AE_CTX_ENABLES(i)); csr 163 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c ADF_CSR_WR(csr, ADF_C3XXX_AE_CTX_ENABLES(i), val); csr 164 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c val = ADF_CSR_RD(csr, ADF_C3XXX_AE_MISC_CONTROL(i)); csr 166 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c ADF_CSR_WR(csr, ADF_C3XXX_AE_MISC_CONTROL(i), val); csr 171 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c val = ADF_CSR_RD(csr, ADF_C3XXX_UERRSSMSH(i)); csr 173 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c ADF_CSR_WR(csr, ADF_C3XXX_UERRSSMSH(i), val); csr 174 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c val = ADF_CSR_RD(csr, ADF_C3XXX_CERRSSMSH(i)); csr 176 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c ADF_CSR_WR(csr, ADF_C3XXX_CERRSSMSH(i), val); csr 166 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c void __iomem *csr = misc_bar->virt_addr; csr 171 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c val = ADF_CSR_RD(csr, ADF_C62X_AE_CTX_ENABLES(i)); csr 173 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c ADF_CSR_WR(csr, ADF_C62X_AE_CTX_ENABLES(i), val); csr 174 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c val = ADF_CSR_RD(csr, ADF_C62X_AE_MISC_CONTROL(i)); csr 176 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c ADF_CSR_WR(csr, ADF_C62X_AE_MISC_CONTROL(i), val); csr 181 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c val = ADF_CSR_RD(csr, ADF_C62X_UERRSSMSH(i)); csr 183 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c ADF_CSR_WR(csr, ADF_C62X_UERRSSMSH(i), val); csr 184 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c val = ADF_CSR_RD(csr, ADF_C62X_CERRSSMSH(i)); csr 186 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c ADF_CSR_WR(csr, ADF_C62X_CERRSSMSH(i), val); csr 238 drivers/crypto/qat/qat_common/adf_admin.c void __iomem *csr = pmisc->virt_addr; csr 239 drivers/crypto/qat/qat_common/adf_admin.c void __iomem *mailbox = (void __iomem *)((uintptr_t)csr + csr 269 drivers/crypto/qat/qat_common/adf_admin.c ADF_CSR_WR(csr, ADF_DH895XCC_ADMINMSGUR_OFFSET, reg_val >> 32); csr 270 drivers/crypto/qat/qat_common/adf_admin.c ADF_CSR_WR(csr, ADF_DH895XCC_ADMINMSGLR_OFFSET, reg_val); csr 82 drivers/crypto/qat/qat_common/adf_hw_arbiter.c void __iomem *csr = accel_dev->transport->banks[0].csr_addr; csr 90 drivers/crypto/qat/qat_common/adf_hw_arbiter.c WRITE_CSR_ARB_SARCONFIG(csr, arb, arb_cfg); csr 94 drivers/crypto/qat/qat_common/adf_hw_arbiter.c WRITE_CSR_ARB_WQCFG(csr, i, i); csr 103 drivers/crypto/qat/qat_common/adf_hw_arbiter.c WRITE_CSR_ARB_WRK_2_SER_MAP(csr, i, *(thd_2_arb_cfg + i)); csr 119 drivers/crypto/qat/qat_common/adf_hw_arbiter.c void __iomem *csr; csr 125 drivers/crypto/qat/qat_common/adf_hw_arbiter.c csr = accel_dev->transport->banks[0].csr_addr; csr 129 drivers/crypto/qat/qat_common/adf_hw_arbiter.c WRITE_CSR_ARB_SARCONFIG(csr, i, 0); csr 133 drivers/crypto/qat/qat_common/adf_hw_arbiter.c WRITE_CSR_ARB_WQCFG(csr, i, 0); csr 137 drivers/crypto/qat/qat_common/adf_hw_arbiter.c WRITE_CSR_ARB_WRK_2_SER_MAP(csr, i, 0); csr 141 drivers/crypto/qat/qat_common/adf_hw_arbiter.c WRITE_CSR_ARB_RINGSRVARBEN(csr, i, 0); csr 89 drivers/crypto/qat/qat_common/adf_transport_debug.c void __iomem *csr = ring->bank->csr_addr; csr 94 drivers/crypto/qat/qat_common/adf_transport_debug.c head = READ_CSR_RING_HEAD(csr, bank->bank_number, csr 96 drivers/crypto/qat/qat_common/adf_transport_debug.c tail = READ_CSR_RING_TAIL(csr, bank->bank_number, csr 98 drivers/crypto/qat/qat_common/adf_transport_debug.c empty = READ_CSR_E_STAT(csr, bank->bank_number); csr 209 drivers/crypto/qat/qat_common/adf_transport_debug.c void __iomem *csr = bank->csr_addr; csr 215 drivers/crypto/qat/qat_common/adf_transport_debug.c head = READ_CSR_RING_HEAD(csr, bank->bank_number, csr 217 drivers/crypto/qat/qat_common/adf_transport_debug.c tail = READ_CSR_RING_TAIL(csr, bank->bank_number, csr 219 drivers/crypto/qat/qat_common/adf_transport_debug.c empty = READ_CSR_E_STAT(csr, bank->bank_number); csr 134 drivers/crypto/qat/qat_common/icp_qat_hal.h #define SET_CAP_CSR(handle, csr, val) \ csr 135 drivers/crypto/qat/qat_common/icp_qat_hal.h ADF_CSR_WR(handle->hal_cap_g_ctl_csr_addr_v, csr, val) csr 136 drivers/crypto/qat/qat_common/icp_qat_hal.h #define GET_CAP_CSR(handle, csr) \ csr 137 drivers/crypto/qat/qat_common/icp_qat_hal.h ADF_CSR_RD(handle->hal_cap_g_ctl_csr_addr_v, csr) csr 138 drivers/crypto/qat/qat_common/icp_qat_hal.h #define SET_GLB_CSR(handle, csr, val) SET_CAP_CSR(handle, csr + GLOBAL_CSR, val) csr 139 drivers/crypto/qat/qat_common/icp_qat_hal.h #define GET_GLB_CSR(handle, csr) GET_CAP_CSR(handle, GLOBAL_CSR + csr) csr 143 drivers/crypto/qat/qat_common/icp_qat_hal.h #define AE_CSR_ADDR(handle, ae, csr) (AE_CSR(handle, ae) + (0x3ff & csr)) csr 144 drivers/crypto/qat/qat_common/icp_qat_hal.h #define SET_AE_CSR(handle, ae, csr, val) \ csr 145 drivers/crypto/qat/qat_common/icp_qat_hal.h ADF_CSR_WR(AE_CSR_ADDR(handle, ae, csr), 0, val) csr 146 drivers/crypto/qat/qat_common/icp_qat_hal.h #define GET_AE_CSR(handle, ae, csr) ADF_CSR_RD(AE_CSR_ADDR(handle, ae, csr), 0) csr 120 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int csr) csr 126 drivers/crypto/qat/qat_common/qat_hal.c value = GET_AE_CSR(handle, ae, csr); csr 136 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int csr, csr 142 drivers/crypto/qat/qat_common/qat_hal.c SET_AE_CSR(handle, ae, csr, value); csr 168 drivers/crypto/qat/qat_common/qat_hal.c unsigned int csr = (1 << ACS_ABO_BITPOS); csr 176 drivers/crypto/qat/qat_common/qat_hal.c csr = qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS); csr 186 drivers/crypto/qat/qat_common/qat_hal.c if (elapsed_cycles >= 8 && !(csr & (1 << ACS_ABO_BITPOS))) csr 202 drivers/crypto/qat/qat_common/qat_hal.c unsigned int csr, new_csr; csr 210 drivers/crypto/qat/qat_common/qat_hal.c csr = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); csr 211 drivers/crypto/qat/qat_common/qat_hal.c csr = IGNORE_W1C_MASK & csr; csr 213 drivers/crypto/qat/qat_common/qat_hal.c SET_BIT(csr, CE_INUSE_CONTEXTS_BITPOS) : csr 214 drivers/crypto/qat/qat_common/qat_hal.c CLR_BIT(csr, CE_INUSE_CONTEXTS_BITPOS); csr 222 drivers/crypto/qat/qat_common/qat_hal.c unsigned int csr, new_csr; csr 224 drivers/crypto/qat/qat_common/qat_hal.c csr = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); csr 225 drivers/crypto/qat/qat_common/qat_hal.c csr &= IGNORE_W1C_MASK; csr 228 drivers/crypto/qat/qat_common/qat_hal.c SET_BIT(csr, CE_NN_MODE_BITPOS) : csr 229 drivers/crypto/qat/qat_common/qat_hal.c CLR_BIT(csr, CE_NN_MODE_BITPOS); csr 231 drivers/crypto/qat/qat_common/qat_hal.c if (new_csr != csr) csr 241 drivers/crypto/qat/qat_common/qat_hal.c unsigned int csr, new_csr; csr 243 drivers/crypto/qat/qat_common/qat_hal.c csr = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); csr 244 drivers/crypto/qat/qat_common/qat_hal.c csr &= IGNORE_W1C_MASK; csr 248 drivers/crypto/qat/qat_common/qat_hal.c SET_BIT(csr, CE_LMADDR_0_GLOBAL_BITPOS) : csr 249 drivers/crypto/qat/qat_common/qat_hal.c CLR_BIT(csr, CE_LMADDR_0_GLOBAL_BITPOS); csr 253 drivers/crypto/qat/qat_common/qat_hal.c SET_BIT(csr, CE_LMADDR_1_GLOBAL_BITPOS) : csr 254 drivers/crypto/qat/qat_common/qat_hal.c CLR_BIT(csr, CE_LMADDR_1_GLOBAL_BITPOS); csr 261 drivers/crypto/qat/qat_common/qat_hal.c if (new_csr != csr) csr 488 drivers/crypto/qat/qat_common/qat_hal.c unsigned int csr; csr 498 drivers/crypto/qat/qat_common/qat_hal.c csr = GET_GLB_CSR(handle, ICP_RESET); csr 500 drivers/crypto/qat/qat_common/qat_hal.c (handle->hal_handle->slice_mask << RST_CSR_QAT_LSB)) & csr); csr 178 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c void __iomem *csr = misc_bar->virt_addr; csr 183 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c val = ADF_CSR_RD(csr, ADF_DH895XCC_AE_CTX_ENABLES(i)); csr 185 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c ADF_CSR_WR(csr, ADF_DH895XCC_AE_CTX_ENABLES(i), val); csr 186 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c val = ADF_CSR_RD(csr, ADF_DH895XCC_AE_MISC_CONTROL(i)); csr 188 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c ADF_CSR_WR(csr, ADF_DH895XCC_AE_MISC_CONTROL(i), val); csr 193 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c val = ADF_CSR_RD(csr, ADF_DH895XCC_UERRSSMSH(i)); csr 195 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c ADF_CSR_WR(csr, ADF_DH895XCC_UERRSSMSH(i), val); csr 196 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c val = ADF_CSR_RD(csr, ADF_DH895XCC_CERRSSMSH(i)); csr 198 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c ADF_CSR_WR(csr, ADF_DH895XCC_CERRSSMSH(i), val); csr 234 drivers/crypto/ux500/hash/hash_alg.h u32 csr[52]; csr 1166 drivers/crypto/ux500/hash/hash_core.c writel_relaxed(device_state->csr[count], csr 1219 drivers/crypto/ux500/hash/hash_core.c device_state->csr[count] = csr 190 drivers/dma/altera-msgdma.c void __iomem *csr; csr 474 drivers/dma/altera-msgdma.c iowrite32(MSGDMA_CSR_STAT_MASK, mdev->csr + MSGDMA_CSR_STATUS); csr 475 drivers/dma/altera-msgdma.c iowrite32(MSGDMA_CSR_CTL_RESET, mdev->csr + MSGDMA_CSR_CONTROL); csr 477 drivers/dma/altera-msgdma.c ret = readl_poll_timeout(mdev->csr + MSGDMA_CSR_STATUS, val, csr 484 drivers/dma/altera-msgdma.c iowrite32(MSGDMA_CSR_STAT_MASK, mdev->csr + MSGDMA_CSR_STATUS); csr 488 drivers/dma/altera-msgdma.c MSGDMA_CSR_CTL_GLOBAL_INTR, mdev->csr + MSGDMA_CSR_CONTROL); csr 502 drivers/dma/altera-msgdma.c while (ioread32(mdev->csr + MSGDMA_CSR_STATUS) & csr 692 drivers/dma/altera-msgdma.c count = ioread32(mdev->csr + MSGDMA_CSR_RESP_FILL_LEVEL); csr 725 drivers/dma/altera-msgdma.c status = ioread32(mdev->csr + MSGDMA_CSR_STATUS); csr 737 drivers/dma/altera-msgdma.c iowrite32(MSGDMA_CSR_STAT_IRQ, mdev->csr + MSGDMA_CSR_STATUS); csr 805 drivers/dma/altera-msgdma.c ret = request_and_map(pdev, "csr", &dma_res, &mdev->csr); csr 352 drivers/dma/fsl-edma-common.c edma_writew(edma, 0, ®s->tcd[ch].csr); csr 369 drivers/dma/fsl-edma-common.c edma_writew(edma, le16_to_cpu(tcd->csr), ®s->tcd[ch].csr); csr 378 drivers/dma/fsl-edma-common.c u16 csr = 0; csr 403 drivers/dma/fsl-edma-common.c csr |= EDMA_TCD_CSR_INT_MAJOR; csr 406 drivers/dma/fsl-edma-common.c csr |= EDMA_TCD_CSR_D_REQ; csr 409 drivers/dma/fsl-edma-common.c csr |= EDMA_TCD_CSR_E_SG; csr 411 drivers/dma/fsl-edma-common.c tcd->csr = cpu_to_le16(csr); csr 80 drivers/dma/fsl-edma-common.h __le16 csr; csr 348 drivers/dma/fsl-edma.c edma_writew(fsl_edma, 0x0, ®s->tcd[i].csr); csr 453 drivers/dma/fsl-edma.c edma_writew(fsl_edma, 0x0, ®s->tcd[i].csr); csr 225 drivers/dma/mcf-edma.c iowrite32(0x0, ®s->tcd[i].csr); csr 132 drivers/dma/tegra20-apb-dma.c unsigned long csr; csr 422 drivers/dma/tegra20-apb-dma.c u32 csr; csr 426 drivers/dma/tegra20-apb-dma.c csr = tdc_read(tdc, TEGRA_APBDMA_CHAN_CSR); csr 427 drivers/dma/tegra20-apb-dma.c csr &= ~TEGRA_APBDMA_CSR_IE_EOC; csr 428 drivers/dma/tegra20-apb-dma.c tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, csr); csr 431 drivers/dma/tegra20-apb-dma.c csr &= ~TEGRA_APBDMA_CSR_ENB; csr 432 drivers/dma/tegra20-apb-dma.c tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, csr); csr 448 drivers/dma/tegra20-apb-dma.c tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, ch_regs->csr); csr 458 drivers/dma/tegra20-apb-dma.c ch_regs->csr | TEGRA_APBDMA_CSR_ENB); csr 498 drivers/dma/tegra20-apb-dma.c nsg_req->ch_regs.csr | TEGRA_APBDMA_CSR_ENB); csr 962 drivers/dma/tegra20-apb-dma.c unsigned long *apb_seq, unsigned long *csr, unsigned int *burst_size, csr 971 drivers/dma/tegra20-apb-dma.c *csr = TEGRA_APBDMA_CSR_DIR; csr 979 drivers/dma/tegra20-apb-dma.c *csr = 0; csr 997 drivers/dma/tegra20-apb-dma.c ch_regs->csr |= len_field; csr 1009 drivers/dma/tegra20-apb-dma.c unsigned long csr, ahb_seq, apb_ptr, apb_seq; csr 1024 drivers/dma/tegra20-apb-dma.c if (get_transfer_param(tdc, direction, &apb_ptr, &apb_seq, &csr, csr 1035 drivers/dma/tegra20-apb-dma.c csr |= TEGRA_APBDMA_CSR_ONCE; csr 1038 drivers/dma/tegra20-apb-dma.c csr |= TEGRA_APBDMA_CSR_FLOW; csr 1039 drivers/dma/tegra20-apb-dma.c csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT; csr 1043 drivers/dma/tegra20-apb-dma.c csr |= TEGRA_APBDMA_CSR_IE_EOC; csr 1090 drivers/dma/tegra20-apb-dma.c sg_req->ch_regs.csr = csr; csr 1131 drivers/dma/tegra20-apb-dma.c unsigned long csr, ahb_seq, apb_ptr, apb_seq; csr 1175 drivers/dma/tegra20-apb-dma.c if (get_transfer_param(tdc, direction, &apb_ptr, &apb_seq, &csr, csr 1185 drivers/dma/tegra20-apb-dma.c csr |= TEGRA_APBDMA_CSR_FLOW; csr 1186 drivers/dma/tegra20-apb-dma.c csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT; csr 1190 drivers/dma/tegra20-apb-dma.c csr |= TEGRA_APBDMA_CSR_IE_EOC; csr 1224 drivers/dma/tegra20-apb-dma.c sg_req->ch_regs.csr = csr; csr 1582 drivers/dma/tegra20-apb-dma.c ch_reg->csr = tdc_read(tdc, TEGRA_APBDMA_CHAN_CSR); csr 1628 drivers/dma/tegra20-apb-dma.c (ch_reg->csr & ~TEGRA_APBDMA_CSR_ENB)); csr 611 drivers/dma/ti/omap-dma.c unsigned mask, csr; csr 625 drivers/dma/ti/omap-dma.c csr = omap_dma_get_csr(c); csr 628 drivers/dma/ti/omap-dma.c omap_dma_callback(channel, csr, c); csr 498 drivers/dma/txx9dmac.c static void txx9dmac_handle_error(struct txx9dmac_chan *dc, u32 csr) csr 516 drivers/dma/txx9dmac.c errors = csr & (TXX9_DMA_CSR_ABCHC | csr 541 drivers/dma/txx9dmac.c u32 csr; csr 545 drivers/dma/txx9dmac.c csr = channel64_readl(dc, CSR); csr 546 drivers/dma/txx9dmac.c channel64_writel(dc, CSR, csr); csr 549 drivers/dma/txx9dmac.c csr = channel32_readl(dc, CSR); csr 550 drivers/dma/txx9dmac.c channel32_writel(dc, CSR, csr); csr 553 drivers/dma/txx9dmac.c if (!(csr & (TXX9_DMA_CSR_XFACT | TXX9_DMA_CSR_ABCHC))) { csr 558 drivers/dma/txx9dmac.c if (!(csr & TXX9_DMA_CSR_CHNEN)) csr 567 drivers/dma/txx9dmac.c if (csr & TXX9_DMA_CSR_ABCHC) csr 575 drivers/dma/txx9dmac.c if (csr & TXX9_DMA_CSR_ABCHC) csr 587 drivers/dma/txx9dmac.c if (csr & TXX9_DMA_CSR_ABCHC) { csr 588 drivers/dma/txx9dmac.c txx9dmac_handle_error(dc, csr); csr 607 drivers/dma/txx9dmac.c u32 csr; csr 611 drivers/dma/txx9dmac.c csr = channel_readl(dc, CSR); csr 612 drivers/dma/txx9dmac.c dev_vdbg(chan2dev(&dc->chan), "tasklet: status=%x\n", csr); csr 615 drivers/dma/txx9dmac.c if (csr & (TXX9_DMA_CSR_ABCHC | TXX9_DMA_CSR_NCHNC | csr 644 drivers/dma/txx9dmac.c u32 csr; csr 656 drivers/dma/txx9dmac.c csr = channel_readl(dc, CSR); csr 658 drivers/dma/txx9dmac.c csr); csr 660 drivers/dma/txx9dmac.c if (csr & (TXX9_DMA_CSR_ABCHC | TXX9_DMA_CSR_NCHNC | csr 278 drivers/edac/edac_mc.c struct csrow_info *csr; csr 289 drivers/edac/edac_mc.c csr = mci->csrows[row]; csr 290 drivers/edac/edac_mc.c if (!csr) csr 293 drivers/edac/edac_mc.c if (csr->channels) { csr 295 drivers/edac/edac_mc.c kfree(csr->channels[chn]); csr 296 drivers/edac/edac_mc.c kfree(csr->channels); csr 298 drivers/edac/edac_mc.c kfree(csr); csr 312 drivers/edac/edac_mc.c struct csrow_info *csr; csr 396 drivers/edac/edac_mc.c csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL); csr 397 drivers/edac/edac_mc.c if (!csr) csr 399 drivers/edac/edac_mc.c mci->csrows[row] = csr; csr 400 drivers/edac/edac_mc.c csr->csrow_idx = row; csr 401 drivers/edac/edac_mc.c csr->mci = mci; csr 402 drivers/edac/edac_mc.c csr->nr_channels = tot_channels; csr 403 drivers/edac/edac_mc.c csr->channels = kcalloc(tot_channels, sizeof(*csr->channels), csr 405 drivers/edac/edac_mc.c if (!csr->channels) csr 409 drivers/edac/edac_mc.c chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL); csr 412 drivers/edac/edac_mc.c csr->channels[chn] = chan; csr 414 drivers/edac/edac_mc.c chan->csrow = csr; csr 1517 drivers/firewire/ohci.c struct fw_packet *packet, u32 csr) csr 1528 drivers/firewire/ohci.c i = csr - CSR_CONFIG_ROM; csr 1544 drivers/firewire/ohci.c struct fw_packet *packet, u32 csr) csr 1569 drivers/firewire/ohci.c sel = (csr - CSR_BUS_MANAGER_ID) / 4; csr 1593 drivers/firewire/ohci.c u64 offset, csr; csr 1604 drivers/firewire/ohci.c csr = offset - CSR_REGISTER_BASE; csr 1607 drivers/firewire/ohci.c if (csr >= CSR_CONFIG_ROM && csr < CSR_CONFIG_ROM_END) csr 1608 drivers/firewire/ohci.c handle_local_rom(ctx->ohci, packet, csr); csr 1609 drivers/firewire/ohci.c else switch (csr) { csr 1614 drivers/firewire/ohci.c handle_local_lock(ctx->ohci, packet, csr); csr 142 drivers/gpu/drm/i2c/tda9950.c u8 csr, cconr, buf[19]; csr 148 drivers/gpu/drm/i2c/tda9950.c csr = tda9950_read(priv->client, REG_CSR); csr 149 drivers/gpu/drm/i2c/tda9950.c if (!(csr & CSR_INT)) csr 303 drivers/gpu/drm/i2c/tda9950.c u8 csr; csr 310 drivers/gpu/drm/i2c/tda9950.c csr = tda9950_read(client, REG_CSR); csr 311 drivers/gpu/drm/i2c/tda9950.c if (!(csr & CSR_BUSY) || !--timeout) csr 317 drivers/gpu/drm/i2c/tda9950.c if (csr & CSR_BUSY) csr 319 drivers/gpu/drm/i2c/tda9950.c client->irq, csr); csr 734 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->csr.dc_state, val); csr 735 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->csr.dc_state = val; csr 766 drivers/gpu/drm/i915/display/intel_display_power.c if (WARN_ON_ONCE(state & ~dev_priv->csr.allowed_dc_mask)) csr 767 drivers/gpu/drm/i915/display/intel_display_power.c state &= dev_priv->csr.allowed_dc_mask; csr 775 drivers/gpu/drm/i915/display/intel_display_power.c if ((val & mask) != dev_priv->csr.dc_state) csr 777 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->csr.dc_state, val & mask); csr 784 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->csr.dc_state = val & mask; csr 999 drivers/gpu/drm/i915/display/intel_display_power.c if (!dev_priv->csr.dmc_payload) csr 1002 drivers/gpu/drm/i915/display/intel_display_power.c if (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC6) csr 1004 drivers/gpu/drm/i915/display/intel_display_power.c else if (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5) csr 4030 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->csr.allowed_dc_mask = csr 4515 drivers/gpu/drm/i915/display/intel_display_power.c if (resume && dev_priv->csr.dmc_payload) csr 4576 drivers/gpu/drm/i915/display/intel_display_power.c if (resume && dev_priv->csr.dmc_payload) csr 4636 drivers/gpu/drm/i915/display/intel_display_power.c if (resume && dev_priv->csr.dmc_payload) csr 4703 drivers/gpu/drm/i915/display/intel_display_power.c if (resume && dev_priv->csr.dmc_payload) csr 5045 drivers/gpu/drm/i915/display/intel_display_power.c if (!(i915->csr.allowed_dc_mask & DC_STATE_EN_DC9) && csr 5047 drivers/gpu/drm/i915/display/intel_display_power.c i915->csr.dmc_payload) { csr 5224 drivers/gpu/drm/i915/display/intel_display_power.c if (i915->csr.dmc_payload) { csr 5225 drivers/gpu/drm/i915/display/intel_display_power.c if (i915->csr.allowed_dc_mask & csr 5228 drivers/gpu/drm/i915/display/intel_display_power.c else if (i915->csr.allowed_dc_mask & csr 5235 drivers/gpu/drm/i915/display/intel_display_power.c if (i915->csr.dmc_payload && csr 5236 drivers/gpu/drm/i915/display/intel_display_power.c (i915->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5)) csr 2377 drivers/gpu/drm/i915/i915_debugfs.c struct intel_csr *csr; csr 2383 drivers/gpu/drm/i915/i915_debugfs.c csr = &dev_priv->csr; csr 2387 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "fw loaded: %s\n", yesno(csr->dmc_payload != NULL)); csr 2388 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "path: %s\n", csr->fw_path); csr 2390 drivers/gpu/drm/i915/i915_debugfs.c if (!csr->dmc_payload) csr 2393 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version), csr 2394 drivers/gpu/drm/i915/i915_debugfs.c CSR_VERSION_MINOR(csr->version)); csr 1322 drivers/gpu/drm/i915/i915_drv.h struct intel_csr csr; csr 701 drivers/gpu/drm/i915/i915_gpu_error.c struct intel_csr *csr = &m->i915->csr; csr 704 drivers/gpu/drm/i915/i915_gpu_error.c yesno(csr->dmc_payload != NULL)); csr 706 drivers/gpu/drm/i915/i915_gpu_error.c CSR_VERSION_MAJOR(csr->version), csr 707 drivers/gpu/drm/i915/i915_gpu_error.c CSR_VERSION_MINOR(csr->version)); csr 297 drivers/gpu/drm/i915/intel_csr.c u32 *payload = dev_priv->csr.dmc_payload; csr 305 drivers/gpu/drm/i915/intel_csr.c if (!dev_priv->csr.dmc_payload) { csr 310 drivers/gpu/drm/i915/intel_csr.c fw_size = dev_priv->csr.dmc_fw_size; csr 320 drivers/gpu/drm/i915/intel_csr.c for (i = 0; i < dev_priv->csr.mmio_count; i++) { csr 321 drivers/gpu/drm/i915/intel_csr.c I915_WRITE(dev_priv->csr.mmioaddr[i], csr 322 drivers/gpu/drm/i915/intel_csr.c dev_priv->csr.mmiodata[i]); csr 325 drivers/gpu/drm/i915/intel_csr.c dev_priv->csr.dc_state = 0; csr 374 drivers/gpu/drm/i915/intel_csr.c static u32 parse_csr_fw_dmc(struct intel_csr *csr, csr 383 drivers/gpu/drm/i915/intel_csr.c BUILD_BUG_ON(ARRAY_SIZE(csr->mmioaddr) < DMC_V3_MAX_MMIO_COUNT || csr 384 drivers/gpu/drm/i915/intel_csr.c ARRAY_SIZE(csr->mmioaddr) < DMC_V1_MAX_MMIO_COUNT); csr 446 drivers/gpu/drm/i915/intel_csr.c csr->mmioaddr[i] = _MMIO(mmioaddr[i]); csr 447 drivers/gpu/drm/i915/intel_csr.c csr->mmiodata[i] = mmiodata[i]; csr 449 drivers/gpu/drm/i915/intel_csr.c csr->mmio_count = mmio_count; csr 458 drivers/gpu/drm/i915/intel_csr.c if (payload_size > csr->max_fw_size) { csr 462 drivers/gpu/drm/i915/intel_csr.c csr->dmc_fw_size = dmc_header->fw_size; csr 464 drivers/gpu/drm/i915/intel_csr.c csr->dmc_payload = kmalloc(payload_size, GFP_KERNEL); csr 465 drivers/gpu/drm/i915/intel_csr.c if (!csr->dmc_payload) { csr 471 drivers/gpu/drm/i915/intel_csr.c memcpy(csr->dmc_payload, payload, payload_size); csr 481 drivers/gpu/drm/i915/intel_csr.c parse_csr_fw_package(struct intel_csr *csr, csr 540 drivers/gpu/drm/i915/intel_csr.c static u32 parse_csr_fw_css(struct intel_csr *csr, csr 557 drivers/gpu/drm/i915/intel_csr.c if (csr->required_version && csr 558 drivers/gpu/drm/i915/intel_csr.c css_header->version != csr->required_version) { csr 563 drivers/gpu/drm/i915/intel_csr.c CSR_VERSION_MAJOR(csr->required_version), csr 564 drivers/gpu/drm/i915/intel_csr.c CSR_VERSION_MINOR(csr->required_version)); csr 568 drivers/gpu/drm/i915/intel_csr.c csr->version = css_header->version; csr 579 drivers/gpu/drm/i915/intel_csr.c struct intel_csr *csr = &dev_priv->csr; csr 589 drivers/gpu/drm/i915/intel_csr.c r = parse_csr_fw_css(csr, css_header, fw->size); csr 597 drivers/gpu/drm/i915/intel_csr.c r = parse_csr_fw_package(csr, package_header, si, fw->size - readcount); csr 605 drivers/gpu/drm/i915/intel_csr.c parse_csr_fw_dmc(csr, dmc_header, fw->size - readcount); csr 610 drivers/gpu/drm/i915/intel_csr.c WARN_ON(dev_priv->csr.wakeref); csr 611 drivers/gpu/drm/i915/intel_csr.c dev_priv->csr.wakeref = csr 618 drivers/gpu/drm/i915/intel_csr.c fetch_and_zero(&dev_priv->csr.wakeref); csr 626 drivers/gpu/drm/i915/intel_csr.c struct intel_csr *csr; csr 629 drivers/gpu/drm/i915/intel_csr.c dev_priv = container_of(work, typeof(*dev_priv), csr.work); csr 630 drivers/gpu/drm/i915/intel_csr.c csr = &dev_priv->csr; csr 632 drivers/gpu/drm/i915/intel_csr.c request_firmware(&fw, dev_priv->csr.fw_path, &dev_priv->drm.pdev->dev); csr 635 drivers/gpu/drm/i915/intel_csr.c if (dev_priv->csr.dmc_payload) { csr 640 drivers/gpu/drm/i915/intel_csr.c dev_priv->csr.fw_path, csr 641 drivers/gpu/drm/i915/intel_csr.c CSR_VERSION_MAJOR(csr->version), csr 642 drivers/gpu/drm/i915/intel_csr.c CSR_VERSION_MINOR(csr->version)); csr 647 drivers/gpu/drm/i915/intel_csr.c csr->fw_path); csr 664 drivers/gpu/drm/i915/intel_csr.c struct intel_csr *csr = &dev_priv->csr; csr 666 drivers/gpu/drm/i915/intel_csr.c INIT_WORK(&dev_priv->csr.work, csr_load_work_fn); csr 682 drivers/gpu/drm/i915/intel_csr.c csr->fw_path = TGL_CSR_PATH; csr 683 drivers/gpu/drm/i915/intel_csr.c csr->required_version = TGL_CSR_VERSION_REQUIRED; csr 685 drivers/gpu/drm/i915/intel_csr.c csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE; csr 687 drivers/gpu/drm/i915/intel_csr.c csr->fw_path = ICL_CSR_PATH; csr 688 drivers/gpu/drm/i915/intel_csr.c csr->required_version = ICL_CSR_VERSION_REQUIRED; csr 689 drivers/gpu/drm/i915/intel_csr.c csr->max_fw_size = ICL_CSR_MAX_FW_SIZE; csr 691 drivers/gpu/drm/i915/intel_csr.c csr->fw_path = CNL_CSR_PATH; csr 692 drivers/gpu/drm/i915/intel_csr.c csr->required_version = CNL_CSR_VERSION_REQUIRED; csr 693 drivers/gpu/drm/i915/intel_csr.c csr->max_fw_size = CNL_CSR_MAX_FW_SIZE; csr 695 drivers/gpu/drm/i915/intel_csr.c csr->fw_path = GLK_CSR_PATH; csr 696 drivers/gpu/drm/i915/intel_csr.c csr->required_version = GLK_CSR_VERSION_REQUIRED; csr 697 drivers/gpu/drm/i915/intel_csr.c csr->max_fw_size = GLK_CSR_MAX_FW_SIZE; csr 699 drivers/gpu/drm/i915/intel_csr.c csr->fw_path = KBL_CSR_PATH; csr 700 drivers/gpu/drm/i915/intel_csr.c csr->required_version = KBL_CSR_VERSION_REQUIRED; csr 701 drivers/gpu/drm/i915/intel_csr.c csr->max_fw_size = KBL_CSR_MAX_FW_SIZE; csr 703 drivers/gpu/drm/i915/intel_csr.c csr->fw_path = SKL_CSR_PATH; csr 704 drivers/gpu/drm/i915/intel_csr.c csr->required_version = SKL_CSR_VERSION_REQUIRED; csr 705 drivers/gpu/drm/i915/intel_csr.c csr->max_fw_size = SKL_CSR_MAX_FW_SIZE; csr 707 drivers/gpu/drm/i915/intel_csr.c csr->fw_path = BXT_CSR_PATH; csr 708 drivers/gpu/drm/i915/intel_csr.c csr->required_version = BXT_CSR_VERSION_REQUIRED; csr 709 drivers/gpu/drm/i915/intel_csr.c csr->max_fw_size = BXT_CSR_MAX_FW_SIZE; csr 714 drivers/gpu/drm/i915/intel_csr.c csr->fw_path = NULL; csr 719 drivers/gpu/drm/i915/intel_csr.c csr->fw_path = i915_modparams.dmc_firmware_path; csr 721 drivers/gpu/drm/i915/intel_csr.c csr->required_version = 0; csr 724 drivers/gpu/drm/i915/intel_csr.c if (csr->fw_path == NULL) { csr 729 drivers/gpu/drm/i915/intel_csr.c DRM_DEBUG_KMS("Loading %s\n", csr->fw_path); csr 730 drivers/gpu/drm/i915/intel_csr.c schedule_work(&dev_priv->csr.work); csr 746 drivers/gpu/drm/i915/intel_csr.c flush_work(&dev_priv->csr.work); csr 749 drivers/gpu/drm/i915/intel_csr.c if (!dev_priv->csr.dmc_payload) csr 769 drivers/gpu/drm/i915/intel_csr.c if (!dev_priv->csr.dmc_payload) csr 786 drivers/gpu/drm/i915/intel_csr.c WARN_ON(dev_priv->csr.wakeref); csr 788 drivers/gpu/drm/i915/intel_csr.c kfree(dev_priv->csr.dmc_payload); csr 731 drivers/hid/intel-ish-hid/ipc/ipc.c uint16_t csr; csr 752 drivers/hid/intel-ish-hid/ipc/ipc.c pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &csr); csr 754 drivers/hid/intel-ish-hid/ipc/ipc.c csr &= ~PCI_PM_CTRL_STATE_MASK; csr 755 drivers/hid/intel-ish-hid/ipc/ipc.c csr |= PCI_D3hot; csr 756 drivers/hid/intel-ish-hid/ipc/ipc.c pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, csr); csr 760 drivers/hid/intel-ish-hid/ipc/ipc.c csr &= ~PCI_PM_CTRL_STATE_MASK; csr 761 drivers/hid/intel-ish-hid/ipc/ipc.c csr |= PCI_D0; csr 762 drivers/hid/intel-ish-hid/ipc/ipc.c pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, csr); csr 174 drivers/hsi/controllers/omap_ssi_core.c u32 csr; csr 193 drivers/hsi/controllers/omap_ssi_core.c csr = readw(omap_ssi->gdd + SSI_GDD_CSR_REG(lch)); csr 198 drivers/hsi/controllers/omap_ssi_core.c if (csr & SSI_CSR_TOUR) { /* Timeout error */ csr 51 drivers/iio/adc/stm32-adc-core.c u32 csr; csr 280 drivers/iio/adc/stm32-adc-core.c .csr = STM32F4_ADC_CSR, csr 291 drivers/iio/adc/stm32-adc-core.c .csr = STM32H7_ADC_CSR, csr 321 drivers/iio/adc/stm32-adc-core.c status = readl_relaxed(priv->common.base + priv->cfg->regs->csr); csr 1186 drivers/infiniband/hw/hfi1/chip.c u64 csr; csr 1208 drivers/infiniband/hw/hfi1/chip.c #define CNTR_ELEM(name, csr, offset, flags, accessor) \ csr 1211 drivers/infiniband/hw/hfi1/chip.c csr, \ csr 1373 drivers/infiniband/hw/hfi1/chip.c static inline u64 read_write_csr(const struct hfi1_devdata *dd, u32 csr, csr 1379 drivers/infiniband/hw/hfi1/chip.c ret = read_csr(dd, csr); csr 1381 drivers/infiniband/hw/hfi1/chip.c write_csr(dd, csr, value); csr 1388 drivers/infiniband/hw/hfi1/chip.c hfi1_cdbg(CNTR, "csr 0x%x val 0x%llx mode %d", csr, ret, mode); csr 1397 drivers/infiniband/hw/hfi1/chip.c u64 csr = entry->csr; csr 1402 drivers/infiniband/hw/hfi1/chip.c csr += 0x100 * vl; csr 1407 drivers/infiniband/hw/hfi1/chip.c return read_write_csr(dd, csr, mode, data); csr 1457 drivers/infiniband/hw/hfi1/chip.c u64 csr = entry->csr; csr 1462 drivers/infiniband/hw/hfi1/chip.c csr += 8 * vl; csr 1468 drivers/infiniband/hw/hfi1/chip.c val = read_write_csr(dd, csr, mode, data); csr 1476 drivers/infiniband/hw/hfi1/chip.c u32 csr = entry->csr; csr 1482 drivers/infiniband/hw/hfi1/chip.c ret = read_lcb_csr(dd, csr, &data); csr 1484 drivers/infiniband/hw/hfi1/chip.c ret = write_lcb_csr(dd, csr, data); csr 1487 drivers/infiniband/hw/hfi1/chip.c dd_dev_err(dd, "Could not acquire LCB for counter 0x%x", csr); csr 1491 drivers/infiniband/hw/hfi1/chip.c hfi1_cdbg(CNTR, "csr 0x%x val 0x%llx mode %d", csr, data, mode); csr 1503 drivers/infiniband/hw/hfi1/chip.c return read_write_csr(ppd->dd, entry->csr, mode, data); csr 1511 drivers/infiniband/hw/hfi1/chip.c u64 csr = entry->csr; csr 1516 drivers/infiniband/hw/hfi1/chip.c csr += 8 * vl; csr 1521 drivers/infiniband/hw/hfi1/chip.c val = read_write_csr(ppd->dd, csr, mode, data); csr 4058 drivers/infiniband/hw/hfi1/chip.c u64 csr = entry->csr; csr 4060 drivers/infiniband/hw/hfi1/chip.c val = read_write_csr(dd, csr, mode, data); csr 11134 drivers/infiniband/hw/hfi1/chip.c static void read_one_cm_vl(struct hfi1_devdata *dd, u32 csr, csr 11137 drivers/infiniband/hw/hfi1/chip.c u64 reg = read_csr(dd, csr); csr 2086 drivers/infiniband/hw/hfi1/sdma.c csr = read_csr(sde->dd, reg); \ csr 2087 drivers/infiniband/hw/hfi1/sdma.c dd_dev_err(sde->dd, "%36s 0x%016llx\n", #reg, csr); \ csr 2091 drivers/infiniband/hw/hfi1/sdma.c csr = read_sde_csr(sde, reg); \ csr 2093 drivers/infiniband/hw/hfi1/sdma.c #reg, sde->this_idx, csr); \ csr 2097 drivers/infiniband/hw/hfi1/sdma.c csr = read_csr(sde->dd, reg + (8 * i)); \ csr 2099 drivers/infiniband/hw/hfi1/sdma.c #reg, i, csr); \ csr 2104 drivers/infiniband/hw/hfi1/sdma.c u64 csr; csr 334 drivers/ipack/devices/ipoctal.c iowrite8(TX_CLK_9600 | RX_CLK_9600, &channel->regs->w.csr); csr 483 drivers/ipack/devices/ipoctal.c unsigned char csr = 0; csr 556 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_75 | RX_CLK_75; csr 559 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_110 | RX_CLK_110; csr 562 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_150 | RX_CLK_150; csr 565 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_300 | RX_CLK_300; csr 568 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_600 | RX_CLK_600; csr 571 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_1200 | RX_CLK_1200; csr 574 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_1800 | RX_CLK_1800; csr 577 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_2000 | RX_CLK_2000; csr 580 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_2400 | RX_CLK_2400; csr 583 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_4800 | RX_CLK_4800; csr 586 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_9600 | RX_CLK_9600; csr 589 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_19200 | RX_CLK_19200; csr 593 drivers/ipack/devices/ipoctal.c csr |= TX_CLK_38400 | RX_CLK_38400; csr 605 drivers/ipack/devices/ipoctal.c iowrite8(csr, &channel->regs->w.csr); csr 31 drivers/ipack/devices/scc2698.h u8 d1, csr; /* Clock select register */ csr 129 drivers/misc/eeprom/idt_89hpesx.c u16 csr; csr 993 drivers/misc/eeprom/idt_89hpesx.c pdev->csr = (csraddr >> 2); csr 1001 drivers/misc/eeprom/idt_89hpesx.c ret = idt_csr_write(pdev, pdev->csr, csrval); csr 1037 drivers/misc/eeprom/idt_89hpesx.c ret = idt_csr_read(pdev, pdev->csr, &csrval); csr 1042 drivers/misc/eeprom/idt_89hpesx.c csraddr = ((u32)pdev->csr << 2); csr 1191 drivers/misc/eeprom/idt_89hpesx.c pdev->csr = CSR_DEF; csr 911 drivers/mmc/host/wbsd.c u8 csr; csr 915 drivers/mmc/host/wbsd.c csr = inb(host->base + WBSD_CSR); csr 916 drivers/mmc/host/wbsd.c csr |= WBSD_MSLED; csr 917 drivers/mmc/host/wbsd.c outb(csr, host->base + WBSD_CSR); csr 921 drivers/mmc/host/wbsd.c csr = inb(host->base + WBSD_CSR); csr 922 drivers/mmc/host/wbsd.c csr &= ~WBSD_MSLED; csr 923 drivers/mmc/host/wbsd.c outb(csr, host->base + WBSD_CSR); csr 927 drivers/mmc/host/wbsd.c return !!(csr & WBSD_WRPT); csr 991 drivers/mmc/host/wbsd.c u8 csr; csr 1001 drivers/mmc/host/wbsd.c csr = inb(host->base + WBSD_CSR); csr 1002 drivers/mmc/host/wbsd.c WARN_ON(csr == 0xff); csr 1004 drivers/mmc/host/wbsd.c if (csr & WBSD_CARDPRESENT) { csr 188 drivers/mtd/devices/ms02-nv.c mp->resource.csr = csr_res; csr 255 drivers/mtd/devices/ms02-nv.c release_resource(mp->resource.csr); csr 256 drivers/mtd/devices/ms02-nv.c kfree(mp->resource.csr); csr 270 drivers/mtd/devices/ms02-nv.c volatile u32 *csr; csr 277 drivers/mtd/devices/ms02-nv.c csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); csr 278 drivers/mtd/devices/ms02-nv.c if (*csr & KN02_CSR_BNK32M) csr 283 drivers/mtd/devices/ms02-nv.c csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); csr 284 drivers/mtd/devices/ms02-nv.c if (*csr & KN03_MCR_BNK32M) csr 96 drivers/mtd/devices/ms02-nv.h struct resource *csr; csr 739 drivers/net/ethernet/agere/et131x.c u32 csr = ET_RXDMA_CSR_FBR1_ENABLE; csr 743 drivers/net/ethernet/agere/et131x.c csr |= ET_RXDMA_CSR_FBR1_SIZE_LO; csr 745 drivers/net/ethernet/agere/et131x.c csr |= ET_RXDMA_CSR_FBR1_SIZE_HI; csr 747 drivers/net/ethernet/agere/et131x.c csr |= ET_RXDMA_CSR_FBR1_SIZE_LO | ET_RXDMA_CSR_FBR1_SIZE_HI; csr 749 drivers/net/ethernet/agere/et131x.c csr |= ET_RXDMA_CSR_FBR0_ENABLE; csr 751 drivers/net/ethernet/agere/et131x.c csr |= ET_RXDMA_CSR_FBR0_SIZE_LO; csr 753 drivers/net/ethernet/agere/et131x.c csr |= ET_RXDMA_CSR_FBR0_SIZE_HI; csr 755 drivers/net/ethernet/agere/et131x.c csr |= ET_RXDMA_CSR_FBR0_SIZE_LO | ET_RXDMA_CSR_FBR0_SIZE_HI; csr 756 drivers/net/ethernet/agere/et131x.c writel(csr, &adapter->regs->rxdma.csr); csr 758 drivers/net/ethernet/agere/et131x.c csr = readl(&adapter->regs->rxdma.csr); csr 759 drivers/net/ethernet/agere/et131x.c if (csr & ET_RXDMA_CSR_HALT_STATUS) { csr 761 drivers/net/ethernet/agere/et131x.c csr = readl(&adapter->regs->rxdma.csr); csr 762 drivers/net/ethernet/agere/et131x.c if (csr & ET_RXDMA_CSR_HALT_STATUS) { csr 765 drivers/net/ethernet/agere/et131x.c csr); csr 772 drivers/net/ethernet/agere/et131x.c u32 csr; csr 775 drivers/net/ethernet/agere/et131x.c &adapter->regs->rxdma.csr); csr 776 drivers/net/ethernet/agere/et131x.c csr = readl(&adapter->regs->rxdma.csr); csr 777 drivers/net/ethernet/agere/et131x.c if (!(csr & ET_RXDMA_CSR_HALT_STATUS)) { csr 779 drivers/net/ethernet/agere/et131x.c csr = readl(&adapter->regs->rxdma.csr); csr 780 drivers/net/ethernet/agere/et131x.c if (!(csr & ET_RXDMA_CSR_HALT_STATUS)) csr 783 drivers/net/ethernet/agere/et131x.c csr); csr 793 drivers/net/ethernet/agere/et131x.c &adapter->regs->txdma.csr); csr 1725 drivers/net/ethernet/agere/et131x.c &adapter->regs->txdma.csr); csr 2896 drivers/net/ethernet/agere/et131x.c regs_buff[num++] = readl(&aregs->txdma.csr); csr 2924 drivers/net/ethernet/agere/et131x.c regs_buff[num++] = readl(&aregs->rxdma.csr); csr 241 drivers/net/ethernet/agere/et131x.h u32 csr; /* 0x1000 */ csr 463 drivers/net/ethernet/agere/et131x.h u32 csr; /* 0x2000 */ csr 441 drivers/net/ethernet/amd/sunlance.c u32 csr = sbus_readl(lp->dregs + DMA_CSR); csr 443 drivers/net/ethernet/amd/sunlance.c if (!(csr & DMA_HNDL_ERROR)) { csr 449 drivers/net/ethernet/amd/sunlance.c csr = sbus_readl(lp->dregs + DMA_CSR); csr 450 drivers/net/ethernet/amd/sunlance.c csr &= ~DMA_E_BURSTS; csr 452 drivers/net/ethernet/amd/sunlance.c csr |= DMA_E_BURST32; csr 454 drivers/net/ethernet/amd/sunlance.c csr |= DMA_E_BURST16; csr 456 drivers/net/ethernet/amd/sunlance.c csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV); csr 459 drivers/net/ethernet/amd/sunlance.c csr |= DMA_EN_ENETAUI; csr 461 drivers/net/ethernet/amd/sunlance.c csr &= ~DMA_EN_ENETAUI; csr 463 drivers/net/ethernet/amd/sunlance.c sbus_writel(csr, lp->dregs + DMA_CSR); csr 499 drivers/net/ethernet/amd/sunlance.c u32 csr = sbus_readl(lp->dregs + DMA_CSR); csr 501 drivers/net/ethernet/amd/sunlance.c csr |= DMA_INT_ENAB; csr 502 drivers/net/ethernet/amd/sunlance.c sbus_writel(csr, lp->dregs + DMA_CSR); csr 988 drivers/net/ethernet/amd/sunlance.c u32 csr, addr; csr 991 drivers/net/ethernet/amd/sunlance.c csr = sbus_readl(lp->dregs + DMA_CSR); csr 992 drivers/net/ethernet/amd/sunlance.c sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); csr 994 drivers/net/ethernet/amd/sunlance.c sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); csr 1397 drivers/net/ethernet/amd/sunlance.c u32 csr; csr 1446 drivers/net/ethernet/amd/sunlance.c csr = sbus_readl(lp->dregs + DMA_CSR); csr 1447 drivers/net/ethernet/amd/sunlance.c sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); csr 1449 drivers/net/ethernet/amd/sunlance.c sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); csr 556 drivers/net/ethernet/emulex/benet/be.h u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ csr 713 drivers/net/ethernet/emulex/benet/be_cmds.c sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); csr 5668 drivers/net/ethernet/emulex/benet/be_main.c if (adapter->csr) csr 5669 drivers/net/ethernet/emulex/benet/be_main.c pci_iounmap(adapter->pdev, adapter->csr); csr 5708 drivers/net/ethernet/emulex/benet/be_main.c adapter->csr = pci_iomap(pdev, 2, 0); csr 5709 drivers/net/ethernet/emulex/benet/be_main.c if (!adapter->csr) csr 555 drivers/net/ethernet/intel/e100.c struct csr __iomem *csr; csr 613 drivers/net/ethernet/intel/e100.c (void)ioread8(&nic->csr->scb.status); csr 621 drivers/net/ethernet/intel/e100.c iowrite8(irq_mask_none, &nic->csr->scb.cmd_hi); csr 631 drivers/net/ethernet/intel/e100.c iowrite8(irq_mask_all, &nic->csr->scb.cmd_hi); csr 640 drivers/net/ethernet/intel/e100.c iowrite32(selective_reset, &nic->csr->port); csr 644 drivers/net/ethernet/intel/e100.c iowrite32(software_reset, &nic->csr->port); csr 661 drivers/net/ethernet/intel/e100.c iowrite32(selftest | dma_addr, &nic->csr->port); csr 700 drivers/net/ethernet/intel/e100.c iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo); csr 706 drivers/net/ethernet/intel/e100.c iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo); csr 709 drivers/net/ethernet/intel/e100.c iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo); csr 716 drivers/net/ethernet/intel/e100.c iowrite8(0, &nic->csr->eeprom_ctrl_lo); csr 732 drivers/net/ethernet/intel/e100.c iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo); csr 738 drivers/net/ethernet/intel/e100.c iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo); csr 741 drivers/net/ethernet/intel/e100.c iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo); csr 746 drivers/net/ethernet/intel/e100.c ctrl = ioread8(&nic->csr->eeprom_ctrl_lo); csr 756 drivers/net/ethernet/intel/e100.c iowrite8(0, &nic->csr->eeprom_ctrl_lo); csr 826 drivers/net/ethernet/intel/e100.c if (likely(!ioread8(&nic->csr->scb.cmd_lo))) csr 838 drivers/net/ethernet/intel/e100.c iowrite32(dma_addr, &nic->csr->scb.gen_ptr); csr 839 drivers/net/ethernet/intel/e100.c iowrite8(cmd, &nic->csr->scb.cmd_lo); csr 934 drivers/net/ethernet/intel/e100.c if (ioread32(&nic->csr->mdi_ctrl) & mdi_ready) csr 943 drivers/net/ethernet/intel/e100.c iowrite32((reg << 16) | (addr << 21) | dir | data, &nic->csr->mdi_ctrl); csr 947 drivers/net/ethernet/intel/e100.c if ((data_out = ioread32(&nic->csr->mdi_ctrl)) & mdi_ready) csr 1369 drivers/net/ethernet/intel/e100.c iowrite8(~0, &nic->csr->scb.stat_ack); csr 1718 drivers/net/ethernet/intel/e100.c iowrite8(ioread8(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi); csr 1985 drivers/net/ethernet/intel/e100.c if (ioread8(&nic->csr->scb.status) & rus_no_res) csr 2013 drivers/net/ethernet/intel/e100.c if (ioread8(&nic->csr->scb.status) & rus_no_res) csr 2123 drivers/net/ethernet/intel/e100.c iowrite8(stat_ack_rnr, &nic->csr->scb.stat_ack); csr 2196 drivers/net/ethernet/intel/e100.c u8 stat_ack = ioread8(&nic->csr->scb.stat_ack); csr 2206 drivers/net/ethernet/intel/e100.c iowrite8(stat_ack, &nic->csr->scb.stat_ack); csr 2334 drivers/net/ethernet/intel/e100.c "scb.status=0x%02X\n", ioread8(&nic->csr->scb.status)); csr 2453 drivers/net/ethernet/intel/e100.c buff[0] = ioread8(&nic->csr->scb.cmd_hi) << 24 | csr 2454 drivers/net/ethernet/intel/e100.c ioread8(&nic->csr->scb.cmd_lo) << 16 | csr 2455 drivers/net/ethernet/intel/e100.c ioread16(&nic->csr->scb.status); csr 2870 drivers/net/ethernet/intel/e100.c nic->csr = pci_iomap(pdev, (use_io ? 1 : 0), sizeof(struct csr)); csr 2871 drivers/net/ethernet/intel/e100.c if (!nic->csr) { csr 2962 drivers/net/ethernet/intel/e100.c pci_iounmap(pdev, nic->csr); csr 2980 drivers/net/ethernet/intel/e100.c pci_iounmap(pdev, nic->csr); csr 60 drivers/net/ethernet/microchip/lan743x_main.c return ioread32(&adapter->csr.csr_address[offset]); csr 66 drivers/net/ethernet/microchip/lan743x_main.c iowrite32(data, &adapter->csr.csr_address[offset]); csr 97 drivers/net/ethernet/microchip/lan743x_main.c struct lan743x_csr *csr = &adapter->csr; csr 103 drivers/net/ethernet/microchip/lan743x_main.c csr->csr_address = devm_ioremap(&adapter->pdev->dev, csr 105 drivers/net/ethernet/microchip/lan743x_main.c if (!csr->csr_address) { csr 110 drivers/net/ethernet/microchip/lan743x_main.c csr->id_rev = lan743x_csr_read(adapter, ID_REV); csr 111 drivers/net/ethernet/microchip/lan743x_main.c csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); csr 114 drivers/net/ethernet/microchip/lan743x_main.c csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), csr 115 drivers/net/ethernet/microchip/lan743x_main.c FPGA_REV_GET_MINOR_(csr->fpga_rev)); csr 116 drivers/net/ethernet/microchip/lan743x_main.c if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) { csr 121 drivers/net/ethernet/microchip/lan743x_main.c csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; csr 122 drivers/net/ethernet/microchip/lan743x_main.c switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { csr 124 drivers/net/ethernet/microchip/lan743x_main.c csr->flags |= LAN743X_CSR_FLAG_IS_A0; csr 125 drivers/net/ethernet/microchip/lan743x_main.c csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; csr 128 drivers/net/ethernet/microchip/lan743x_main.c csr->flags |= LAN743X_CSR_FLAG_IS_B0; csr 489 drivers/net/ethernet/microchip/lan743x_main.c if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { csr 533 drivers/net/ethernet/microchip/lan743x_main.c if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { csr 554 drivers/net/ethernet/microchip/lan743x_main.c if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { csr 586 drivers/net/ethernet/microchip/lan743x_main.c if (adapter->csr.flags & csr 630 drivers/net/ethernet/microchip/lan743x_main.c if (adapter->csr.flags & csr 1132 drivers/net/ethernet/microchip/lan743x_main.c if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) csr 1832 drivers/net/ethernet/microchip/lan743x_main.c if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) csr 1838 drivers/net/ethernet/microchip/lan743x_main.c if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { csr 2375 drivers/net/ethernet/microchip/lan743x_main.c if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { csr 2396 drivers/net/ethernet/microchip/lan743x_main.c if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) csr 2730 drivers/net/ethernet/microchip/lan743x_main.c if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) csr 706 drivers/net/ethernet/microchip/lan743x_main.h struct lan743x_csr csr; csr 454 drivers/net/ethernet/microchip/lan743x_ptp.c switch (adapter->csr.id_rev & ID_REV_ID_MASK_) { csr 157 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c void __iomem *csr; csr 278 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c if (nfp->iomem.csr) { csr 280 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c writel(newcfg, nfp->iomem.csr + xbar); csr 282 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c readl(nfp->iomem.csr + xbar); csr 630 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c nfp->iomem.csr = bar->iomem + NFP_PCIE_BAR(pf); csr 635 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c nfp->iomem.csr = bar->iomem + NFP_PCIE_BAR(0); csr 1132 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c u32 csr[3]; csr 1157 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c csr[0] = NFP_PCIE_BAR_EXPLICIT_BAR0_SignalType(sigmask) | csr 1162 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c csr[1] = NFP_PCIE_BAR_EXPLICIT_BAR1_SignalRef(signal_ref) | csr 1166 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c csr[2] = NFP_PCIE_BAR_EXPLICIT_BAR2_Target( csr 1174 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c if (nfp->iomem.csr) { csr 1175 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c writel(csr[0], nfp->iomem.csr + csr 1178 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c writel(csr[1], nfp->iomem.csr + csr 1181 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c writel(csr[2], nfp->iomem.csr + csr 1185 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c readl(nfp->iomem.csr + csr 1188 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c readl(nfp->iomem.csr + csr 1191 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c readl(nfp->iomem.csr + csr 1198 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c csr[0]); csr 1203 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c csr[1]); csr 1208 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c csr[2]); csr 494 drivers/net/ethernet/qualcomm/emac/emac-mac.c csr1 = readl(adpt->csr + EMAC_EMAC_WRAPPER_CSR1); csr 558 drivers/net/ethernet/qualcomm/emac/emac-mac.c writel_relaxed(csr1, adpt->csr + EMAC_EMAC_WRAPPER_CSR1); csr 568 drivers/net/ethernet/qualcomm/emac/emac.c adpt->csr = devm_platform_ioremap_resource(pdev, 1); csr 569 drivers/net/ethernet/qualcomm/emac/emac.c if (IS_ERR(adpt->csr)) csr 570 drivers/net/ethernet/qualcomm/emac/emac.c return PTR_ERR(adpt->csr); csr 331 drivers/net/ethernet/qualcomm/emac/emac.h void __iomem *csr; csr 2100 drivers/net/ethernet/sun/sungem.c u32 csr; csr 2110 drivers/net/ethernet/sun/sungem.c csr = WOL_WAKECSR_ENABLE; csr 2112 drivers/net/ethernet/sun/sungem.c csr |= WOL_WAKECSR_MII; csr 2113 drivers/net/ethernet/sun/sungem.c writel(csr, gp->regs + WOL_WAKECSR); csr 1215 drivers/net/wan/lmc/lmc_main.c u32 csr; csr 1230 drivers/net/wan/lmc/lmc_main.c csr = LMC_CSR_READ (sc, csr_status); csr 1235 drivers/net/wan/lmc/lmc_main.c if ( ! (csr & sc->lmc_intrmask)) { csr 1239 drivers/net/wan/lmc/lmc_main.c firstcsr = csr; csr 1242 drivers/net/wan/lmc/lmc_main.c while (csr & sc->lmc_intrmask) { csr 1248 drivers/net/wan/lmc/lmc_main.c LMC_CSR_WRITE (sc, csr_status, csr); csr 1263 drivers/net/wan/lmc/lmc_main.c if (csr & TULIP_STS_ABNRMLINTR){ csr 1268 drivers/net/wan/lmc/lmc_main.c if (csr & TULIP_STS_RXINTR){ csr 1273 drivers/net/wan/lmc/lmc_main.c if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) { csr 1350 drivers/net/wan/lmc/lmc_main.c if (csr & TULIP_STS_SYSERROR) { csr 1352 drivers/net/wan/lmc/lmc_main.c printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr); csr 1353 drivers/net/wan/lmc/lmc_main.c error = csr>>23 & 0x7; csr 1384 drivers/net/wan/lmc/lmc_main.c csr = LMC_CSR_READ (sc, csr_status); csr 1386 drivers/net/wan/lmc/lmc_main.c LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr); csr 42 drivers/net/wan/lmc/lmc_var.h #define LMC_CSR_READ(sc, csr) \ csr 43 drivers/net/wan/lmc/lmc_var.h inl((sc)->lmc_csrs.csr) csr 328 drivers/net/wireless/ath/wil6210/debugfs.c void __iomem *x = wil->csr + HOSTADDR(r.base) + delta; csr 374 drivers/net/wireless/ath/wil6210/debugfs.c wil_print_mbox_ring(s, "tx", wil->csr + HOST_MBOX + csr 376 drivers/net/wireless/ath/wil6210/debugfs.c wil_print_mbox_ring(s, "rx", wil->csr + HOST_MBOX + csr 515 drivers/net/wireless/ath/wil6210/debugfs.c wil6210_debugfs_init_offset(wil, d, (void * __force)wil->csr + off, csr 531 drivers/net/wireless/ath/wil6210/debugfs.c wil6210_debugfs_init_offset(wil, d, (void * __force)wil->csr, csr 584 drivers/net/wireless/ath/wil6210/debugfs.c wil6210_debugfs_init_offset(wil, d, (void * __force)wil->csr, csr 587 drivers/net/wireless/ath/wil6210/debugfs.c wil6210_debugfs_init_offset(wil, dtx, (void * __force)wil->csr, csr 590 drivers/net/wireless/ath/wil6210/debugfs.c wil6210_debugfs_init_offset(wil, drx, (void * __force)wil->csr, csr 2361 drivers/net/wireless/ath/wil6210/debugfs.c blob->data = (void * __force)wil->csr + HOSTADDR(map->host); csr 2511 drivers/net/wireless/ath/wil6210/debugfs.c wil6210_debugfs_init_offset(wil, dbg, (void * __force)wil->csr, csr 304 drivers/net/wireless/ath/wil6210/interrupt.c isr = wil_ioread32_and_clear(wil->csr + csr 366 drivers/net/wireless/ath/wil6210/interrupt.c isr = wil_ioread32_and_clear(wil->csr + csr 417 drivers/net/wireless/ath/wil6210/interrupt.c isr = wil_ioread32_and_clear(wil->csr + csr 463 drivers/net/wireless/ath/wil6210/interrupt.c isr = wil_ioread32_and_clear(wil->csr + csr 519 drivers/net/wireless/ath/wil6210/interrupt.c wil_memcpy_fromio_32(&wil->mbox_ctl, wil->csr + HOST_MBOX, csr 551 drivers/net/wireless/ath/wil6210/interrupt.c isr = wil_ioread32_and_clear(wil->csr + csr 696 drivers/net/wireless/ath/wil6210/interrupt.c icm_rx = wil_ioread32_and_clear(wil->csr + csr 699 drivers/net/wireless/ath/wil6210/interrupt.c icr_rx = wil_ioread32_and_clear(wil->csr + csr 704 drivers/net/wireless/ath/wil6210/interrupt.c icm_tx = wil_ioread32_and_clear(wil->csr + csr 707 drivers/net/wireless/ath/wil6210/interrupt.c icr_tx = wil_ioread32_and_clear(wil->csr + csr 713 drivers/net/wireless/ath/wil6210/interrupt.c icm_rx = wil_ioread32_and_clear(wil->csr + csr 716 drivers/net/wireless/ath/wil6210/interrupt.c icr_rx = wil_ioread32_and_clear(wil->csr + csr 721 drivers/net/wireless/ath/wil6210/interrupt.c icm_tx = wil_ioread32_and_clear(wil->csr + csr 724 drivers/net/wireless/ath/wil6210/interrupt.c icr_tx = wil_ioread32_and_clear(wil->csr + csr 730 drivers/net/wireless/ath/wil6210/interrupt.c icm_misc = wil_ioread32_and_clear(wil->csr + csr 733 drivers/net/wireless/ath/wil6210/interrupt.c icr_misc = wil_ioread32_and_clear(wil->csr + csr 857 drivers/net/wireless/ath/wil6210/interrupt.c wil_clear32(wil->csr + HOSTADDR(RGF_DMA_EP_RX_ICR) + csr 859 drivers/net/wireless/ath/wil6210/interrupt.c wil_clear32(wil->csr + HOSTADDR(RGF_DMA_EP_TX_ICR) + csr 861 drivers/net/wireless/ath/wil6210/interrupt.c wil_clear32(wil->csr + HOSTADDR(RGF_INT_GEN_RX_ICR) + csr 863 drivers/net/wireless/ath/wil6210/interrupt.c wil_clear32(wil->csr + HOSTADDR(RGF_INT_GEN_TX_ICR) + csr 865 drivers/net/wireless/ath/wil6210/interrupt.c wil_clear32(wil->csr + HOSTADDR(RGF_DMA_EP_MISC_ICR) + csr 1334 drivers/net/wireless/ath/wil6210/main.c wil_memcpy_fromio_32(&bl, wil->csr + HOSTADDR(RGF_USER_BL), csr 1423 drivers/net/wireless/ath/wil6210/main.c wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr), sizeof(mac)); csr 1433 drivers/net/wireless/ath/wil6210/main.c wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr), csr 377 drivers/net/wireless/ath/wil6210/pcie_bus.c wil->csr = pci_ioremap_bar(pdev, 0); csr 378 drivers/net/wireless/ath/wil6210/pcie_bus.c if (!wil->csr) { csr 384 drivers/net/wireless/ath/wil6210/pcie_bus.c wil_info(wil, "CSR at %pR -> 0x%p\n", &pdev->resource[0], wil->csr); csr 461 drivers/net/wireless/ath/wil6210/pcie_bus.c pci_iounmap(pdev, wil->csr); csr 477 drivers/net/wireless/ath/wil6210/pcie_bus.c void __iomem *csr = wil->csr; csr 492 drivers/net/wireless/ath/wil6210/pcie_bus.c pci_iounmap(pdev, csr); csr 936 drivers/net/wireless/ath/wil6210/wil6210.h void __iomem *csr; csr 1135 drivers/net/wireless/ath/wil6210/wil6210.h return readl(wil->csr + HOSTADDR(reg)); csr 1141 drivers/net/wireless/ath/wil6210/wil6210.h writel(val, wil->csr + HOSTADDR(reg)); csr 87 drivers/net/wireless/ath/wil6210/wil_crash_dump.c data = (void * __force)wil->csr + HOSTADDR(map->host); csr 306 drivers/net/wireless/ath/wil6210/wmi.c return wil->csr + off; csr 331 drivers/net/wireless/ath/wil6210/wmi.c return wil->csr + off; csr 1926 drivers/net/wireless/ath/wil6210/wmi.c wil_memcpy_fromio_32(&d_tail, wil->csr + HOSTADDR(r->tail), csr 81 drivers/net/wireless/intel/iwlwifi/cfg/1000.c .trans.csr = &iwl_csr_v1 csr 108 drivers/net/wireless/intel/iwlwifi/cfg/1000.c .trans.csr = &iwl_csr_v1 csr 107 drivers/net/wireless/intel/iwlwifi/cfg/2000.c .trans.csr = &iwl_csr_v1 csr 135 drivers/net/wireless/intel/iwlwifi/cfg/2000.c .trans.csr = &iwl_csr_v1 csr 157 drivers/net/wireless/intel/iwlwifi/cfg/2000.c .trans.csr = &iwl_csr_v1 csr 185 drivers/net/wireless/intel/iwlwifi/cfg/2000.c .trans.csr = &iwl_csr_v1 csr 195 drivers/net/wireless/intel/iwlwifi/cfg/22000.c .trans.csr = &iwl_csr_v1, \ csr 202 drivers/net/wireless/intel/iwlwifi/cfg/22000.c .trans.csr = &iwl_csr_v2 csr 209 drivers/net/wireless/intel/iwlwifi/cfg/22000.c .trans.csr = &iwl_csr_v1, \ csr 79 drivers/net/wireless/intel/iwlwifi/cfg/5000.c .trans.csr = &iwl_csr_v1 csr 128 drivers/net/wireless/intel/iwlwifi/cfg/5000.c .trans.csr = &iwl_csr_v1, csr 145 drivers/net/wireless/intel/iwlwifi/cfg/5000.c .trans.csr = &iwl_csr_v1 csr 128 drivers/net/wireless/intel/iwlwifi/cfg/6000.c .trans.csr = &iwl_csr_v1 csr 183 drivers/net/wireless/intel/iwlwifi/cfg/6000.c .trans.csr = &iwl_csr_v1 csr 220 drivers/net/wireless/intel/iwlwifi/cfg/6000.c .trans.csr = &iwl_csr_v1 csr 276 drivers/net/wireless/intel/iwlwifi/cfg/6000.c .trans.csr = &iwl_csr_v1 csr 310 drivers/net/wireless/intel/iwlwifi/cfg/6000.c .trans.csr = &iwl_csr_v1 csr 337 drivers/net/wireless/intel/iwlwifi/cfg/6000.c .trans.csr = &iwl_csr_v1 csr 364 drivers/net/wireless/intel/iwlwifi/cfg/6000.c .trans.csr = &iwl_csr_v1, csr 158 drivers/net/wireless/intel/iwlwifi/cfg/7000.c .trans.csr = &iwl_csr_v1 csr 155 drivers/net/wireless/intel/iwlwifi/cfg/8000.c .trans.csr = &iwl_csr_v1 csr 146 drivers/net/wireless/intel/iwlwifi/cfg/9000.c .trans.csr = &iwl_csr_v1, \ csr 352 drivers/net/wireless/intel/iwlwifi/iwl-config.h const struct iwl_csr_params *csr; csr 510 drivers/net/wireless/intel/iwlwifi/iwl-io.c BIT(cfg_trans->csr->flag_init_done)); csr 521 drivers/net/wireless/intel/iwlwifi/iwl-io.c BIT(cfg_trans->csr->flag_mac_clock_ready), csr 522 drivers/net/wireless/intel/iwlwifi/iwl-io.c BIT(cfg_trans->csr->flag_mac_clock_ready), csr 825 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c trans->trans_cfg->csr->mac_addr0_strap)); csr 828 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c trans->trans_cfg->csr->mac_addr1_strap)); csr 839 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c trans->trans_cfg->csr->mac_addr0_otp)); csr 841 drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c trans->trans_cfg->csr->mac_addr1_otp)); csr 1008 drivers/net/wireless/intel/iwlwifi/pcie/drv.c if (WARN_ONCE(!iwl_trans->trans_cfg->csr, csr 243 drivers/net/wireless/intel/iwlwifi/pcie/rx.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 136 drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c BIT(trans->trans_cfg->csr->flag_init_done)); csr 178 drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 187 drivers/net/wireless/intel/iwlwifi/pcie/trans.c iwl_set_bit(trans, trans->trans_cfg->csr->addr_sw_reset, csr 188 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_sw_reset)); csr 493 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_init_done)); csr 515 drivers/net/wireless/intel/iwlwifi/pcie/trans.c iwl_set_bit(trans, trans->trans_cfg->csr->addr_sw_reset, csr 516 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_stop_master)); csr 518 drivers/net/wireless/intel/iwlwifi/pcie/trans.c ret = iwl_poll_bit(trans, trans->trans_cfg->csr->addr_sw_reset, csr 519 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_master_dis), csr 520 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_master_dis), 100); csr 570 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_init_done)); csr 1274 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 1498 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 1500 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_init_done)); csr 1565 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 1587 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 2058 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 2083 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_val_mac_access_en), csr 2084 drivers/net/wireless/intel/iwlwifi/pcie/trans.c (BIT(trans->trans_cfg->csr->flag_mac_clock_ready) | csr 2166 drivers/net/wireless/intel/iwlwifi/pcie/trans.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 2916 drivers/net/wireless/intel/iwlwifi/pcie/trans.c DEBUGFS_WRITE_FILE_OPS(csr); csr 2933 drivers/net/wireless/intel/iwlwifi/pcie/trans.c DEBUGFS_ADD_FILE(csr, dir, 0200); csr 309 drivers/net/wireless/intel/iwlwifi/pcie/tx.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 649 drivers/net/wireless/intel/iwlwifi/pcie/tx.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 1258 drivers/net/wireless/intel/iwlwifi/pcie/tx.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 1261 drivers/net/wireless/intel/iwlwifi/pcie/tx.c BIT(trans->trans_cfg->csr->flag_val_mac_access_en), csr 1262 drivers/net/wireless/intel/iwlwifi/pcie/tx.c (BIT(trans->trans_cfg->csr->flag_mac_clock_ready) | csr 1267 drivers/net/wireless/intel/iwlwifi/pcie/tx.c BIT(trans->trans_cfg->csr->flag_mac_access_req)); csr 161 drivers/net/wireless/ralink/rt2x00/rt2400pci.c .csr = { csr 161 drivers/net/wireless/ralink/rt2x00/rt2500pci.c .csr = { csr 224 drivers/net/wireless/ralink/rt2x00/rt2500usb.c .csr = { csr 1448 drivers/net/wireless/ralink/rt2x00/rt2800lib.c .csr = { csr 821 drivers/net/wireless/ralink/rt2x00/rt2x00.h } csr; csr 495 drivers/net/wireless/ralink/rt2x00/rt2x00debug.c RT2X00DEBUGFS_OPS(csr, "0x%.8x\n", u32); csr 623 drivers/net/wireless/ralink/rt2x00/rt2x00debug.c RT2X00DEBUGFS_SPRINTF_REGISTER(csr); csr 680 drivers/net/wireless/ralink/rt2x00/rt2x00debug.c RT2X00DEBUGFS_CREATE_REGISTER_ENTRY(intf, csr); csr 51 drivers/net/wireless/ralink/rt2x00/rt2x00debug.h RT2X00DEBUGFS_REGISTER_ENTRY(csr, u32); csr 24 drivers/net/wireless/ralink/rt2x00/rt2x00mmio.h return readl(rt2x00dev->csr.base + offset); csr 31 drivers/net/wireless/ralink/rt2x00/rt2x00mmio.h memcpy_fromio(value, rt2x00dev->csr.base + offset, length); csr 38 drivers/net/wireless/ralink/rt2x00/rt2x00mmio.h writel(value, rt2x00dev->csr.base + offset); csr 46 drivers/net/wireless/ralink/rt2x00/rt2x00mmio.h __iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2); csr 33 drivers/net/wireless/ralink/rt2x00/rt2x00pci.c if (rt2x00dev->csr.base) { csr 34 drivers/net/wireless/ralink/rt2x00/rt2x00pci.c iounmap(rt2x00dev->csr.base); csr 35 drivers/net/wireless/ralink/rt2x00/rt2x00pci.c rt2x00dev->csr.base = NULL; csr 43 drivers/net/wireless/ralink/rt2x00/rt2x00pci.c rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0); csr 44 drivers/net/wireless/ralink/rt2x00/rt2x00pci.c if (!rt2x00dev->csr.base) csr 31 drivers/net/wireless/ralink/rt2x00/rt2x00soc.c iounmap(rt2x00dev->csr.base); csr 43 drivers/net/wireless/ralink/rt2x00/rt2x00soc.c rt2x00dev->csr.base = ioremap(res->start, resource_size(res)); csr 44 drivers/net/wireless/ralink/rt2x00/rt2x00soc.c if (!rt2x00dev->csr.base) csr 92 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c if (unlikely(!rt2x00dev->csr.cache || buffer_length > CSR_CACHE_SIZE)) { csr 98 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c memcpy(rt2x00dev->csr.cache, buffer, buffer_length); csr 101 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c offset, 0, rt2x00dev->csr.cache, csr 105 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c memcpy(buffer, rt2x00dev->csr.cache, buffer_length); csr 766 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c kfree(rt2x00dev->csr.cache); csr 767 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rt2x00dev->csr.cache = NULL; csr 772 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c rt2x00dev->csr.cache = kzalloc(CSR_CACHE_SIZE, GFP_KERNEL); csr 773 drivers/net/wireless/ralink/rt2x00/rt2x00usb.c if (!rt2x00dev->csr.cache) csr 199 drivers/net/wireless/ralink/rt2x00/rt61pci.c .csr = { csr 144 drivers/net/wireless/ralink/rt2x00/rt73usb.c .csr = { csr 231 drivers/pci/controller/pci-xgene.c struct resource csr; csr 238 drivers/pci/controller/pci-xgene.c ret = xgene_get_csr_resource(adev, &csr); csr 243 drivers/pci/controller/pci-xgene.c port->csr_base = devm_pci_remap_cfg_resource(dev, &csr); csr 4579 drivers/pci/pci.c u16 csr; csr 4584 drivers/pci/pci.c pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr); csr 4585 drivers/pci/pci.c if (csr & PCI_PM_CTRL_NO_SOFT_RESET) csr 4594 drivers/pci/pci.c csr &= ~PCI_PM_CTRL_STATE_MASK; csr 4595 drivers/pci/pci.c csr |= PCI_D3hot; csr 4596 drivers/pci/pci.c pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); csr 4599 drivers/pci/pci.c csr &= ~PCI_PM_CTRL_STATE_MASK; csr 4600 drivers/pci/pci.c csr |= PCI_D0; csr 4601 drivers/pci/pci.c pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); csr 2246 drivers/pci/quirks.c u8 __iomem *csr; csr 2292 drivers/pci/quirks.c csr = ioremap(pci_resource_start(dev, 0), 8); csr 2293 drivers/pci/quirks.c if (!csr) { csr 2298 drivers/pci/quirks.c cmd_hi = readb(csr + 3); csr 2301 drivers/pci/quirks.c writeb(1, csr + 3); csr 2304 drivers/pci/quirks.c iounmap(csr); csr 148 drivers/pcmcia/at91_cf.c u32 csr; csr 166 drivers/pcmcia/at91_cf.c csr = AT91_MC_SMC_DBW_8; csr 169 drivers/pcmcia/at91_cf.c csr = AT91_MC_SMC_DBW_16; csr 173 drivers/pcmcia/at91_cf.c AT91_MC_SMC_DBW, csr); csr 58 drivers/pcmcia/pxa2xx_sharpsl.c unsigned short cpr, csr; csr 66 drivers/pcmcia/pxa2xx_sharpsl.c csr = read_scoop_reg(scoop, SCOOP_CSR); csr 67 drivers/pcmcia/pxa2xx_sharpsl.c if (csr & 0x0004) { csr 75 drivers/pcmcia/pxa2xx_sharpsl.c csr |= SCOOP_DEV[skt->nr].keep_vs; csr 80 drivers/pcmcia/pxa2xx_sharpsl.c SCOOP_DEV[skt->nr].keep_vs = (csr & 0x00C0); csr 91 drivers/pcmcia/pxa2xx_sharpsl.c state->detect = (csr & 0x0004) ? 0 : 1; csr 92 drivers/pcmcia/pxa2xx_sharpsl.c state->ready = (csr & 0x0002) ? 1 : 0; csr 93 drivers/pcmcia/pxa2xx_sharpsl.c state->bvd1 = (csr & 0x0010) ? 1 : 0; csr 94 drivers/pcmcia/pxa2xx_sharpsl.c state->bvd2 = (csr & 0x0020) ? 1 : 0; csr 95 drivers/pcmcia/pxa2xx_sharpsl.c state->wrprot = (csr & 0x0008) ? 1 : 0; csr 96 drivers/pcmcia/pxa2xx_sharpsl.c state->vs_3v = (csr & 0x0040) ? 0 : 1; csr 97 drivers/pcmcia/pxa2xx_sharpsl.c state->vs_Xv = (csr & 0x0080) ? 0 : 1; csr 89 drivers/perf/xgene_pmu.c void __iomem *csr; csr 737 drivers/perf/xgene_pmu.c return readl(pmu_dev->inf->csr + PMU_PMEVCNTR0 + (4 * idx)); csr 762 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMEVCNTR0 + (4 * idx)); csr 781 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMEVTYPER0 + (4 * idx)); csr 787 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMAMR0); csr 796 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMAMR1); csr 807 drivers/perf/xgene_pmu.c val = readl(pmu_dev->inf->csr + PMU_PMCNTENSET); csr 809 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMCNTENSET); csr 817 drivers/perf/xgene_pmu.c val = readl(pmu_dev->inf->csr + PMU_PMCNTENCLR); csr 819 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMCNTENCLR); csr 827 drivers/perf/xgene_pmu.c val = readl(pmu_dev->inf->csr + PMU_PMINTENSET); csr 829 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMINTENSET); csr 837 drivers/perf/xgene_pmu.c val = readl(pmu_dev->inf->csr + PMU_PMINTENCLR); csr 839 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMINTENCLR); csr 846 drivers/perf/xgene_pmu.c val = readl(pmu_dev->inf->csr + PMU_PMCR); csr 848 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMCR); csr 855 drivers/perf/xgene_pmu.c val = readl(pmu_dev->inf->csr + PMU_PMCR); csr 857 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMCR); csr 864 drivers/perf/xgene_pmu.c val = readl(pmu_dev->inf->csr + PMU_PMCR); csr 866 drivers/perf/xgene_pmu.c writel(val, pmu_dev->inf->csr + PMU_PMCR); csr 1195 drivers/perf/xgene_pmu.c void __iomem *csr = pmu_dev->inf->csr; csr 1202 drivers/perf/xgene_pmu.c pmovsr = readl(csr + PMU_PMOVSSET) & PMU_OVERFLOW_MASK; csr 1204 drivers/perf/xgene_pmu.c pmovsr = readl(csr + PMU_PMOVSR) & PMU_OVERFLOW_MASK; csr 1211 drivers/perf/xgene_pmu.c writel(0x0, csr + PMU_PMOVSR); csr 1213 drivers/perf/xgene_pmu.c writel(pmovsr, csr + PMU_PMOVSR); csr 1215 drivers/perf/xgene_pmu.c writel(pmovsr, csr + PMU_PMOVSCLR); csr 1521 drivers/perf/xgene_pmu.c inf->csr = dev_csr; csr 1670 drivers/perf/xgene_pmu.c inf->csr = dev_csr; csr 25 drivers/power/reset/xgene-reboot.c void *csr; csr 38 drivers/power/reset/xgene-reboot.c writel(ctx->mask, ctx->csr); csr 57 drivers/power/reset/xgene-reboot.c ctx->csr = of_iomap(dev->of_node, 0); csr 58 drivers/power/reset/xgene-reboot.c if (!ctx->csr) { csr 71 drivers/power/reset/xgene-reboot.c iounmap(ctx->csr); csr 178 drivers/regulator/bcm590xx-regulator.c BCM590XX_REG_RANGES(csr, dcdc_csr_ranges), csr 909 drivers/scsi/NCR5380.c dregs->csr |= CSR_DMA_ENABLE; csr 916 drivers/scsi/NCR5380.c dregs->csr |= CSR_DMA_ENABLE; csr 1202 drivers/scsi/NCR5380.c dregs->csr |= CSR_INTR; csr 1529 drivers/scsi/NCR5380.c dregs->csr |= CSR_DMA_ENABLE; csr 1667 drivers/scsi/NCR5380.c dregs->csr |= CSR_INTR; csr 1700 drivers/scsi/NCR5380.c dregs->csr |= CSR_INTR; csr 1861 drivers/scsi/NCR5380.c dregs->csr |= CSR_DMA_ENABLE; csr 112 drivers/scsi/be2iscsi/be.h u8 __iomem *csr; csr 460 drivers/scsi/be2iscsi/be_main.c phba->ctrl.csr = addr; csr 742 drivers/scsi/be2iscsi/be_main.c isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET + csr 73 drivers/scsi/sun3_scsi.c unsigned short csr; /* control/status reg */ csr 196 drivers/scsi/sun3_scsi.c unsigned short csr = dregs->csr; csr 200 drivers/scsi/sun3_scsi.c dregs->csr &= ~CSR_DMA_ENABLE; csr 203 drivers/scsi/sun3_scsi.c if(csr & ~CSR_GOOD) { csr 204 drivers/scsi/sun3_scsi.c if (csr & CSR_DMA_BUSERR) csr 206 drivers/scsi/sun3_scsi.c if (csr & CSR_DMA_CONFLICT) csr 211 drivers/scsi/sun3_scsi.c if(csr & (CSR_SDB_INT | CSR_DMA_INT)) { csr 242 drivers/scsi/sun3_scsi.c dregs->csr &= ~CSR_FIFO; csr 243 drivers/scsi/sun3_scsi.c dregs->csr |= CSR_FIFO; csr 248 drivers/scsi/sun3_scsi.c dregs->csr |= CSR_SEND; csr 250 drivers/scsi/sun3_scsi.c dregs->csr &= ~CSR_SEND; csr 253 drivers/scsi/sun3_scsi.c dregs->csr |= CSR_PACK_ENABLE; csr 269 drivers/scsi/sun3_scsi.c dregs->csr &= ~CSR_FIFO; csr 270 drivers/scsi/sun3_scsi.c dregs->csr |= CSR_FIFO; csr 348 drivers/scsi/sun3_scsi.c unsigned short csr; csr 350 drivers/scsi/sun3_scsi.c csr = dregs->csr; csr 378 drivers/scsi/sun3_scsi.c dregs->csr &= ~CSR_DMA_ENABLE; csr 388 drivers/scsi/sun3_scsi.c if ((!write_flag) && (dregs->csr & CSR_LEFT)) { csr 396 drivers/scsi/sun3_scsi.c switch (dregs->csr & CSR_LEFT) { csr 418 drivers/scsi/sun3_scsi.c if(dregs->csr & CSR_FIFO_EMPTY) csr 464 drivers/scsi/sun3_scsi.c dregs->csr &= ~CSR_SEND; csr 469 drivers/scsi/sun3_scsi.c dregs->csr &= ~CSR_SEND; csr 472 drivers/scsi/sun3_scsi.c dregs->csr &= ~CSR_FIFO; csr 473 drivers/scsi/sun3_scsi.c dregs->csr |= CSR_FIFO; csr 548 drivers/scsi/sun3_scsi.c oldcsr = dregs->csr; csr 549 drivers/scsi/sun3_scsi.c dregs->csr = 0; csr 551 drivers/scsi/sun3_scsi.c if (dregs->csr == 0x1400) csr 554 drivers/scsi/sun3_scsi.c dregs->csr = oldcsr; csr 604 drivers/scsi/sun3_scsi.c dregs->csr = 0; csr 606 drivers/scsi/sun3_scsi.c dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; csr 86 drivers/scsi/sun3x_esp.c u32 csr; csr 89 drivers/scsi/sun3x_esp.c csr = dma_read32(DMA_CSR); csr 90 drivers/scsi/sun3x_esp.c if (!(csr & DMA_FIFO_ISDRAIN)) csr 93 drivers/scsi/sun3x_esp.c dma_write32(csr | DMA_FIFO_STDRAIN, DMA_CSR); csr 131 drivers/scsi/sun3x_esp.c u32 csr; csr 137 drivers/scsi/sun3x_esp.c csr = dma_read32(DMA_CSR); csr 138 drivers/scsi/sun3x_esp.c csr |= DMA_ENABLE; csr 140 drivers/scsi/sun3x_esp.c csr |= DMA_ST_WRITE; csr 142 drivers/scsi/sun3x_esp.c csr &= ~DMA_ST_WRITE; csr 143 drivers/scsi/sun3x_esp.c dma_write32(csr, DMA_CSR); csr 151 drivers/scsi/sun3x_esp.c u32 csr = dma_read32(DMA_CSR); csr 153 drivers/scsi/sun3x_esp.c if (csr & DMA_HNDL_ERROR) csr 322 drivers/scsi/sun_esp.c u32 csr; csr 328 drivers/scsi/sun_esp.c csr = dma_read32(DMA_CSR); csr 329 drivers/scsi/sun_esp.c if (!(csr & DMA_FIFO_ISDRAIN)) csr 333 drivers/scsi/sun_esp.c dma_write32(csr | DMA_FIFO_STDRAIN, DMA_CSR); csr 388 drivers/scsi/sun_esp.c u32 csr; csr 400 drivers/scsi/sun_esp.c csr = esp->prev_hme_dmacsr; csr 401 drivers/scsi/sun_esp.c csr |= DMA_SCSI_DISAB | DMA_ENABLE; csr 403 drivers/scsi/sun_esp.c csr |= DMA_ST_WRITE; csr 405 drivers/scsi/sun_esp.c csr &= ~DMA_ST_WRITE; csr 406 drivers/scsi/sun_esp.c esp->prev_hme_dmacsr = csr; csr 410 drivers/scsi/sun_esp.c dma_write32(csr, DMA_CSR); csr 412 drivers/scsi/sun_esp.c csr = dma_read32(DMA_CSR); csr 413 drivers/scsi/sun_esp.c csr |= DMA_ENABLE; csr 415 drivers/scsi/sun_esp.c csr |= DMA_ST_WRITE; csr 417 drivers/scsi/sun_esp.c csr &= ~DMA_ST_WRITE; csr 418 drivers/scsi/sun_esp.c dma_write32(csr, DMA_CSR); csr 432 drivers/scsi/sun_esp.c u32 csr = dma_read32(DMA_CSR); csr 434 drivers/scsi/sun_esp.c if (csr & DMA_HNDL_ERROR) csr 312 drivers/spi/spi-atmel.c u32 csr; csr 357 drivers/spi/spi-atmel.c spi_writel(as, CSR0 + 4 * spi->chip_select, asd->csr); csr 361 drivers/spi/spi-atmel.c spi_writel(as, CSR0, asd->csr); csr 381 drivers/spi/spi-atmel.c u32 csr; csr 385 drivers/spi/spi-atmel.c csr = spi_readl(as, CSR0 + 4 * i); csr 386 drivers/spi/spi-atmel.c if ((csr ^ cpol) & SPI_BIT(CPOL)) csr 388 drivers/spi/spi-atmel.c csr ^ SPI_BIT(CPOL)); csr 844 drivers/spi/spi-atmel.c u32 scbr, csr; csr 874 drivers/spi/spi-atmel.c csr = spi_readl(as, CSR0 + 4 * spi->chip_select); csr 875 drivers/spi/spi-atmel.c csr = SPI_BFINS(SCBR, scbr, csr); csr 876 drivers/spi/spi-atmel.c spi_writel(as, CSR0 + 4 * spi->chip_select, csr); csr 1179 drivers/spi/spi-atmel.c u32 csr; csr 1190 drivers/spi/spi-atmel.c csr = SPI_BF(BITS, bits - 8); csr 1192 drivers/spi/spi-atmel.c csr |= SPI_BIT(CPOL); csr 1194 drivers/spi/spi-atmel.c csr |= SPI_BIT(NCPHA); csr 1196 drivers/spi/spi-atmel.c csr |= SPI_BIT(CSAAT); csr 1200 drivers/spi/spi-atmel.c csr |= SPI_BF(DLYBS, 0); csr 1205 drivers/spi/spi-atmel.c csr |= SPI_BF(DLYBCT, csr 1232 drivers/spi/spi-atmel.c asd->csr = csr; csr 1236 drivers/spi/spi-atmel.c bits, spi->mode, spi->chip_select, csr); csr 1239 drivers/spi/spi-atmel.c spi_writel(as, CSR0 + 4 * spi->chip_select, csr); csr 1265 drivers/spi/spi-atmel.c bits = (asd->csr >> 4) & 0xf; csr 93 drivers/staging/isdn/avm/avmcard.h volatile u32 csr; csr 220 drivers/staging/isdn/avm/b1dma.c card->csr = 0x0; csr 221 drivers/staging/isdn/avm/b1dma.c b1dma_writel(card, card->csr, AMCC_INTCSR); csr 253 drivers/staging/isdn/avm/b1dma.c card->csr = 0x0; csr 254 drivers/staging/isdn/avm/b1dma.c b1dma_writel(card, card->csr, AMCC_INTCSR); csr 358 drivers/staging/isdn/avm/b1dma.c if (!(card->csr & EN_TX_TC_INT)) { csr 360 drivers/staging/isdn/avm/b1dma.c b1dma_writel(card, card->csr, AMCC_INTCSR); csr 418 drivers/staging/isdn/avm/b1dma.c card->csr |= EN_TX_TC_INT; csr 597 drivers/staging/isdn/avm/b1dma.c newcsr = card->csr | (status & ALL_INT); csr 630 drivers/staging/isdn/avm/b1dma.c card->csr &= ~EN_TX_TC_INT; csr 634 drivers/staging/isdn/avm/b1dma.c b1dma_writel(card, card->csr, AMCC_INTCSR); csr 734 drivers/staging/isdn/avm/b1dma.c card->csr = AVM_FLAG; csr 735 drivers/staging/isdn/avm/b1dma.c b1dma_writel(card, card->csr, AMCC_INTCSR); csr 745 drivers/staging/isdn/avm/b1dma.c card->csr |= EN_RX_TC_INT; csr 746 drivers/staging/isdn/avm/b1dma.c b1dma_writel(card, card->csr, AMCC_INTCSR); csr 868 drivers/staging/isdn/avm/b1dma.c u32 txoff, txlen, rxoff, rxlen, csr; csr 931 drivers/staging/isdn/avm/b1dma.c csr = b1dma_readl(card, AMCC_INTCSR); csr 935 drivers/staging/isdn/avm/b1dma.c seq_printf(m, "%-16s 0x%lx\n", "csr (cached)", (unsigned long)card->csr); csr 936 drivers/staging/isdn/avm/b1dma.c seq_printf(m, "%-16s 0x%lx\n", "csr", (unsigned long)csr); csr 420 drivers/staging/isdn/avm/c4.c if (card->csr & DBELL_DOWN_ARM) { /* tx busy */ csr 471 drivers/staging/isdn/avm/c4.c card->csr |= DBELL_DOWN_ARM; csr 710 drivers/staging/isdn/avm/c4.c card->csr &= ~DBELL_DOWN_ARM; csr 712 drivers/staging/isdn/avm/c4.c } else if (card->csr & DBELL_DOWN_HOST) { csr 714 drivers/staging/isdn/avm/c4.c card->csr &= ~DBELL_DOWN_ARM; csr 868 drivers/staging/isdn/avm/c4.c card->csr = 0; csr 539 drivers/tty/ipwireless/hardware.c unsigned short csr = readw(&hw->memregs_CCR->reg_config_and_status); csr 541 drivers/tty/ipwireless/hardware.c csr |= 1; csr 542 drivers/tty/ipwireless/hardware.c writew(csr, &hw->memregs_CCR->reg_config_and_status); csr 1096 drivers/tty/ipwireless/hardware.c unsigned short csr = readw(&hw->memregs_CCR->reg_config_and_status); csr 1098 drivers/tty/ipwireless/hardware.c csr &= 0xfffd; csr 1099 drivers/tty/ipwireless/hardware.c writew(csr, &hw->memregs_CCR->reg_config_and_status); csr 812 drivers/tty/serial/dz.c unsigned short csr, tcr, trdy, mask; csr 816 drivers/tty/serial/dz.c csr = dz_in(dport, DZ_CSR); csr 817 drivers/tty/serial/dz.c dz_out(dport, DZ_CSR, csr & ~DZ_TIE); csr 842 drivers/tty/serial/dz.c dz_out(dport, DZ_CSR, csr); csr 123 drivers/tty/serial/sb1250-duart.c void __iomem *csr = sport->port.membase + reg; csr 125 drivers/tty/serial/sb1250-duart.c return __raw_readq(csr); csr 130 drivers/tty/serial/sb1250-duart.c void __iomem *csr = sport->memctrl + reg; csr 132 drivers/tty/serial/sb1250-duart.c return __raw_readq(csr); csr 137 drivers/tty/serial/sb1250-duart.c void __iomem *csr = sport->port.membase + reg; csr 139 drivers/tty/serial/sb1250-duart.c __raw_writeq(value, csr); csr 144 drivers/tty/serial/sb1250-duart.c void __iomem *csr = sport->memctrl + reg; csr 146 drivers/tty/serial/sb1250-duart.c __raw_writeq(value, csr); csr 271 drivers/tty/serial/sccnxp.c u8 csr; csr 312 drivers/tty/serial/sccnxp.c u8 i, acr = 0, csr = 0, mr0 = 0; csr 319 drivers/tty/serial/sccnxp.c csr = CSR_TIMER_MODE; csr 334 drivers/tty/serial/sccnxp.c csr = baud_std[i].csr; csr 349 drivers/tty/serial/sccnxp.c sccnxp_port_write(port, SCCNXP_CSR_REG, (csr << 4) | csr); csr 548 drivers/usb/gadget/udc/amd5536udc.h struct udc_csrs __iomem *csr; csr 134 drivers/usb/gadget/udc/amd5536udc_pci.c dev->csr = dev->virt_addr + UDC_CSR_ADDR; csr 111 drivers/usb/gadget/udc/at91_udc.c u32 csr; csr 118 drivers/usb/gadget/udc/at91_udc.c csr = __raw_readl(ep->creg); csr 132 drivers/usb/gadget/udc/at91_udc.c csr, csr 133 drivers/usb/gadget/udc/at91_udc.c (csr & 0x07ff0000) >> 16, csr 134 drivers/usb/gadget/udc/at91_udc.c (csr & (1 << 15)) ? "enabled" : "disabled", csr 135 drivers/usb/gadget/udc/at91_udc.c (csr & (1 << 11)) ? "DATA1" : "DATA0", csr 136 drivers/usb/gadget/udc/at91_udc.c types[(csr & 0x700) >> 8], csr 139 drivers/usb/gadget/udc/at91_udc.c (!(csr & 0x700)) csr 140 drivers/usb/gadget/udc/at91_udc.c ? ((csr & (1 << 7)) ? " IN" : " OUT") csr 142 drivers/usb/gadget/udc/at91_udc.c (csr & (1 << 6)) ? " rxdatabk1" : "", csr 143 drivers/usb/gadget/udc/at91_udc.c (csr & (1 << 5)) ? " forcestall" : "", csr 144 drivers/usb/gadget/udc/at91_udc.c (csr & (1 << 4)) ? " txpktrdy" : "", csr 146 drivers/usb/gadget/udc/at91_udc.c (csr & (1 << 3)) ? " stallsent" : "", csr 147 drivers/usb/gadget/udc/at91_udc.c (csr & (1 << 2)) ? " rxsetup" : "", csr 148 drivers/usb/gadget/udc/at91_udc.c (csr & (1 << 1)) ? " rxdatabk0" : "", csr 149 drivers/usb/gadget/udc/at91_udc.c (csr & (1 << 0)) ? " txcomp" : ""); csr 314 drivers/usb/gadget/udc/at91_udc.c u32 csr; csr 326 drivers/usb/gadget/udc/at91_udc.c csr = __raw_readl(creg); csr 327 drivers/usb/gadget/udc/at91_udc.c if ((csr & RX_DATA_READY) == 0) csr 330 drivers/usb/gadget/udc/at91_udc.c count = (csr & AT91_UDP_RXBYTECNT) >> 16; csr 341 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 344 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); csr 347 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); csr 351 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); csr 352 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 374 drivers/usb/gadget/udc/at91_udc.c csr = __raw_readl(creg); csr 388 drivers/usb/gadget/udc/at91_udc.c u32 csr = __raw_readl(creg); csr 405 drivers/usb/gadget/udc/at91_udc.c if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) { csr 406 drivers/usb/gadget/udc/at91_udc.c if (csr & AT91_UDP_TXCOMP) { csr 407 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 408 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_TXCOMP); csr 409 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 410 drivers/usb/gadget/udc/at91_udc.c csr = __raw_readl(creg); csr 412 drivers/usb/gadget/udc/at91_udc.c if (csr & AT91_UDP_TXPKTRDY) csr 441 drivers/usb/gadget/udc/at91_udc.c csr &= ~SET_FX; csr 442 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX | AT91_UDP_TXPKTRDY; csr 443 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 739 drivers/usb/gadget/udc/at91_udc.c u32 csr; csr 749 drivers/usb/gadget/udc/at91_udc.c csr = __raw_readl(creg); csr 756 drivers/usb/gadget/udc/at91_udc.c if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0)) csr 759 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 760 drivers/usb/gadget/udc/at91_udc.c csr &= ~SET_FX; csr 762 drivers/usb/gadget/udc/at91_udc.c csr |= AT91_UDP_FORCESTALL; csr 767 drivers/usb/gadget/udc/at91_udc.c csr &= ~AT91_UDP_FORCESTALL; csr 769 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 1007 drivers/usb/gadget/udc/at91_udc.c u32 csr = __raw_readl(creg); csr 1016 drivers/usb/gadget/udc/at91_udc.c if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { csr 1017 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 1018 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); csr 1019 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 1025 drivers/usb/gadget/udc/at91_udc.c if (csr & AT91_UDP_STALLSENT) { csr 1029 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 1030 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_STALLSENT); csr 1031 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 1032 drivers/usb/gadget/udc/at91_udc.c csr = __raw_readl(creg); csr 1034 drivers/usb/gadget/udc/at91_udc.c if (req && (csr & RX_DATA_READY)) csr 1045 drivers/usb/gadget/udc/at91_udc.c static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) csr 1055 drivers/usb/gadget/udc/at91_udc.c rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; csr 1060 drivers/usb/gadget/udc/at91_udc.c csr |= AT91_UDP_DIR; csr 1063 drivers/usb/gadget/udc/at91_udc.c csr &= ~AT91_UDP_DIR; csr 1068 drivers/usb/gadget/udc/at91_udc.c ERR("SETUP len %d, csr %08x\n", rxcount, csr); csr 1071 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 1072 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_RXSETUP); csr 1073 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 1093 drivers/usb/gadget/udc/at91_udc.c csr = __raw_readl(creg); csr 1094 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 1095 drivers/usb/gadget/udc/at91_udc.c csr &= ~SET_FX; csr 1100 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); csr 1256 drivers/usb/gadget/udc/at91_udc.c csr |= AT91_UDP_FORCESTALL; csr 1257 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 1266 drivers/usb/gadget/udc/at91_udc.c csr |= AT91_UDP_TXPKTRDY; csr 1267 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 1275 drivers/usb/gadget/udc/at91_udc.c u32 csr = __raw_readl(creg); csr 1278 drivers/usb/gadget/udc/at91_udc.c if (unlikely(csr & AT91_UDP_STALLSENT)) { csr 1281 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 1282 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); csr 1283 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 1285 drivers/usb/gadget/udc/at91_udc.c csr = __raw_readl(creg); csr 1287 drivers/usb/gadget/udc/at91_udc.c if (csr & AT91_UDP_RXSETUP) { csr 1290 drivers/usb/gadget/udc/at91_udc.c handle_setup(udc, ep0, csr); csr 1300 drivers/usb/gadget/udc/at91_udc.c if (csr & AT91_UDP_TXCOMP) { csr 1301 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 1302 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_TXCOMP); csr 1319 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 1343 drivers/usb/gadget/udc/at91_udc.c else if (csr & AT91_UDP_RX_DATA_BK0) { csr 1344 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX; csr 1345 drivers/usb/gadget/udc/at91_udc.c csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); csr 1353 drivers/usb/gadget/udc/at91_udc.c csr = __raw_readl(creg); csr 1354 drivers/usb/gadget/udc/at91_udc.c csr &= ~SET_FX; csr 1355 drivers/usb/gadget/udc/at91_udc.c csr |= CLR_FX | AT91_UDP_TXPKTRDY; csr 1356 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 1378 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr | AT91_UDP_FORCESTALL, creg); csr 1385 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); csr 378 drivers/usb/gadget/udc/s3c-hsudc.c u32 csr, offset; csr 385 drivers/usb/gadget/udc/s3c-hsudc.c csr = readl(hsudc->regs + offset); csr 386 drivers/usb/gadget/udc/s3c-hsudc.c if (!(csr & S3C_ESR_RX_SUCCESS)) csr 394 drivers/usb/gadget/udc/s3c-hsudc.c rlen = (csr & S3C_ESR_LWO) ? (rcnt * 2 - 1) : (rcnt * 2); csr 431 drivers/usb/gadget/udc/s3c-hsudc.c u32 csr; csr 433 drivers/usb/gadget/udc/s3c-hsudc.c csr = readl(hsudc->regs + S3C_ESR); csr 434 drivers/usb/gadget/udc/s3c-hsudc.c if (csr & S3C_ESR_STALL) { csr 439 drivers/usb/gadget/udc/s3c-hsudc.c if (csr & S3C_ESR_TX_SUCCESS) { csr 447 drivers/usb/gadget/udc/s3c-hsudc.c (csr & S3C_ESR_PSIF_TWO)) csr 464 drivers/usb/gadget/udc/s3c-hsudc.c u32 csr; csr 466 drivers/usb/gadget/udc/s3c-hsudc.c csr = readl(hsudc->regs + S3C_ESR); csr 467 drivers/usb/gadget/udc/s3c-hsudc.c if (csr & S3C_ESR_STALL) { csr 472 drivers/usb/gadget/udc/s3c-hsudc.c if (csr & S3C_ESR_FLUSH) { csr 477 drivers/usb/gadget/udc/s3c-hsudc.c if (csr & S3C_ESR_RX_SUCCESS) { csr 484 drivers/usb/gadget/udc/s3c-hsudc.c (csr & S3C_ESR_PSIF_TWO)) csr 695 drivers/usb/gadget/udc/s3c-hsudc.c u32 csr = readl(hsudc->regs + S3C_EP0SR); csr 698 drivers/usb/gadget/udc/s3c-hsudc.c if (csr & S3C_EP0SR_STALL) { csr 712 drivers/usb/gadget/udc/s3c-hsudc.c if (csr & S3C_EP0SR_TX_SUCCESS) { csr 724 drivers/usb/gadget/udc/s3c-hsudc.c if (csr & S3C_EP0SR_RX_SUCCESS) { csr 871 drivers/usb/gadget/udc/s3c-hsudc.c u32 csr; csr 899 drivers/usb/gadget/udc/s3c-hsudc.c csr = readl(hsudc->regs + offset); csr 900 drivers/usb/gadget/udc/s3c-hsudc.c if (!(csr & S3C_ESR_TX_SUCCESS) && csr 904 drivers/usb/gadget/udc/s3c-hsudc.c csr = readl(hsudc->regs + offset); csr 905 drivers/usb/gadget/udc/s3c-hsudc.c if ((csr & S3C_ESR_RX_SUCCESS) csr 395 drivers/usb/gadget/udc/snps_udc_core.c tmp = readl(&dev->csr->ne[ep->num - UDC_CSR_EP_OUT_IX_OFS]); csr 398 drivers/usb/gadget/udc/snps_udc_core.c writel(tmp, &dev->csr->ne[ep->num - UDC_CSR_EP_OUT_IX_OFS]); csr 411 drivers/usb/gadget/udc/snps_udc_core.c tmp = readl(&dev->csr->ne[udc_csr_epix]); csr 427 drivers/usb/gadget/udc/snps_udc_core.c writel(tmp, &dev->csr->ne[udc_csr_epix]); csr 1891 drivers/usb/gadget/udc/snps_udc_core.c tmp = readl(&dev->csr->ne[0]); csr 1898 drivers/usb/gadget/udc/snps_udc_core.c writel(tmp, &dev->csr->ne[0]); csr 2808 drivers/usb/gadget/udc/snps_udc_core.c tmp = readl(&dev->csr->ne[udc_csr_epix]); csr 2813 drivers/usb/gadget/udc/snps_udc_core.c writel(tmp, &dev->csr->ne[udc_csr_epix]); csr 2863 drivers/usb/gadget/udc/snps_udc_core.c tmp = readl(&dev->csr->ne[udc_csr_epix]); csr 2872 drivers/usb/gadget/udc/snps_udc_core.c writel(tmp, &dev->csr->ne[udc_csr_epix]); csr 121 drivers/usb/gadget/udc/snps_udc_plat.c udc->csr = udc->virt_addr + UDC_CSR_ADDR; csr 221 drivers/usb/mtu3/mtu3_core.c u32 csr; csr 224 drivers/usb/mtu3/mtu3_core.c csr = mtu3_readl(mbase, MU3D_EP_TXCR0(epnum)) & TX_W1C_BITS; csr 226 drivers/usb/mtu3/mtu3_core.c csr |= TX_SENDSTALL; csr 228 drivers/usb/mtu3/mtu3_core.c csr = (csr & (~TX_SENDSTALL)) | TX_SENTSTALL; csr 229 drivers/usb/mtu3/mtu3_core.c mtu3_writel(mbase, MU3D_EP_TXCR0(epnum), csr); csr 231 drivers/usb/mtu3/mtu3_core.c csr = mtu3_readl(mbase, MU3D_EP_RXCR0(epnum)) & RX_W1C_BITS; csr 233 drivers/usb/mtu3/mtu3_core.c csr |= RX_SENDSTALL; csr 235 drivers/usb/mtu3/mtu3_core.c csr = (csr & (~RX_SENDSTALL)) | RX_SENTSTALL; csr 236 drivers/usb/mtu3/mtu3_core.c mtu3_writel(mbase, MU3D_EP_RXCR0(epnum), csr); csr 480 drivers/usb/mtu3/mtu3_core.c u32 csr; csr 484 drivers/usb/mtu3/mtu3_core.c csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR); csr 485 drivers/usb/mtu3/mtu3_core.c csr &= ~EP0_MAXPKTSZ_MSK; csr 486 drivers/usb/mtu3/mtu3_core.c csr |= EP0_MAXPKTSZ(maxpacket); csr 487 drivers/usb/mtu3/mtu3_core.c csr &= EP0_W1C_BITS; csr 488 drivers/usb/mtu3/mtu3_core.c mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr); csr 139 drivers/usb/mtu3/mtu3_gadget_ep0.c u32 csr; csr 142 drivers/usb/mtu3/mtu3_gadget_ep0.c csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; csr 144 drivers/usb/mtu3/mtu3_gadget_ep0.c csr |= EP0_SENDSTALL | pktrdy; csr 146 drivers/usb/mtu3/mtu3_gadget_ep0.c csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL; csr 147 drivers/usb/mtu3/mtu3_gadget_ep0.c mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr); csr 507 drivers/usb/mtu3/mtu3_gadget_ep0.c u32 csr; csr 512 drivers/usb/mtu3/mtu3_gadget_ep0.c csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; csr 529 drivers/usb/mtu3/mtu3_gadget_ep0.c csr |= EP0_RXPKTRDY; csr 537 drivers/usb/mtu3/mtu3_gadget_ep0.c csr |= EP0_DATAEND; csr 542 drivers/usb/mtu3/mtu3_gadget_ep0.c csr |= EP0_RXPKTRDY | EP0_SENDSTALL; csr 546 drivers/usb/mtu3/mtu3_gadget_ep0.c mtu3_writel(mbase, U3D_EP0CSR, csr); csr 559 drivers/usb/mtu3/mtu3_gadget_ep0.c u32 csr; csr 588 drivers/usb/mtu3/mtu3_gadget_ep0.c csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; csr 589 drivers/usb/mtu3/mtu3_gadget_ep0.c mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr | EP0_TXPKTRDY); csr 599 drivers/usb/mtu3/mtu3_gadget_ep0.c u32 csr; csr 601 drivers/usb/mtu3/mtu3_gadget_ep0.c csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; csr 620 drivers/usb/mtu3/mtu3_gadget_ep0.c csr | EP0_SETUPPKTRDY | EP0_DPHTX); csr 624 drivers/usb/mtu3/mtu3_gadget_ep0.c (csr | EP0_SETUPPKTRDY) & (~EP0_DPHTX)); csr 690 drivers/usb/mtu3/mtu3_gadget_ep0.c u32 csr; csr 705 drivers/usb/mtu3/mtu3_gadget_ep0.c csr = mtu3_readl(mbase, U3D_EP0CSR); csr 707 drivers/usb/mtu3/mtu3_gadget_ep0.c dev_dbg(mtu->dev, "%s csr=0x%x\n", __func__, csr); csr 710 drivers/usb/mtu3/mtu3_gadget_ep0.c if (csr & EP0_SENTSTALL) { csr 712 drivers/usb/mtu3/mtu3_gadget_ep0.c csr = mtu3_readl(mbase, U3D_EP0CSR); csr 721 drivers/usb/mtu3/mtu3_gadget_ep0.c if ((csr & EP0_FIFOFULL) == 0) { csr 728 drivers/usb/mtu3/mtu3_gadget_ep0.c if (csr & EP0_RXPKTRDY) { csr 735 drivers/usb/mtu3/mtu3_gadget_ep0.c (csr & EP0_W1C_BITS) | EP0_DATAEND); csr 746 drivers/usb/mtu3/mtu3_gadget_ep0.c if (!(csr & EP0_SETUPPKTRDY)) csr 805 drivers/usb/mtu3/mtu3_gadget_ep0.c u32 csr; csr 808 drivers/usb/mtu3/mtu3_gadget_ep0.c csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; csr 809 drivers/usb/mtu3/mtu3_gadget_ep0.c csr |= EP0_SETUPPKTRDY | EP0_DATAEND; csr 810 drivers/usb/mtu3/mtu3_gadget_ep0.c mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr); csr 1087 drivers/usb/musb/cppi_dma.c int csr; csr 1101 drivers/usb/musb/cppi_dma.c csr = musb_readw(regs, MUSB_RXCSR); csr 1102 drivers/usb/musb/cppi_dma.c if (csr & MUSB_RXCSR_DMAENAB) { csr 1111 drivers/usb/musb/cppi_dma.c csr); csr 1116 drivers/usb/musb/cppi_dma.c int csr; csr 1123 drivers/usb/musb/cppi_dma.c csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR); csr 1126 drivers/usb/musb/cppi_dma.c && !(csr & MUSB_RXCSR_H_REQPKT)) { csr 1127 drivers/usb/musb/cppi_dma.c csr |= MUSB_RXCSR_H_REQPKT; csr 1129 drivers/usb/musb/cppi_dma.c MUSB_RXCSR_H_WZC_BITS | csr); csr 1130 drivers/usb/musb/cppi_dma.c csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR); csr 1461 drivers/usb/musb/cppi_dma.c u16 csr; csr 1478 drivers/usb/musb/cppi_dma.c csr = musb_readw(regs, MUSB_RXCSR); csr 1482 drivers/usb/musb/cppi_dma.c csr |= MUSB_RXCSR_H_WZC_BITS; csr 1483 drivers/usb/musb/cppi_dma.c csr &= ~MUSB_RXCSR_H_REQPKT; csr 1485 drivers/usb/musb/cppi_dma.c csr |= MUSB_RXCSR_P_WZC_BITS; csr 1488 drivers/usb/musb/cppi_dma.c csr &= ~(MUSB_RXCSR_DMAENAB); csr 1489 drivers/usb/musb/cppi_dma.c musb_writew(regs, MUSB_RXCSR, csr); csr 1490 drivers/usb/musb/cppi_dma.c csr = musb_readw(regs, MUSB_RXCSR); csr 56 drivers/usb/musb/musb_cppi41.c u16 csr; csr 64 drivers/usb/musb/musb_cppi41.c csr = musb_readw(cppi41_channel->hw_ep->regs, MUSB_RXCSR); csr 65 drivers/usb/musb/musb_cppi41.c toggle = csr & MUSB_RXCSR_H_DATATOGGLE ? 1 : 0; csr 74 drivers/usb/musb/musb_cppi41.c u16 csr; csr 83 drivers/usb/musb/musb_cppi41.c csr = musb_readw(hw_ep->regs, MUSB_RXCSR); csr 84 drivers/usb/musb/musb_cppi41.c toggle = csr & MUSB_RXCSR_H_DATATOGGLE ? 1 : 0; csr 92 drivers/usb/musb/musb_cppi41.c csr |= MUSB_RXCSR_H_DATATOGGLE | MUSB_RXCSR_H_WR_DATATOGGLE; csr 93 drivers/usb/musb/musb_cppi41.c musb_writew(cppi41_channel->hw_ep->regs, MUSB_RXCSR, csr); csr 105 drivers/usb/musb/musb_cppi41.c u16 csr; csr 108 drivers/usb/musb/musb_cppi41.c csr = musb_readw(epio, MUSB_TXCSR); csr 109 drivers/usb/musb/musb_cppi41.c if (csr & MUSB_TXCSR_TXPKTRDY) csr 122 drivers/usb/musb/musb_cppi41.c u16 csr; csr 140 drivers/usb/musb/musb_cppi41.c csr = MUSB_TXCSR_MODE | MUSB_TXCSR_TXPKTRDY; csr 141 drivers/usb/musb/musb_cppi41.c musb_writew(epio, MUSB_TXCSR, csr); csr 178 drivers/usb/musb/musb_cppi41.c csr = musb_readw(epio, MUSB_RXCSR); csr 179 drivers/usb/musb/musb_cppi41.c csr |= MUSB_RXCSR_H_REQPKT; csr 180 drivers/usb/musb/musb_cppi41.c musb_writew(epio, MUSB_RXCSR, csr); csr 582 drivers/usb/musb/musb_cppi41.c u16 csr; csr 592 drivers/usb/musb/musb_cppi41.c csr = musb_readw(epio, MUSB_TXCSR); csr 593 drivers/usb/musb/musb_cppi41.c csr &= ~MUSB_TXCSR_DMAENAB; csr 594 drivers/usb/musb/musb_cppi41.c musb_writew(epio, MUSB_TXCSR, csr); csr 601 drivers/usb/musb/musb_cppi41.c csr = musb_readw(epio, MUSB_RXCSR); csr 602 drivers/usb/musb/musb_cppi41.c csr &= ~(MUSB_RXCSR_H_REQPKT | MUSB_RXCSR_DMAENAB); csr 603 drivers/usb/musb/musb_cppi41.c musb_writew(epio, MUSB_RXCSR, csr); csr 608 drivers/usb/musb/musb_cppi41.c csr = musb_readw(epio, MUSB_RXCSR); csr 609 drivers/usb/musb/musb_cppi41.c if (csr & MUSB_RXCSR_RXPKTRDY) { csr 610 drivers/usb/musb/musb_cppi41.c csr |= MUSB_RXCSR_FLUSHFIFO; csr 611 drivers/usb/musb/musb_cppi41.c musb_writew(epio, MUSB_RXCSR, csr); csr 612 drivers/usb/musb/musb_cppi41.c musb_writew(epio, MUSB_RXCSR, csr); csr 634 drivers/usb/musb/musb_cppi41.c csr = musb_readw(epio, MUSB_TXCSR); csr 635 drivers/usb/musb/musb_cppi41.c if (csr & MUSB_TXCSR_TXPKTRDY) { csr 636 drivers/usb/musb/musb_cppi41.c csr |= MUSB_TXCSR_FLUSHFIFO; csr 637 drivers/usb/musb/musb_cppi41.c musb_writew(epio, MUSB_TXCSR, csr); csr 229 drivers/usb/musb/musb_gadget.c u16 fifo_count = 0, csr; csr 248 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_TXCSR); csr 254 drivers/usb/musb/musb_gadget.c if (csr & MUSB_TXCSR_TXPKTRDY) { csr 256 drivers/usb/musb/musb_gadget.c musb_ep->end_point.name, csr); csr 260 drivers/usb/musb/musb_gadget.c if (csr & MUSB_TXCSR_P_SENDSTALL) { csr 262 drivers/usb/musb/musb_gadget.c musb_ep->end_point.name, csr); csr 268 drivers/usb/musb/musb_gadget.c csr); csr 301 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_TXCSR_AUTOSET csr 303 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr csr 305 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_TXCSR_DMAMODE; csr 306 drivers/usb/musb/musb_gadget.c csr |= (MUSB_TXCSR_DMAENAB | csr 310 drivers/usb/musb/musb_gadget.c csr |= (MUSB_TXCSR_DMAENAB csr 325 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_AUTOSET; csr 327 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_TXCSR_P_UNDERRUN; csr 329 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr); csr 335 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY); csr 336 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_DMAENAB | MUSB_TXCSR_DMAMODE | csr 339 drivers/usb/musb/musb_gadget.c ~MUSB_TXCSR_P_UNDERRUN) | csr); csr 342 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_TXCSR); csr 365 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_TXCSR_DMAENAB; csr 366 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr); csr 388 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_TXPKTRDY; csr 389 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_TXCSR_P_UNDERRUN; csr 390 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr); csr 408 drivers/usb/musb/musb_gadget.c u16 csr; csr 420 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_TXCSR); csr 421 drivers/usb/musb/musb_gadget.c musb_dbg(musb, "<== %s, txcsr %04x", musb_ep->end_point.name, csr); csr 429 drivers/usb/musb/musb_gadget.c if (csr & MUSB_TXCSR_P_SENTSTALL) { csr 430 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_P_WZC_BITS; csr 431 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_TXCSR_P_SENTSTALL; csr 432 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr); csr 436 drivers/usb/musb/musb_gadget.c if (csr & MUSB_TXCSR_P_UNDERRUN) { csr 438 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_P_WZC_BITS; csr 439 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY); csr 440 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr); csr 458 drivers/usb/musb/musb_gadget.c if (dma && (csr & MUSB_TXCSR_DMAENAB)) { csr 459 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_P_WZC_BITS; csr 460 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_TXCSR_DMAENAB | MUSB_TXCSR_P_UNDERRUN | csr 462 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr); csr 464 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_TXCSR); csr 467 drivers/usb/musb/musb_gadget.c epnum, csr, musb_ep->dma->actual_len, request); csr 482 drivers/usb/musb/musb_gadget.c if (csr & MUSB_TXCSR_TXPKTRDY) csr 526 drivers/usb/musb/musb_gadget.c u16 csr = musb_readw(epio, MUSB_RXCSR); csr 550 drivers/usb/musb/musb_gadget.c if (csr & MUSB_RXCSR_P_SENDSTALL) { csr 552 drivers/usb/musb/musb_gadget.c musb_ep->end_point.name, csr); csr 575 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_RXCSR_AUTOCLEAR csr 577 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_DMAENAB | MUSB_RXCSR_P_WZC_BITS; csr 578 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 583 drivers/usb/musb/musb_gadget.c if (csr & MUSB_RXCSR_RXPKTRDY) { csr 633 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_AUTOCLEAR; csr 634 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 635 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_DMAENAB; csr 636 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 644 drivers/usb/musb/musb_gadget.c csr | MUSB_RXCSR_DMAMODE); csr 645 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 655 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_AUTOCLEAR; csr 656 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_DMAENAB; csr 657 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 700 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_RXCSR_DMAMODE; csr 701 drivers/usb/musb/musb_gadget.c csr |= (MUSB_RXCSR_DMAENAB | csr 704 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 711 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_DMAMODE; csr 712 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 759 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_RXCSR_DMAENAB | MUSB_RXCSR_AUTOCLEAR); csr 760 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 772 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_P_WZC_BITS; csr 773 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_RXCSR_RXPKTRDY; csr 774 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 789 drivers/usb/musb/musb_gadget.c u16 csr; csr 812 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_RXCSR); csr 816 drivers/usb/musb/musb_gadget.c csr, dma ? " (dma)" : "", request); csr 818 drivers/usb/musb/musb_gadget.c if (csr & MUSB_RXCSR_P_SENTSTALL) { csr 819 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_P_WZC_BITS; csr 820 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_RXCSR_P_SENTSTALL; csr 821 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 825 drivers/usb/musb/musb_gadget.c if (csr & MUSB_RXCSR_P_OVERRUN) { csr 827 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_RXCSR_P_OVERRUN; csr 828 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 834 drivers/usb/musb/musb_gadget.c if (csr & MUSB_RXCSR_INCOMPRX) { csr 842 drivers/usb/musb/musb_gadget.c musb_ep->end_point.name, csr); csr 846 drivers/usb/musb/musb_gadget.c if (dma && (csr & MUSB_RXCSR_DMAENAB)) { csr 847 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_RXCSR_AUTOCLEAR csr 851 drivers/usb/musb/musb_gadget.c MUSB_RXCSR_P_WZC_BITS | csr); csr 862 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_RXCSR_RXPKTRDY; csr 863 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 873 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_RXCSR); csr 874 drivers/usb/musb/musb_gadget.c if ((csr & MUSB_RXCSR_RXPKTRDY) && csr 915 drivers/usb/musb/musb_gadget.c u16 csr; csr 994 drivers/usb/musb/musb_gadget.c csr = MUSB_TXCSR_MODE | MUSB_TXCSR_CLRDATATOG; csr 997 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_FLUSHFIFO; csr 999 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_P_ISO; csr 1002 drivers/usb/musb/musb_gadget.c musb_writew(regs, MUSB_TXCSR, csr); csr 1004 drivers/usb/musb/musb_gadget.c musb_writew(regs, MUSB_TXCSR, csr); csr 1032 drivers/usb/musb/musb_gadget.c csr = musb_readw(regs, MUSB_TXCSR); csr 1033 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_TXCSR_MODE | MUSB_TXCSR_TXPKTRDY); csr 1034 drivers/usb/musb/musb_gadget.c musb_writew(regs, MUSB_TXCSR, csr); csr 1037 drivers/usb/musb/musb_gadget.c csr = MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_CLRDATATOG; csr 1039 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_P_ISO; csr 1041 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_DISNYET; csr 1044 drivers/usb/musb/musb_gadget.c musb_writew(regs, MUSB_RXCSR, csr); csr 1045 drivers/usb/musb/musb_gadget.c musb_writew(regs, MUSB_RXCSR, csr); csr 1332 drivers/usb/musb/musb_gadget.c u16 csr; csr 1359 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_TXCSR); csr 1360 drivers/usb/musb/musb_gadget.c if (csr & MUSB_TXCSR_FIFONOTEMPTY) { csr 1373 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_TXCSR); csr 1374 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_P_WZC_BITS csr 1377 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_P_SENDSTALL; csr 1379 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_TXCSR_P_SENDSTALL csr 1381 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_TXCSR_TXPKTRDY; csr 1382 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr); csr 1384 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_RXCSR); csr 1385 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_P_WZC_BITS csr 1389 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_P_SENDSTALL; csr 1391 drivers/usb/musb/musb_gadget.c csr &= ~(MUSB_RXCSR_P_SENDSTALL csr 1393 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 1453 drivers/usb/musb/musb_gadget.c u16 csr; csr 1464 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_TXCSR); csr 1465 drivers/usb/musb/musb_gadget.c if (csr & MUSB_TXCSR_FIFONOTEMPTY) { csr 1466 drivers/usb/musb/musb_gadget.c csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_P_WZC_BITS; csr 1472 drivers/usb/musb/musb_gadget.c csr &= ~MUSB_TXCSR_TXPKTRDY; csr 1473 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr); csr 1475 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_TXCSR, csr); csr 1478 drivers/usb/musb/musb_gadget.c csr = musb_readw(epio, MUSB_RXCSR); csr 1479 drivers/usb/musb/musb_gadget.c csr |= MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_P_WZC_BITS; csr 1480 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 1481 drivers/usb/musb/musb_gadget.c musb_writew(epio, MUSB_RXCSR, csr); csr 243 drivers/usb/musb/musb_gadget_ep0.c u16 csr; csr 266 drivers/usb/musb/musb_gadget_ep0.c csr = musb_readw(regs, MUSB_TXCSR); csr 267 drivers/usb/musb/musb_gadget_ep0.c csr |= MUSB_TXCSR_CLRDATATOG | csr 269 drivers/usb/musb/musb_gadget_ep0.c csr &= ~(MUSB_TXCSR_P_SENDSTALL | csr 272 drivers/usb/musb/musb_gadget_ep0.c musb_writew(regs, MUSB_TXCSR, csr); csr 274 drivers/usb/musb/musb_gadget_ep0.c csr = musb_readw(regs, MUSB_RXCSR); csr 275 drivers/usb/musb/musb_gadget_ep0.c csr |= MUSB_RXCSR_CLRDATATOG | csr 277 drivers/usb/musb/musb_gadget_ep0.c csr &= ~(MUSB_RXCSR_P_SENDSTALL | csr 279 drivers/usb/musb/musb_gadget_ep0.c musb_writew(regs, MUSB_RXCSR, csr); csr 407 drivers/usb/musb/musb_gadget_ep0.c u16 csr; csr 425 drivers/usb/musb/musb_gadget_ep0.c csr = musb_readw(regs, MUSB_TXCSR); csr 426 drivers/usb/musb/musb_gadget_ep0.c if (csr & MUSB_TXCSR_FIFONOTEMPTY) csr 427 drivers/usb/musb/musb_gadget_ep0.c csr |= MUSB_TXCSR_FLUSHFIFO; csr 428 drivers/usb/musb/musb_gadget_ep0.c csr |= MUSB_TXCSR_P_SENDSTALL csr 431 drivers/usb/musb/musb_gadget_ep0.c musb_writew(regs, MUSB_TXCSR, csr); csr 433 drivers/usb/musb/musb_gadget_ep0.c csr = musb_readw(regs, MUSB_RXCSR); csr 434 drivers/usb/musb/musb_gadget_ep0.c csr |= MUSB_RXCSR_P_SENDSTALL csr 438 drivers/usb/musb/musb_gadget_ep0.c musb_writew(regs, MUSB_RXCSR, csr); csr 469 drivers/usb/musb/musb_gadget_ep0.c u16 count, csr; csr 491 drivers/usb/musb/musb_gadget_ep0.c csr = MUSB_CSR0_P_SVDRXPKTRDY; csr 494 drivers/usb/musb/musb_gadget_ep0.c csr |= MUSB_CSR0_P_DATAEND; csr 498 drivers/usb/musb/musb_gadget_ep0.c csr = MUSB_CSR0_P_SVDRXPKTRDY | MUSB_CSR0_P_SENDSTALL; csr 505 drivers/usb/musb/musb_gadget_ep0.c musb->ackpend = csr; csr 512 drivers/usb/musb/musb_gadget_ep0.c musb_writew(regs, MUSB_CSR0, csr); csr 526 drivers/usb/musb/musb_gadget_ep0.c u16 csr = MUSB_CSR0_TXPKTRDY; csr 550 drivers/usb/musb/musb_gadget_ep0.c csr |= MUSB_CSR0_P_DATAEND; csr 560 drivers/usb/musb/musb_gadget_ep0.c musb->ackpend = csr; csr 569 drivers/usb/musb/musb_gadget_ep0.c musb_writew(regs, MUSB_CSR0, csr); csr 647 drivers/usb/musb/musb_gadget_ep0.c u16 csr; csr 654 drivers/usb/musb/musb_gadget_ep0.c csr = musb_readw(regs, MUSB_CSR0); csr 658 drivers/usb/musb/musb_gadget_ep0.c csr, len, decode_ep0stage(musb->ep0_state)); csr 660 drivers/usb/musb/musb_gadget_ep0.c if (csr & MUSB_CSR0_P_DATAEND) { csr 669 drivers/usb/musb/musb_gadget_ep0.c if (csr & MUSB_CSR0_P_SENTSTALL) { csr 671 drivers/usb/musb/musb_gadget_ep0.c csr & ~MUSB_CSR0_P_SENTSTALL); csr 674 drivers/usb/musb/musb_gadget_ep0.c csr = musb_readw(regs, MUSB_CSR0); csr 678 drivers/usb/musb/musb_gadget_ep0.c if (csr & MUSB_CSR0_P_SETUPEND) { csr 693 drivers/usb/musb/musb_gadget_ep0.c csr = musb_readw(regs, MUSB_CSR0); csr 705 drivers/usb/musb/musb_gadget_ep0.c if ((csr & MUSB_CSR0_TXPKTRDY) == 0) { csr 713 drivers/usb/musb/musb_gadget_ep0.c if (csr & MUSB_CSR0_RXPKTRDY) { csr 758 drivers/usb/musb/musb_gadget_ep0.c if (csr & MUSB_CSR0_RXPKTRDY) csr 778 drivers/usb/musb/musb_gadget_ep0.c if (csr & MUSB_CSR0_RXPKTRDY) { csr 847 drivers/usb/musb/musb_gadget_ep0.c handled, csr, csr 1001 drivers/usb/musb/musb_gadget_ep0.c u16 csr; csr 1020 drivers/usb/musb/musb_gadget_ep0.c csr = musb->ackpend; csr 1030 drivers/usb/musb/musb_gadget_ep0.c csr = musb_readw(regs, MUSB_CSR0); csr 1039 drivers/usb/musb/musb_gadget_ep0.c csr |= MUSB_CSR0_P_SENDSTALL; csr 1040 drivers/usb/musb/musb_gadget_ep0.c musb_writew(regs, MUSB_CSR0, csr); csr 90 drivers/usb/musb/musb_host.c u16 csr; csr 93 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 94 drivers/usb/musb/musb_host.c while (csr & MUSB_TXCSR_FIFONOTEMPTY) { csr 95 drivers/usb/musb/musb_host.c csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_TXPKTRDY; csr 96 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_TXCSR, csr); csr 97 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 115 drivers/usb/musb/musb_host.c ep->epnum, csr)) csr 124 drivers/usb/musb/musb_host.c u16 csr; csr 129 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 130 drivers/usb/musb/musb_host.c if (!(csr & (MUSB_CSR0_TXPKTRDY | MUSB_CSR0_RXPKTRDY))) csr 133 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 138 drivers/usb/musb/musb_host.c ep->epnum, csr); csr 294 drivers/usb/musb/musb_host.c u16 csr; csr 302 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_RXCSR) & MUSB_RXCSR_H_DATATOGGLE; csr 304 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR) & MUSB_TXCSR_H_DATATOGGLE; csr 306 drivers/usb/musb/musb_host.c usb_settoggle(urb->dev, qh->epnum, !is_in, csr ? 1 : 0); csr 402 drivers/usb/musb/musb_host.c static u16 musb_h_flush_rxfifo(struct musb_hw_ep *hw_ep, u16 csr) csr 408 drivers/usb/musb/musb_host.c csr |= MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_RXPKTRDY; csr 409 drivers/usb/musb/musb_host.c csr &= ~(MUSB_RXCSR_H_REQPKT csr 414 drivers/usb/musb/musb_host.c musb_writew(hw_ep->regs, MUSB_RXCSR, csr); csr 415 drivers/usb/musb/musb_host.c musb_writew(hw_ep->regs, MUSB_RXCSR, csr); csr 429 drivers/usb/musb/musb_host.c u16 csr; csr 502 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_RXCSR); csr 503 drivers/usb/musb/musb_host.c csr |= MUSB_RXCSR_H_WZC_BITS; csr 505 drivers/usb/musb/musb_host.c musb_h_flush_rxfifo(hw_ep, csr); csr 508 drivers/usb/musb/musb_host.c csr &= ~(MUSB_RXCSR_RXPKTRDY | MUSB_RXCSR_H_REQPKT); csr 510 drivers/usb/musb/musb_host.c csr |= MUSB_RXCSR_H_REQPKT; csr 511 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_RXCSR, csr); csr 529 drivers/usb/musb/musb_host.c u16 csr; csr 538 drivers/usb/musb/musb_host.c csr = musb_readw(ep->regs, MUSB_TXCSR); csr 539 drivers/usb/musb/musb_host.c if (csr & MUSB_TXCSR_MODE) { csr 541 drivers/usb/musb/musb_host.c csr = musb_readw(ep->regs, MUSB_TXCSR); csr 543 drivers/usb/musb/musb_host.c csr | MUSB_TXCSR_FRCDATATOG); csr 550 drivers/usb/musb/musb_host.c if (csr & MUSB_TXCSR_DMAMODE) csr 556 drivers/usb/musb/musb_host.c csr = musb_readw(ep->regs, MUSB_RXCSR); csr 557 drivers/usb/musb/musb_host.c if (csr & MUSB_RXCSR_RXPKTRDY) csr 592 drivers/usb/musb/musb_host.c u16 csr; csr 597 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 600 drivers/usb/musb/musb_host.c csr |= MUSB_TXCSR_DMAMODE | MUSB_TXCSR_DMAENAB; csr 613 drivers/usb/musb/musb_host.c csr |= MUSB_TXCSR_AUTOSET; csr 616 drivers/usb/musb/musb_host.c csr &= ~(MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAMODE); csr 617 drivers/usb/musb/musb_host.c csr |= MUSB_TXCSR_DMAENAB; /* against programmer's guide */ csr 620 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_TXCSR, csr); csr 670 drivers/usb/musb/musb_host.c u16 csr; csr 675 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 676 drivers/usb/musb/musb_host.c csr &= ~(MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAENAB); csr 677 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_TXCSR, csr | MUSB_TXCSR_H_WZC_BITS); csr 700 drivers/usb/musb/musb_host.c u16 csr; csr 714 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 715 drivers/usb/musb/musb_host.c csr &= ~MUSB_TXCSR_DMAENAB; csr 716 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_TXCSR, csr); csr 739 drivers/usb/musb/musb_host.c u16 csr; csr 743 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 765 drivers/usb/musb/musb_host.c csr &= ~(MUSB_TXCSR_H_NAKTIMEOUT csr 773 drivers/usb/musb/musb_host.c csr |= MUSB_TXCSR_MODE; csr 777 drivers/usb/musb/musb_host.c csr |= MUSB_TXCSR_H_WR_DATATOGGLE csr 780 drivers/usb/musb/musb_host.c csr |= MUSB_TXCSR_CLRDATATOG; csr 783 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_TXCSR, csr); csr 785 drivers/usb/musb/musb_host.c csr &= ~MUSB_TXCSR_DMAMODE; csr 786 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_TXCSR, csr); csr 787 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 863 drivers/usb/musb/musb_host.c u16 csr; csr 870 drivers/usb/musb/musb_host.c csr = MUSB_RXCSR_H_WR_DATATOGGLE csr 873 drivers/usb/musb/musb_host.c csr = 0; csr 875 drivers/usb/musb/musb_host.c csr |= MUSB_RXCSR_DISNYET; csr 878 drivers/usb/musb/musb_host.c csr = musb_readw(hw_ep->regs, MUSB_RXCSR); csr 880 drivers/usb/musb/musb_host.c if (csr & (MUSB_RXCSR_RXPKTRDY csr 884 drivers/usb/musb/musb_host.c hw_ep->epnum, csr); csr 887 drivers/usb/musb/musb_host.c csr &= MUSB_RXCSR_DISNYET; csr 898 drivers/usb/musb/musb_host.c musb_writew(hw_ep->regs, MUSB_RXCSR, csr); csr 899 drivers/usb/musb/musb_host.c csr = musb_readw(hw_ep->regs, MUSB_RXCSR); csr 914 drivers/usb/musb/musb_host.c csr |= MUSB_RXCSR_DMAENAB; csr 917 drivers/usb/musb/musb_host.c csr |= MUSB_RXCSR_H_REQPKT; csr 918 drivers/usb/musb/musb_host.c musb_dbg(musb, "RXCSR%d := %04x", epnum, csr); csr 919 drivers/usb/musb/musb_host.c musb_writew(hw_ep->regs, MUSB_RXCSR, csr); csr 920 drivers/usb/musb/musb_host.c csr = musb_readw(hw_ep->regs, MUSB_RXCSR); csr 1083 drivers/usb/musb/musb_host.c u16 csr, len; csr 1096 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_CSR0); csr 1097 drivers/usb/musb/musb_host.c len = (csr & MUSB_CSR0_RXPKTRDY) csr 1102 drivers/usb/musb/musb_host.c csr, qh, len, urb, musb->ep0_stage); csr 1111 drivers/usb/musb/musb_host.c if (csr & MUSB_CSR0_H_RXSTALL) { csr 1115 drivers/usb/musb/musb_host.c } else if (csr & MUSB_CSR0_H_ERROR) { csr 1116 drivers/usb/musb/musb_host.c musb_dbg(musb, "no response, csr0 %04x", csr); csr 1119 drivers/usb/musb/musb_host.c } else if (csr & MUSB_CSR0_H_NAKTIMEOUT) { csr 1142 drivers/usb/musb/musb_host.c if (csr & MUSB_CSR0_H_REQPKT) { csr 1143 drivers/usb/musb/musb_host.c csr &= ~MUSB_CSR0_H_REQPKT; csr 1144 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_CSR0, csr); csr 1145 drivers/usb/musb/musb_host.c csr &= ~MUSB_CSR0_H_NAKTIMEOUT; csr 1146 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_CSR0, csr); csr 1170 drivers/usb/musb/musb_host.c csr = (MUSB_EP0_IN == musb->ep0_stage) csr 1176 drivers/usb/musb/musb_host.c csr = MUSB_CSR0_H_STATUSPKT csr 1179 drivers/usb/musb/musb_host.c csr = MUSB_CSR0_H_STATUSPKT csr 1183 drivers/usb/musb/musb_host.c csr |= MUSB_CSR0_H_DIS_PING; csr 1188 drivers/usb/musb/musb_host.c musb_dbg(musb, "ep0 STATUS, csr %04x", csr); csr 1191 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_CSR0, csr); csr 2337 drivers/usb/musb/musb_host.c u16 csr; csr 2356 drivers/usb/musb/musb_host.c csr = musb_h_flush_rxfifo(ep, 0); csr 2363 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 2364 drivers/usb/musb/musb_host.c csr &= ~(MUSB_TXCSR_AUTOSET csr 2370 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_TXCSR, csr); csr 2372 drivers/usb/musb/musb_host.c musb_writew(epio, MUSB_TXCSR, csr); csr 2374 drivers/usb/musb/musb_host.c csr = musb_readw(epio, MUSB_TXCSR); csr 157 drivers/usb/musb/musbhsdma.c u16 csr = 0; csr 163 drivers/usb/musb/musbhsdma.c csr |= 1 << MUSB_HSDMA_MODE1_SHIFT; csr 166 drivers/usb/musb/musbhsdma.c csr |= MUSB_HSDMA_BURSTMODE_INCR16 csr 169 drivers/usb/musb/musbhsdma.c csr |= (musb_channel->epnum << MUSB_HSDMA_ENDPOINT_SHIFT) csr 183 drivers/usb/musb/musbhsdma.c csr); csr 233 drivers/usb/musb/musbhsdma.c u16 csr; csr 244 drivers/usb/musb/musbhsdma.c csr = musb_readw(mbase, offset); csr 245 drivers/usb/musb/musbhsdma.c csr &= ~(MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAENAB); csr 246 drivers/usb/musb/musbhsdma.c musb_writew(mbase, offset, csr); csr 247 drivers/usb/musb/musbhsdma.c csr &= ~MUSB_TXCSR_DMAMODE; csr 248 drivers/usb/musb/musbhsdma.c musb_writew(mbase, offset, csr); csr 253 drivers/usb/musb/musbhsdma.c csr = musb_readw(mbase, offset); csr 254 drivers/usb/musb/musbhsdma.c csr &= ~(MUSB_RXCSR_AUTOCLEAR | csr 257 drivers/usb/musb/musbhsdma.c musb_writew(mbase, offset, csr); csr 288 drivers/usb/musb/musbhsdma.c u16 csr; csr 321 drivers/usb/musb/musbhsdma.c csr = musb_readw(mbase, csr 325 drivers/usb/musb/musbhsdma.c if (csr & (1 << MUSB_HSDMA_BUSERROR_SHIFT)) { csr 166 drivers/usb/musb/tusb6010_omap.c u16 csr; csr 171 drivers/usb/musb/tusb6010_omap.c csr = musb_readw(hw_ep->regs, MUSB_TXCSR); csr 172 drivers/usb/musb/tusb6010_omap.c csr |= MUSB_TXCSR_MODE | MUSB_TXCSR_TXPKTRDY csr 174 drivers/usb/musb/tusb6010_omap.c musb_writew(hw_ep->regs, MUSB_TXCSR, csr); csr 193 drivers/usb/musb/tusb6010_omap.c u16 csr; csr 328 drivers/usb/musb/tusb6010_omap.c csr = musb_readw(hw_ep->regs, MUSB_TXCSR); csr 329 drivers/usb/musb/tusb6010_omap.c csr |= (MUSB_TXCSR_AUTOSET | MUSB_TXCSR_DMAENAB csr 331 drivers/usb/musb/tusb6010_omap.c csr &= ~MUSB_TXCSR_P_UNDERRUN; csr 332 drivers/usb/musb/tusb6010_omap.c musb_writew(hw_ep->regs, MUSB_TXCSR, csr); csr 334 drivers/usb/musb/tusb6010_omap.c csr = musb_readw(hw_ep->regs, MUSB_RXCSR); csr 335 drivers/usb/musb/tusb6010_omap.c csr |= MUSB_RXCSR_DMAENAB; csr 336 drivers/usb/musb/tusb6010_omap.c csr &= ~(MUSB_RXCSR_AUTOCLEAR | MUSB_RXCSR_DMAMODE); csr 338 drivers/usb/musb/tusb6010_omap.c csr | MUSB_RXCSR_P_WZC_BITS); csr 213 drivers/usb/musb/ux500_dma.c u16 csr; csr 220 drivers/usb/musb/ux500_dma.c csr = musb_readw(epio, MUSB_TXCSR); csr 221 drivers/usb/musb/ux500_dma.c csr &= ~(MUSB_TXCSR_AUTOSET | csr 224 drivers/usb/musb/ux500_dma.c musb_writew(epio, MUSB_TXCSR, csr); csr 226 drivers/usb/musb/ux500_dma.c csr = musb_readw(epio, MUSB_RXCSR); csr 227 drivers/usb/musb/ux500_dma.c csr &= ~(MUSB_RXCSR_AUTOCLEAR | csr 230 drivers/usb/musb/ux500_dma.c musb_writew(epio, MUSB_RXCSR, csr); csr 113 drivers/video/fbdev/leo.c u32 csr; csr 134 drivers/video/fbdev/leo.c u32 csr; csr 236 drivers/video/fbdev/leo.c val = sbus_readl(&par->lc_ss0_usr->csr); csr 167 drivers/video/fbdev/via/via-core.c int csr; csr 171 drivers/video/fbdev/via/via-core.c csr = viafb_mmio_read(VDMA_CSR0); csr 172 drivers/video/fbdev/via/via-core.c if (csr & VDMA_C_DONE) { csr 85 drivers/watchdog/shwdt.c u8 csr; csr 95 drivers/watchdog/shwdt.c csr = sh_wdt_read_csr(); csr 96 drivers/watchdog/shwdt.c csr |= WTCSR_WT | clock_division_ratio; csr 97 drivers/watchdog/shwdt.c sh_wdt_write_csr(csr); csr 109 drivers/watchdog/shwdt.c csr = sh_wdt_read_csr(); csr 110 drivers/watchdog/shwdt.c csr |= WTCSR_TME; csr 111 drivers/watchdog/shwdt.c csr &= ~WTCSR_RSTS; csr 112 drivers/watchdog/shwdt.c sh_wdt_write_csr(csr); csr 115 drivers/watchdog/shwdt.c csr = sh_wdt_read_rstcsr(); csr 116 drivers/watchdog/shwdt.c csr &= ~RSTCSR_RSTS; csr 117 drivers/watchdog/shwdt.c sh_wdt_write_rstcsr(csr); csr 128 drivers/watchdog/shwdt.c u8 csr; csr 134 drivers/watchdog/shwdt.c csr = sh_wdt_read_csr(); csr 135 drivers/watchdog/shwdt.c csr &= ~WTCSR_TME; csr 136 drivers/watchdog/shwdt.c sh_wdt_write_csr(csr); csr 181 drivers/watchdog/shwdt.c u8 csr; csr 183 drivers/watchdog/shwdt.c csr = sh_wdt_read_csr(); csr 184 drivers/watchdog/shwdt.c csr &= ~WTCSR_IOVF; csr 185 drivers/watchdog/shwdt.c sh_wdt_write_csr(csr); csr 57 sound/soc/intel/atom/sst/sst_loader.c union config_status_reg_mrfld csr; csr 60 sound/soc/intel/atom/sst/sst_loader.c csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); csr 62 sound/soc/intel/atom/sst/sst_loader.c dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full); csr 64 sound/soc/intel/atom/sst/sst_loader.c csr.full |= 0x7; csr 65 sound/soc/intel/atom/sst/sst_loader.c sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full); csr 66 sound/soc/intel/atom/sst/sst_loader.c csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); csr 68 sound/soc/intel/atom/sst/sst_loader.c dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full); csr 70 sound/soc/intel/atom/sst/sst_loader.c csr.full &= ~(0x1); csr 71 sound/soc/intel/atom/sst/sst_loader.c sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full); csr 73 sound/soc/intel/atom/sst/sst_loader.c csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); csr 74 sound/soc/intel/atom/sst/sst_loader.c dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full); csr 85 sound/soc/intel/atom/sst/sst_loader.c union config_status_reg_mrfld csr; csr 88 sound/soc/intel/atom/sst/sst_loader.c csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); csr 89 sound/soc/intel/atom/sst/sst_loader.c dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full); csr 91 sound/soc/intel/atom/sst/sst_loader.c csr.full |= 0x7; csr 92 sound/soc/intel/atom/sst/sst_loader.c sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full); csr 94 sound/soc/intel/atom/sst/sst_loader.c csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); csr 95 sound/soc/intel/atom/sst/sst_loader.c dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full); csr 97 sound/soc/intel/atom/sst/sst_loader.c csr.part.xt_snoop = 1; csr 98 sound/soc/intel/atom/sst/sst_loader.c csr.full &= ~(0x5); csr 99 sound/soc/intel/atom/sst/sst_loader.c sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full); csr 101 sound/soc/intel/atom/sst/sst_loader.c csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); csr 103 sound/soc/intel/atom/sst/sst_loader.c csr.full); csr 1626 sound/sparc/cs4231.c u32 csr; csr 1634 sound/sparc/cs4231.c csr = sbus_readl(chip->port + APCCSR); csr 1636 sound/sparc/cs4231.c sbus_writel(csr, chip->port + APCCSR); csr 1638 sound/sparc/cs4231.c if ((csr & APC_PDMA_READY) && csr 1639 sound/sparc/cs4231.c (csr & APC_PLAY_INT) && csr 1640 sound/sparc/cs4231.c (csr & APC_XINT_PNVA) && csr 1641 sound/sparc/cs4231.c !(csr & APC_XINT_EMPT)) csr 1644 sound/sparc/cs4231.c if ((csr & APC_CDMA_READY) && csr 1645 sound/sparc/cs4231.c (csr & APC_CAPT_INT) && csr 1646 sound/sparc/cs4231.c (csr & APC_XINT_CNVA) && csr 1647 sound/sparc/cs4231.c !(csr & APC_XINT_EMPT)) csr 1657 sound/sparc/cs4231.c if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY)) csr 1676 sound/sparc/cs4231.c u32 test, csr; csr 1683 sound/sparc/cs4231.c csr = sbus_readl(base->regs + APCCSR); csr 1688 sound/sparc/cs4231.c if (!(csr & test)) csr 1694 sound/sparc/cs4231.c if (!(csr & test)) csr 1707 sound/sparc/cs4231.c u32 csr, test; csr 1711 sound/sparc/cs4231.c csr = sbus_readl(base->regs + APCCSR); csr 1718 sound/sparc/cs4231.c csr |= test; csr 1719 sound/sparc/cs4231.c sbus_writel(csr, base->regs + APCCSR); csr 1726 sound/sparc/cs4231.c u32 csr, shift; csr 1740 sound/sparc/cs4231.c csr = sbus_readl(base->regs + APCCSR); csr 1745 sound/sparc/cs4231.c csr &= ~(APC_CPAUSE << shift); csr 1747 sound/sparc/cs4231.c csr |= (APC_CPAUSE << shift); csr 1748 sound/sparc/cs4231.c sbus_writel(csr, base->regs + APCCSR); csr 1750 sound/sparc/cs4231.c csr |= (APC_CDMA_READY << shift); csr 1752 sound/sparc/cs4231.c csr &= ~(APC_CDMA_READY << shift); csr 1753 sound/sparc/cs4231.c sbus_writel(csr, base->regs + APCCSR);