csc 36 arch/alpha/include/asm/core_titan.h titan_64 csc; csc 35 arch/alpha/include/asm/core_tsunami.h tsunami_64 csc; csc 356 arch/alpha/kernel/core_titan.c titan_pchip1_present = TITAN_cchip->csc.csr & 1L<<14; csc 373 arch/alpha/kernel/core_titan.c printk("%s: CSR_CSC 0x%lx\n", __func__, TITAN_cchip->csc.csr); csc 396 arch/alpha/kernel/core_tsunami.c printk("%s: CSR_CSC 0x%lx\n", __func__, TSUNAMI_cchip->csc.csr); csc 417 arch/alpha/kernel/core_tsunami.c if (TSUNAMI_cchip->csc.csr & 1L<<14) csc 448 arch/alpha/kernel/core_tsunami.c if (TSUNAMI_cchip->csc.csr & 1L<<14) csc 467 arch/alpha/kernel/core_tsunami.c if (TSUNAMI_cchip->csc.csr & 1L<<14) csc 117 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c .csc = 14, csc 233 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c .csc = 14, csc 351 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c .csc = 14, csc 446 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c .csc = 14, csc 177 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h int csc; csc 797 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (desc->layout.csc) { csc 803 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c desc->layout.csc, csc 806 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c desc->layout.csc + 1, csc 809 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c desc->layout.csc + 2, csc 507 drivers/gpu/drm/i915/display/intel_sprite.c const u16 *csc; csc 510 drivers/gpu/drm/i915/display/intel_sprite.c csc = input_csc_matrix[plane_state->base.color_encoding]; csc 512 drivers/gpu/drm/i915/display/intel_sprite.c csc = input_csc_matrix_lr[plane_state->base.color_encoding]; csc 514 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0), ROFF(csc[0]) | csc 515 drivers/gpu/drm/i915/display/intel_sprite.c GOFF(csc[1])); csc 516 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 1), BOFF(csc[2])); csc 517 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 2), ROFF(csc[3]) | csc 518 drivers/gpu/drm/i915/display/intel_sprite.c GOFF(csc[4])); csc 519 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 3), BOFF(csc[5])); csc 520 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 4), ROFF(csc[6]) | csc 521 drivers/gpu/drm/i915/display/intel_sprite.c GOFF(csc[7])); csc 522 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 5), BOFF(csc[8])); csc 761 drivers/gpu/drm/i915/display/intel_sprite.c const s16 *csc = csc_matrix[plane_state->base.color_encoding]; csc 771 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(SPCSCC01(plane_id), SPCSC_C1(csc[1]) | SPCSC_C0(csc[0])); csc 772 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(SPCSCC23(plane_id), SPCSC_C1(csc[3]) | SPCSC_C0(csc[2])); csc 773 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(SPCSCC45(plane_id), SPCSC_C1(csc[5]) | SPCSC_C0(csc[4])); csc 774 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(SPCSCC67(plane_id), SPCSC_C1(csc[7]) | SPCSC_C0(csc[6])); csc 775 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(SPCSCC8(plane_id), SPCSC_C0(csc[8])); csc 164 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c enum mdp4_pipe pipe, struct csc_cfg *csc) csc 168 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) { csc 170 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c csc->matrix[i]); csc 173 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) { csc 175 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c csc->pre_bias[i]); csc 178 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c csc->post_bias[i]); csc 181 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) { csc 183 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c csc->pre_clamp[i]); csc 186 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c csc->post_clamp[i]); csc 319 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB); csc 323 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c mdp4_write_csc_config(mdp4_kms, pipe, csc); csc 569 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct csc_cfg *csc) csc 574 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (unlikely(!csc)) csc 577 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if ((csc->type == CSC_YUV2RGB) || (CSC_YUV2YUV == csc->type)) csc 579 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if ((csc->type == CSC_RGB2YUV) || (CSC_YUV2YUV == csc->type)) csc 584 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c matrix = csc->matrix; csc 600 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c for (i = 0; i < ARRAY_SIZE(csc->pre_bias); i++) { csc 601 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c uint32_t *pre_clamp = csc->pre_clamp; csc 602 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c uint32_t *post_clamp = csc->post_clamp; csc 613 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c MDP5_PIPE_CSC_1_PRE_BIAS_REG_VALUE(csc->pre_bias[i])); csc 616 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c MDP5_PIPE_CSC_1_POST_BIAS_REG_VALUE(csc->post_bias[i])); csc 191 drivers/gpu/drm/nouveau/dispnv50/atom.h } csc; csc 237 drivers/gpu/drm/nouveau/dispnv50/atom.h bool csc:1; csc 112 drivers/gpu/drm/nouveau/dispnv50/base907c.c u32 *val = &asyw->csc.matrix[j * 4 + i]; csc 141 drivers/gpu/drm/nouveau/dispnv50/base907c.c evo_data(push, asyw->csc.matrix[0] | 0x80000000); csc 143 drivers/gpu/drm/nouveau/dispnv50/base907c.c evo_data(push, asyw->csc.matrix[i]); csc 159 drivers/gpu/drm/nouveau/dispnv50/base907c.c .csc = base907c_csc, csc 123 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (clr.csc ) wndw->func-> csc_clr(wndw); csc 151 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (asyw->set.csc ) wndw->func->csc_set (wndw, asyw); csc 375 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->csc && asyh->state.ctm) { csc 377 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->func->csc(wndw, asyw, ctm); csc 378 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->csc.valid = true; csc 379 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->set.csc = true; csc 381 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->csc.valid = false; csc 382 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->clr.csc = armw->csc.valid; csc 456 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->clr.csc = armw->csc.valid; csc 548 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->csc = armw->csc; csc 68 drivers/gpu/drm/nouveau/dispnv50/wndw.h void (*csc)(struct nv50_wndw *, struct nv50_wndw_atom *, csc 43 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_data(push, asyw->csc.matrix[i]); csc 130 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_data(push, asyw->csc.valid << 17 | csc 266 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c .csc = base907c_csc, csc 92 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c evo_data(push, asyw->csc.matrix[i]); csc 188 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c .csc = base907c_csc, csc 35 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 41 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 47 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 53 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 59 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 65 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 71 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 77 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 83 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 89 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 95 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 101 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 107 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 114 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 120 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 127 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 133 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 140 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 146 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 153 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 159 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 166 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 172 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 179 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 185 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 192 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 198 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 205 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 211 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 217 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 223 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 229 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_OFF, csc 235 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 241 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 247 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 253 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 259 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 265 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 271 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 277 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 283 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 289 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 295 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 301 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YVU2RGB, csc 307 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YVU2RGB, csc 313 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YVU2RGB, csc 319 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 325 drivers/gpu/drm/sun4i/sun8i_mixer.c .csc = SUN8I_CSC_MODE_YUV2RGB, csc 151 drivers/gpu/drm/sun4i/sun8i_mixer.h enum sun8i_csc_mode csc; csc 233 drivers/gpu/drm/sun4i/sun8i_vi_layer.c if (fmt_info->csc != SUN8I_CSC_MODE_OFF) { csc 234 drivers/gpu/drm/sun4i/sun8i_vi_layer.c sun8i_csc_set_ccsc_coefficients(mixer, channel, fmt_info->csc, csc 356 drivers/gpu/drm/zte/zx_plane.c void __iomem *csc = zplane->csc; csc 414 drivers/gpu/drm/zte/zx_plane.c zx_writel_mask(csc + CSC_CTRL0, CSC_COV_MODE_MASK, csc 417 drivers/gpu/drm/zte/zx_plane.c zx_writel_mask(csc + CSC_CTRL0, CSC_COV_MODE_MASK, csc 419 drivers/gpu/drm/zte/zx_plane.c zx_writel_mask(csc + CSC_CTRL0, CSC_WORK_ENABLE, CSC_WORK_ENABLE); csc 14 drivers/gpu/drm/zte/zx_plane.h void __iomem *csc; csc 238 drivers/gpu/drm/zte/zx_vou.c void __iomem *csc = zcrtc->chncsc; csc 244 drivers/gpu/drm/zte/zx_vou.c zx_writel_mask(csc + CSC_CTRL0, CSC_COV_MODE_MASK, csc 246 drivers/gpu/drm/zte/zx_vou.c zx_writel_mask(csc + CSC_CTRL0, CSC_WORK_ENABLE, csc 253 drivers/gpu/drm/zte/zx_vou.c zx_writel_mask(csc + CSC_CTRL0, CSC_WORK_ENABLE, 0); csc 554 drivers/gpu/drm/zte/zx_vou.c zplane->csc = vou->osd + MAIN_GL_CSC_OFFSET; csc 565 drivers/gpu/drm/zte/zx_vou.c zplane->csc = vou->osd + AUX_GL_CSC_OFFSET; csc 254 drivers/gpu/ipu-v3/ipu-dp.c u32 reg, csc; csc 264 drivers/gpu/ipu-v3/ipu-dp.c csc = reg & DP_COM_CONF_CSC_DEF_MASK; csc 266 drivers/gpu/ipu-v3/ipu-dp.c if (csc == DP_COM_CONF_CSC_DEF_BOTH || csc == DP_COM_CONF_CSC_DEF_BG) csc 355 drivers/gpu/ipu-v3/ipu-ic-csc.c static int calc_csc_coeffs(struct ipu_ic_csc *csc) csc 360 drivers/gpu/ipu-v3/ipu-ic-csc.c tbl_idx = (QUANT_MAP(csc->in_cs.quant) << 1) | csc 361 drivers/gpu/ipu-v3/ipu-ic-csc.c QUANT_MAP(csc->out_cs.quant); csc 363 drivers/gpu/ipu-v3/ipu-ic-csc.c if (csc->in_cs.cs == csc->out_cs.cs) { csc 364 drivers/gpu/ipu-v3/ipu-ic-csc.c csc->params = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ? csc 372 drivers/gpu/ipu-v3/ipu-ic-csc.c switch (csc->out_cs.enc) { csc 374 drivers/gpu/ipu-v3/ipu-ic-csc.c params_tbl = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ? csc 378 drivers/gpu/ipu-v3/ipu-ic-csc.c params_tbl = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ? csc 385 drivers/gpu/ipu-v3/ipu-ic-csc.c csc->params = *params_tbl[tbl_idx]; csc 390 drivers/gpu/ipu-v3/ipu-ic-csc.c int __ipu_ic_calc_csc(struct ipu_ic_csc *csc) csc 392 drivers/gpu/ipu-v3/ipu-ic-csc.c return calc_csc_coeffs(csc); csc 396 drivers/gpu/ipu-v3/ipu-ic-csc.c int ipu_ic_calc_csc(struct ipu_ic_csc *csc, csc 404 drivers/gpu/ipu-v3/ipu-ic-csc.c ipu_ic_fill_colorspace(&csc->in_cs, in_enc, in_quant, in_cs); csc 405 drivers/gpu/ipu-v3/ipu-ic-csc.c ipu_ic_fill_colorspace(&csc->out_cs, out_enc, out_quant, out_cs); csc 407 drivers/gpu/ipu-v3/ipu-ic-csc.c return __ipu_ic_calc_csc(csc); csc 175 drivers/gpu/ipu-v3/ipu-ic.c const struct ipu_ic_csc *csc, csc 188 drivers/gpu/ipu-v3/ipu-ic.c c = (const u16 (*)[3])csc->params.coeff; csc 189 drivers/gpu/ipu-v3/ipu-ic.c a = (const u16 *)csc->params.offset; csc 195 drivers/gpu/ipu-v3/ipu-ic.c param = ((a[0] & 0x1fe0) >> 5) | (csc->params.scale << 8) | csc 196 drivers/gpu/ipu-v3/ipu-ic.c (csc->params.sat << 10); csc 398 drivers/gpu/ipu-v3/ipu-ic.c const struct ipu_ic_csc *csc, csc 432 drivers/gpu/ipu-v3/ipu-ic.c ic->in_cs = csc->in_cs; csc 433 drivers/gpu/ipu-v3/ipu-ic.c ic->out_cs = csc->out_cs; csc 435 drivers/gpu/ipu-v3/ipu-ic.c ret = init_csc(ic, csc, 0); csc 442 drivers/gpu/ipu-v3/ipu-ic.c const struct ipu_ic_csc *csc, csc 446 drivers/gpu/ipu-v3/ipu-ic.c return ipu_ic_task_init_rsc(ic, csc, csc 149 drivers/gpu/ipu-v3/ipu-image-convert.c struct ipu_ic_csc csc; csc 1405 drivers/gpu/ipu-v3/ipu-image-convert.c ret = ipu_ic_task_init_rsc(chan->ic, &ctx->csc, csc 2125 drivers/gpu/ipu-v3/ipu-image-convert.c ret = ipu_ic_calc_csc(&ctx->csc, csc 1396 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c csc(c, x, &r, &g, &b); csc 451 drivers/media/platform/davinci/dm355_ccdc.c static void ccdc_config_csc(struct ccdc_csc *csc) csc 456 drivers/media/platform/davinci/dm355_ccdc.c if (!csc->enable) csc 466 drivers/media/platform/davinci/dm355_ccdc.c val1 = (csc->coeff[i].integer & csc 473 drivers/media/platform/davinci/dm355_ccdc.c val1 |= (((csc->coeff[i].decimal & csc 479 drivers/media/platform/davinci/dm355_ccdc.c val2 = (csc->coeff[i].integer & csc 482 drivers/media/platform/davinci/dm355_ccdc.c val2 |= (((csc->coeff[i].decimal & csc 602 drivers/media/platform/davinci/dm355_ccdc.c ccdc_config_csc(&config_params->csc); csc 40 drivers/media/platform/davinci/isif.c .csc = { csc 486 drivers/media/platform/davinci/isif.c if (!df_csc->csc.en) { csc 493 drivers/media/platform/davinci/isif.c val1 = (df_csc->csc.coeff[i].integer << csc 495 drivers/media/platform/davinci/isif.c df_csc->csc.coeff[i].decimal; csc 499 drivers/media/platform/davinci/isif.c val2 = (df_csc->csc.coeff[i].integer << csc 501 drivers/media/platform/davinci/isif.c df_csc->csc.coeff[i].decimal; csc 400 drivers/media/platform/omap3isp/isppreview.c const struct omap3isp_prev_csc *csc = ¶ms->csc; csc 403 drivers/media/platform/omap3isp/isppreview.c val = (csc->matrix[0][0] & 0x3ff) << ISPPRV_CSC0_RY_SHIFT; csc 404 drivers/media/platform/omap3isp/isppreview.c val |= (csc->matrix[0][1] & 0x3ff) << ISPPRV_CSC0_GY_SHIFT; csc 405 drivers/media/platform/omap3isp/isppreview.c val |= (csc->matrix[0][2] & 0x3ff) << ISPPRV_CSC0_BY_SHIFT; csc 408 drivers/media/platform/omap3isp/isppreview.c val = (csc->matrix[1][0] & 0x3ff) << ISPPRV_CSC1_RCB_SHIFT; csc 409 drivers/media/platform/omap3isp/isppreview.c val |= (csc->matrix[1][1] & 0x3ff) << ISPPRV_CSC1_GCB_SHIFT; csc 410 drivers/media/platform/omap3isp/isppreview.c val |= (csc->matrix[1][2] & 0x3ff) << ISPPRV_CSC1_BCB_SHIFT; csc 413 drivers/media/platform/omap3isp/isppreview.c val = (csc->matrix[2][0] & 0x3ff) << ISPPRV_CSC2_RCR_SHIFT; csc 414 drivers/media/platform/omap3isp/isppreview.c val |= (csc->matrix[2][1] & 0x3ff) << ISPPRV_CSC2_GCR_SHIFT; csc 415 drivers/media/platform/omap3isp/isppreview.c val |= (csc->matrix[2][2] & 0x3ff) << ISPPRV_CSC2_BCR_SHIFT; csc 418 drivers/media/platform/omap3isp/isppreview.c val = (csc->offset[0] & 0xff) << ISPPRV_CSC_OFFSET_Y_SHIFT; csc 419 drivers/media/platform/omap3isp/isppreview.c val |= (csc->offset[1] & 0xff) << ISPPRV_CSC_OFFSET_CB_SHIFT; csc 420 drivers/media/platform/omap3isp/isppreview.c val |= (csc->offset[2] & 0xff) << ISPPRV_CSC_OFFSET_CR_SHIFT; csc 800 drivers/media/platform/omap3isp/isppreview.c offsetof(struct prev_params, csc), csc 801 drivers/media/platform/omap3isp/isppreview.c FIELD_SIZEOF(struct prev_params, csc), csc 802 drivers/media/platform/omap3isp/isppreview.c offsetof(struct omap3isp_prev_update_config, csc), csc 1342 drivers/media/platform/omap3isp/isppreview.c params->csc = flr_prev_csc; csc 90 drivers/media/platform/omap3isp/isppreview.h struct omap3isp_prev_csc csc; csc 990 drivers/media/platform/qcom/venus/hfi_cmds.c struct hfi_vpe_color_space_conversion *csc = prop_data; csc 992 drivers/media/platform/qcom/venus/hfi_cmds.c memcpy(csc->csc_matrix, in->csc_matrix, csc 993 drivers/media/platform/qcom/venus/hfi_cmds.c sizeof(csc->csc_matrix)); csc 994 drivers/media/platform/qcom/venus/hfi_cmds.c memcpy(csc->csc_bias, in->csc_bias, sizeof(csc->csc_bias)); csc 995 drivers/media/platform/qcom/venus/hfi_cmds.c memcpy(csc->csc_limit, in->csc_limit, sizeof(csc->csc_limit)); csc 996 drivers/media/platform/qcom/venus/hfi_cmds.c pkt->shdr.hdr.size += sizeof(u32) + sizeof(*csc); csc 90 drivers/media/platform/ti-vpe/csc.c void csc_dump_regs(struct csc_data *csc) csc 92 drivers/media/platform/ti-vpe/csc.c struct device *dev = &csc->pdev->dev; csc 95 drivers/media/platform/ti-vpe/csc.c ioread32(csc->base + CSC_##r)) csc 97 drivers/media/platform/ti-vpe/csc.c dev_dbg(dev, "CSC Registers @ %pa:\n", &csc->res->start); csc 110 drivers/media/platform/ti-vpe/csc.c void csc_set_coeff_bypass(struct csc_data *csc, u32 *csc_reg5) csc 119 drivers/media/platform/ti-vpe/csc.c void csc_set_coeff(struct csc_data *csc, u32 *csc_reg0, csc 169 drivers/media/platform/ti-vpe/csc.c struct csc_data *csc; csc 173 drivers/media/platform/ti-vpe/csc.c csc = devm_kzalloc(&pdev->dev, sizeof(*csc), GFP_KERNEL); csc 174 drivers/media/platform/ti-vpe/csc.c if (!csc) { csc 179 drivers/media/platform/ti-vpe/csc.c csc->pdev = pdev; csc 181 drivers/media/platform/ti-vpe/csc.c csc->res = platform_get_resource_byname(pdev, IORESOURCE_MEM, csc 183 drivers/media/platform/ti-vpe/csc.c if (csc->res == NULL) { csc 189 drivers/media/platform/ti-vpe/csc.c csc->base = devm_ioremap_resource(&pdev->dev, csc->res); csc 190 drivers/media/platform/ti-vpe/csc.c if (IS_ERR(csc->base)) { csc 192 drivers/media/platform/ti-vpe/csc.c return ERR_CAST(csc->base); csc 195 drivers/media/platform/ti-vpe/csc.c return csc; csc 58 drivers/media/platform/ti-vpe/csc.h void csc_dump_regs(struct csc_data *csc); csc 59 drivers/media/platform/ti-vpe/csc.h void csc_set_coeff_bypass(struct csc_data *csc, u32 *csc_reg5); csc 60 drivers/media/platform/ti-vpe/csc.h void csc_set_coeff(struct csc_data *csc, u32 *csc_reg0, csc 381 drivers/media/platform/ti-vpe/vpe.c struct csc_data *csc; /* csc data handle */ csc 529 drivers/media/platform/ti-vpe/vpe.c GET_OFFSET_TOP(ctx, ctx->dev->csc, CSC_CSC00)); csc 895 drivers/media/platform/ti-vpe/vpe.c csc_set_coeff(ctx->dev->csc, &mmr_adb->csc_regs[0], csc 1007 drivers/media/platform/ti-vpe/vpe.c csc_dump_regs(dev->csc); csc 2551 drivers/media/platform/ti-vpe/vpe.c dev->csc = csc_create(pdev, "csc"); csc 2552 drivers/media/platform/ti-vpe/vpe.c if (IS_ERR(dev->csc)) { csc 2553 drivers/media/platform/ti-vpe/vpe.c ret = PTR_ERR(dev->csc); csc 316 drivers/pcmcia/i82092.c int csc; csc 320 drivers/pcmcia/i82092.c csc = indirect_read(i,I365_CSC); /* card status change register */ csc 322 drivers/pcmcia/i82092.c if (csc==0) /* no events on this socket */ csc 327 drivers/pcmcia/i82092.c if (csc & I365_CSC_DETECT) { csc 334 drivers/pcmcia/i82092.c events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; csc 337 drivers/pcmcia/i82092.c events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; csc 338 drivers/pcmcia/i82092.c events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; csc 339 drivers/pcmcia/i82092.c events |= (csc & I365_CSC_READY) ? SS_READY : 0; csc 833 drivers/pcmcia/i82365.c int i, j, csc; csc 847 drivers/pcmcia/i82365.c csc = i365_get(i, I365_CSC); csc 848 drivers/pcmcia/i82365.c if ((csc == 0) || (i365_get(i, I365_IDENT) & 0x70)) { csc 852 drivers/pcmcia/i82365.c events = (csc & I365_CSC_DETECT) ? SS_DETECT : 0; csc 855 drivers/pcmcia/i82365.c events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; csc 857 drivers/pcmcia/i82365.c events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; csc 858 drivers/pcmcia/i82365.c events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; csc 859 drivers/pcmcia/i82365.c events |= (csc & I365_CSC_READY) ? SS_READY : 0; csc 192 drivers/pcmcia/pd6729.c unsigned int csc; csc 195 drivers/pcmcia/pd6729.c csc = indirect_read(&socket[i], I365_CSC); csc 196 drivers/pcmcia/pd6729.c if (csc == 0) /* no events on this socket */ csc 202 drivers/pcmcia/pd6729.c if (csc & I365_CSC_DETECT) { csc 211 drivers/pcmcia/pd6729.c events |= (csc & I365_CSC_STSCHG) csc 215 drivers/pcmcia/pd6729.c events |= (csc & I365_CSC_BVD1) csc 217 drivers/pcmcia/pd6729.c events |= (csc & I365_CSC_BVD2) csc 219 drivers/pcmcia/pd6729.c events |= (csc & I365_CSC_READY) csc 481 drivers/pcmcia/vrc4171_card.c uint8_t status, csc; csc 484 drivers/pcmcia/vrc4171_card.c csc = exca_read_byte(slot, I365_CSC); csc 487 drivers/pcmcia/vrc4171_card.c if ((csc & I365_CSC_STSCHG) && (status & I365_CS_STSCHG)) csc 490 drivers/pcmcia/vrc4171_card.c if (csc & (I365_CSC_BVD1 | I365_CSC_BVD2)) { csc 497 drivers/pcmcia/vrc4171_card.c if ((csc & I365_CSC_READY) && (status & I365_CS_READY)) csc 499 drivers/pcmcia/vrc4171_card.c if ((csc & I365_CSC_DETECT) && ((status & I365_CS_DETECT) == I365_CS_DETECT)) csc 417 drivers/pcmcia/vrc4173_cardu.c uint8_t csc, status; csc 420 drivers/pcmcia/vrc4173_cardu.c csc = exca_readb(socket, CARD_SC); csc 421 drivers/pcmcia/vrc4173_cardu.c if ((csc & CARD_DT_CHG) && csc 425 drivers/pcmcia/vrc4173_cardu.c if ((csc & RDY_CHG) && (status & READY)) csc 429 drivers/pcmcia/vrc4173_cardu.c if ((csc & BAT_DEAD_ST_CHG) && (status & STSCHG)) csc 432 drivers/pcmcia/vrc4173_cardu.c if (csc & (BAT_WAR_CHG|BAT_DEAD_ST_CHG)) { csc 511 drivers/pcmcia/yenta_socket.c u8 csc; csc 518 drivers/pcmcia/yenta_socket.c csc = exca_readb(socket, I365_CSC); csc 520 drivers/pcmcia/yenta_socket.c if (!(cb_event || csc)) csc 524 drivers/pcmcia/yenta_socket.c events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0; csc 526 drivers/pcmcia/yenta_socket.c events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; csc 528 drivers/pcmcia/yenta_socket.c events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; csc 529 drivers/pcmcia/yenta_socket.c events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; csc 530 drivers/pcmcia/yenta_socket.c events |= (csc & I365_CSC_READY) ? SS_READY : 0; csc 956 drivers/pcmcia/yenta_socket.c u8 csc; csc 962 drivers/pcmcia/yenta_socket.c csc = exca_readb(socket, I365_CSC); csc 964 drivers/pcmcia/yenta_socket.c if (cb_event || csc) { csc 455 drivers/staging/media/imx/imx-ic-prpencvf.c struct ipu_ic_csc csc; csc 464 drivers/staging/media/imx/imx-ic-prpencvf.c ret = ipu_ic_calc_csc(&csc, csc 488 drivers/staging/media/imx/imx-ic-prpencvf.c ret = ipu_ic_task_init(priv->ic, &csc, csc 584 drivers/staging/media/imx/imx-ic-prpencvf.c struct ipu_ic_csc csc; csc 593 drivers/staging/media/imx/imx-ic-prpencvf.c ret = ipu_ic_calc_csc(&csc, csc 604 drivers/staging/media/imx/imx-ic-prpencvf.c ret = ipu_ic_task_init(priv->ic, &csc, csc 2464 drivers/staging/media/ipu3/include/intel-ipu3.h struct ipu3_uapi_csc_mat_config csc __attribute__((aligned(32))); csc 1281 drivers/staging/media/ipu3/ipu3-abi.h struct ipu3_uapi_csc_mat_config csc __aligned(32); csc 2089 drivers/staging/media/ipu3/ipu3-css-params.c acc->csc = acc_user->csc; csc 2092 drivers/staging/media/ipu3/ipu3-css-params.c acc->csc = acc_old->csc; csc 2095 drivers/staging/media/ipu3/ipu3-css-params.c acc->csc = imgu_css_csc_defaults; csc 119 drivers/video/fbdev/cg14.c u16 csc; /* Composite Sync Clear */ csc 625 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_CSC(csc) ((csc)<<8) csc 395 drivers/video/fbdev/pxa168fb.h #define CFG_CSC(csc) ((csc) << 8) /* csc */ csc 235 include/media/davinci/dm355_ccdc.h struct ccdc_csc csc; csc 346 include/media/davinci/isif.h struct isif_color_space_conv csc; csc 662 include/uapi/linux/omap3isp.h struct omap3isp_prev_csc __user *csc; csc 429 include/video/imx-ipu-v3.h int __ipu_ic_calc_csc(struct ipu_ic_csc *csc); csc 430 include/video/imx-ipu-v3.h int ipu_ic_calc_csc(struct ipu_ic_csc *csc, csc 438 include/video/imx-ipu-v3.h const struct ipu_ic_csc *csc, csc 442 include/video/imx-ipu-v3.h const struct ipu_ic_csc *csc,