crtc 69 arch/x86/boot/video-bios.c u16 crtc; crtc 77 arch/x86/boot/video-bios.c crtc = vga_crtc(); crtc 102 arch/x86/boot/video-bios.c if (in_idx(crtc, 0x0f)) crtc 119 arch/x86/boot/video-mode.c u16 crtc; crtc 129 arch/x86/boot/video-mode.c crtc = vga_crtc(); crtc 131 arch/x86/boot/video-mode.c pt = in_idx(crtc, 0x11); crtc 133 arch/x86/boot/video-mode.c out_idx(pt, crtc, 0x11); crtc 135 arch/x86/boot/video-mode.c out_idx((u8)rows, crtc, 0x12); /* Lower height register */ crtc 137 arch/x86/boot/video-mode.c ov = in_idx(crtc, 0x07); /* Overflow register */ crtc 141 arch/x86/boot/video-mode.c out_idx(ov, crtc, 0x07); crtc 139 arch/x86/boot/video-vga.c u16 crtc; /* CRTC base address */ crtc 142 arch/x86/boot/video-vga.c crtc = vga_crtc(); crtc 144 arch/x86/boot/video-vga.c out_idx(0x0c, crtc, 0x11); /* Vertical sync end, unlock CR0-7 */ crtc 145 arch/x86/boot/video-vga.c out_idx(0x0b, crtc, 0x06); /* Vertical total */ crtc 146 arch/x86/boot/video-vga.c out_idx(0x3e, crtc, 0x07); /* Vertical overflow */ crtc 147 arch/x86/boot/video-vga.c out_idx(0xea, crtc, 0x10); /* Vertical sync start */ crtc 148 arch/x86/boot/video-vga.c out_idx(0xdf, crtc, 0x12); /* Vertical display end */ crtc 149 arch/x86/boot/video-vga.c out_idx(0xe7, crtc, 0x15); /* Vertical blank start */ crtc 150 arch/x86/boot/video-vga.c out_idx(0x04, crtc, 0x16); /* Vertical blank end */ crtc 159 arch/x86/boot/video-vga.c u16 crtc; /* CRTC base address */ crtc 163 arch/x86/boot/video-vga.c crtc = vga_crtc(); crtc 167 arch/x86/boot/video-vga.c out_idx(ovfw, crtc, 0x07); /* Vertical overflow */ crtc 168 arch/x86/boot/video-vga.c out_idx(end, crtc, 0x12); /* Vertical display end */ crtc 91 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct drm_crtc *crtc = encoder->crtc; crtc 93 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (crtc && crtc->enabled) { crtc 94 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc 95 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c crtc->x, crtc->y, crtc->primary->fb); crtc 3015 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct drm_crtc *crtc; crtc 3044 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 3045 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 3046 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 3121 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct drm_crtc *crtc; crtc 3159 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 3160 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 80 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct drm_crtc *crtc = &amdgpu_crtc->base; crtc 98 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c &crtc->hwmode) crtc 108 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 115 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 148 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc, crtc 154 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct drm_device *dev = crtc->dev; crtc 156 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 177 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c obj = crtc->primary->fb->obj[0]; crtc 221 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c work->target_vblank = target - (uint32_t)drm_crtc_vblank_count(crtc) + crtc 225 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 228 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 240 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c crtc->primary->fb = fb; crtc 241 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 274 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct drm_crtc *crtc; crtc 278 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!set || !set->crtc) crtc 281 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c dev = set->crtc->dev; crtc 289 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) crtc 290 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (crtc->enabled) crtc 681 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c bool amdgpu_display_crtc_scaling_mode_fixup(struct drm_crtc *crtc, crtc 685 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct drm_device *dev = crtc->dev; crtc 687 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 698 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (encoder->crtc != crtc) crtc 716 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c src_v = crtc->mode.vdisplay; crtc 718 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c src_h = crtc->mode.hdisplay; crtc 736 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c src_v = crtc->mode.vdisplay; crtc 737 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c dst_v = crtc->mode.vdisplay - (amdgpu_crtc->v_border * 2); crtc 738 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c src_h = crtc->mode.hdisplay; crtc 739 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2); crtc 894 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c int amdgpu_display_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc) crtc 896 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (crtc < 0 || crtc >= adev->mode_info.num_crtc) crtc 899 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c switch (crtc) { crtc 26 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_vblank_get_counter(adev, crtc) (adev)->mode_info.funcs->vblank_get_counter((adev), (crtc)) crtc 33 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_page_flip(adev, crtc, base, async) (adev)->mode_info.funcs->page_flip((adev), (crtc), (base), (async)) crtc 34 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_page_flip_get_scanoutpos(adev, crtc, vbl, pos) (adev)->mode_info.funcs->page_flip_get_scanoutpos((adev), (crtc), (vbl), (pos)) crtc 121 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct drm_crtc *crtc; crtc 127 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c list_for_each_entry(crtc, crtc 129 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 142 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct drm_crtc *crtc; crtc 148 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 149 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 150 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { crtc 169 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct drm_crtc *crtc; crtc 174 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 175 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 176 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { crtc 1260 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c struct drm_crtc *crtc; crtc 1267 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { crtc 1268 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c if (crtc->enabled) { crtc 456 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct drm_crtc *crtc; crtc 471 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c crtc = (struct drm_crtc *)minfo->crtcs[i]; crtc 472 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (crtc && crtc->base.id == info->mode_crtc.id) { crtc 473 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 268 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h u32 (*vblank_get_counter)(struct amdgpu_device *adev, int crtc); crtc 282 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h int (*page_flip_get_scanoutpos)(struct amdgpu_device *adev, int crtc, crtc 608 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h bool amdgpu_display_crtc_scaling_mode_fixup(struct drm_crtc *crtc, crtc 613 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h int amdgpu_display_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc); crtc 629 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc, crtc 260 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c u32 amdgpu_pll_get_use_mask(struct drm_crtc *crtc) crtc 262 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c struct drm_device *dev = crtc->dev; crtc 268 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c if (crtc == test_crtc) crtc 287 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c int amdgpu_pll_get_shared_dp_ppll(struct drm_crtc *crtc) crtc 289 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c struct drm_device *dev = crtc->dev; crtc 294 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c if (crtc == test_crtc) crtc 316 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c int amdgpu_pll_get_shared_nondp_ppll(struct drm_crtc *crtc) crtc 318 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 319 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c struct drm_device *dev = crtc->dev; crtc 330 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c if (crtc == test_crtc) crtc 343 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c if ((crtc->mode.clock == test_crtc->mode.clock) && crtc 34 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.h u32 amdgpu_pll_get_use_mask(struct drm_crtc *crtc); crtc 35 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.h int amdgpu_pll_get_shared_dp_ppll(struct drm_crtc *crtc); crtc 36 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.h int amdgpu_pll_get_shared_nondp_ppll(struct drm_crtc *crtc); crtc 39 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc, crtc 43 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 45 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 84 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc) crtc 86 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 88 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 113 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock) crtc 115 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 116 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 130 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state) crtc 132 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 133 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 146 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state) crtc 148 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 149 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 162 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state) crtc 164 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 165 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 190 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc, crtc 193 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 194 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 305 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c static u32 amdgpu_atombios_crtc_adjust_pll(struct drm_crtc *crtc, crtc 308 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 309 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 576 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, crtc 590 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 747 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc, crtc 750 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 751 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 812 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_crtc->adjusted_clock = amdgpu_atombios_crtc_adjust_pll(crtc, mode); crtc 817 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) crtc 819 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 820 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 860 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, crtc 27 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc, crtc 30 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc); crtc 31 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock); crtc 32 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state); crtc 33 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state); crtc 34 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state); crtc 36 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc, crtc 42 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, crtc 55 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc, crtc 57 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc, crtc 352 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (encoder->crtc) { crtc 353 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 802 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (encoder->crtc) { crtc 803 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1471 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 199 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static u32 dce_v10_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) crtc 201 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) crtc 204 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); crtc 260 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, crtc 263 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) crtc 266 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); crtc 267 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c *position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]); crtc 503 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1526 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1572 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (encoder->crtc) { crtc 1573 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1803 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_vga_enable(struct drm_crtc *crtc, bool enable) crtc 1805 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1806 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = crtc->dev; crtc 1817 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_grph_enable(struct drm_crtc *crtc, bool enable) crtc 1819 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1820 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = crtc->dev; crtc 1829 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc, crtc 1833 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1834 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = crtc->dev; crtc 1849 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (!atomic && !crtc->primary->fb) { crtc 1857 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c target_fb = crtc->primary->fb; crtc 1998 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_vga_enable(crtc, false); crtc 2044 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_grph_enable(crtc, true); crtc 2053 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c viewport_w = crtc->mode.hdisplay; crtc 2054 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c viewport_h = (crtc->mode.vdisplay + 1) & ~1; crtc 2061 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (!atomic && fb && fb != crtc->primary->fb) { crtc 2076 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_set_interleave(struct drm_crtc *crtc, crtc 2079 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = crtc->dev; crtc 2081 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2092 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_crtc_load_lut(struct drm_crtc *crtc) crtc 2094 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2095 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = crtc->dev; crtc 2135 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c r = crtc->gamma_store; crtc 2136 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c g = r + crtc->gamma_size; crtc 2137 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b = g + crtc->gamma_size; crtc 2231 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static u32 dce_v10_0_pick_pll(struct drm_crtc *crtc) crtc 2233 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2234 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = crtc->dev; crtc 2245 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c pll = amdgpu_pll_get_shared_dp_ppll(crtc); crtc 2251 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c pll = amdgpu_pll_get_shared_nondp_ppll(crtc); crtc 2257 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c pll_in_use = amdgpu_pll_get_use_mask(crtc); crtc 2268 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_lock_cursor(struct drm_crtc *crtc, bool lock) crtc 2270 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2271 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2282 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_hide_cursor(struct drm_crtc *crtc) crtc 2284 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2285 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2293 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_show_cursor(struct drm_crtc *crtc) crtc 2295 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2296 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2310 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_cursor_move_locked(struct drm_crtc *crtc, crtc 2313 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2314 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2321 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c x += crtc->x; crtc 2322 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c y += crtc->y; crtc 2323 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); crtc 2342 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_cursor_move(struct drm_crtc *crtc, crtc 2347 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_lock_cursor(crtc, true); crtc 2348 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c ret = dce_v10_0_cursor_move_locked(crtc, x, y); crtc 2349 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_lock_cursor(crtc, false); crtc 2354 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_cursor_set2(struct drm_crtc *crtc, crtc 2362 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2369 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_hide_cursor(crtc); crtc 2402 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_lock_cursor(crtc, true); crtc 2413 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_cursor_move_locked(crtc, x, y); crtc 2421 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_show_cursor(crtc); crtc 2422 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_lock_cursor(crtc, false); crtc 2439 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_cursor_reset(struct drm_crtc *crtc) crtc 2441 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2444 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_lock_cursor(crtc, true); crtc 2446 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x, crtc 2449 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_show_cursor(crtc); crtc 2451 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_lock_cursor(crtc, false); crtc 2455 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, crtc 2459 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_load_lut(crtc); crtc 2464 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_crtc_destroy(struct drm_crtc *crtc) crtc 2466 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2468 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c drm_crtc_cleanup(crtc); crtc 2481 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 2483 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = crtc->dev; crtc 2485 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2491 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE); crtc 2492 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_vga_enable(crtc, true); crtc 2493 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); crtc 2494 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_vga_enable(crtc, false); crtc 2500 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c drm_crtc_vblank_on(crtc); crtc 2501 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_load_lut(crtc); crtc 2506 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c drm_crtc_vblank_off(crtc); crtc 2508 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_vga_enable(crtc, true); crtc 2509 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE); crtc 2510 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_vga_enable(crtc, false); crtc 2512 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE); crtc 2520 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_crtc_prepare(struct drm_crtc *crtc) crtc 2523 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE); crtc 2524 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE); crtc 2525 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2528 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_crtc_commit(struct drm_crtc *crtc) crtc 2530 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON); crtc 2531 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE); crtc 2534 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_crtc_disable(struct drm_crtc *crtc) crtc 2536 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2537 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = crtc->dev; crtc 2542 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2543 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc->primary->fb) { crtc 2547 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); crtc 2557 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_grph_enable(crtc, false); crtc 2559 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE); crtc 2578 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, crtc 2591 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_mode_set(struct drm_crtc *crtc, crtc 2596 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2601 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode); crtc 2602 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode); crtc 2603 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 2604 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode); crtc 2605 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_scaler_setup(crtc); crtc 2606 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_cursor_reset(crtc); crtc 2613 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static bool dce_v10_0_crtc_mode_fixup(struct drm_crtc *crtc, crtc 2617 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2618 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = crtc->dev; crtc 2623 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (encoder->crtc == crtc) { crtc 2634 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) crtc 2636 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode)) crtc 2639 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_crtc->pll_id = dce_v10_0_pick_pll(crtc); crtc 2648 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, crtc 2651 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c return dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 2654 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_set_base_atomic(struct drm_crtc *crtc, crtc 2658 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c return dce_v10_0_crtc_do_set_base(crtc, fb, x, y, 1); crtc 2953 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int crtc, crtc 2958 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) { crtc 2959 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 2965 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); crtc 2968 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); crtc 2971 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); crtc 2974 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); crtc 2982 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int crtc, crtc 2987 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) { crtc 2988 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 2994 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); crtc 2997 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); crtc 3000 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); crtc 3003 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); crtc 3180 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int crtc) crtc 3184 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) { crtc 3185 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 3189 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc]); crtc 3191 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], tmp); crtc 3195 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c int crtc) crtc 3199 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) { crtc 3200 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 3204 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = RREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc]); crtc 3206 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], tmp); crtc 3213 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c unsigned crtc = entry->src_id - 1; crtc 3214 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); crtc 3215 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, crtc); crtc 3219 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (disp_int & interrupt_status_offsets[crtc].vblank) crtc 3220 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_vblank_int_ack(adev, crtc); crtc 3225 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c drm_handle_vblank(adev->ddev, crtc); crtc 3227 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("IH: D%d vblank\n", crtc + 1); crtc 3231 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (disp_int & interrupt_status_offsets[crtc].vline) crtc 3232 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_vline_int_ack(adev, crtc); crtc 3236 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c DRM_DEBUG("IH: D%d vline\n", crtc + 1); crtc 3315 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_interleave(encoder->crtc, mode); crtc 217 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) crtc 219 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc < 0 || crtc >= adev->mode_info.num_crtc) crtc 222 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); crtc 278 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, crtc 281 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) crtc 284 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); crtc 285 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c *position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]); crtc 529 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1568 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1614 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (encoder->crtc) { crtc 1615 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1845 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_vga_enable(struct drm_crtc *crtc, bool enable) crtc 1847 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1848 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 1859 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_grph_enable(struct drm_crtc *crtc, bool enable) crtc 1861 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1862 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 1871 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc, crtc 1875 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1876 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 1891 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (!atomic && !crtc->primary->fb) { crtc 1899 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c target_fb = crtc->primary->fb; crtc 2040 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_vga_enable(crtc, false); crtc 2086 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_grph_enable(crtc, true); crtc 2095 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c viewport_w = crtc->mode.hdisplay; crtc 2096 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c viewport_h = (crtc->mode.vdisplay + 1) & ~1; crtc 2103 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (!atomic && fb && fb != crtc->primary->fb) { crtc 2118 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_set_interleave(struct drm_crtc *crtc, crtc 2121 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 2123 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2134 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_crtc_load_lut(struct drm_crtc *crtc) crtc 2136 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2137 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 2171 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c r = crtc->gamma_store; crtc 2172 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c g = r + crtc->gamma_size; crtc 2173 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b = g + crtc->gamma_size; crtc 2264 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc) crtc 2266 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2267 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 2314 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c pll = amdgpu_pll_get_shared_dp_ppll(crtc); crtc 2320 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c pll = amdgpu_pll_get_shared_nondp_ppll(crtc); crtc 2326 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c pll_in_use = amdgpu_pll_get_use_mask(crtc); crtc 2347 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_lock_cursor(struct drm_crtc *crtc, bool lock) crtc 2349 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2350 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2361 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_hide_cursor(struct drm_crtc *crtc) crtc 2363 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2364 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2372 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_show_cursor(struct drm_crtc *crtc) crtc 2374 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2375 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2389 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_cursor_move_locked(struct drm_crtc *crtc, crtc 2392 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2393 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2400 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c x += crtc->x; crtc 2401 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c y += crtc->y; crtc 2402 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); crtc 2421 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_cursor_move(struct drm_crtc *crtc, crtc 2426 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_lock_cursor(crtc, true); crtc 2427 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c ret = dce_v11_0_cursor_move_locked(crtc, x, y); crtc 2428 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_lock_cursor(crtc, false); crtc 2433 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_cursor_set2(struct drm_crtc *crtc, crtc 2441 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2448 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_hide_cursor(crtc); crtc 2481 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_lock_cursor(crtc, true); crtc 2492 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_cursor_move_locked(crtc, x, y); crtc 2500 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_show_cursor(crtc); crtc 2501 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_lock_cursor(crtc, false); crtc 2518 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_cursor_reset(struct drm_crtc *crtc) crtc 2520 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2523 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_lock_cursor(crtc, true); crtc 2525 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x, crtc 2528 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_show_cursor(crtc); crtc 2530 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_lock_cursor(crtc, false); crtc 2534 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, crtc 2538 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_load_lut(crtc); crtc 2543 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_crtc_destroy(struct drm_crtc *crtc) crtc 2545 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2547 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c drm_crtc_cleanup(crtc); crtc 2560 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 2562 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 2564 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2570 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE); crtc 2571 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_vga_enable(crtc, true); crtc 2572 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); crtc 2573 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_vga_enable(crtc, false); crtc 2579 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c drm_crtc_vblank_on(crtc); crtc 2580 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_load_lut(crtc); crtc 2585 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c drm_crtc_vblank_off(crtc); crtc 2587 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_vga_enable(crtc, true); crtc 2588 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE); crtc 2589 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_vga_enable(crtc, false); crtc 2591 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE); crtc 2599 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_crtc_prepare(struct drm_crtc *crtc) crtc 2602 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE); crtc 2603 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE); crtc 2604 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2607 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_crtc_commit(struct drm_crtc *crtc) crtc 2609 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON); crtc 2610 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE); crtc 2613 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_crtc_disable(struct drm_crtc *crtc) crtc 2615 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2616 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 2621 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2622 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc->primary->fb) { crtc 2626 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); crtc 2636 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_grph_enable(crtc, false); crtc 2638 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE); crtc 2657 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, crtc 2667 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_program_pll(crtc, ATOM_CRTC_INVALID, amdgpu_crtc->pll_id, crtc 2680 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_mode_set(struct drm_crtc *crtc, crtc 2685 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2686 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 2702 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, crtc 2708 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode); crtc 2710 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode); crtc 2711 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 2712 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode); crtc 2713 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_scaler_setup(crtc); crtc 2714 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_cursor_reset(crtc); crtc 2721 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static bool dce_v11_0_crtc_mode_fixup(struct drm_crtc *crtc, crtc 2725 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2726 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = crtc->dev; crtc 2731 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (encoder->crtc == crtc) { crtc 2742 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) crtc 2744 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode)) crtc 2747 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_crtc->pll_id = dce_v11_0_pick_pll(crtc); crtc 2756 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, crtc 2759 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c return dce_v11_0_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 2762 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_set_base_atomic(struct drm_crtc *crtc, crtc 2766 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c return dce_v11_0_crtc_do_set_base(crtc, fb, x, y, 1); crtc 3079 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int crtc, crtc 3084 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc >= adev->mode_info.num_crtc) { crtc 3085 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 3091 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); crtc 3094 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); crtc 3097 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); crtc 3100 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); crtc 3108 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int crtc, crtc 3113 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc >= adev->mode_info.num_crtc) { crtc 3114 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 3120 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); crtc 3123 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); crtc 3126 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); crtc 3129 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); crtc 3306 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int crtc) crtc 3310 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc < 0 || crtc >= adev->mode_info.num_crtc) { crtc 3311 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 3315 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc]); crtc 3317 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], tmp); crtc 3321 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c int crtc) crtc 3325 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc < 0 || crtc >= adev->mode_info.num_crtc) { crtc 3326 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 3330 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = RREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc]); crtc 3332 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], tmp); crtc 3339 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c unsigned crtc = entry->src_id - 1; crtc 3340 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); crtc 3342 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c crtc); crtc 3346 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (disp_int & interrupt_status_offsets[crtc].vblank) crtc 3347 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_vblank_int_ack(adev, crtc); crtc 3352 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c drm_handle_vblank(adev->ddev, crtc); crtc 3354 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("IH: D%d vblank\n", crtc + 1); crtc 3358 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (disp_int & interrupt_status_offsets[crtc].vline) crtc 3359 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_vline_int_ack(adev, crtc); crtc 3363 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c DRM_DEBUG("IH: D%d vline\n", crtc + 1); crtc 3441 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_interleave(encoder->crtc, mode); crtc 151 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static u32 dce_v6_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) crtc 153 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (crtc >= adev->mode_info.num_crtc) crtc 156 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); crtc 212 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, crtc 215 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) crtc 217 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); crtc 218 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c *position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]); crtc 402 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1475 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1661 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (encoder->crtc) { crtc 1662 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1767 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_vga_enable(struct drm_crtc *crtc, bool enable) crtc 1769 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1770 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = crtc->dev; crtc 1778 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_grph_enable(struct drm_crtc *crtc, bool enable) crtc 1780 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1781 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = crtc->dev; crtc 1787 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc, crtc 1791 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1792 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = crtc->dev; crtc 1806 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (!atomic && !crtc->primary->fb) { crtc 1814 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c target_fb = crtc->primary->fb; crtc 1939 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_vga_enable(crtc, false); crtc 1979 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_grph_enable(crtc, true); crtc 1987 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c viewport_w = crtc->mode.hdisplay; crtc 1988 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c viewport_h = (crtc->mode.vdisplay + 1) & ~1; crtc 1996 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (!atomic && fb && fb != crtc->primary->fb) { crtc 2012 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_set_interleave(struct drm_crtc *crtc, crtc 2015 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = crtc->dev; crtc 2017 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2026 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc) crtc 2029 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2030 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = crtc->dev; crtc 2062 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c r = crtc->gamma_store; crtc 2063 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c g = r + crtc->gamma_size; crtc 2064 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b = g + crtc->gamma_size; crtc 2127 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static u32 dce_v6_0_pick_pll(struct drm_crtc *crtc) crtc 2129 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2130 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = crtc->dev; crtc 2143 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c pll = amdgpu_pll_get_shared_nondp_ppll(crtc); crtc 2149 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c pll_in_use = amdgpu_pll_get_use_mask(crtc); crtc 2158 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_lock_cursor(struct drm_crtc *crtc, bool lock) crtc 2160 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2161 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2172 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_hide_cursor(struct drm_crtc *crtc) crtc 2174 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2175 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2184 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_show_cursor(struct drm_crtc *crtc) crtc 2186 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2187 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2201 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_cursor_move_locked(struct drm_crtc *crtc, crtc 2204 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2205 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2214 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c x += crtc->x; crtc 2215 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c y += crtc->y; crtc 2216 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); crtc 2235 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_cursor_move(struct drm_crtc *crtc, crtc 2240 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_lock_cursor(crtc, true); crtc 2241 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c ret = dce_v6_0_cursor_move_locked(crtc, x, y); crtc 2242 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_lock_cursor(crtc, false); crtc 2247 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_cursor_set2(struct drm_crtc *crtc, crtc 2255 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2262 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_hide_cursor(crtc); crtc 2295 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_lock_cursor(crtc, true); crtc 2306 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_cursor_move_locked(crtc, x, y); crtc 2314 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_show_cursor(crtc); crtc 2315 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_lock_cursor(crtc, false); crtc 2332 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_cursor_reset(struct drm_crtc *crtc) crtc 2334 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2337 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_lock_cursor(crtc, true); crtc 2339 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x, crtc 2342 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_show_cursor(crtc); crtc 2343 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_lock_cursor(crtc, false); crtc 2347 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, crtc 2351 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_crtc_load_lut(crtc); crtc 2356 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_crtc_destroy(struct drm_crtc *crtc) crtc 2358 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2360 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c drm_crtc_cleanup(crtc); crtc 2373 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 2375 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = crtc->dev; crtc 2377 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2383 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE); crtc 2384 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); crtc 2390 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c drm_crtc_vblank_on(crtc); crtc 2391 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_crtc_load_lut(crtc); crtc 2396 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c drm_crtc_vblank_off(crtc); crtc 2398 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE); crtc 2399 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE); crtc 2407 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_crtc_prepare(struct drm_crtc *crtc) crtc 2410 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE); crtc 2411 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE); crtc 2412 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2415 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_crtc_commit(struct drm_crtc *crtc) crtc 2417 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON); crtc 2418 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE); crtc 2421 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_crtc_disable(struct drm_crtc *crtc) crtc 2424 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2425 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = crtc->dev; crtc 2430 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2431 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (crtc->primary->fb) { crtc 2435 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); crtc 2445 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_grph_enable(crtc, false); crtc 2447 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE); crtc 2465 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, crtc 2478 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_mode_set(struct drm_crtc *crtc, crtc 2483 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2488 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode); crtc 2489 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode); crtc 2490 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 2491 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode); crtc 2492 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_scaler_setup(crtc); crtc 2493 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_cursor_reset(crtc); crtc 2500 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static bool dce_v6_0_crtc_mode_fixup(struct drm_crtc *crtc, crtc 2505 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2506 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = crtc->dev; crtc 2511 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (encoder->crtc == crtc) { crtc 2522 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) crtc 2524 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode)) crtc 2527 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_crtc->pll_id = dce_v6_0_pick_pll(crtc); crtc 2536 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, crtc 2539 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c return dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 2542 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_set_base_atomic(struct drm_crtc *crtc, crtc 2546 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c return dce_v6_0_crtc_do_set_base(crtc, fb, x, y, 1); crtc 2793 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c int crtc, crtc 2798 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (crtc >= adev->mode_info.num_crtc) { crtc 2799 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 2803 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c switch (crtc) { crtc 2823 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 2844 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c int crtc, crtc 2932 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c unsigned crtc = entry->src_id - 1; crtc 2933 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); crtc 2935 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c crtc); crtc 2939 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (disp_int & interrupt_status_offsets[crtc].vblank) crtc 2940 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmVBLANK_STATUS + crtc_offsets[crtc], VBLANK_ACK); crtc 2945 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c drm_handle_vblank(adev->ddev, crtc); crtc 2947 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c DRM_DEBUG("IH: D%d vblank\n", crtc + 1); crtc 2950 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (disp_int & interrupt_status_offsets[crtc].vline) crtc 2951 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmVLINE_STATUS + crtc_offsets[crtc], VLINE_ACK); crtc 2955 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c DRM_DEBUG("IH: D%d vline\n", crtc + 1); crtc 3113 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_interleave(encoder->crtc, mode); crtc 147 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static u32 dce_v8_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) crtc 149 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (crtc >= adev->mode_info.num_crtc) crtc 152 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); crtc 205 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, crtc 208 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) crtc 211 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]); crtc 212 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c *position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]); crtc 443 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1477 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1521 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (encoder->crtc) { crtc 1522 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); crtc 1732 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_vga_enable(struct drm_crtc *crtc, bool enable) crtc 1734 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1735 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = crtc->dev; crtc 1746 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_grph_enable(struct drm_crtc *crtc, bool enable) crtc 1748 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1749 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = crtc->dev; crtc 1758 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc, crtc 1762 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1763 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = crtc->dev; crtc 1778 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (!atomic && !crtc->primary->fb) { crtc 1786 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c target_fb = crtc->primary->fb; crtc 1913 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_vga_enable(crtc, false); crtc 1953 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_grph_enable(crtc, true); crtc 1962 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c viewport_w = crtc->mode.hdisplay; crtc 1963 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c viewport_h = (crtc->mode.vdisplay + 1) & ~1; crtc 1970 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (!atomic && fb && fb != crtc->primary->fb) { crtc 1985 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_set_interleave(struct drm_crtc *crtc, crtc 1988 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = crtc->dev; crtc 1990 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1999 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_crtc_load_lut(struct drm_crtc *crtc) crtc 2001 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2002 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = crtc->dev; crtc 2034 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c r = crtc->gamma_store; crtc 2035 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c g = r + crtc->gamma_size; crtc 2036 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b = g + crtc->gamma_size; crtc 2121 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static u32 dce_v8_0_pick_pll(struct drm_crtc *crtc) crtc 2123 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2124 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = crtc->dev; crtc 2135 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c pll = amdgpu_pll_get_shared_dp_ppll(crtc); crtc 2141 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c pll = amdgpu_pll_get_shared_nondp_ppll(crtc); crtc 2149 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c pll_in_use = amdgpu_pll_get_use_mask(crtc); crtc 2158 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c pll_in_use = amdgpu_pll_get_use_mask(crtc); crtc 2171 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_lock_cursor(struct drm_crtc *crtc, bool lock) crtc 2173 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2174 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2185 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_hide_cursor(struct drm_crtc *crtc) crtc 2187 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2188 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2195 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_show_cursor(struct drm_crtc *crtc) crtc 2197 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2198 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2211 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_cursor_move_locked(struct drm_crtc *crtc, crtc 2214 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2215 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 2222 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c x += crtc->x; crtc 2223 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c y += crtc->y; crtc 2224 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); crtc 2243 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_cursor_move(struct drm_crtc *crtc, crtc 2248 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_lock_cursor(crtc, true); crtc 2249 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c ret = dce_v8_0_cursor_move_locked(crtc, x, y); crtc 2250 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_lock_cursor(crtc, false); crtc 2255 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_cursor_set2(struct drm_crtc *crtc, crtc 2263 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2270 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_hide_cursor(crtc); crtc 2303 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_lock_cursor(crtc, true); crtc 2314 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_cursor_move_locked(crtc, x, y); crtc 2322 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_show_cursor(crtc); crtc 2323 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_lock_cursor(crtc, false); crtc 2340 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_cursor_reset(struct drm_crtc *crtc) crtc 2342 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2345 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_lock_cursor(crtc, true); crtc 2347 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x, crtc 2350 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_show_cursor(crtc); crtc 2352 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_lock_cursor(crtc, false); crtc 2356 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, crtc 2360 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_crtc_load_lut(crtc); crtc 2365 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_crtc_destroy(struct drm_crtc *crtc) crtc 2367 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2369 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c drm_crtc_cleanup(crtc); crtc 2382 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 2384 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = crtc->dev; crtc 2386 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2392 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE); crtc 2393 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_vga_enable(crtc, true); crtc 2394 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); crtc 2395 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_vga_enable(crtc, false); crtc 2401 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c drm_crtc_vblank_on(crtc); crtc 2402 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_crtc_load_lut(crtc); crtc 2407 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c drm_crtc_vblank_off(crtc); crtc 2409 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_vga_enable(crtc, true); crtc 2410 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE); crtc 2411 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_vga_enable(crtc, false); crtc 2413 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE); crtc 2421 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_crtc_prepare(struct drm_crtc *crtc) crtc 2424 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE); crtc 2425 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE); crtc 2426 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2429 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_crtc_commit(struct drm_crtc *crtc) crtc 2431 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON); crtc 2432 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE); crtc 2435 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_crtc_disable(struct drm_crtc *crtc) crtc 2437 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2438 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = crtc->dev; crtc 2443 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2444 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (crtc->primary->fb) { crtc 2448 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]); crtc 2458 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_grph_enable(crtc, false); crtc 2460 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE); crtc 2478 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, crtc 2486 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, crtc 2499 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_mode_set(struct drm_crtc *crtc, crtc 2504 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2509 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode); crtc 2510 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode); crtc 2511 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 2512 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode); crtc 2513 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_scaler_setup(crtc); crtc 2514 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_cursor_reset(crtc); crtc 2521 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static bool dce_v8_0_crtc_mode_fixup(struct drm_crtc *crtc, crtc 2525 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 2526 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = crtc->dev; crtc 2531 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (encoder->crtc == crtc) { crtc 2542 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (!amdgpu_display_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) crtc 2544 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode)) crtc 2547 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_crtc->pll_id = dce_v8_0_pick_pll(crtc); crtc 2556 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_set_base(struct drm_crtc *crtc, int x, int y, crtc 2559 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c return dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 2562 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_set_base_atomic(struct drm_crtc *crtc, crtc 2566 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c return dce_v8_0_crtc_do_set_base(crtc, fb, x, y, 1); crtc 2841 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c int crtc, crtc 2846 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (crtc >= adev->mode_info.num_crtc) { crtc 2847 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 2851 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c switch (crtc) { crtc 2871 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 2892 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c int crtc, crtc 2897 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (crtc >= adev->mode_info.num_crtc) { crtc 2898 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 2902 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c switch (crtc) { crtc 2922 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 3024 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c unsigned crtc = entry->src_id - 1; crtc 3025 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); crtc 3027 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c crtc); crtc 3031 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (disp_int & interrupt_status_offsets[crtc].vblank) crtc 3032 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], LB_VBLANK_STATUS__VBLANK_ACK_MASK); crtc 3037 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c drm_handle_vblank(adev->ddev, crtc); crtc 3039 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c DRM_DEBUG("IH: D%d vblank\n", crtc + 1); crtc 3042 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (disp_int & interrupt_status_offsets[crtc].vline) crtc 3043 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], LB_VLINE_STATUS__VLINE_ACK_MASK); crtc 3047 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c DRM_DEBUG("IH: D%d vline\n", crtc + 1); crtc 3203 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_interleave(encoder->crtc, mode); crtc 51 drivers/gpu/drm/amd/amdgpu/dce_virtual.c int crtc, crtc 54 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static u32 dce_virtual_vblank_get_counter(struct amdgpu_device *adev, int crtc) crtc 65 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, crtc 104 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, crtc 111 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_crtc_destroy(struct drm_crtc *crtc) crtc 113 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 115 drivers/gpu/drm/amd/amdgpu/dce_virtual.c drm_crtc_cleanup(crtc); crtc 128 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 130 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct drm_device *dev = crtc->dev; crtc 132 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 145 drivers/gpu/drm/amd/amdgpu/dce_virtual.c drm_crtc_vblank_on(crtc); crtc 150 drivers/gpu/drm/amd/amdgpu/dce_virtual.c drm_crtc_vblank_off(crtc); crtc 157 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_crtc_prepare(struct drm_crtc *crtc) crtc 159 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_virtual_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 162 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_crtc_commit(struct drm_crtc *crtc) crtc 164 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_virtual_crtc_dpms(crtc, DRM_MODE_DPMS_ON); crtc 167 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_crtc_disable(struct drm_crtc *crtc) crtc 169 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 171 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_virtual_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 178 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_crtc_mode_set(struct drm_crtc *crtc, crtc 183 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 191 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static bool dce_virtual_crtc_mode_fixup(struct drm_crtc *crtc, crtc 199 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_crtc_set_base(struct drm_crtc *crtc, int x, int y, crtc 205 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_crtc_set_base_atomic(struct drm_crtc *crtc, crtc 703 drivers/gpu/drm/amd/amdgpu/dce_virtual.c int crtc, crtc 706 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (crtc >= adev->mode_info.num_crtc || !adev->mode_info.crtcs[crtc]) { crtc 707 drivers/gpu/drm/amd/amdgpu/dce_virtual.c DRM_DEBUG("invalid crtc %d\n", crtc); crtc 711 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (state && !adev->mode_info.crtcs[crtc]->vsync_timer_enabled) { crtc 713 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_init(&adev->mode_info.crtcs[crtc]->vblank_timer, crtc 715 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_set_expires(&adev->mode_info.crtcs[crtc]->vblank_timer, crtc 717 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.crtcs[crtc]->vblank_timer.function = crtc 719 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_start(&adev->mode_info.crtcs[crtc]->vblank_timer, crtc 721 drivers/gpu/drm/amd/amdgpu/dce_virtual.c } else if (!state && adev->mode_info.crtcs[crtc]->vsync_timer_enabled) { crtc 723 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_cancel(&adev->mode_info.crtcs[crtc]->vblank_timer); crtc 726 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.crtcs[crtc]->vsync_timer_enabled = state; crtc 727 drivers/gpu/drm/amd/amdgpu/dce_virtual.c DRM_DEBUG("[FM]set crtc %d vblank interrupt state %d\n", crtc, state); crtc 159 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static u32 dm_vblank_get_counter(struct amdgpu_device *adev, int crtc) crtc 161 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (crtc >= adev->mode_info.num_crtc) crtc 164 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; crtc 171 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc); crtc 179 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, crtc 184 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) crtc 187 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; crtc 193 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc); crtc 242 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc; crtc 250 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 251 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 1065 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc) crtc 1073 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc_from_state = new_con_state->crtc; crtc 1075 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (crtc_from_state == crtc) crtc 1171 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc; crtc 1233 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(dm->cached_state, crtc, new_crtc_state, i) crtc 1241 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(dm->cached_state, crtc, new_crtc_state, i) { crtc 3670 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void amdgpu_dm_crtc_destroy(struct drm_crtc *crtc) crtc 3672 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_crtc_cleanup(crtc); crtc 3673 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c kfree(crtc); crtc 3676 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void dm_crtc_destroy_state(struct drm_crtc *crtc, crtc 3692 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void dm_crtc_reset_state(struct drm_crtc *crtc) crtc 3696 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (crtc->state) crtc 3697 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_crtc_destroy_state(crtc, crtc->state); crtc 3703 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc->state = &state->base; crtc 3704 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc->state->crtc = crtc; crtc 3709 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_crtc_duplicate_state(struct drm_crtc *crtc) crtc 3713 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c cur = to_dm_crtc_state(crtc->state); crtc 3715 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (WARN_ON(!crtc->state)) crtc 3722 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); crtc 3745 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static inline int dm_set_vupdate_irq(struct drm_crtc *crtc, bool enable) crtc 3748 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); crtc 3749 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 3761 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static inline int dm_set_vblank(struct drm_crtc *crtc, bool enable) crtc 3764 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); crtc 3765 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 3766 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dm_crtc_state *acrtc_state = to_dm_crtc_state(crtc->state); crtc 3772 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c rc = dm_set_vupdate_irq(crtc, true); crtc 3775 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c rc = dm_set_vupdate_irq(crtc, false); crtc 3785 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int dm_enable_vblank(struct drm_crtc *crtc) crtc 3787 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c return dm_set_vblank(crtc, true); crtc 3790 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void dm_disable_vblank(struct drm_crtc *crtc) crtc 3792 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_set_vblank(crtc, false); crtc 4237 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc = new_con_state->crtc; crtc 4241 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!crtc) crtc 4251 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 4287 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void dm_crtc_helper_disable(struct drm_crtc *crtc) crtc 4293 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_device *dev = new_crtc_state->crtc->dev; crtc 4342 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_update_crtc_interrupt_state(struct drm_crtc *crtc, crtc 4361 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int dm_crtc_helper_atomic_check(struct drm_crtc *crtc, crtc 4364 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 4375 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_update_crtc_interrupt_state(crtc, state); crtc 4402 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static bool dm_crtc_helper_mode_fixup(struct drm_crtc *crtc, crtc 5362 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc, crtc 5365 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 5373 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!crtc || !plane->state->fb) crtc 5392 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (crtc->primary->state) { crtc 5394 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c x += crtc->primary->state->src_x >> 16; crtc 5395 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c y += crtc->primary->state->src_y >> 16; crtc 5420 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc = afb ? plane->state->crtc : old_plane_state->crtc; crtc 5421 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dm_crtc_state *crtc_state = crtc ? to_dm_crtc_state(crtc->state) : NULL; crtc 5422 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); crtc 5437 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = get_cursor_position(plane, crtc, &position); crtc 5569 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->base.crtc->base.id, crtc 5637 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_set_vupdate_irq(new_state->base.crtc, true); crtc 5638 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_crtc_vblank_get(new_state->base.crtc); crtc 5640 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c __func__, new_state->base.crtc->base.id); crtc 5645 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_set_vupdate_irq(new_state->base.crtc, false); crtc 5646 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_crtc_vblank_put(new_state->base.crtc); crtc 5648 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c __func__, new_state->base.crtc->base.id); crtc 5718 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc = new_plane_state->crtc; crtc 5729 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!fb || !crtc || pcrtc != crtc) crtc 5732 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 5804 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc->state->async_flip && crtc 5969 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (old_con_state->crtc != new_con_state->crtc) { crtc 5974 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!new_con_state->crtc) crtc 5978 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c state, new_con_state->crtc); crtc 5999 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!new_con_state->crtc) crtc 6003 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c state, new_con_state->crtc); crtc 6047 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc; crtc 6054 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc 6056 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); crtc 6081 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc, dm_new_crtc_state, crtc 6106 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc; crtc 6126 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 6129 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); crtc 6162 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc; crtc 6185 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 6186 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); crtc 6245 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc->hwmode = new_crtc_state->mode; crtc 6262 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 6263 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); crtc 6286 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc); crtc 6321 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c update_stream_scaling_settings(&dm_new_con_state->base.crtc->mode, crtc 6363 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc 6382 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, j) crtc 6387 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, j) { crtc 6392 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm, crtc, wait_for_vblank); crtc 6406 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 6442 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *disconnected_acrtc = to_amdgpu_crtc(connector->encoder->crtc); crtc 6509 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c disconnected_acrtc = to_amdgpu_crtc(connector->encoder->crtc); crtc 6533 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc; crtc 6546 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 6547 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_lock(&crtc->commit_lock); crtc 6548 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c commit = list_first_entry_or_null(&crtc->commit_list, crtc 6552 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_unlock(&crtc->commit_lock); crtc 6569 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c "timed out\n", crtc->base.id, crtc->name); crtc 6620 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc, crtc 6644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c acrtc = to_amdgpu_crtc(crtc); crtc 6645 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c aconnector = amdgpu_dm_find_first_crtc_matching_connector(state, crtc); crtc 6737 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc->base.id); crtc 6781 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc->base.id); crtc 6867 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (old_plane_state->crtc != new_plane_state->crtc) crtc 6871 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!new_plane_state->crtc) crtc 6875 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_atomic_get_new_crtc_state(state, new_plane_state->crtc); crtc 6899 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (old_other_state->crtc != new_plane_state->crtc && crtc 6900 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_other_state->crtc != new_plane_state->crtc) crtc 6903 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (old_other_state->crtc != new_other_state->crtc) crtc 6934 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_plane_crtc = new_plane_state->crtc; crtc 6935 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c old_plane_crtc = old_plane_state->crtc; crtc 7085 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc; crtc 7102 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 7127 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_plane_crtc = new_plane_state->crtc; crtc 7128 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c old_plane_crtc = old_plane_state->crtc; crtc 7140 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (crtc != new_plane_crtc) crtc 7263 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc *crtc; crtc 7282 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 7291 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = drm_atomic_add_affected_connectors(state, crtc); crtc 7295 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = drm_atomic_add_affected_planes(state, crtc); crtc 7305 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_for_each_crtc(crtc, dev) { crtc 7312 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (new_plane_state->crtc == crtc || crtc 7313 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c old_plane_state->crtc == crtc) { crtc 7322 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_for_each_plane_mask(plane, state->dev, crtc->state->plane_mask) { crtc 7348 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 7349 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = dm_update_crtc_state(&adev->dm, state, crtc, crtc 7359 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 7360 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = dm_update_crtc_state(&adev->dm, state, crtc, crtc 7413 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = to_amdgpu_crtc(dm_new_con_state->base.crtc); crtc 7483 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state (state, crtc, new_crtc_state, i) { crtc 390 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc); crtc 391 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc, crtc 299 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) crtc 301 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c struct dc_stream_state *stream = crtc->stream; crtc 303 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c (struct amdgpu_device *)crtc->base.state->dev->dev_private; crtc 312 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c degamma_lut = __extract_blob_lut(crtc->base.degamma_lut, °amma_size); crtc 316 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c regamma_lut = __extract_blob_lut(crtc->base.gamma_lut, ®amma_size); crtc 330 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c crtc->cm_has_degamma = false; crtc 331 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c crtc->cm_is_degamma_srgb = false; crtc 346 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c crtc->cm_is_degamma_srgb = true; crtc 377 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c crtc->cm_has_degamma = has_degamma; crtc 380 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c if (crtc->base.ctm) { crtc 381 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c ctm = (struct drm_color_ctm *)crtc->base.ctm->data; crtc 416 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc, crtc 423 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c if (crtc->cm_has_degamma) { crtc 424 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c degamma_lut = __extract_blob_lut(crtc->base.degamma_lut, crtc 455 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c if (crtc->cm_is_degamma_srgb) crtc 466 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c } else if (crtc->cm_is_degamma_srgb) { crtc 77 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c const char *const *amdgpu_dm_crtc_get_crc_sources(struct drm_crtc *crtc, crtc 85 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc, const char *src_name, crtc 92 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c src_name, crtc->index); crtc 100 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc, crtc 104 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c struct amdgpu_device *adev = crtc->dev->dev_private; crtc 137 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name) crtc 149 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c src_name, crtc->index); crtc 153 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c ret = drm_modeset_lock(&crtc->mutex, NULL); crtc 157 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c spin_lock(&crtc->commit_lock); crtc 158 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c commit = list_first_entry_or_null(&crtc->commit_list, crtc 162 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c spin_unlock(&crtc->commit_lock); crtc 179 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c crtc_state = to_dm_crtc_state(crtc->state); crtc 201 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c drm_connector_list_iter_begin(crtc->dev, &conn_iter); crtc 203 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c if (!connector->state || connector->state->crtc != crtc) crtc 212 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c DRM_DEBUG_DRIVER("No amd connector matching CRTC-%d\n", crtc->index); crtc 226 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c if (amdgpu_dm_crtc_configure_crc_source(crtc, crtc_state, source)) { crtc 237 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c ret = drm_crtc_vblank_get(crtc); crtc 242 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c if (drm_dp_start_crc(aux, crtc)) { crtc 249 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c drm_crtc_vblank_put(crtc); crtc 268 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c drm_modeset_unlock(&crtc->mutex); crtc 280 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc) crtc 286 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c if (crtc == NULL) crtc 289 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c crtc_state = to_dm_crtc_state(crtc->state); crtc 312 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c drm_crtc_add_crc_entry(crtc, true, crtc 313 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c drm_crtc_accurate_vblank_count(crtc), crcs); crtc 50 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc, crtc 53 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name); crtc 54 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h int amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc, crtc 57 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h const char *const *amdgpu_dm_crtc_get_crc_sources(struct drm_crtc *crtc, crtc 59 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc); crtc 685 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct drm_crtc *crtc = NULL; crtc 696 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c crtc = connector->state->crtc; crtc 697 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c if (crtc == NULL) crtc 700 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c drm_modeset_lock(&crtc->mutex, NULL); crtc 701 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c if (crtc->state == NULL) crtc 704 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c dm_crtc_state = to_dm_crtc_state(crtc->state); crtc 733 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c if (crtc) crtc 734 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c drm_modeset_unlock(&crtc->mutex); crtc 789 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c acrtc_state = to_dm_crtc_state(connector->base.state->crtc->state); crtc 41 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c uint32_t crtc; crtc 46 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 49 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 52 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 55 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 58 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c .crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 61 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 66 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c (reg + reg_offsets[id].crtc) crtc 108 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL), crtc 112 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL), crtc 116 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL), crtc 120 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL), crtc 124 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL), crtc 128 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c .crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL), crtc 86 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c uint32_t crtc; crtc 91 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 94 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 97 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 100 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c .crtc = (mmCRTCV_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 108 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c (reg + reg_offsets[id].crtc) crtc 119 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL), crtc 123 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL), crtc 127 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL), crtc 131 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL), crtc 135 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL), crtc 139 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c .crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL), crtc 48 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c #define CRTC_REG(reg) (reg + tg110->offsets.crtc) crtc 89 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h int32_t crtc; crtc 38 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c uint32_t crtc; crtc 44 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 47 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 50 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 53 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 56 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c .crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 59 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 63 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c (reg + reg_offsets[id].crtc) crtc 118 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL), crtc 122 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL), crtc 126 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL), crtc 130 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL), crtc 134 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL), crtc 138 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c .crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL), crtc 50 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c uint32_t crtc; crtc 55 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL), crtc 58 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL), crtc 61 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL), crtc 64 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL), crtc 67 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c .crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL), crtc 70 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL), crtc 75 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c (reg + reg_offsets[id].crtc) crtc 102 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL), crtc 105 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL), crtc 108 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL), crtc 111 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL), crtc 114 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL), crtc 117 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c .crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC0_CRTC_CONTROL), crtc 43 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c generic_reg_update_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__) crtc 46 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c generic_reg_set_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__) crtc 93 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 176 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 192 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 203 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 253 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 261 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_GSL_WINDOW, tg110->offsets.crtc, 0); crtc 315 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 377 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 516 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 521 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, crtc 531 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, crtc 611 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 626 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 648 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 676 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 698 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, crtc 717 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 721 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, crtc 758 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 786 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, 0); crtc 941 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, 0); crtc 980 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value); crtc 993 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value); crtc 1067 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, 0); crtc 1070 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, 0); crtc 1082 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_CONTROL, tg110->offsets.crtc, value); crtc 1083 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_COLOR, tg110->offsets.crtc, value); crtc 1084 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c dm_write_reg_soc15(ctx, mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS, tg110->offsets.crtc, value); crtc 1124 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 1142 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc, 0); crtc 1184 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 1192 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 1197 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c tg110->offsets.crtc); crtc 40 drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c uint32_t crtc; crtc 45 drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 48 drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 51 drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 54 drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 57 drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c .crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 60 drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL), crtc 65 drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c (reg + reg_offsets[id].crtc) crtc 113 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC0_CRTC_CONTROL - mmCRTC_CONTROL), crtc 119 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC1_CRTC_CONTROL - mmCRTC_CONTROL), crtc 125 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC2_CRTC_CONTROL - mmCRTC_CONTROL), crtc 131 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC3_CRTC_CONTROL - mmCRTC_CONTROL), crtc 137 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC4_CRTC_CONTROL - mmCRTC_CONTROL), crtc 143 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c .crtc = (mmCRTC5_CRTC_CONTROL - mmCRTC_CONTROL), crtc 53 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c .crtc = (mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL), crtc 57 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c .crtc = (mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL), crtc 61 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c .crtc = (mmCRTC2_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL), crtc 65 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c .crtc = (mmCRTC3_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL), crtc 69 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c .crtc = (mmCRTC4_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL), crtc 73 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c .crtc = (mmCRTC5_DCFE_MEM_LIGHT_SLEEP_CNTL - mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL), crtc 83 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c #define CRTC_REG(reg) (reg + tg110->offsets.crtc) crtc 15 drivers/gpu/drm/arc/arcpgu.h struct drm_crtc crtc; crtc 19 drivers/gpu/drm/arc/arcpgu.h #define crtc_to_arcpgu_priv(x) container_of(x, struct arcpgu_drm_private, crtc) crtc 28 drivers/gpu/drm/arc/arcpgu_crtc.c static void arc_pgu_set_pxl_fmt(struct drm_crtc *crtc) crtc 30 drivers/gpu/drm/arc/arcpgu_crtc.c struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc); crtc 31 drivers/gpu/drm/arc/arcpgu_crtc.c const struct drm_framebuffer *fb = crtc->primary->state->fb; crtc 60 drivers/gpu/drm/arc/arcpgu_crtc.c static enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc, crtc 63 drivers/gpu/drm/arc/arcpgu_crtc.c struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc); crtc 74 drivers/gpu/drm/arc/arcpgu_crtc.c static void arc_pgu_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 76 drivers/gpu/drm/arc/arcpgu_crtc.c struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc); crtc 77 drivers/gpu/drm/arc/arcpgu_crtc.c struct drm_display_mode *m = &crtc->state->adjusted_mode; crtc 111 drivers/gpu/drm/arc/arcpgu_crtc.c arc_pgu_set_pxl_fmt(crtc); crtc 116 drivers/gpu/drm/arc/arcpgu_crtc.c static void arc_pgu_crtc_atomic_enable(struct drm_crtc *crtc, crtc 119 drivers/gpu/drm/arc/arcpgu_crtc.c struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc); crtc 127 drivers/gpu/drm/arc/arcpgu_crtc.c static void arc_pgu_crtc_atomic_disable(struct drm_crtc *crtc, crtc 130 drivers/gpu/drm/arc/arcpgu_crtc.c struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc); crtc 138 drivers/gpu/drm/arc/arcpgu_crtc.c static void arc_pgu_crtc_atomic_begin(struct drm_crtc *crtc, crtc 141 drivers/gpu/drm/arc/arcpgu_crtc.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 144 drivers/gpu/drm/arc/arcpgu_crtc.c crtc->state->event = NULL; crtc 146 drivers/gpu/drm/arc/arcpgu_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 147 drivers/gpu/drm/arc/arcpgu_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 148 drivers/gpu/drm/arc/arcpgu_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 166 drivers/gpu/drm/arc/arcpgu_crtc.c if (!plane->state->crtc || !plane->state->fb) crtc 169 drivers/gpu/drm/arc/arcpgu_crtc.c arcpgu = crtc_to_arcpgu_priv(plane->state->crtc); crtc 229 drivers/gpu/drm/arc/arcpgu_crtc.c ret = drm_crtc_init_with_planes(drm, &arcpgu->crtc, primary, NULL, crtc 236 drivers/gpu/drm/arc/arcpgu_crtc.c drm_crtc_helper_add(&arcpgu->crtc, &arc_pgu_crtc_helper_funcs); crtc 119 drivers/gpu/drm/arc/arcpgu_drv.c unsigned long mode_clock = arcpgu->crtc.mode.crtc_clock * 1000; crtc 1032 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c struct drm_crtc_state *crtc_st = state->crtc->state; crtc 49 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_atomic_check(struct drm_crtc *crtc, crtc 52 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc *kcrtc = to_kcrtc(crtc); crtc 173 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct drm_crtc *crtc = &kcrtc->base; crtc 177 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_crtc_handle_vblank(crtc); crtc 196 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 200 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c } else if (crtc->state->event) { crtc 201 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c event = crtc->state->event; crtc 206 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc->state->event = NULL; crtc 207 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 212 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 217 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_do_flush(struct drm_crtc *crtc, crtc 220 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc *kcrtc = to_kcrtc(crtc); crtc 221 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc->state); crtc 229 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_crtc_index(crtc), crtc 248 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_atomic_enable(struct drm_crtc *crtc, crtc 251 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_prepare(to_kcrtc(crtc)); crtc 252 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_crtc_vblank_on(crtc); crtc 253 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c WARN_ON(drm_crtc_vblank_get(crtc)); crtc 254 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_do_flush(crtc, old); crtc 258 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_atomic_disable(struct drm_crtc *crtc, crtc 261 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc *kcrtc = to_kcrtc(crtc); crtc 263 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_dev *mdev = crtc->dev->dev_private; crtc 266 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct completion *disable_done = &crtc->state->commit->flip_done; crtc 271 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_crtc_index(crtc), crtc 297 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c if (crtc->state->active) { crtc 314 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c if (crtc->state->active) { crtc 317 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 319 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 323 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_crtc_vblank_put(crtc); crtc 324 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_crtc_vblank_off(crtc); crtc 329 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_atomic_flush(struct drm_crtc *crtc, crtc 333 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c if (drm_atomic_crtc_needs_modeset(crtc->state)) crtc 336 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_do_flush(crtc, old); crtc 356 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct drm_crtc *crtc = kcrtc_st->base.crtc; crtc 357 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_dev *mdev = crtc->dev->dev_private; crtc 361 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), pxlclk); crtc 367 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m) crtc 369 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_dev *mdev = crtc->dev->dev_private; crtc 370 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc *kcrtc = to_kcrtc(crtc); crtc 387 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), min_pxlclk); crtc 398 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc, crtc 402 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc *kcrtc = to_kcrtc(crtc); crtc 432 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c static void komeda_crtc_reset(struct drm_crtc *crtc) crtc 436 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c if (crtc->state) crtc 437 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c __drm_atomic_helper_crtc_destroy_state(crtc->state); crtc 439 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c kfree(to_kcrtc_st(crtc->state)); crtc 440 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc->state = NULL; crtc 444 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc->state = &state->base; crtc 445 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc->state->crtc = crtc; crtc 450 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c komeda_crtc_atomic_duplicate_state(struct drm_crtc *crtc) crtc 452 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc_state *old = to_kcrtc_st(crtc->state); crtc 459 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &new->base); crtc 468 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c static void komeda_crtc_atomic_destroy_state(struct drm_crtc *crtc, crtc 475 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c static int komeda_crtc_vblank_enable(struct drm_crtc *crtc) crtc 477 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_dev *mdev = crtc->dev->dev_private; crtc 478 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc *kcrtc = to_kcrtc(crtc); crtc 484 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c static void komeda_crtc_vblank_disable(struct drm_crtc *crtc) crtc 486 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_dev *mdev = crtc->dev->dev_private; crtc 487 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc *kcrtc = to_kcrtc(crtc); crtc 507 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct komeda_crtc *crtc; crtc 515 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc = &kms->crtcs[kms->n_crtcs]; crtc 518 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc->master = master; crtc 519 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc->slave = komeda_pipeline_get_slave(master); crtc 521 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c if (crtc->slave) crtc 522 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c sprintf(str, "pipe-%d", crtc->slave->id); crtc 536 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc) crtc 547 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c if (kplane->layer->base.pipeline == crtc->master) crtc 557 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c struct drm_crtc *crtc = &kcrtc->base; crtc 560 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c err = drm_crtc_init_with_planes(&kms->base, crtc, crtc 566 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs); crtc 567 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c drm_crtc_vblank_reset(crtc); crtc 569 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c crtc->port = kcrtc->master->of_output_port; crtc 140 drivers/gpu/drm/arm/display/komeda/komeda_kms.c static int komeda_crtc_normalize_zpos(struct drm_crtc *crtc, crtc 144 drivers/gpu/drm/arm/display/komeda/komeda_kms.c struct komeda_crtc *kcrtc = to_kcrtc(crtc); crtc 153 drivers/gpu/drm/arm/display/komeda/komeda_kms.c crtc->base.id, crtc->name); crtc 158 drivers/gpu/drm/arm/display/komeda/komeda_kms.c drm_for_each_plane_mask(plane, crtc->dev, crtc_st->plane_mask) { crtc 204 drivers/gpu/drm/arm/display/komeda/komeda_kms.c struct drm_crtc *crtc; crtc 216 drivers/gpu/drm/arm/display/komeda/komeda_kms.c for_each_new_crtc_in_state(state, crtc, new_crtc_st, i) { crtc 217 drivers/gpu/drm/arm/display/komeda/komeda_kms.c err = drm_atomic_add_affected_planes(state, crtc); crtc 221 drivers/gpu/drm/arm/display/komeda/komeda_kms.c err = komeda_crtc_normalize_zpos(crtc, new_crtc_st); crtc 138 drivers/gpu/drm/arm/display/komeda/komeda_kms.h struct komeda_wb_connector *wb_conn = to_kcrtc(st->crtc)->wb_conn; crtc 150 drivers/gpu/drm/arm/display/komeda/komeda_kms.h old_st = drm_atomic_get_old_crtc_state(st->state, st->crtc); crtc 171 drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h struct drm_crtc *crtc; crtc 438 drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h struct drm_crtc *crtc; crtc 64 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c struct drm_crtc *crtc) crtc 72 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c if (is_switching_user(crtc, st->crtc)) { crtc 74 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c drm_crtc_index(crtc), pipe->id); crtc 79 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c if (!crtc && st->active_comps) { crtc 84 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c st->crtc = crtc; crtc 86 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c if (crtc) { crtc 90 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c crtc)); crtc 154 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c struct drm_crtc *crtc) crtc 161 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c state, crtc); crtc 337 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c plane_st->state, plane_st->plane, plane_st->crtc); crtc 396 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c conn_st->state, conn_st->connector, conn_st->crtc); crtc 512 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c drm_st, user, kcrtc_st->base.crtc); crtc 573 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c conn_st->state, conn_st->connector, conn_st->crtc); crtc 623 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c kcrtc_st->base.state, kcrtc_st->base.crtc, kcrtc_st->base.crtc); crtc 673 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c kcrtc_st->base.crtc, kcrtc_st->base.crtc); crtc 711 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c state->base.state, state->base.crtc, state->base.crtc); crtc 745 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c struct drm_crtc *crtc = kcrtc_st->base.crtc; crtc 750 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c kcrtc_st->base.state, crtc, crtc); crtc 770 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c struct drm_crtc *crtc = kcrtc_st->base.crtc; crtc 775 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c kcrtc_st->base.state, crtc, crtc); crtc 1192 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c drm_st, NULL, new->crtc); crtc 28 drivers/gpu/drm/arm/display/komeda/komeda_plane.c if (pipe == to_kcrtc(st->crtc)->master) crtc 84 drivers/gpu/drm/arm/display/komeda/komeda_plane.c if (!state->crtc || !state->fb) crtc 87 drivers/gpu/drm/arm/display/komeda/komeda_plane.c crtc_st = drm_atomic_get_crtc_state(state->state, state->crtc); crtc 209 drivers/gpu/drm/arm/display/komeda/komeda_plane.c struct komeda_crtc *crtc; crtc 214 drivers/gpu/drm/arm/display/komeda/komeda_plane.c crtc = &kms->crtcs[i]; crtc 216 drivers/gpu/drm/arm/display/komeda/komeda_plane.c if ((pipe == crtc->master) || (pipe == crtc->slave)) crtc 39 drivers/gpu/drm/arm/hdlcd_crtc.c static void hdlcd_crtc_cleanup(struct drm_crtc *crtc) crtc 41 drivers/gpu/drm/arm/hdlcd_crtc.c struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); crtc 45 drivers/gpu/drm/arm/hdlcd_crtc.c drm_crtc_cleanup(crtc); crtc 48 drivers/gpu/drm/arm/hdlcd_crtc.c static int hdlcd_crtc_enable_vblank(struct drm_crtc *crtc) crtc 50 drivers/gpu/drm/arm/hdlcd_crtc.c struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); crtc 58 drivers/gpu/drm/arm/hdlcd_crtc.c static void hdlcd_crtc_disable_vblank(struct drm_crtc *crtc) crtc 60 drivers/gpu/drm/arm/hdlcd_crtc.c struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); crtc 82 drivers/gpu/drm/arm/hdlcd_crtc.c static int hdlcd_set_pxl_fmt(struct drm_crtc *crtc) crtc 85 drivers/gpu/drm/arm/hdlcd_crtc.c struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); crtc 86 drivers/gpu/drm/arm/hdlcd_crtc.c const struct drm_framebuffer *fb = crtc->primary->state->fb; crtc 128 drivers/gpu/drm/arm/hdlcd_crtc.c static void hdlcd_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 130 drivers/gpu/drm/arm/hdlcd_crtc.c struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); crtc 131 drivers/gpu/drm/arm/hdlcd_crtc.c struct drm_display_mode *m = &crtc->state->adjusted_mode; crtc 163 drivers/gpu/drm/arm/hdlcd_crtc.c err = hdlcd_set_pxl_fmt(crtc); crtc 170 drivers/gpu/drm/arm/hdlcd_crtc.c static void hdlcd_crtc_atomic_enable(struct drm_crtc *crtc, crtc 173 drivers/gpu/drm/arm/hdlcd_crtc.c struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); crtc 176 drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb(crtc); crtc 178 drivers/gpu/drm/arm/hdlcd_crtc.c drm_crtc_vblank_on(crtc); crtc 181 drivers/gpu/drm/arm/hdlcd_crtc.c static void hdlcd_crtc_atomic_disable(struct drm_crtc *crtc, crtc 184 drivers/gpu/drm/arm/hdlcd_crtc.c struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); crtc 186 drivers/gpu/drm/arm/hdlcd_crtc.c drm_crtc_vblank_off(crtc); crtc 191 drivers/gpu/drm/arm/hdlcd_crtc.c static enum drm_mode_status hdlcd_crtc_mode_valid(struct drm_crtc *crtc, crtc 194 drivers/gpu/drm/arm/hdlcd_crtc.c struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); crtc 207 drivers/gpu/drm/arm/hdlcd_crtc.c static void hdlcd_crtc_atomic_begin(struct drm_crtc *crtc, crtc 210 drivers/gpu/drm/arm/hdlcd_crtc.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 213 drivers/gpu/drm/arm/hdlcd_crtc.c crtc->state->event = NULL; crtc 215 drivers/gpu/drm/arm/hdlcd_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 216 drivers/gpu/drm/arm/hdlcd_crtc.c if (drm_crtc_vblank_get(crtc) == 0) crtc 217 drivers/gpu/drm/arm/hdlcd_crtc.c drm_crtc_arm_vblank_event(crtc, event); crtc 219 drivers/gpu/drm/arm/hdlcd_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 220 drivers/gpu/drm/arm/hdlcd_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 235 drivers/gpu/drm/arm/hdlcd_crtc.c struct drm_crtc *crtc; crtc 245 drivers/gpu/drm/arm/hdlcd_crtc.c for_each_new_crtc_in_state(state->state, crtc, crtc_state, i) { crtc 330 drivers/gpu/drm/arm/hdlcd_crtc.c ret = drm_crtc_init_with_planes(drm, &hdlcd->crtc, primary, NULL, crtc 335 drivers/gpu/drm/arm/hdlcd_crtc.c drm_crtc_helper_add(&hdlcd->crtc, &hdlcd_crtc_helper_funcs); crtc 102 drivers/gpu/drm/arm/hdlcd_drv.c drm_crtc_cleanup(&hdlcd->crtc); crtc 148 drivers/gpu/drm/arm/hdlcd_drv.c drm_crtc_handle_vblank(&hdlcd->crtc); crtc 215 drivers/gpu/drm/arm/hdlcd_drv.c unsigned long mode_clock = hdlcd->crtc.mode.crtc_clock * 1000; crtc 287 drivers/gpu/drm/arm/hdlcd_drv.c hdlcd->crtc.port = of_graph_get_port_by_id(dev->of_node, 0); crtc 326 drivers/gpu/drm/arm/hdlcd_drv.c of_node_put(hdlcd->crtc.port); crtc 327 drivers/gpu/drm/arm/hdlcd_drv.c hdlcd->crtc.port = NULL; crtc 346 drivers/gpu/drm/arm/hdlcd_drv.c of_node_put(hdlcd->crtc.port); crtc 347 drivers/gpu/drm/arm/hdlcd_drv.c hdlcd->crtc.port = NULL; crtc 349 drivers/gpu/drm/arm/hdlcd_drv.c drm_crtc_vblank_off(&hdlcd->crtc); crtc 12 drivers/gpu/drm/arm/hdlcd_drv.h struct drm_crtc crtc; crtc 22 drivers/gpu/drm/arm/hdlcd_drv.h #define crtc_to_hdlcd_priv(x) container_of(x, struct hdlcd_drm_private, crtc) crtc 24 drivers/gpu/drm/arm/malidp_crtc.c static enum drm_mode_status malidp_crtc_mode_valid(struct drm_crtc *crtc, crtc 27 drivers/gpu/drm/arm/malidp_crtc.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 48 drivers/gpu/drm/arm/malidp_crtc.c static void malidp_crtc_atomic_enable(struct drm_crtc *crtc, crtc 51 drivers/gpu/drm/arm/malidp_crtc.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 54 drivers/gpu/drm/arm/malidp_crtc.c int err = pm_runtime_get_sync(crtc->dev->dev); crtc 61 drivers/gpu/drm/arm/malidp_crtc.c drm_display_mode_to_videomode(&crtc->state->adjusted_mode, &vm); crtc 65 drivers/gpu/drm/arm/malidp_crtc.c clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000); crtc 69 drivers/gpu/drm/arm/malidp_crtc.c drm_crtc_vblank_on(crtc); crtc 72 drivers/gpu/drm/arm/malidp_crtc.c static void malidp_crtc_atomic_disable(struct drm_crtc *crtc, crtc 75 drivers/gpu/drm/arm/malidp_crtc.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 82 drivers/gpu/drm/arm/malidp_crtc.c drm_crtc_vblank_off(crtc); crtc 87 drivers/gpu/drm/arm/malidp_crtc.c err = pm_runtime_put(crtc->dev->dev); crtc 148 drivers/gpu/drm/arm/malidp_crtc.c static int malidp_crtc_atomic_check_gamma(struct drm_crtc *crtc, crtc 159 drivers/gpu/drm/arm/malidp_crtc.c if (crtc->state->gamma_lut && crtc 160 drivers/gpu/drm/arm/malidp_crtc.c (crtc->state->gamma_lut->base.id == state->gamma_lut->base.id)) crtc 186 drivers/gpu/drm/arm/malidp_crtc.c ret = drm_atomic_helper_check_modeset(crtc->dev, state->state); crtc 202 drivers/gpu/drm/arm/malidp_crtc.c static int malidp_crtc_atomic_check_ctm(struct drm_crtc *crtc, crtc 215 drivers/gpu/drm/arm/malidp_crtc.c if (crtc->state->ctm && (crtc->state->ctm->base.id == crtc 247 drivers/gpu/drm/arm/malidp_crtc.c static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, crtc 250 drivers/gpu/drm/arm/malidp_crtc.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 337 drivers/gpu/drm/arm/malidp_crtc.c static int malidp_crtc_atomic_check(struct drm_crtc *crtc, crtc 340 drivers/gpu/drm/arm/malidp_crtc.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 419 drivers/gpu/drm/arm/malidp_crtc.c u32 old_mask = crtc->state->connector_mask; crtc 427 drivers/gpu/drm/arm/malidp_crtc.c ret = malidp_crtc_atomic_check_gamma(crtc, state); crtc 428 drivers/gpu/drm/arm/malidp_crtc.c ret = ret ? ret : malidp_crtc_atomic_check_ctm(crtc, state); crtc 429 drivers/gpu/drm/arm/malidp_crtc.c ret = ret ? ret : malidp_crtc_atomic_check_scaling(crtc, state); crtc 441 drivers/gpu/drm/arm/malidp_crtc.c static struct drm_crtc_state *malidp_crtc_duplicate_state(struct drm_crtc *crtc) crtc 445 drivers/gpu/drm/arm/malidp_crtc.c if (WARN_ON(!crtc->state)) crtc 448 drivers/gpu/drm/arm/malidp_crtc.c old_state = to_malidp_crtc_state(crtc->state); crtc 453 drivers/gpu/drm/arm/malidp_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); crtc 465 drivers/gpu/drm/arm/malidp_crtc.c static void malidp_crtc_destroy_state(struct drm_crtc *crtc, crtc 478 drivers/gpu/drm/arm/malidp_crtc.c static void malidp_crtc_reset(struct drm_crtc *crtc) crtc 483 drivers/gpu/drm/arm/malidp_crtc.c if (crtc->state) crtc 484 drivers/gpu/drm/arm/malidp_crtc.c malidp_crtc_destroy_state(crtc, crtc->state); crtc 486 drivers/gpu/drm/arm/malidp_crtc.c __drm_atomic_helper_crtc_reset(crtc, &state->base); crtc 489 drivers/gpu/drm/arm/malidp_crtc.c static int malidp_crtc_enable_vblank(struct drm_crtc *crtc) crtc 491 drivers/gpu/drm/arm/malidp_crtc.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 499 drivers/gpu/drm/arm/malidp_crtc.c static void malidp_crtc_disable_vblank(struct drm_crtc *crtc) crtc 501 drivers/gpu/drm/arm/malidp_crtc.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 544 drivers/gpu/drm/arm/malidp_crtc.c ret = drm_crtc_init_with_planes(drm, &malidp->crtc, primary, NULL, crtc 549 drivers/gpu/drm/arm/malidp_crtc.c drm_crtc_helper_add(&malidp->crtc, &malidp_crtc_helper_funcs); crtc 550 drivers/gpu/drm/arm/malidp_crtc.c drm_mode_crtc_set_gamma_size(&malidp->crtc, MALIDP_GAMMA_LUT_SIZE); crtc 552 drivers/gpu/drm/arm/malidp_crtc.c drm_crtc_enable_color_mgmt(&malidp->crtc, 0, true, MALIDP_GAMMA_LUT_SIZE); crtc 60 drivers/gpu/drm/arm/malidp_drv.c static void malidp_atomic_commit_update_gamma(struct drm_crtc *crtc, crtc 63 drivers/gpu/drm/arm/malidp_drv.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 66 drivers/gpu/drm/arm/malidp_drv.c if (!crtc->state->color_mgmt_changed) crtc 69 drivers/gpu/drm/arm/malidp_drv.c if (!crtc->state->gamma_lut) { crtc 75 drivers/gpu/drm/arm/malidp_drv.c to_malidp_crtc_state(crtc->state); crtc 77 drivers/gpu/drm/arm/malidp_drv.c if (!old_state->gamma_lut || (crtc->state->gamma_lut->base.id != crtc 87 drivers/gpu/drm/arm/malidp_drv.c void malidp_atomic_commit_update_coloradj(struct drm_crtc *crtc, crtc 90 drivers/gpu/drm/arm/malidp_drv.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 94 drivers/gpu/drm/arm/malidp_drv.c if (!crtc->state->color_mgmt_changed) crtc 97 drivers/gpu/drm/arm/malidp_drv.c if (!crtc->state->ctm) { crtc 102 drivers/gpu/drm/arm/malidp_drv.c to_malidp_crtc_state(crtc->state); crtc 104 drivers/gpu/drm/arm/malidp_drv.c if (!old_state->ctm || (crtc->state->ctm->base.id != crtc 117 drivers/gpu/drm/arm/malidp_drv.c static void malidp_atomic_commit_se_config(struct drm_crtc *crtc, crtc 120 drivers/gpu/drm/arm/malidp_drv.c struct malidp_crtc_state *cs = to_malidp_crtc_state(crtc->state); crtc 122 drivers/gpu/drm/arm/malidp_drv.c struct malidp_drm *malidp = crtc_to_malidp_device(crtc); crtc 195 drivers/gpu/drm/arm/malidp_drv.c malidp->event = malidp->crtc.state->event; crtc 196 drivers/gpu/drm/arm/malidp_drv.c malidp->crtc.state->event = NULL; crtc 198 drivers/gpu/drm/arm/malidp_drv.c if (malidp->crtc.state->active) { crtc 205 drivers/gpu/drm/arm/malidp_drv.c drm_crtc_vblank_get(&malidp->crtc); crtc 223 drivers/gpu/drm/arm/malidp_drv.c drm_crtc_send_vblank_event(&malidp->crtc, malidp->event); crtc 234 drivers/gpu/drm/arm/malidp_drv.c struct drm_crtc *crtc; crtc 249 drivers/gpu/drm/arm/malidp_drv.c for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) { crtc 250 drivers/gpu/drm/arm/malidp_drv.c malidp_atomic_commit_update_gamma(crtc, old_crtc_state); crtc 251 drivers/gpu/drm/arm/malidp_drv.c malidp_atomic_commit_update_coloradj(crtc, old_crtc_state); crtc 252 drivers/gpu/drm/arm/malidp_drv.c malidp_atomic_commit_se_config(crtc, old_crtc_state); crtc 844 drivers/gpu/drm/arm/malidp_drv.c malidp->crtc.port = of_graph_get_port_by_id(dev->of_node, 0); crtc 868 drivers/gpu/drm/arm/malidp_drv.c drm_crtc_vblank_reset(&malidp->crtc); crtc 898 drivers/gpu/drm/arm/malidp_drv.c of_node_put(malidp->crtc.port); crtc 899 drivers/gpu/drm/arm/malidp_drv.c malidp->crtc.port = NULL; crtc 927 drivers/gpu/drm/arm/malidp_drv.c drm_crtc_vblank_off(&malidp->crtc); crtc 933 drivers/gpu/drm/arm/malidp_drv.c of_node_put(malidp->crtc.port); crtc 934 drivers/gpu/drm/arm/malidp_drv.c malidp->crtc.port = NULL; crtc 33 drivers/gpu/drm/arm/malidp_drv.h struct drm_crtc crtc; crtc 47 drivers/gpu/drm/arm/malidp_drv.h #define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc) crtc 1188 drivers/gpu/drm/arm/malidp_hw.c drm_crtc_send_vblank_event(&malidp->crtc, malidp->event); crtc 1203 drivers/gpu/drm/arm/malidp_hw.c if ((status & de->vsync_irq) && malidp->crtc.enabled) crtc 1204 drivers/gpu/drm/arm/malidp_hw.c drm_crtc_handle_vblank(&malidp->crtc); crtc 1209 drivers/gpu/drm/arm/malidp_hw.c drm_crtc_vblank_count(&malidp->crtc)); crtc 1301 drivers/gpu/drm/arm/malidp_hw.c drm_crtc_vblank_count(&malidp->crtc)); crtc 218 drivers/gpu/drm/arm/malidp_mw.c malidp->mw_connector.encoder.possible_crtcs = 1 << drm_crtc_index(&malidp->crtc); crtc 274 drivers/gpu/drm/arm/malidp_planes.c drm_atomic_get_existing_crtc_state(state->state, state->crtc); crtc 515 drivers/gpu/drm/arm/malidp_planes.c if (!state->crtc || !state->fb) crtc 893 drivers/gpu/drm/arm/malidp_planes.c if (state->crtc) { crtc 895 drivers/gpu/drm/arm/malidp_planes.c to_malidp_crtc_state(state->crtc->state); crtc 121 drivers/gpu/drm/armada/armada_crtc.c static void armada_drm_crtc_queue_state_event(struct drm_crtc *crtc) crtc 123 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 127 drivers/gpu/drm/armada/armada_crtc.c event = xchg(&crtc->state->event, NULL); crtc 129 drivers/gpu/drm/armada/armada_crtc.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 134 drivers/gpu/drm/armada/armada_crtc.c static void armada_drm_update_gamma(struct drm_crtc *crtc) crtc 136 drivers/gpu/drm/armada/armada_crtc.c struct drm_property_blob *blob = crtc->state->gamma_lut; crtc 137 drivers/gpu/drm/armada/armada_crtc.c void __iomem *base = drm_to_armada_crtc(crtc)->base; crtc 172 drivers/gpu/drm/armada/armada_crtc.c static enum drm_mode_status armada_drm_crtc_mode_valid(struct drm_crtc *crtc, crtc 175 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 199 drivers/gpu/drm/armada/armada_crtc.c static bool armada_drm_crtc_mode_fixup(struct drm_crtc *crtc, crtc 202 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 216 drivers/gpu/drm/armada/armada_crtc.c if (armada_drm_crtc_mode_valid(crtc, adj) != MODE_OK) crtc 257 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_handle_vblank(&dcrtc->crtc); crtc 297 drivers/gpu/drm/armada/armada_crtc.c spin_lock(&dcrtc->crtc.dev->event_lock); crtc 298 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_send_vblank_event(&dcrtc->crtc, event); crtc 299 drivers/gpu/drm/armada/armada_crtc.c spin_unlock(&dcrtc->crtc.dev->event_lock); crtc 300 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_vblank_put(&dcrtc->crtc); crtc 317 drivers/gpu/drm/armada/armada_crtc.c trace_armada_drm_irq(&dcrtc->crtc, stat); crtc 330 drivers/gpu/drm/armada/armada_crtc.c static void armada_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 332 drivers/gpu/drm/armada/armada_crtc.c struct drm_display_mode *adj = &crtc->state->adjusted_mode; crtc 333 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 347 drivers/gpu/drm/armada/armada_crtc.c crtc->base.id, crtc->name, DRM_MODE_ARG(adj)); crtc 415 drivers/gpu/drm/armada/armada_crtc.c static int armada_drm_crtc_atomic_check(struct drm_crtc *crtc, crtc 418 drivers/gpu/drm/armada/armada_crtc.c DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name); crtc 429 drivers/gpu/drm/armada/armada_crtc.c static void armada_drm_crtc_atomic_begin(struct drm_crtc *crtc, crtc 432 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 434 drivers/gpu/drm/armada/armada_crtc.c DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name); crtc 436 drivers/gpu/drm/armada/armada_crtc.c if (crtc->state->color_mgmt_changed) crtc 437 drivers/gpu/drm/armada/armada_crtc.c armada_drm_update_gamma(crtc); crtc 443 drivers/gpu/drm/armada/armada_crtc.c static void armada_drm_crtc_atomic_flush(struct drm_crtc *crtc, crtc 446 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 448 drivers/gpu/drm/armada/armada_crtc.c DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name); crtc 456 drivers/gpu/drm/armada/armada_crtc.c if (!drm_atomic_crtc_needs_modeset(crtc->state)) { crtc 458 drivers/gpu/drm/armada/armada_crtc.c armada_drm_crtc_queue_state_event(crtc); crtc 469 drivers/gpu/drm/armada/armada_crtc.c static void armada_drm_crtc_atomic_disable(struct drm_crtc *crtc, crtc 472 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 475 drivers/gpu/drm/armada/armada_crtc.c DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name); crtc 478 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_vblank_put(crtc); crtc 480 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_vblank_off(crtc); crtc 483 drivers/gpu/drm/armada/armada_crtc.c if (!crtc->state->active) { crtc 495 drivers/gpu/drm/armada/armada_crtc.c event = crtc->state->event; crtc 496 drivers/gpu/drm/armada/armada_crtc.c crtc->state->event = NULL; crtc 498 drivers/gpu/drm/armada/armada_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 499 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 500 drivers/gpu/drm/armada/armada_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 505 drivers/gpu/drm/armada/armada_crtc.c static void armada_drm_crtc_atomic_enable(struct drm_crtc *crtc, crtc 508 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 510 drivers/gpu/drm/armada/armada_crtc.c DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name); crtc 519 drivers/gpu/drm/armada/armada_crtc.c dcrtc->variant->enable(dcrtc, &crtc->state->adjusted_mode); crtc 522 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_vblank_on(crtc); crtc 524 drivers/gpu/drm/armada/armada_crtc.c if (crtc->state->adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) crtc 525 drivers/gpu/drm/armada/armada_crtc.c WARN_ON(drm_crtc_vblank_get(crtc)); crtc 527 drivers/gpu/drm/armada/armada_crtc.c armada_drm_crtc_queue_state_event(crtc); crtc 606 drivers/gpu/drm/armada/armada_crtc.c } else if (dcrtc->cursor_x + w > dcrtc->crtc.mode.hdisplay) { crtc 609 drivers/gpu/drm/armada/armada_crtc.c w = max_t(int, dcrtc->crtc.mode.hdisplay - dcrtc->cursor_x, 0); crtc 619 drivers/gpu/drm/armada/armada_crtc.c } else if (dcrtc->cursor_y + h > dcrtc->crtc.mode.vdisplay) { crtc 622 drivers/gpu/drm/armada/armada_crtc.c h = max_t(int, dcrtc->crtc.mode.vdisplay - dcrtc->cursor_y, 0); crtc 691 drivers/gpu/drm/armada/armada_crtc.c static int armada_drm_crtc_cursor_set(struct drm_crtc *crtc, crtc 694 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 741 drivers/gpu/drm/armada/armada_crtc.c static int armada_drm_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) crtc 743 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 757 drivers/gpu/drm/armada/armada_crtc.c static void armada_drm_crtc_destroy(struct drm_crtc *crtc) crtc 759 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 760 drivers/gpu/drm/armada/armada_crtc.c struct armada_private *priv = crtc->dev->dev_private; crtc 766 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_cleanup(&dcrtc->crtc); crtc 773 drivers/gpu/drm/armada/armada_crtc.c of_node_put(dcrtc->crtc.port); crtc 778 drivers/gpu/drm/armada/armada_crtc.c static int armada_drm_crtc_late_register(struct drm_crtc *crtc) crtc 781 drivers/gpu/drm/armada/armada_crtc.c armada_drm_crtc_debugfs_init(drm_to_armada_crtc(crtc)); crtc 787 drivers/gpu/drm/armada/armada_crtc.c static int armada_drm_crtc_enable_vblank(struct drm_crtc *crtc) crtc 789 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 798 drivers/gpu/drm/armada/armada_crtc.c static void armada_drm_crtc_disable_vblank(struct drm_crtc *crtc) crtc 800 drivers/gpu/drm/armada/armada_crtc.c struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); crtc 839 drivers/gpu/drm/armada/armada_crtc.c dcrtc->crtc.base.id, dcrtc->crtc.name, desired_hz); crtc 870 drivers/gpu/drm/armada/armada_crtc.c dcrtc->crtc.base.id, dcrtc->crtc.name, crtc 890 drivers/gpu/drm/armada/armada_crtc.c dcrtc->crtc.base.id, dcrtc->crtc.name, crtc 961 drivers/gpu/drm/armada/armada_crtc.c dcrtc->crtc.port = port; crtc 975 drivers/gpu/drm/armada/armada_crtc.c ret = drm_crtc_init_with_planes(drm, &dcrtc->crtc, primary, NULL, crtc 980 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_helper_add(&dcrtc->crtc, &armada_crtc_helper_funcs); crtc 982 drivers/gpu/drm/armada/armada_crtc.c ret = drm_mode_crtc_set_gamma_size(&dcrtc->crtc, 256); crtc 986 drivers/gpu/drm/armada/armada_crtc.c drm_crtc_enable_color_mgmt(&dcrtc->crtc, 0, false, 256); crtc 1048 drivers/gpu/drm/armada/armada_crtc.c armada_drm_crtc_destroy(&dcrtc->crtc); crtc 37 drivers/gpu/drm/armada/armada_crtc.h struct drm_crtc crtc; crtc 71 drivers/gpu/drm/armada/armada_crtc.h #define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc) crtc 96 drivers/gpu/drm/armada/armada_debugfs.c debugfs_create_file("armada-regs", 0600, dcrtc->crtc.debugfs_entry, crtc 79 drivers/gpu/drm/armada/armada_overlay.c if (!state->fb || WARN_ON(!state->crtc)) crtc 84 drivers/gpu/drm/armada/armada_overlay.c state->crtc->base.id, state->crtc->name, crtc 88 drivers/gpu/drm/armada/armada_overlay.c dcrtc = drm_to_armada_crtc(state->crtc); crtc 109 drivers/gpu/drm/armada/armada_overlay.c state->crtc->state->mode_changed) { crtc 223 drivers/gpu/drm/armada/armada_overlay.c if (!old_state->crtc) crtc 228 drivers/gpu/drm/armada/armada_overlay.c old_state->crtc->base.id, old_state->crtc->name, crtc 231 drivers/gpu/drm/armada/armada_overlay.c dcrtc = drm_to_armada_crtc(old_state->crtc); crtc 251 drivers/gpu/drm/armada/armada_overlay.c armada_overlay_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, crtc 261 drivers/gpu/drm/armada/armada_overlay.c trace_armada_ovl_plane_update(plane, crtc, fb, crtc 276 drivers/gpu/drm/armada/armada_overlay.c ret = drm_atomic_set_crtc_for_plane(plane_state, crtc); crtc 112 drivers/gpu/drm/armada/armada_plane.c struct drm_crtc *crtc = state->crtc; crtc 117 drivers/gpu/drm/armada/armada_plane.c if (!state->fb || WARN_ON(!state->crtc)) { crtc 123 drivers/gpu/drm/armada/armada_plane.c crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); crtc 125 drivers/gpu/drm/armada/armada_plane.c crtc_state = crtc->state; crtc 169 drivers/gpu/drm/armada/armada_plane.c if (!state->fb || WARN_ON(!state->crtc)) crtc 174 drivers/gpu/drm/armada/armada_plane.c state->crtc->base.id, state->crtc->name, crtc 178 drivers/gpu/drm/armada/armada_plane.c dcrtc = drm_to_armada_crtc(state->crtc); crtc 200 drivers/gpu/drm/armada/armada_plane.c state->crtc->state->mode_changed) { crtc 209 drivers/gpu/drm/armada/armada_plane.c state->crtc->state->mode_changed) { crtc 253 drivers/gpu/drm/armada/armada_plane.c if (!old_state->crtc) crtc 258 drivers/gpu/drm/armada/armada_plane.c old_state->crtc->base.id, old_state->crtc->name, crtc 261 drivers/gpu/drm/armada/armada_plane.c dcrtc = drm_to_armada_crtc(old_state->crtc); crtc 16 drivers/gpu/drm/armada/armada_trace.h TP_PROTO(struct drm_crtc *crtc, u32 stat), crtc 17 drivers/gpu/drm/armada/armada_trace.h TP_ARGS(crtc, stat), crtc 19 drivers/gpu/drm/armada/armada_trace.h __field(struct drm_crtc *, crtc) crtc 23 drivers/gpu/drm/armada/armada_trace.h __entry->crtc = crtc; crtc 27 drivers/gpu/drm/armada/armada_trace.h __entry->crtc, __entry->stat) crtc 31 drivers/gpu/drm/armada/armada_trace.h TP_PROTO(struct drm_plane *plane, struct drm_crtc *crtc, crtc 35 drivers/gpu/drm/armada/armada_trace.h TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h), crtc 38 drivers/gpu/drm/armada/armada_trace.h __field(struct drm_crtc *, crtc) crtc 51 drivers/gpu/drm/armada/armada_trace.h __entry->crtc = crtc; crtc 63 drivers/gpu/drm/armada/armada_trace.h __entry->plane, __entry->crtc, __entry->fb, crtc 71 drivers/gpu/drm/armada/armada_trace.h TP_PROTO(struct drm_crtc *crtc, struct drm_plane *plane), crtc 72 drivers/gpu/drm/armada/armada_trace.h TP_ARGS(crtc, plane), crtc 75 drivers/gpu/drm/armada/armada_trace.h __field(struct drm_crtc *, crtc) crtc 79 drivers/gpu/drm/armada/armada_trace.h __entry->crtc = crtc; crtc 82 drivers/gpu/drm/armada/armada_trace.h __entry->plane, __entry->crtc) crtc 28 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c struct drm_crtc *crtc = &priv->pipe.crtc; crtc 29 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c struct drm_device *drm = crtc->dev; crtc 30 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c const u32 format = crtc->primary->state->fb->format->format; crtc 82 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c struct drm_display_mode *m = &priv->pipe.crtc.state->adjusted_mode; crtc 146 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c struct drm_crtc *crtc = &pipe->crtc; crtc 150 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c drm_crtc_vblank_on(crtc); crtc 156 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c struct drm_crtc *crtc = &pipe->crtc; crtc 158 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c drm_crtc_vblank_off(crtc); crtc 166 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c struct drm_crtc *crtc = &pipe->crtc; crtc 171 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 172 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c event = crtc->state->event; crtc 174 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c crtc->state->event = NULL; crtc 176 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c if (drm_crtc_vblank_get(crtc) == 0) crtc 177 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c drm_crtc_arm_vblank_event(crtc, event); crtc 179 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 181 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 86 drivers/gpu/drm/aspeed/aspeed_gfx_drv.c drm_crtc_handle_vblank(&priv->pipe.crtc); crtc 246 drivers/gpu/drm/ast/ast_drv.h u8 crtc[25]; crtc 46 drivers/gpu/drm/ast/ast_mode.c static int ast_cursor_set(struct drm_crtc *crtc, crtc 51 drivers/gpu/drm/ast/ast_mode.c static int ast_cursor_move(struct drm_crtc *crtc, crtc 68 drivers/gpu/drm/ast/ast_mode.c static void ast_crtc_load_lut(struct drm_crtc *crtc) crtc 70 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 74 drivers/gpu/drm/ast/ast_mode.c if (!crtc->enabled) crtc 77 drivers/gpu/drm/ast/ast_mode.c r = crtc->gamma_store; crtc 78 drivers/gpu/drm/ast/ast_mode.c g = r + crtc->gamma_size; crtc 79 drivers/gpu/drm/ast/ast_mode.c b = g + crtc->gamma_size; crtc 85 drivers/gpu/drm/ast/ast_mode.c static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode, crtc 89 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 90 drivers/gpu/drm/ast/ast_mode.c const struct drm_framebuffer *fb = crtc->primary->fb; crtc 114 drivers/gpu/drm/ast/ast_mode.c switch (crtc->mode.crtc_hdisplay) { crtc 125 drivers/gpu/drm/ast/ast_mode.c if (crtc->mode.crtc_vdisplay == 800) crtc 137 drivers/gpu/drm/ast/ast_mode.c if (crtc->mode.crtc_vdisplay == 900) crtc 146 drivers/gpu/drm/ast/ast_mode.c if (crtc->mode.crtc_vdisplay == 1080) crtc 234 drivers/gpu/drm/ast/ast_mode.c static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, crtc 237 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 259 drivers/gpu/drm/ast/ast_mode.c ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); crtc 279 drivers/gpu/drm/ast/ast_mode.c static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, crtc 282 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 388 drivers/gpu/drm/ast/ast_mode.c static void ast_set_offset_reg(struct drm_crtc *crtc) crtc 390 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 391 drivers/gpu/drm/ast/ast_mode.c const struct drm_framebuffer *fb = crtc->primary->fb; crtc 418 drivers/gpu/drm/ast/ast_mode.c static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, crtc 421 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 422 drivers/gpu/drm/ast/ast_mode.c const struct drm_framebuffer *fb = crtc->primary->fb; crtc 478 drivers/gpu/drm/ast/ast_mode.c static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, crtc 481 drivers/gpu/drm/ast/ast_mode.c const struct drm_framebuffer *fb = crtc->primary->fb; crtc 492 drivers/gpu/drm/ast/ast_mode.c static void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset) crtc 494 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 504 drivers/gpu/drm/ast/ast_mode.c static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 506 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 517 drivers/gpu/drm/ast/ast_mode.c ast_set_dp501_video_output(crtc->dev, 1); crtc 518 drivers/gpu/drm/ast/ast_mode.c ast_crtc_load_lut(crtc); crtc 522 drivers/gpu/drm/ast/ast_mode.c ast_set_dp501_video_output(crtc->dev, 0); crtc 528 drivers/gpu/drm/ast/ast_mode.c static int ast_crtc_do_set_base(struct drm_crtc *crtc, crtc 541 drivers/gpu/drm/ast/ast_mode.c gbo = drm_gem_vram_of_gem(crtc->primary->fb->obj[0]); crtc 552 drivers/gpu/drm/ast/ast_mode.c ast_set_offset_reg(crtc); crtc 553 drivers/gpu/drm/ast/ast_mode.c ast_set_start_address_crt1(crtc, (u32)gpu_addr); crtc 562 drivers/gpu/drm/ast/ast_mode.c static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, crtc 565 drivers/gpu/drm/ast/ast_mode.c return ast_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 568 drivers/gpu/drm/ast/ast_mode.c static int ast_crtc_mode_set(struct drm_crtc *crtc, crtc 574 drivers/gpu/drm/ast/ast_mode.c struct drm_device *dev = crtc->dev; crtc 575 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 583 drivers/gpu/drm/ast/ast_mode.c ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode); crtc 590 drivers/gpu/drm/ast/ast_mode.c ast_set_std_reg(crtc, adjusted_mode, &vbios_mode); crtc 591 drivers/gpu/drm/ast/ast_mode.c ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode); crtc 592 drivers/gpu/drm/ast/ast_mode.c ast_set_offset_reg(crtc); crtc 594 drivers/gpu/drm/ast/ast_mode.c ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode); crtc 596 drivers/gpu/drm/ast/ast_mode.c ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode); crtc 598 drivers/gpu/drm/ast/ast_mode.c ast_crtc_mode_set_base(crtc, x, y, old_fb); crtc 603 drivers/gpu/drm/ast/ast_mode.c static void ast_crtc_disable(struct drm_crtc *crtc) crtc 606 drivers/gpu/drm/ast/ast_mode.c ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 607 drivers/gpu/drm/ast/ast_mode.c if (crtc->primary->fb) { crtc 608 drivers/gpu/drm/ast/ast_mode.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 614 drivers/gpu/drm/ast/ast_mode.c crtc->primary->fb = NULL; crtc 617 drivers/gpu/drm/ast/ast_mode.c static void ast_crtc_prepare(struct drm_crtc *crtc) crtc 622 drivers/gpu/drm/ast/ast_mode.c static void ast_crtc_commit(struct drm_crtc *crtc) crtc 624 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 626 drivers/gpu/drm/ast/ast_mode.c ast_crtc_load_lut(crtc); crtc 640 drivers/gpu/drm/ast/ast_mode.c static void ast_crtc_reset(struct drm_crtc *crtc) crtc 645 drivers/gpu/drm/ast/ast_mode.c static int ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, crtc 649 drivers/gpu/drm/ast/ast_mode.c ast_crtc_load_lut(crtc); crtc 655 drivers/gpu/drm/ast/ast_mode.c static void ast_crtc_destroy(struct drm_crtc *crtc) crtc 657 drivers/gpu/drm/ast/ast_mode.c drm_crtc_cleanup(crtc); crtc 658 drivers/gpu/drm/ast/ast_mode.c kfree(crtc); crtc 672 drivers/gpu/drm/ast/ast_mode.c struct ast_crtc *crtc; crtc 674 drivers/gpu/drm/ast/ast_mode.c crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL); crtc 675 drivers/gpu/drm/ast/ast_mode.c if (!crtc) crtc 678 drivers/gpu/drm/ast/ast_mode.c drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs); crtc 679 drivers/gpu/drm/ast/ast_mode.c drm_mode_crtc_set_gamma_size(&crtc->base, 256); crtc 680 drivers/gpu/drm/ast/ast_mode.c drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs); crtc 1079 drivers/gpu/drm/ast/ast_mode.c static void ast_show_cursor(struct drm_crtc *crtc) crtc 1081 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 1090 drivers/gpu/drm/ast/ast_mode.c static void ast_hide_cursor(struct drm_crtc *crtc) crtc 1092 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 1152 drivers/gpu/drm/ast/ast_mode.c static int ast_cursor_set(struct drm_crtc *crtc, crtc 1158 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 1159 drivers/gpu/drm/ast/ast_mode.c struct ast_crtc *ast_crtc = to_ast_crtc(crtc); crtc 1169 drivers/gpu/drm/ast/ast_mode.c ast_hide_cursor(crtc); crtc 1234 drivers/gpu/drm/ast/ast_mode.c ast_show_cursor(crtc); crtc 1251 drivers/gpu/drm/ast/ast_mode.c static int ast_cursor_move(struct drm_crtc *crtc, crtc 1254 drivers/gpu/drm/ast/ast_mode.c struct ast_crtc *ast_crtc = to_ast_crtc(crtc); crtc 1255 drivers/gpu/drm/ast/ast_mode.c struct ast_private *ast = crtc->dev->dev_private; crtc 1284 drivers/gpu/drm/ast/ast_mode.c ast_show_cursor(crtc); crtc 60 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc) crtc 62 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c return container_of(crtc, struct atmel_hlcdc_crtc, base); crtc 67 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); crtc 68 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct regmap *regmap = crtc->dc->hlcdc->regmap; crtc 78 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk); crtc 102 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c prate = clk_get_rate(crtc->dc->hlcdc->sys_clk); crtc 104 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c if (!crtc->dc->desc->fixed_clksrc) { crtc 155 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c clk_disable_unprepare(crtc->dc->hlcdc->sys_clk); crtc 162 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); crtc 164 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c return atmel_hlcdc_dc_mode_valid(crtc->dc, mode); crtc 171 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); crtc 172 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct regmap *regmap = crtc->dc->hlcdc->regmap; crtc 194 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c clk_disable_unprepare(crtc->dc->hlcdc->sys_clk); crtc 206 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); crtc 207 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct regmap *regmap = crtc->dc->hlcdc->regmap; crtc 215 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c clk_prepare_enable(crtc->dc->hlcdc->sys_clk); crtc 299 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc; crtc 302 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c crtc = drm_crtc_to_atmel_hlcdc_crtc(state->crtc); crtc 307 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c if (!cstate->crtc) crtc 312 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c if (crtc->dc->desc->conflicting_output_formats) crtc 346 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); crtc 353 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c crtc->event = c->state->event; crtc 358 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *crtc, crtc 376 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); crtc 379 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c kfree(crtc); crtc 382 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc) crtc 384 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct drm_device *dev = crtc->base.dev; crtc 388 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c if (crtc->event) { crtc 389 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c drm_crtc_send_vblank_event(&crtc->base, crtc->event); crtc 390 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c drm_crtc_vblank_put(&crtc->base); crtc 391 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c crtc->event = NULL; crtc 402 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc) crtc 406 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c if (crtc->state) { crtc 407 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c __drm_atomic_helper_crtc_destroy_state(crtc->state); crtc 408 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c state = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state); crtc 410 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c crtc->state = NULL; crtc 415 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c crtc->state = &state->base; crtc 416 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c crtc->state->crtc = crtc; crtc 421 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc) crtc 425 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c if (WARN_ON(!crtc->state)) crtc 431 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); crtc 433 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c cur = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state); crtc 439 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c static void atmel_hlcdc_crtc_destroy_state(struct drm_crtc *crtc, crtc 451 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); crtc 452 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct regmap *regmap = crtc->dc->hlcdc->regmap; crtc 462 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c); crtc 463 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct regmap *regmap = crtc->dc->hlcdc->regmap; crtc 484 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c struct atmel_hlcdc_crtc *crtc; crtc 488 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c crtc = kzalloc(sizeof(*crtc), GFP_KERNEL); crtc 489 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c if (!crtc) crtc 492 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c crtc->dc = dc; crtc 512 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c ret = drm_crtc_init_with_planes(dev, &crtc->base, &primary->base, crtc 518 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c crtc->id = drm_crtc_index(&crtc->base); crtc 526 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c overlay->base.possible_crtcs = 1 << crtc->id; crtc 530 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs); crtc 531 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c drm_crtc_vblank_reset(&crtc->base); crtc 533 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c drm_mode_crtc_set_gamma_size(&crtc->base, ATMEL_HLCDC_CLUT_SIZE); crtc 534 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c drm_crtc_enable_color_mgmt(&crtc->base, 0, false, crtc 537 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c dc->crtc = &crtc->base; crtc 542 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c atmel_hlcdc_crtc_destroy(&crtc->base); crtc 550 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c atmel_hlcdc_crtc_irq(dc->crtc); crtc 342 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h struct drm_crtc *crtc; crtc 417 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c struct drm_crtc *crtc = state->base.crtc; crtc 421 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (!crtc || !crtc->state) crtc 424 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (!crtc->state->color_mgmt_changed || !crtc->state->gamma_lut) crtc 427 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c lut = (struct drm_color_lut *)crtc->state->gamma_lut->data; crtc 526 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c primary = drm_plane_to_atmel_hlcdc_plane(c_state->crtc->primary); crtc 542 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (ovl == c_state->crtc->primary) crtc 608 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (!state->base.crtc || !fb) crtc 611 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c crtc_state = drm_atomic_get_existing_crtc_state(s->state, s->crtc); crtc 742 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (!p->state->crtc || !p->state->fb) crtc 50 drivers/gpu/drm/bochs/bochs_kms.c struct bochs_device *bochs = pipe->crtc.dev->dev_private; crtc 59 drivers/gpu/drm/bochs/bochs_kms.c struct bochs_device *bochs = pipe->crtc.dev->dev_private; crtc 60 drivers/gpu/drm/bochs/bochs_kms.c struct drm_crtc *crtc = &pipe->crtc; crtc 64 drivers/gpu/drm/bochs/bochs_kms.c if (crtc->state->event) { crtc 65 drivers/gpu/drm/bochs/bochs_kms.c spin_lock_irq(&crtc->dev->event_lock); crtc 66 drivers/gpu/drm/bochs/bochs_kms.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 67 drivers/gpu/drm/bochs/bochs_kms.c crtc->state->event = NULL; crtc 68 drivers/gpu/drm/bochs/bochs_kms.c spin_unlock_irq(&crtc->dev->event_lock); crtc 1164 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (!conn_state->crtc) crtc 1167 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); crtc 1288 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c return conn_state->crtc; crtc 1295 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c struct drm_crtc *crtc; crtc 1299 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c crtc = analogix_dp_get_new_crtc(dp, state); crtc 1300 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (!crtc) crtc 1303 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); crtc 1372 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c struct drm_crtc *crtc; crtc 1377 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c crtc = analogix_dp_get_new_crtc(dp, state); crtc 1378 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (!crtc) crtc 1381 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); crtc 1446 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c struct drm_crtc *crtc; crtc 1449 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c crtc = analogix_dp_get_new_crtc(dp, state); crtc 1450 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (!crtc) crtc 1453 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 1470 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c struct drm_crtc *crtc; crtc 1474 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c crtc = analogix_dp_get_new_crtc(dp, state); crtc 1475 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (!crtc) crtc 1478 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 1843 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (!connector->state->crtc) { crtc 1849 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c return drm_dp_start_crc(&dp->aux, connector->state->crtc); crtc 793 drivers/gpu/drm/bridge/cdns-dsi.c mode = &bridge->encoder->crtc->state->adjusted_mode; crtc 1144 drivers/gpu/drm/bridge/sil-sii8620.c &ctx->bridge.encoder->crtc->state->adjusted_mode; crtc 365 drivers/gpu/drm/bridge/ti-sn65dsi86.c &pdata->bridge.encoder->crtc->state->adjusted_mode; crtc 433 drivers/gpu/drm/bridge/ti-sn65dsi86.c &pdata->bridge.encoder->crtc->state->adjusted_mode; crtc 459 drivers/gpu/drm/bridge/ti-sn65dsi86.c &pdata->bridge.encoder->crtc->state->adjusted_mode; crtc 393 drivers/gpu/drm/cirrus/cirrus.c static enum drm_mode_status cirrus_pipe_mode_valid(struct drm_crtc *crtc, crtc 416 drivers/gpu/drm/cirrus/cirrus.c struct cirrus_device *cirrus = pipe->crtc.dev->dev_private; crtc 425 drivers/gpu/drm/cirrus/cirrus.c struct cirrus_device *cirrus = pipe->crtc.dev->dev_private; crtc 427 drivers/gpu/drm/cirrus/cirrus.c struct drm_crtc *crtc = &pipe->crtc; crtc 432 drivers/gpu/drm/cirrus/cirrus.c cirrus_mode_set(cirrus, &crtc->mode, crtc 438 drivers/gpu/drm/cirrus/cirrus.c if (crtc->state->event) { crtc 439 drivers/gpu/drm/cirrus/cirrus.c spin_lock_irq(&crtc->dev->event_lock); crtc 440 drivers/gpu/drm/cirrus/cirrus.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 441 drivers/gpu/drm/cirrus/cirrus.c crtc->state->event = NULL; crtc 442 drivers/gpu/drm/cirrus/cirrus.c spin_unlock_irq(&crtc->dev->event_lock); crtc 101 drivers/gpu/drm/cirrus/cirrus_drv.h struct cirrus_crtc *crtc; crtc 171 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc = state->crtcs[i].ptr; crtc 173 drivers/gpu/drm/drm_atomic.c if (!crtc) crtc 176 drivers/gpu/drm/drm_atomic.c crtc->funcs->atomic_destroy_state(crtc, crtc 291 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc) crtc 293 drivers/gpu/drm/drm_atomic.c int ret, index = drm_crtc_index(crtc); crtc 298 drivers/gpu/drm/drm_atomic.c crtc_state = drm_atomic_get_existing_crtc_state(state, crtc); crtc 302 drivers/gpu/drm/drm_atomic.c ret = drm_modeset_lock(&crtc->mutex, state->acquire_ctx); crtc 306 drivers/gpu/drm/drm_atomic.c crtc_state = crtc->funcs->atomic_duplicate_state(crtc); crtc 311 drivers/gpu/drm/drm_atomic.c state->crtcs[index].old_state = crtc->state; crtc 313 drivers/gpu/drm/drm_atomic.c state->crtcs[index].ptr = crtc; crtc 317 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name, crtc_state, state); crtc 326 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc = new_crtc_state->crtc; crtc 338 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name); crtc 345 drivers/gpu/drm/drm_atomic.c if (drm_core_check_feature(crtc->dev, DRIVER_ATOMIC) && crtc 348 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name); crtc 352 drivers/gpu/drm/drm_atomic.c if (drm_core_check_feature(crtc->dev, DRIVER_ATOMIC) && crtc 355 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name); crtc 372 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name); crtc 382 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc = state->crtc; crtc 384 drivers/gpu/drm/drm_atomic.c drm_printf(p, "crtc[%u]: %s\n", crtc->base.id, crtc->name); crtc 398 drivers/gpu/drm/drm_atomic.c if (crtc->funcs->atomic_print_state) crtc 399 drivers/gpu/drm/drm_atomic.c crtc->funcs->atomic_print_state(p, state); crtc 416 drivers/gpu/drm/drm_atomic.c if (writeback_job->fb && !state->crtc) { crtc 422 drivers/gpu/drm/drm_atomic.c if (state->crtc) crtc 424 drivers/gpu/drm/drm_atomic.c state->crtc); crtc 429 drivers/gpu/drm/drm_atomic.c state->crtc->base.id); crtc 474 drivers/gpu/drm/drm_atomic.c WARN_ON(plane->crtc); crtc 497 drivers/gpu/drm/drm_atomic.c if (plane_state->crtc) { crtc 501 drivers/gpu/drm/drm_atomic.c plane_state->crtc); crtc 514 drivers/gpu/drm/drm_atomic.c if (!old_plane_state->crtc || !new_plane_state->crtc) crtc 517 drivers/gpu/drm/drm_atomic.c if (old_plane_state->crtc == new_plane_state->crtc) crtc 542 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc = new_plane_state->crtc; crtc 550 drivers/gpu/drm/drm_atomic.c if (crtc && !fb) { crtc 554 drivers/gpu/drm/drm_atomic.c } else if (fb && !crtc) { crtc 561 drivers/gpu/drm/drm_atomic.c if (!crtc) crtc 565 drivers/gpu/drm/drm_atomic.c if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) { crtc 567 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name, crtc 657 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tcrtc=%s\n", state->crtc ? state->crtc->name : "(null)"); crtc 988 drivers/gpu/drm/drm_atomic.c if (connector_state->crtc) { crtc 992 drivers/gpu/drm/drm_atomic.c connector_state->crtc); crtc 1007 drivers/gpu/drm/drm_atomic.c drm_printf(p, "\tcrtc=%s\n", state->crtc ? state->crtc->name : "(null)"); crtc 1037 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc) crtc 1046 drivers/gpu/drm/drm_atomic.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 1055 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name, state); crtc 1100 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc) crtc 1103 drivers/gpu/drm/drm_atomic.c drm_atomic_get_old_crtc_state(state, crtc); crtc 1106 drivers/gpu/drm/drm_atomic.c WARN_ON(!drm_atomic_get_new_crtc_state(state, crtc)); crtc 1109 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name, state); crtc 1140 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc; crtc 1158 drivers/gpu/drm/drm_atomic.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 1162 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name); crtc 1187 drivers/gpu/drm/drm_atomic.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 1190 drivers/gpu/drm/drm_atomic.c crtc->base.id, crtc->name); crtc 1285 drivers/gpu/drm/drm_atomic.c struct drm_device *dev = set->crtc->dev; crtc 1286 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc; crtc 1298 drivers/gpu/drm/drm_atomic.c ret = drm_atomic_add_affected_connectors(state, set->crtc); crtc 1303 drivers/gpu/drm/drm_atomic.c if (new_conn_state->crtc == set->crtc) { crtc 1322 drivers/gpu/drm/drm_atomic.c set->crtc); crtc 1327 drivers/gpu/drm/drm_atomic.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 1334 drivers/gpu/drm/drm_atomic.c if (crtc == set->crtc) crtc 1356 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc = set->crtc; crtc 1360 drivers/gpu/drm/drm_atomic.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 1364 drivers/gpu/drm/drm_atomic.c primary_state = drm_atomic_get_plane_state(state, crtc->primary); crtc 1396 drivers/gpu/drm/drm_atomic.c ret = drm_atomic_set_crtc_for_plane(primary_state, crtc); crtc 1431 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc; crtc 1442 drivers/gpu/drm/drm_atomic.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) crtc 1454 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc; crtc 1469 drivers/gpu/drm/drm_atomic.c list_for_each_entry(crtc, &config->crtc_list, head) { crtc 1471 drivers/gpu/drm/drm_atomic.c drm_modeset_lock(&crtc->mutex, NULL); crtc 1472 drivers/gpu/drm/drm_atomic.c drm_atomic_crtc_print_state(p, crtc->state); crtc 1474 drivers/gpu/drm/drm_atomic.c drm_modeset_unlock(&crtc->mutex); crtc 80 drivers/gpu/drm/drm_atomic_helper.c if (old_plane_state->crtc) { crtc 82 drivers/gpu/drm/drm_atomic_helper.c old_plane_state->crtc); crtc 90 drivers/gpu/drm/drm_atomic_helper.c if (plane_state->crtc) { crtc 91 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc); crtc 130 drivers/gpu/drm/drm_atomic_helper.c if (!new_conn_state->crtc) crtc 181 drivers/gpu/drm/drm_atomic_helper.c connector->state->crtc->base.id, crtc 182 drivers/gpu/drm/drm_atomic_helper.c connector->state->crtc->name, crtc 196 drivers/gpu/drm/drm_atomic_helper.c new_conn_state->crtc->base.id, new_conn_state->crtc->name, crtc 199 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_new_crtc_state(state, new_conn_state->crtc); crtc 226 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 230 drivers/gpu/drm/drm_atomic_helper.c crtc = conn_state->connector->state->crtc; crtc 238 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(!crtc && encoder != conn_state->best_encoder); crtc 239 drivers/gpu/drm/drm_atomic_helper.c if (crtc) { crtc 240 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 248 drivers/gpu/drm/drm_atomic_helper.c crtc = conn_state->crtc; crtc 249 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(!crtc); crtc 250 drivers/gpu/drm/drm_atomic_helper.c if (crtc) { crtc 251 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 276 drivers/gpu/drm/drm_atomic_helper.c encoder_crtc = old_connector_state->crtc; crtc 305 drivers/gpu/drm/drm_atomic_helper.c if (old_connector_state->crtc != new_connector_state->crtc) { crtc 306 drivers/gpu/drm/drm_atomic_helper.c if (old_connector_state->crtc) { crtc 307 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_new_crtc_state(state, old_connector_state->crtc); crtc 311 drivers/gpu/drm/drm_atomic_helper.c if (new_connector_state->crtc) { crtc 312 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_new_crtc_state(state, new_connector_state->crtc); crtc 317 drivers/gpu/drm/drm_atomic_helper.c if (!new_connector_state->crtc) { crtc 328 drivers/gpu/drm/drm_atomic_helper.c new_connector_state->crtc); crtc 371 drivers/gpu/drm/drm_atomic_helper.c if (!drm_encoder_crtc_ok(new_encoder, new_connector_state->crtc)) { crtc 375 drivers/gpu/drm/drm_atomic_helper.c new_connector_state->crtc->base.id, crtc 376 drivers/gpu/drm/drm_atomic_helper.c new_connector_state->crtc->name); crtc 388 drivers/gpu/drm/drm_atomic_helper.c new_connector_state->crtc->base.id, crtc 389 drivers/gpu/drm/drm_atomic_helper.c new_connector_state->crtc->name); crtc 405 drivers/gpu/drm/drm_atomic_helper.c new_connector_state->crtc->base.id, crtc 406 drivers/gpu/drm/drm_atomic_helper.c new_connector_state->crtc->name); crtc 414 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 421 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 433 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(!!new_conn_state->best_encoder != !!new_conn_state->crtc); crtc 435 drivers/gpu/drm/drm_atomic_helper.c if (!new_conn_state->crtc || !new_conn_state->best_encoder) crtc 439 drivers/gpu/drm/drm_atomic_helper.c drm_atomic_get_new_crtc_state(state, new_conn_state->crtc); crtc 474 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 484 drivers/gpu/drm/drm_atomic_helper.c funcs = crtc->helper_private; crtc 488 drivers/gpu/drm/drm_atomic_helper.c ret = funcs->mode_fixup(crtc, &new_crtc_state->mode, crtc 492 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 502 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc, crtc 520 drivers/gpu/drm/drm_atomic_helper.c ret = drm_crtc_mode_valid(crtc, mode); crtc 523 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 539 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc = conn_state->crtc; crtc 544 drivers/gpu/drm/drm_atomic_helper.c if (!crtc || !encoder) crtc 547 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 555 drivers/gpu/drm/drm_atomic_helper.c mode_status = mode_valid_path(connector, encoder, crtc, mode); crtc 610 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 617 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 621 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); crtc 625 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 631 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 647 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 653 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 678 drivers/gpu/drm/drm_atomic_helper.c if (old_connector_state->crtc) { crtc 680 drivers/gpu/drm/drm_atomic_helper.c old_connector_state->crtc); crtc 704 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 709 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name, crtc 713 drivers/gpu/drm/drm_atomic_helper.c ret = drm_atomic_add_affected_connectors(state, crtc); crtc 717 drivers/gpu/drm/drm_atomic_helper.c ret = drm_atomic_add_affected_planes(state, crtc); crtc 781 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(plane_state->crtc && plane_state->crtc != crtc_state->crtc); crtc 792 drivers/gpu/drm/drm_atomic_helper.c if (WARN_ON(!plane_state->crtc)) { crtc 862 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 890 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 893 drivers/gpu/drm/drm_atomic_helper.c funcs = crtc->helper_private; crtc 898 drivers/gpu/drm/drm_atomic_helper.c ret = funcs->atomic_check(crtc, new_crtc_state); crtc 901 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 990 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 1000 drivers/gpu/drm/drm_atomic_helper.c if (!old_conn_state->crtc) crtc 1003 drivers/gpu/drm/drm_atomic_helper.c old_crtc_state = drm_atomic_get_old_crtc_state(old_state, old_conn_state->crtc); crtc 1005 drivers/gpu/drm/drm_atomic_helper.c if (new_conn_state->crtc) crtc 1008 drivers/gpu/drm/drm_atomic_helper.c new_conn_state->crtc); crtc 1013 drivers/gpu/drm/drm_atomic_helper.c !drm_atomic_crtc_needs_modeset(old_conn_state->crtc->state)) crtc 1039 drivers/gpu/drm/drm_atomic_helper.c else if (new_conn_state->crtc && funcs->prepare) crtc 1050 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { crtc 1061 drivers/gpu/drm/drm_atomic_helper.c funcs = crtc->helper_private; crtc 1064 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 1069 drivers/gpu/drm/drm_atomic_helper.c funcs->prepare(crtc); crtc 1071 drivers/gpu/drm/drm_atomic_helper.c funcs->atomic_disable(crtc, old_crtc_state); crtc 1073 drivers/gpu/drm/drm_atomic_helper.c funcs->disable(crtc); crtc 1075 drivers/gpu/drm/drm_atomic_helper.c funcs->dpms(crtc, DRM_MODE_DPMS_OFF); crtc 1080 drivers/gpu/drm/drm_atomic_helper.c ret = drm_crtc_vblank_get(crtc); crtc 1083 drivers/gpu/drm/drm_atomic_helper.c drm_crtc_vblank_put(crtc); crtc 1112 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 1119 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(!connector->encoder->crtc); crtc 1121 drivers/gpu/drm/drm_atomic_helper.c connector->encoder->crtc = NULL; crtc 1125 drivers/gpu/drm/drm_atomic_helper.c crtc = new_conn_state->crtc; crtc 1126 drivers/gpu/drm/drm_atomic_helper.c if ((!crtc && old_conn_state->crtc) || crtc 1127 drivers/gpu/drm/drm_atomic_helper.c (crtc && drm_atomic_crtc_needs_modeset(crtc->state))) { crtc 1130 drivers/gpu/drm/drm_atomic_helper.c if (crtc && crtc->state->active) crtc 1139 drivers/gpu/drm/drm_atomic_helper.c if (!new_conn_state->crtc) crtc 1146 drivers/gpu/drm/drm_atomic_helper.c connector->encoder->crtc = new_conn_state->crtc; crtc 1150 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) { crtc 1151 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *primary = crtc->primary; crtc 1154 drivers/gpu/drm/drm_atomic_helper.c crtc->mode = new_crtc_state->mode; crtc 1155 drivers/gpu/drm/drm_atomic_helper.c crtc->enabled = new_crtc_state->enable; crtc 1160 drivers/gpu/drm/drm_atomic_helper.c if (new_plane_state && new_plane_state->crtc == crtc) { crtc 1161 drivers/gpu/drm/drm_atomic_helper.c crtc->x = new_plane_state->src_x >> 16; crtc 1162 drivers/gpu/drm/drm_atomic_helper.c crtc->y = new_plane_state->src_y >> 16; crtc 1166 drivers/gpu/drm/drm_atomic_helper.c drm_calc_timestamping_constants(crtc, crtc 1175 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 1181 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) { crtc 1187 drivers/gpu/drm/drm_atomic_helper.c funcs = crtc->helper_private; crtc 1191 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 1193 drivers/gpu/drm/drm_atomic_helper.c funcs->mode_set_nofb(crtc); crtc 1207 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state = new_conn_state->crtc->state; crtc 1295 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 1302 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { crtc 1312 drivers/gpu/drm/drm_atomic_helper.c funcs = crtc->helper_private; crtc 1316 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 1318 drivers/gpu/drm/drm_atomic_helper.c funcs->atomic_enable(crtc, old_crtc_state); crtc 1320 drivers/gpu/drm/drm_atomic_helper.c funcs->commit(crtc); crtc 1331 drivers/gpu/drm/drm_atomic_helper.c if (!new_conn_state->crtc->state->active || crtc 1332 drivers/gpu/drm/drm_atomic_helper.c !drm_atomic_crtc_needs_modeset(new_conn_state->crtc->state)) crtc 1434 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 1446 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { crtc 1450 drivers/gpu/drm/drm_atomic_helper.c ret = drm_crtc_vblank_get(crtc); crtc 1454 drivers/gpu/drm/drm_atomic_helper.c crtc_mask |= drm_crtc_mask(crtc); crtc 1455 drivers/gpu/drm/drm_atomic_helper.c old_state->crtcs[i].last_vblank_count = drm_crtc_vblank_count(crtc); crtc 1458 drivers/gpu/drm/drm_atomic_helper.c for_each_old_crtc_in_state(old_state, crtc, old_crtc_state, i) { crtc 1459 drivers/gpu/drm/drm_atomic_helper.c if (!(crtc_mask & drm_crtc_mask(crtc))) crtc 1464 drivers/gpu/drm/drm_atomic_helper.c drm_crtc_vblank_count(crtc), crtc 1468 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 1470 drivers/gpu/drm/drm_atomic_helper.c drm_crtc_vblank_put(crtc); crtc 1493 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 1500 drivers/gpu/drm/drm_atomic_helper.c crtc = old_state->crtcs[i].ptr; crtc 1502 drivers/gpu/drm/drm_atomic_helper.c if (!crtc || !commit) crtc 1508 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 1585 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 1613 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) crtc 1657 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 1665 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) { crtc 1677 drivers/gpu/drm/drm_atomic_helper.c if (!new_plane_state->crtc || crtc 1678 drivers/gpu/drm/drm_atomic_helper.c old_plane_state->crtc != new_plane_state->crtc) crtc 1885 drivers/gpu/drm/drm_atomic_helper.c static int stall_checks(struct drm_crtc *crtc, bool nonblock) crtc 1892 drivers/gpu/drm/drm_atomic_helper.c spin_lock(&crtc->commit_lock); crtc 1894 drivers/gpu/drm/drm_atomic_helper.c list_for_each_entry(commit, &crtc->commit_list, commit_entry) { crtc 1900 drivers/gpu/drm/drm_atomic_helper.c spin_unlock(&crtc->commit_lock); crtc 1910 drivers/gpu/drm/drm_atomic_helper.c spin_unlock(&crtc->commit_lock); crtc 1922 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 1938 drivers/gpu/drm/drm_atomic_helper.c static void init_commit(struct drm_crtc_commit *commit, struct drm_crtc *crtc) crtc 1945 drivers/gpu/drm/drm_atomic_helper.c commit->crtc = crtc; crtc 1949 drivers/gpu/drm/drm_atomic_helper.c crtc_or_fake_commit(struct drm_atomic_state *state, struct drm_crtc *crtc) crtc 1951 drivers/gpu/drm/drm_atomic_helper.c if (crtc) { crtc 1954 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 2016 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 2025 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 2030 drivers/gpu/drm/drm_atomic_helper.c init_commit(commit, crtc); crtc 2034 drivers/gpu/drm/drm_atomic_helper.c ret = stall_checks(crtc, nonblock); crtc 2079 drivers/gpu/drm/drm_atomic_helper.c commit = crtc_or_fake_commit(state, new_conn_state->crtc ?: old_conn_state->crtc); crtc 2094 drivers/gpu/drm/drm_atomic_helper.c commit = crtc_or_fake_commit(state, new_plane_state->crtc ?: old_plane_state->crtc); crtc 2119 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 2129 drivers/gpu/drm/drm_atomic_helper.c for_each_old_crtc_in_state(old_state, crtc, old_crtc_state, i) { crtc 2139 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 2147 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 2213 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 2216 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) { crtc 2224 drivers/gpu/drm/drm_atomic_helper.c drm_crtc_send_vblank_event(crtc, crtc 2250 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 2255 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { crtc 2295 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 2300 drivers/gpu/drm/drm_atomic_helper.c for_each_old_crtc_in_state(old_state, crtc, old_crtc_state, i) { crtc 2308 drivers/gpu/drm/drm_atomic_helper.c spin_lock(&crtc->commit_lock); crtc 2310 drivers/gpu/drm/drm_atomic_helper.c spin_unlock(&crtc->commit_lock); crtc 2384 drivers/gpu/drm/drm_atomic_helper.c return state->crtc && state->crtc->state->active; crtc 2432 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 2440 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { crtc 2443 drivers/gpu/drm/drm_atomic_helper.c funcs = crtc->helper_private; crtc 2451 drivers/gpu/drm/drm_atomic_helper.c funcs->atomic_begin(crtc, old_crtc_state); crtc 2486 drivers/gpu/drm/drm_atomic_helper.c crtc_state = old_plane_state->crtc->state; crtc 2493 drivers/gpu/drm/drm_atomic_helper.c } else if (new_plane_state->crtc || disabling) { crtc 2498 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { crtc 2501 drivers/gpu/drm/drm_atomic_helper.c funcs = crtc->helper_private; crtc 2509 drivers/gpu/drm/drm_atomic_helper.c funcs->atomic_flush(crtc, old_crtc_state); crtc 2535 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc = old_crtc_state->crtc; crtc 2538 drivers/gpu/drm/drm_atomic_helper.c drm_atomic_get_new_crtc_state(old_state, crtc); crtc 2545 drivers/gpu/drm/drm_atomic_helper.c crtc_funcs = crtc->helper_private; crtc 2547 drivers/gpu/drm/drm_atomic_helper.c crtc_funcs->atomic_begin(crtc, old_crtc_state); crtc 2549 drivers/gpu/drm/drm_atomic_helper.c drm_for_each_plane_mask(plane, crtc->dev, plane_mask) { crtc 2561 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(new_plane_state->crtc && crtc 2562 drivers/gpu/drm/drm_atomic_helper.c new_plane_state->crtc != crtc); crtc 2567 drivers/gpu/drm/drm_atomic_helper.c else if (new_plane_state->crtc || crtc 2573 drivers/gpu/drm/drm_atomic_helper.c crtc_funcs->atomic_flush(crtc, old_crtc_state); crtc 2597 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc = old_crtc_state->crtc; crtc 2599 drivers/gpu/drm/drm_atomic_helper.c crtc->helper_private; crtc 2603 drivers/gpu/drm/drm_atomic_helper.c crtc_funcs->atomic_begin(crtc, NULL); crtc 2618 drivers/gpu/drm/drm_atomic_helper.c crtc_funcs->atomic_flush(crtc, NULL); crtc 2703 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 2721 drivers/gpu/drm/drm_atomic_helper.c for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) { crtc 2765 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 2766 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(crtc->state != old_crtc_state); crtc 2772 drivers/gpu/drm/drm_atomic_helper.c crtc->state = new_crtc_state; crtc 2775 drivers/gpu/drm/drm_atomic_helper.c spin_lock(&crtc->commit_lock); crtc 2777 drivers/gpu/drm/drm_atomic_helper.c &crtc->commit_list); crtc 2778 drivers/gpu/drm/drm_atomic_helper.c spin_unlock(&crtc->commit_lock); crtc 2829 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc, crtc 2852 drivers/gpu/drm/drm_atomic_helper.c ret = drm_atomic_set_crtc_for_plane(plane_state, crtc); crtc 2865 drivers/gpu/drm/drm_atomic_helper.c if (plane == crtc->cursor) crtc 2903 drivers/gpu/drm/drm_atomic_helper.c if (plane_state->crtc && plane_state->crtc->cursor == plane) crtc 2937 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc = set->crtc; crtc 2940 drivers/gpu/drm/drm_atomic_helper.c state = drm_atomic_state_alloc(crtc->dev); crtc 2993 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 3002 drivers/gpu/drm/drm_atomic_helper.c drm_for_each_crtc(crtc, dev) { crtc 3003 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 3015 drivers/gpu/drm/drm_atomic_helper.c ret = drm_atomic_add_affected_planes(state, crtc); crtc 3019 drivers/gpu/drm/drm_atomic_helper.c ret = drm_atomic_add_affected_connectors(state, crtc); crtc 3103 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 3113 drivers/gpu/drm/drm_atomic_helper.c drm_for_each_crtc(crtc, dev) { crtc 3116 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 3238 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc; crtc 3246 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) crtc 3247 drivers/gpu/drm/drm_atomic_helper.c state->crtcs[i].old_state = crtc->state; crtc 3296 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc *crtc, crtc 3301 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane = crtc->primary; crtc 3306 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 3317 drivers/gpu/drm/drm_atomic_helper.c ret = drm_atomic_set_crtc_for_plane(plane_state, crtc); crtc 3326 drivers/gpu/drm/drm_atomic_helper.c crtc->base.id, crtc->name); crtc 3350 drivers/gpu/drm/drm_atomic_helper.c int drm_atomic_helper_page_flip(struct drm_crtc *crtc, crtc 3356 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane = crtc->primary; crtc 3366 drivers/gpu/drm/drm_atomic_helper.c ret = page_flip_common(state, crtc, fb, event, flags); crtc 3393 drivers/gpu/drm/drm_atomic_helper.c int drm_atomic_helper_page_flip_target(struct drm_crtc *crtc, crtc 3400 drivers/gpu/drm/drm_atomic_helper.c struct drm_plane *plane = crtc->primary; crtc 3411 drivers/gpu/drm/drm_atomic_helper.c ret = page_flip_common(state, crtc, fb, event, flags); crtc 3415 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 3443 drivers/gpu/drm/drm_atomic_helper.c int drm_atomic_helper_legacy_gamma_set(struct drm_crtc *crtc, crtc 3448 drivers/gpu/drm/drm_atomic_helper.c struct drm_device *dev = crtc->dev; crtc 3456 drivers/gpu/drm/drm_atomic_helper.c state = drm_atomic_state_alloc(crtc->dev); crtc 3478 drivers/gpu/drm/drm_atomic_helper.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 73 drivers/gpu/drm/drm_atomic_state_helper.c __drm_atomic_helper_crtc_reset(struct drm_crtc *crtc, crtc 77 drivers/gpu/drm/drm_atomic_state_helper.c crtc_state->crtc = crtc; crtc 79 drivers/gpu/drm/drm_atomic_state_helper.c crtc->state = crtc_state; crtc 90 drivers/gpu/drm/drm_atomic_state_helper.c void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc) crtc 93 drivers/gpu/drm/drm_atomic_state_helper.c kzalloc(sizeof(*crtc->state), GFP_KERNEL); crtc 95 drivers/gpu/drm/drm_atomic_state_helper.c if (crtc->state) crtc 96 drivers/gpu/drm/drm_atomic_state_helper.c crtc->funcs->atomic_destroy_state(crtc, crtc->state); crtc 98 drivers/gpu/drm/drm_atomic_state_helper.c __drm_atomic_helper_crtc_reset(crtc, crtc_state); crtc 110 drivers/gpu/drm/drm_atomic_state_helper.c void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, crtc 113 drivers/gpu/drm/drm_atomic_state_helper.c memcpy(state, crtc->state, sizeof(*state)); crtc 147 drivers/gpu/drm/drm_atomic_state_helper.c drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc) crtc 151 drivers/gpu/drm/drm_atomic_state_helper.c if (WARN_ON(!crtc->state)) crtc 156 drivers/gpu/drm/drm_atomic_state_helper.c __drm_atomic_helper_crtc_duplicate_state(crtc, state); crtc 206 drivers/gpu/drm/drm_atomic_state_helper.c void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc, crtc 413 drivers/gpu/drm/drm_atomic_state_helper.c if (state->crtc) crtc 459 drivers/gpu/drm/drm_atomic_state_helper.c if (state->crtc) crtc 67 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc = state->crtc; crtc 80 drivers/gpu/drm/drm_atomic_uapi.c drm_property_create_blob(state->crtc->dev, crtc 89 drivers/gpu/drm/drm_atomic_uapi.c mode->name, crtc->base.id, crtc->name, state); crtc 94 drivers/gpu/drm/drm_atomic_uapi.c crtc->base.id, crtc->name, state); crtc 117 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc = state->crtc; crtc 132 drivers/gpu/drm/drm_atomic_uapi.c crtc->base.id, crtc->name, crtc 137 drivers/gpu/drm/drm_atomic_uapi.c ret = drm_mode_convert_umode(crtc->dev, crtc 141 drivers/gpu/drm/drm_atomic_uapi.c crtc->base.id, crtc->name, crtc 150 drivers/gpu/drm/drm_atomic_uapi.c state->mode.name, crtc->base.id, crtc->name, crtc 155 drivers/gpu/drm/drm_atomic_uapi.c crtc->base.id, crtc->name, state); crtc 178 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc) crtc 183 drivers/gpu/drm/drm_atomic_uapi.c if (plane_state->crtc == crtc) crtc 185 drivers/gpu/drm/drm_atomic_uapi.c if (plane_state->crtc) { crtc 187 drivers/gpu/drm/drm_atomic_uapi.c plane_state->crtc); crtc 194 drivers/gpu/drm/drm_atomic_uapi.c plane_state->crtc = crtc; crtc 196 drivers/gpu/drm/drm_atomic_uapi.c if (crtc) { crtc 198 drivers/gpu/drm/drm_atomic_uapi.c crtc); crtc 204 drivers/gpu/drm/drm_atomic_uapi.c if (crtc) crtc 207 drivers/gpu/drm/drm_atomic_uapi.c crtc->base.id, crtc->name); crtc 297 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc) crtc 302 drivers/gpu/drm/drm_atomic_uapi.c if (conn_state->crtc == crtc) crtc 305 drivers/gpu/drm/drm_atomic_uapi.c if (conn_state->crtc) { crtc 307 drivers/gpu/drm/drm_atomic_uapi.c conn_state->crtc); crtc 313 drivers/gpu/drm/drm_atomic_uapi.c conn_state->crtc = NULL; crtc 316 drivers/gpu/drm/drm_atomic_uapi.c if (crtc) { crtc 317 drivers/gpu/drm/drm_atomic_uapi.c crtc_state = drm_atomic_get_crtc_state(conn_state->state, crtc); crtc 325 drivers/gpu/drm/drm_atomic_uapi.c conn_state->crtc = crtc; crtc 329 drivers/gpu/drm/drm_atomic_uapi.c conn_state, crtc->base.id, crtc->name); crtc 341 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc, s32 __user *fence_ptr) crtc 343 drivers/gpu/drm/drm_atomic_uapi.c state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = fence_ptr; crtc 347 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc) crtc 351 drivers/gpu/drm/drm_atomic_uapi.c fence_ptr = state->crtcs[drm_crtc_index(crtc)].out_fence_ptr; crtc 352 drivers/gpu/drm/drm_atomic_uapi.c state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = NULL; crtc 419 drivers/gpu/drm/drm_atomic_uapi.c static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, crtc 423 drivers/gpu/drm/drm_atomic_uapi.c struct drm_device *dev = crtc->dev; crtc 471 drivers/gpu/drm/drm_atomic_uapi.c set_out_fence_for_crtc(state->state, crtc, fence_ptr); crtc 472 drivers/gpu/drm/drm_atomic_uapi.c } else if (crtc->funcs->atomic_set_property) { crtc 473 drivers/gpu/drm/drm_atomic_uapi.c return crtc->funcs->atomic_set_property(crtc, state, property, val); crtc 476 drivers/gpu/drm/drm_atomic_uapi.c crtc->base.id, crtc->name, crtc 485 drivers/gpu/drm/drm_atomic_uapi.c drm_atomic_crtc_get_property(struct drm_crtc *crtc, crtc 489 drivers/gpu/drm/drm_atomic_uapi.c struct drm_device *dev = crtc->dev; crtc 506 drivers/gpu/drm/drm_atomic_uapi.c else if (crtc->funcs->atomic_get_property) crtc 507 drivers/gpu/drm/drm_atomic_uapi.c return crtc->funcs->atomic_get_property(crtc, state, property, val); crtc 541 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc = drm_crtc_find(dev, file_priv, val); crtc 542 drivers/gpu/drm/drm_atomic_uapi.c if (val && !crtc) crtc 544 drivers/gpu/drm/drm_atomic_uapi.c return drm_atomic_set_crtc_for_plane(state, crtc); crtc 612 drivers/gpu/drm/drm_atomic_uapi.c *val = (state->crtc) ? state->crtc->base.id : 0; crtc 683 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc = drm_crtc_find(dev, file_priv, val); crtc 684 drivers/gpu/drm/drm_atomic_uapi.c if (val && !crtc) crtc 686 drivers/gpu/drm/drm_atomic_uapi.c return drm_atomic_set_crtc_for_connector(state, crtc); crtc 791 drivers/gpu/drm/drm_atomic_uapi.c *val = (state->crtc) ? state->crtc->base.id : 0; crtc 793 drivers/gpu/drm/drm_atomic_uapi.c if (state->crtc && state->crtc->state->self_refresh_active) crtc 870 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc = obj_to_crtc(obj); crtc 871 drivers/gpu/drm/drm_atomic_uapi.c WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); crtc 872 drivers/gpu/drm/drm_atomic_uapi.c ret = drm_atomic_crtc_get_property(crtc, crtc 873 drivers/gpu/drm/drm_atomic_uapi.c crtc->state, property, val); crtc 896 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc, uint64_t user_data) crtc 906 drivers/gpu/drm/drm_atomic_uapi.c e->event.vbl.crtc_id = crtc->base.id; crtc 918 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc; crtc 932 drivers/gpu/drm/drm_atomic_uapi.c crtc = connector->state->crtc; crtc 933 drivers/gpu/drm/drm_atomic_uapi.c if (!crtc) crtc 935 drivers/gpu/drm/drm_atomic_uapi.c ret = drm_atomic_add_affected_connectors(state, crtc); crtc 939 drivers/gpu/drm/drm_atomic_uapi.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 946 drivers/gpu/drm/drm_atomic_uapi.c if (new_conn_state->crtc != crtc) crtc 991 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc = obj_to_crtc(obj); crtc 994 drivers/gpu/drm/drm_atomic_uapi.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 1000 drivers/gpu/drm/drm_atomic_uapi.c ret = drm_atomic_crtc_set_property(crtc, crtc 1110 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc; crtc 1119 drivers/gpu/drm/drm_atomic_uapi.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) { crtc 1122 drivers/gpu/drm/drm_atomic_uapi.c fence_ptr = get_out_fence_for_crtc(crtc_state->state, crtc); crtc 1127 drivers/gpu/drm/drm_atomic_uapi.c e = create_vblank_event(crtc, arg->user_data); crtc 1163 drivers/gpu/drm/drm_atomic_uapi.c fence = drm_crtc_create_fence(crtc); crtc 1232 drivers/gpu/drm/drm_atomic_uapi.c struct drm_crtc *crtc; crtc 1245 drivers/gpu/drm/drm_atomic_uapi.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) { crtc 422 drivers/gpu/drm/drm_blend.c static int drm_atomic_helper_crtc_normalize_zpos(struct drm_crtc *crtc, crtc 426 drivers/gpu/drm/drm_blend.c struct drm_device *dev = crtc->dev; crtc 434 drivers/gpu/drm/drm_blend.c crtc->base.id, crtc->name); crtc 494 drivers/gpu/drm/drm_blend.c struct drm_crtc *crtc; crtc 501 drivers/gpu/drm/drm_blend.c crtc = new_plane_state->crtc; crtc 502 drivers/gpu/drm/drm_blend.c if (!crtc) crtc 505 drivers/gpu/drm/drm_blend.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 510 drivers/gpu/drm/drm_blend.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 513 drivers/gpu/drm/drm_blend.c ret = drm_atomic_helper_crtc_normalize_zpos(crtc, crtc 38 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc *crtc; crtc 48 drivers/gpu/drm/drm_client_modeset.c drm_for_each_crtc(crtc, dev) crtc 49 drivers/gpu/drm/drm_client_modeset.c client->modesets[i++].crtc = crtc; crtc 55 drivers/gpu/drm/drm_client_modeset.c for (modeset = client->modesets; modeset->crtc; modeset++) { crtc 106 drivers/gpu/drm/drm_client_modeset.c drm_client_find_modeset(struct drm_client_dev *client, struct drm_crtc *crtc) crtc 111 drivers/gpu/drm/drm_client_modeset.c if (modeset->crtc == crtc) crtc 415 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc *crtc) crtc 421 drivers/gpu/drm/drm_client_modeset.c if (encoder->possible_crtcs & drm_crtc_mask(crtc)) crtc 438 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc **crtcs, *crtc; crtc 470 drivers/gpu/drm/drm_client_modeset.c crtc = modeset->crtc; crtc 472 drivers/gpu/drm/drm_client_modeset.c if (!connector_has_possible_crtc(connector, crtc)) crtc 476 drivers/gpu/drm/drm_client_modeset.c if (best_crtcs[o] == crtc) crtc 488 drivers/gpu/drm/drm_client_modeset.c crtcs[n] = crtc; crtc 569 drivers/gpu/drm/drm_client_modeset.c if (!encoder || WARN_ON(!connector->state->crtc)) { crtc 582 drivers/gpu/drm/drm_client_modeset.c new_crtc = connector->state->crtc; crtc 633 drivers/gpu/drm/drm_client_modeset.c modes[i] = &connector->state->crtc->mode; crtc 639 drivers/gpu/drm/drm_client_modeset.c connector->state->crtc->base.id, crtc 640 drivers/gpu/drm/drm_client_modeset.c connector->state->crtc->name, crtc 772 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc *crtc = crtcs[i]; crtc 775 drivers/gpu/drm/drm_client_modeset.c if (mode && crtc) { crtc 776 drivers/gpu/drm/drm_client_modeset.c struct drm_mode_set *modeset = drm_client_find_modeset(client, crtc); crtc 780 drivers/gpu/drm/drm_client_modeset.c mode->name, crtc->base.id, offset->x, offset->y); crtc 827 drivers/gpu/drm/drm_client_modeset.c struct drm_plane *plane = modeset->crtc->primary; crtc 938 drivers/gpu/drm/drm_client_modeset.c struct drm_plane *primary = mode_set->crtc->primary; crtc 958 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc *crtc = mode_set->crtc; crtc 959 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 1004 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc *crtc = mode_set->crtc; crtc 1006 drivers/gpu/drm/drm_client_modeset.c if (crtc->funcs->cursor_set2) { crtc 1007 drivers/gpu/drm/drm_client_modeset.c ret = crtc->funcs->cursor_set2(crtc, NULL, 0, 0, 0, 0, 0); crtc 1010 drivers/gpu/drm/drm_client_modeset.c } else if (crtc->funcs->cursor_set) { crtc 1011 drivers/gpu/drm/drm_client_modeset.c ret = crtc->funcs->cursor_set(crtc, NULL, 0, 0, 0); crtc 1085 drivers/gpu/drm/drm_client_modeset.c if (!modeset->crtc->enabled) crtc 153 drivers/gpu/drm/drm_color_mgmt.c void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, crtc 158 drivers/gpu/drm/drm_color_mgmt.c struct drm_device *dev = crtc->dev; crtc 162 drivers/gpu/drm/drm_color_mgmt.c drm_object_attach_property(&crtc->base, crtc 164 drivers/gpu/drm/drm_color_mgmt.c drm_object_attach_property(&crtc->base, crtc 170 drivers/gpu/drm/drm_color_mgmt.c drm_object_attach_property(&crtc->base, crtc 174 drivers/gpu/drm/drm_color_mgmt.c drm_object_attach_property(&crtc->base, crtc 176 drivers/gpu/drm/drm_color_mgmt.c drm_object_attach_property(&crtc->base, crtc 195 drivers/gpu/drm/drm_color_mgmt.c int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc, crtc 201 drivers/gpu/drm/drm_color_mgmt.c crtc->gamma_size = gamma_size; crtc 203 drivers/gpu/drm/drm_color_mgmt.c crtc->gamma_store = kcalloc(gamma_size, sizeof(uint16_t) * 3, crtc 205 drivers/gpu/drm/drm_color_mgmt.c if (!crtc->gamma_store) { crtc 206 drivers/gpu/drm/drm_color_mgmt.c crtc->gamma_size = 0; crtc 210 drivers/gpu/drm/drm_color_mgmt.c r_base = crtc->gamma_store; crtc 242 drivers/gpu/drm/drm_color_mgmt.c struct drm_crtc *crtc; crtc 251 drivers/gpu/drm/drm_color_mgmt.c crtc = drm_crtc_find(dev, file_priv, crtc_lut->crtc_id); crtc 252 drivers/gpu/drm/drm_color_mgmt.c if (!crtc) crtc 255 drivers/gpu/drm/drm_color_mgmt.c if (crtc->funcs->gamma_set == NULL) crtc 259 drivers/gpu/drm/drm_color_mgmt.c if (crtc_lut->gamma_size != crtc->gamma_size) crtc 265 drivers/gpu/drm/drm_color_mgmt.c r_base = crtc->gamma_store; crtc 283 drivers/gpu/drm/drm_color_mgmt.c ret = crtc->funcs->gamma_set(crtc, r_base, g_base, b_base, crtc 284 drivers/gpu/drm/drm_color_mgmt.c crtc->gamma_size, &ctx); crtc 311 drivers/gpu/drm/drm_color_mgmt.c struct drm_crtc *crtc; crtc 319 drivers/gpu/drm/drm_color_mgmt.c crtc = drm_crtc_find(dev, file_priv, crtc_lut->crtc_id); crtc 320 drivers/gpu/drm/drm_color_mgmt.c if (!crtc) crtc 324 drivers/gpu/drm/drm_color_mgmt.c if (crtc_lut->gamma_size != crtc->gamma_size) crtc 327 drivers/gpu/drm/drm_color_mgmt.c drm_modeset_lock(&crtc->mutex, NULL); crtc 329 drivers/gpu/drm/drm_color_mgmt.c r_base = crtc->gamma_store; crtc 347 drivers/gpu/drm/drm_color_mgmt.c drm_modeset_unlock(&crtc->mutex); crtc 86 drivers/gpu/drm/drm_crtc.c struct drm_crtc *crtc; crtc 88 drivers/gpu/drm/drm_crtc.c drm_for_each_crtc(crtc, dev) crtc 89 drivers/gpu/drm/drm_crtc.c if (idx == crtc->index) crtc 90 drivers/gpu/drm/drm_crtc.c return crtc; crtc 96 drivers/gpu/drm/drm_crtc.c int drm_crtc_force_disable(struct drm_crtc *crtc) crtc 99 drivers/gpu/drm/drm_crtc.c .crtc = crtc, crtc 102 drivers/gpu/drm/drm_crtc.c WARN_ON(drm_drv_uses_atomic_modeset(crtc->dev)); crtc 121 drivers/gpu/drm/drm_crtc.c struct drm_crtc *crtc; crtc 124 drivers/gpu/drm/drm_crtc.c drm_for_each_crtc(crtc, dev) { crtc 125 drivers/gpu/drm/drm_crtc.c drm_debugfs_crtc_add(crtc); crtc 127 drivers/gpu/drm/drm_crtc.c if (crtc->funcs->late_register) crtc 128 drivers/gpu/drm/drm_crtc.c ret = crtc->funcs->late_register(crtc); crtc 138 drivers/gpu/drm/drm_crtc.c struct drm_crtc *crtc; crtc 140 drivers/gpu/drm/drm_crtc.c drm_for_each_crtc(crtc, dev) { crtc 141 drivers/gpu/drm/drm_crtc.c if (crtc->funcs->early_unregister) crtc 142 drivers/gpu/drm/drm_crtc.c crtc->funcs->early_unregister(crtc); crtc 143 drivers/gpu/drm/drm_crtc.c drm_debugfs_crtc_remove(crtc); crtc 147 drivers/gpu/drm/drm_crtc.c static int drm_crtc_crc_init(struct drm_crtc *crtc) crtc 150 drivers/gpu/drm/drm_crtc.c spin_lock_init(&crtc->crc.lock); crtc 151 drivers/gpu/drm/drm_crtc.c init_waitqueue_head(&crtc->crc.wq); crtc 152 drivers/gpu/drm/drm_crtc.c crtc->crc.source = kstrdup("auto", GFP_KERNEL); crtc 153 drivers/gpu/drm/drm_crtc.c if (!crtc->crc.source) crtc 159 drivers/gpu/drm/drm_crtc.c static void drm_crtc_crc_fini(struct drm_crtc *crtc) crtc 162 drivers/gpu/drm/drm_crtc.c kfree(crtc->crc.source); crtc 176 drivers/gpu/drm/drm_crtc.c struct drm_crtc *crtc = fence_to_crtc(fence); crtc 178 drivers/gpu/drm/drm_crtc.c return crtc->dev->driver->name; crtc 183 drivers/gpu/drm/drm_crtc.c struct drm_crtc *crtc = fence_to_crtc(fence); crtc 185 drivers/gpu/drm/drm_crtc.c return crtc->timeline_name; crtc 193 drivers/gpu/drm/drm_crtc.c struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc) crtc 201 drivers/gpu/drm/drm_crtc.c dma_fence_init(fence, &drm_crtc_fence_ops, &crtc->fence_lock, crtc 202 drivers/gpu/drm/drm_crtc.c crtc->fence_context, ++crtc->fence_seqno); crtc 226 drivers/gpu/drm/drm_crtc.c int drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, crtc 246 drivers/gpu/drm/drm_crtc.c crtc->dev = dev; crtc 247 drivers/gpu/drm/drm_crtc.c crtc->funcs = funcs; crtc 249 drivers/gpu/drm/drm_crtc.c INIT_LIST_HEAD(&crtc->commit_list); crtc 250 drivers/gpu/drm/drm_crtc.c spin_lock_init(&crtc->commit_lock); crtc 252 drivers/gpu/drm/drm_crtc.c drm_modeset_lock_init(&crtc->mutex); crtc 253 drivers/gpu/drm/drm_crtc.c ret = drm_mode_object_add(dev, &crtc->base, DRM_MODE_OBJECT_CRTC); crtc 261 drivers/gpu/drm/drm_crtc.c crtc->name = kvasprintf(GFP_KERNEL, name, ap); crtc 264 drivers/gpu/drm/drm_crtc.c crtc->name = kasprintf(GFP_KERNEL, "crtc-%d", crtc 267 drivers/gpu/drm/drm_crtc.c if (!crtc->name) { crtc 268 drivers/gpu/drm/drm_crtc.c drm_mode_object_unregister(dev, &crtc->base); crtc 272 drivers/gpu/drm/drm_crtc.c crtc->fence_context = dma_fence_context_alloc(1); crtc 273 drivers/gpu/drm/drm_crtc.c spin_lock_init(&crtc->fence_lock); crtc 274 drivers/gpu/drm/drm_crtc.c snprintf(crtc->timeline_name, sizeof(crtc->timeline_name), crtc 275 drivers/gpu/drm/drm_crtc.c "CRTC:%d-%s", crtc->base.id, crtc->name); crtc 277 drivers/gpu/drm/drm_crtc.c crtc->base.properties = &crtc->properties; crtc 279 drivers/gpu/drm/drm_crtc.c list_add_tail(&crtc->head, &config->crtc_list); crtc 280 drivers/gpu/drm/drm_crtc.c crtc->index = config->num_crtc++; crtc 282 drivers/gpu/drm/drm_crtc.c crtc->primary = primary; crtc 283 drivers/gpu/drm/drm_crtc.c crtc->cursor = cursor; crtc 285 drivers/gpu/drm/drm_crtc.c primary->possible_crtcs = drm_crtc_mask(crtc); crtc 287 drivers/gpu/drm/drm_crtc.c cursor->possible_crtcs = drm_crtc_mask(crtc); crtc 289 drivers/gpu/drm/drm_crtc.c ret = drm_crtc_crc_init(crtc); crtc 291 drivers/gpu/drm/drm_crtc.c drm_mode_object_unregister(dev, &crtc->base); crtc 296 drivers/gpu/drm/drm_crtc.c drm_object_attach_property(&crtc->base, config->prop_active, 0); crtc 297 drivers/gpu/drm/drm_crtc.c drm_object_attach_property(&crtc->base, config->prop_mode_id, 0); crtc 298 drivers/gpu/drm/drm_crtc.c drm_object_attach_property(&crtc->base, crtc 300 drivers/gpu/drm/drm_crtc.c drm_object_attach_property(&crtc->base, crtc 316 drivers/gpu/drm/drm_crtc.c void drm_crtc_cleanup(struct drm_crtc *crtc) crtc 318 drivers/gpu/drm/drm_crtc.c struct drm_device *dev = crtc->dev; crtc 325 drivers/gpu/drm/drm_crtc.c drm_crtc_crc_fini(crtc); crtc 327 drivers/gpu/drm/drm_crtc.c kfree(crtc->gamma_store); crtc 328 drivers/gpu/drm/drm_crtc.c crtc->gamma_store = NULL; crtc 330 drivers/gpu/drm/drm_crtc.c drm_modeset_lock_fini(&crtc->mutex); crtc 332 drivers/gpu/drm/drm_crtc.c drm_mode_object_unregister(dev, &crtc->base); crtc 333 drivers/gpu/drm/drm_crtc.c list_del(&crtc->head); crtc 336 drivers/gpu/drm/drm_crtc.c WARN_ON(crtc->state && !crtc->funcs->atomic_destroy_state); crtc 337 drivers/gpu/drm/drm_crtc.c if (crtc->state && crtc->funcs->atomic_destroy_state) crtc 338 drivers/gpu/drm/drm_crtc.c crtc->funcs->atomic_destroy_state(crtc, crtc->state); crtc 340 drivers/gpu/drm/drm_crtc.c kfree(crtc->name); crtc 342 drivers/gpu/drm/drm_crtc.c memset(crtc, 0, sizeof(*crtc)); crtc 363 drivers/gpu/drm/drm_crtc.c struct drm_crtc *crtc; crtc 369 drivers/gpu/drm/drm_crtc.c crtc = drm_crtc_find(dev, file_priv, crtc_resp->crtc_id); crtc 370 drivers/gpu/drm/drm_crtc.c if (!crtc) crtc 373 drivers/gpu/drm/drm_crtc.c plane = crtc->primary; crtc 375 drivers/gpu/drm/drm_crtc.c crtc_resp->gamma_size = crtc->gamma_size; crtc 391 drivers/gpu/drm/drm_crtc.c drm_modeset_lock(&crtc->mutex, NULL); crtc 392 drivers/gpu/drm/drm_crtc.c if (crtc->state) { crtc 393 drivers/gpu/drm/drm_crtc.c if (crtc->state->enable) { crtc 394 drivers/gpu/drm/drm_crtc.c drm_mode_convert_to_umode(&crtc_resp->mode, &crtc->state->mode); crtc 400 drivers/gpu/drm/drm_crtc.c crtc_resp->x = crtc->x; crtc 401 drivers/gpu/drm/drm_crtc.c crtc_resp->y = crtc->y; crtc 403 drivers/gpu/drm/drm_crtc.c if (crtc->enabled) { crtc 404 drivers/gpu/drm/drm_crtc.c drm_mode_convert_to_umode(&crtc_resp->mode, &crtc->mode); crtc 413 drivers/gpu/drm/drm_crtc.c drm_modeset_unlock(&crtc->mutex); crtc 421 drivers/gpu/drm/drm_crtc.c struct drm_crtc *crtc = set->crtc; crtc 426 drivers/gpu/drm/drm_crtc.c WARN_ON(drm_drv_uses_atomic_modeset(crtc->dev)); crtc 433 drivers/gpu/drm/drm_crtc.c drm_for_each_crtc(tmp, crtc->dev) { crtc 441 drivers/gpu/drm/drm_crtc.c ret = crtc->funcs->set_config(set, ctx); crtc 443 drivers/gpu/drm/drm_crtc.c struct drm_plane *plane = crtc->primary; crtc 445 drivers/gpu/drm/drm_crtc.c plane->crtc = fb ? crtc : NULL; crtc 449 drivers/gpu/drm/drm_crtc.c drm_for_each_crtc(tmp, crtc->dev) { crtc 477 drivers/gpu/drm/drm_crtc.c WARN_ON(drm_drv_uses_atomic_modeset(set->crtc->dev)); crtc 492 drivers/gpu/drm/drm_crtc.c int drm_crtc_check_viewport(const struct drm_crtc *crtc, crtc 502 drivers/gpu/drm/drm_crtc.c if (crtc->state && crtc 503 drivers/gpu/drm/drm_crtc.c drm_rotation_90_or_270(crtc->primary->state->rotation)) crtc 530 drivers/gpu/drm/drm_crtc.c struct drm_crtc *crtc; crtc 551 drivers/gpu/drm/drm_crtc.c crtc = drm_crtc_find(dev, file_priv, crtc_req->crtc_id); crtc 552 drivers/gpu/drm/drm_crtc.c if (!crtc) { crtc 556 drivers/gpu/drm/drm_crtc.c DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name); crtc 558 drivers/gpu/drm/drm_crtc.c plane = crtc->primary; crtc 564 drivers/gpu/drm/drm_crtc.c mutex_lock(&crtc->dev->mode_config.mutex); crtc 640 drivers/gpu/drm/drm_crtc.c ret = drm_crtc_check_viewport(crtc, crtc_req->x, crtc_req->y, crtc 700 drivers/gpu/drm/drm_crtc.c set.crtc = crtc; crtc 709 drivers/gpu/drm/drm_crtc.c ret = crtc->funcs->set_config(&set, &ctx); crtc 732 drivers/gpu/drm/drm_crtc.c mutex_unlock(&crtc->dev->mode_config.mutex); crtc 742 drivers/gpu/drm/drm_crtc.c struct drm_crtc *crtc = obj_to_crtc(obj); crtc 744 drivers/gpu/drm/drm_crtc.c if (crtc->funcs->set_property) crtc 745 drivers/gpu/drm/drm_crtc.c ret = crtc->funcs->set_property(crtc, property, value); crtc 133 drivers/gpu/drm/drm_crtc_helper.c bool drm_helper_crtc_in_use(struct drm_crtc *crtc) crtc 136 drivers/gpu/drm/drm_crtc_helper.c struct drm_device *dev = crtc->dev; crtc 148 drivers/gpu/drm/drm_crtc_helper.c if (encoder->crtc == crtc && drm_helper_encoder_in_use(encoder)) crtc 171 drivers/gpu/drm/drm_crtc_helper.c struct drm_crtc *crtc; crtc 179 drivers/gpu/drm/drm_crtc_helper.c encoder->crtc = NULL; crtc 183 drivers/gpu/drm/drm_crtc_helper.c drm_for_each_crtc(crtc, dev) { crtc 184 drivers/gpu/drm/drm_crtc_helper.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 185 drivers/gpu/drm/drm_crtc_helper.c crtc->enabled = drm_helper_crtc_in_use(crtc); crtc 186 drivers/gpu/drm/drm_crtc_helper.c if (!crtc->enabled) { crtc 188 drivers/gpu/drm/drm_crtc_helper.c (*crtc_funcs->disable)(crtc); crtc 190 drivers/gpu/drm/drm_crtc_helper.c (*crtc_funcs->dpms)(crtc, DRM_MODE_DPMS_OFF); crtc 191 drivers/gpu/drm/drm_crtc_helper.c crtc->primary->fb = NULL; crtc 242 drivers/gpu/drm/drm_crtc_helper.c if (encoder->crtc == NULL) crtc 246 drivers/gpu/drm/drm_crtc_helper.c encoder->crtc != (*encoder_funcs->get_crtc)(encoder)) crtc 271 drivers/gpu/drm/drm_crtc_helper.c bool drm_crtc_helper_set_mode(struct drm_crtc *crtc, crtc 276 drivers/gpu/drm/drm_crtc_helper.c struct drm_device *dev = crtc->dev; crtc 278 drivers/gpu/drm/drm_crtc_helper.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 289 drivers/gpu/drm/drm_crtc_helper.c saved_enabled = crtc->enabled; crtc 290 drivers/gpu/drm/drm_crtc_helper.c crtc->enabled = drm_helper_crtc_in_use(crtc); crtc 291 drivers/gpu/drm/drm_crtc_helper.c if (!crtc->enabled) crtc 296 drivers/gpu/drm/drm_crtc_helper.c crtc->enabled = saved_enabled; crtc 300 drivers/gpu/drm/drm_crtc_helper.c saved_mode = crtc->mode; crtc 301 drivers/gpu/drm/drm_crtc_helper.c saved_hwmode = crtc->hwmode; crtc 302 drivers/gpu/drm/drm_crtc_helper.c saved_x = crtc->x; crtc 303 drivers/gpu/drm/drm_crtc_helper.c saved_y = crtc->y; crtc 308 drivers/gpu/drm/drm_crtc_helper.c crtc->mode = *mode; crtc 309 drivers/gpu/drm/drm_crtc_helper.c crtc->x = x; crtc 310 drivers/gpu/drm/drm_crtc_helper.c crtc->y = y; crtc 318 drivers/gpu/drm/drm_crtc_helper.c if (encoder->crtc != crtc) crtc 336 drivers/gpu/drm/drm_crtc_helper.c if (!(ret = crtc_funcs->mode_fixup(crtc, mode, crtc 342 drivers/gpu/drm/drm_crtc_helper.c DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.id, crtc->name); crtc 344 drivers/gpu/drm/drm_crtc_helper.c crtc->hwmode = *adjusted_mode; crtc 349 drivers/gpu/drm/drm_crtc_helper.c if (encoder->crtc != crtc) crtc 363 drivers/gpu/drm/drm_crtc_helper.c crtc_funcs->prepare(crtc); crtc 368 drivers/gpu/drm/drm_crtc_helper.c ret = !crtc_funcs->mode_set(crtc, mode, adjusted_mode, x, y, old_fb); crtc 374 drivers/gpu/drm/drm_crtc_helper.c if (encoder->crtc != crtc) crtc 388 drivers/gpu/drm/drm_crtc_helper.c crtc_funcs->commit(crtc); crtc 392 drivers/gpu/drm/drm_crtc_helper.c if (encoder->crtc != crtc) crtc 407 drivers/gpu/drm/drm_crtc_helper.c drm_calc_timestamping_constants(crtc, &crtc->hwmode); crtc 413 drivers/gpu/drm/drm_crtc_helper.c crtc->enabled = saved_enabled; crtc 414 drivers/gpu/drm/drm_crtc_helper.c crtc->mode = saved_mode; crtc 415 drivers/gpu/drm/drm_crtc_helper.c crtc->hwmode = saved_hwmode; crtc 416 drivers/gpu/drm/drm_crtc_helper.c crtc->x = saved_x; crtc 417 drivers/gpu/drm/drm_crtc_helper.c crtc->y = saved_y; crtc 425 drivers/gpu/drm/drm_crtc_helper.c drm_crtc_helper_disable(struct drm_crtc *crtc) crtc 427 drivers/gpu/drm/drm_crtc_helper.c struct drm_device *dev = crtc->dev; crtc 435 drivers/gpu/drm/drm_crtc_helper.c if (encoder->crtc != crtc) crtc 519 drivers/gpu/drm/drm_crtc_helper.c BUG_ON(!set->crtc); crtc 520 drivers/gpu/drm/drm_crtc_helper.c BUG_ON(!set->crtc->helper_private); crtc 526 drivers/gpu/drm/drm_crtc_helper.c crtc_funcs = set->crtc->helper_private; crtc 528 drivers/gpu/drm/drm_crtc_helper.c dev = set->crtc->dev; crtc 536 drivers/gpu/drm/drm_crtc_helper.c set->crtc->base.id, set->crtc->name, crtc 541 drivers/gpu/drm/drm_crtc_helper.c set->crtc->base.id, set->crtc->name); crtc 542 drivers/gpu/drm/drm_crtc_helper.c drm_crtc_helper_disable(set->crtc); crtc 571 drivers/gpu/drm/drm_crtc_helper.c save_encoder_crtcs[count++] = encoder->crtc; crtc 580 drivers/gpu/drm/drm_crtc_helper.c save_set.crtc = set->crtc; crtc 581 drivers/gpu/drm/drm_crtc_helper.c save_set.mode = &set->crtc->mode; crtc 582 drivers/gpu/drm/drm_crtc_helper.c save_set.x = set->crtc->x; crtc 583 drivers/gpu/drm/drm_crtc_helper.c save_set.y = set->crtc->y; crtc 584 drivers/gpu/drm/drm_crtc_helper.c save_set.fb = set->crtc->primary->fb; crtc 588 drivers/gpu/drm/drm_crtc_helper.c if (set->crtc->primary->fb != set->fb) { crtc 590 drivers/gpu/drm/drm_crtc_helper.c if (set->crtc->primary->fb == NULL) { crtc 593 drivers/gpu/drm/drm_crtc_helper.c } else if (set->fb->format != set->crtc->primary->fb->format) { crtc 599 drivers/gpu/drm/drm_crtc_helper.c if (set->x != set->crtc->x || set->y != set->crtc->y) crtc 602 drivers/gpu/drm/drm_crtc_helper.c if (!drm_mode_equal(set->mode, &set->crtc->mode)) { crtc 604 drivers/gpu/drm/drm_crtc_helper.c drm_mode_debug_printmodeline(&set->crtc->mode); crtc 650 drivers/gpu/drm/drm_crtc_helper.c connector->encoder->crtc = NULL; crtc 667 drivers/gpu/drm/drm_crtc_helper.c if (connector->encoder->crtc == set->crtc) crtc 670 drivers/gpu/drm/drm_crtc_helper.c new_crtc = connector->encoder->crtc; crtc 674 drivers/gpu/drm/drm_crtc_helper.c new_crtc = set->crtc; crtc 684 drivers/gpu/drm/drm_crtc_helper.c if (new_crtc != connector->encoder->crtc) { crtc 687 drivers/gpu/drm/drm_crtc_helper.c connector->encoder->crtc = new_crtc; crtc 705 drivers/gpu/drm/drm_crtc_helper.c if (drm_helper_crtc_in_use(set->crtc)) { crtc 709 drivers/gpu/drm/drm_crtc_helper.c set->crtc->primary->fb = set->fb; crtc 710 drivers/gpu/drm/drm_crtc_helper.c if (!drm_crtc_helper_set_mode(set->crtc, set->mode, crtc 714 drivers/gpu/drm/drm_crtc_helper.c set->crtc->base.id, set->crtc->name); crtc 715 drivers/gpu/drm/drm_crtc_helper.c set->crtc->primary->fb = save_set.fb; crtc 728 drivers/gpu/drm/drm_crtc_helper.c set->crtc->x = set->x; crtc 729 drivers/gpu/drm/drm_crtc_helper.c set->crtc->y = set->y; crtc 730 drivers/gpu/drm/drm_crtc_helper.c set->crtc->primary->fb = set->fb; crtc 731 drivers/gpu/drm/drm_crtc_helper.c ret = crtc_funcs->mode_set_base(set->crtc, crtc 734 drivers/gpu/drm/drm_crtc_helper.c set->crtc->x = save_set.x; crtc 735 drivers/gpu/drm/drm_crtc_helper.c set->crtc->y = save_set.y; crtc 736 drivers/gpu/drm/drm_crtc_helper.c set->crtc->primary->fb = save_set.fb; crtc 749 drivers/gpu/drm/drm_crtc_helper.c encoder->crtc = save_encoder_crtcs[count++]; crtc 769 drivers/gpu/drm/drm_crtc_helper.c !drm_crtc_helper_set_mode(save_set.crtc, save_set.mode, save_set.x, crtc 809 drivers/gpu/drm/drm_crtc_helper.c static int drm_helper_choose_crtc_dpms(struct drm_crtc *crtc) crtc 814 drivers/gpu/drm/drm_crtc_helper.c struct drm_device *dev = crtc->dev; crtc 818 drivers/gpu/drm/drm_crtc_helper.c if (connector->encoder && connector->encoder->crtc == crtc) crtc 850 drivers/gpu/drm/drm_crtc_helper.c struct drm_crtc *crtc = encoder ? encoder->crtc : NULL; crtc 866 drivers/gpu/drm/drm_crtc_helper.c if (crtc) { crtc 867 drivers/gpu/drm/drm_crtc_helper.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 869 drivers/gpu/drm/drm_crtc_helper.c (*crtc_funcs->dpms) (crtc, crtc 870 drivers/gpu/drm/drm_crtc_helper.c drm_helper_choose_crtc_dpms(crtc)); crtc 880 drivers/gpu/drm/drm_crtc_helper.c if (crtc) { crtc 881 drivers/gpu/drm/drm_crtc_helper.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 883 drivers/gpu/drm/drm_crtc_helper.c (*crtc_funcs->dpms) (crtc, crtc 884 drivers/gpu/drm/drm_crtc_helper.c drm_helper_choose_crtc_dpms(crtc)); crtc 920 drivers/gpu/drm/drm_crtc_helper.c struct drm_crtc *crtc; crtc 929 drivers/gpu/drm/drm_crtc_helper.c drm_for_each_crtc(crtc, dev) { crtc 931 drivers/gpu/drm/drm_crtc_helper.c if (!crtc->enabled) crtc 934 drivers/gpu/drm/drm_crtc_helper.c ret = drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc 935 drivers/gpu/drm/drm_crtc_helper.c crtc->x, crtc->y, crtc->primary->fb); crtc 939 drivers/gpu/drm/drm_crtc_helper.c DRM_ERROR("failed to set mode on crtc %p\n", crtc); crtc 942 drivers/gpu/drm/drm_crtc_helper.c if (drm_helper_choose_crtc_dpms(crtc)) { crtc 945 drivers/gpu/drm/drm_crtc_helper.c if(encoder->crtc != crtc) crtc 954 drivers/gpu/drm/drm_crtc_helper.c crtc_funcs = crtc->helper_private; crtc 956 drivers/gpu/drm/drm_crtc_helper.c (*crtc_funcs->dpms) (crtc, crtc 957 drivers/gpu/drm/drm_crtc_helper.c drm_helper_choose_crtc_dpms(crtc)); crtc 982 drivers/gpu/drm/drm_crtc_helper.c struct drm_crtc *crtc; crtc 986 drivers/gpu/drm/drm_crtc_helper.c drm_for_each_crtc(crtc, dev) crtc 987 drivers/gpu/drm/drm_crtc_helper.c if (crtc->enabled) { crtc 989 drivers/gpu/drm/drm_crtc_helper.c .crtc = crtc, crtc 72 drivers/gpu/drm/drm_crtc_helper_internal.h enum drm_mode_status drm_crtc_mode_valid(struct drm_crtc *crtc, crtc 65 drivers/gpu/drm/drm_crtc_internal.h int drm_crtc_check_viewport(const struct drm_crtc *crtc, crtc 71 drivers/gpu/drm/drm_crtc_internal.h int drm_crtc_force_disable(struct drm_crtc *crtc); crtc 73 drivers/gpu/drm/drm_crtc_internal.h struct dma_fence *drm_crtc_create_fence(struct drm_crtc *crtc); crtc 125 drivers/gpu/drm/drm_damage_helper.c if (plane_state->crtc) { crtc 127 drivers/gpu/drm/drm_damage_helper.c plane_state->crtc); crtc 282 drivers/gpu/drm/drm_damage_helper.c if (!state || !state->crtc || !state->fb || !state->visible) crtc 454 drivers/gpu/drm/drm_debugfs.c void drm_debugfs_crtc_add(struct drm_crtc *crtc) crtc 456 drivers/gpu/drm/drm_debugfs.c struct drm_minor *minor = crtc->dev->primary; crtc 460 drivers/gpu/drm/drm_debugfs.c name = kasprintf(GFP_KERNEL, "crtc-%d", crtc->index); crtc 467 drivers/gpu/drm/drm_debugfs.c crtc->debugfs_entry = root; crtc 469 drivers/gpu/drm/drm_debugfs.c drm_debugfs_crtc_crc_add(crtc); crtc 472 drivers/gpu/drm/drm_debugfs.c void drm_debugfs_crtc_remove(struct drm_crtc *crtc) crtc 474 drivers/gpu/drm/drm_debugfs.c debugfs_remove_recursive(crtc->debugfs_entry); crtc 475 drivers/gpu/drm/drm_debugfs.c crtc->debugfs_entry = NULL; crtc 85 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc *crtc = m->private; crtc 87 drivers/gpu/drm/drm_debugfs_crc.c if (crtc->funcs->get_crc_sources) { crtc 89 drivers/gpu/drm/drm_debugfs_crc.c const char *const *sources = crtc->funcs->get_crc_sources(crtc, crtc 98 drivers/gpu/drm/drm_debugfs_crc.c if (!crtc->funcs->verify_crc_source(crtc, sources[i], crtc 100 drivers/gpu/drm/drm_debugfs_crc.c if (strcmp(sources[i], crtc->crc.source)) crtc 109 drivers/gpu/drm/drm_debugfs_crc.c seq_printf(m, "%s*\n", crtc->crc.source); crtc 115 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc *crtc = inode->i_private; crtc 117 drivers/gpu/drm/drm_debugfs_crc.c return single_open(file, crc_control_show, crtc); crtc 124 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc *crtc = m->private; crtc 125 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc_crc *crc = &crtc->crc; crtc 146 drivers/gpu/drm/drm_debugfs_crc.c ret = crtc->funcs->verify_crc_source(crtc, source, &values_cnt); crtc 195 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc *crtc = inode->i_private; crtc 196 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc_crc *crc = &crtc->crc; crtc 201 drivers/gpu/drm/drm_debugfs_crc.c if (drm_drv_uses_atomic_modeset(crtc->dev)) { crtc 202 drivers/gpu/drm/drm_debugfs_crc.c ret = drm_modeset_lock_single_interruptible(&crtc->mutex); crtc 206 drivers/gpu/drm/drm_debugfs_crc.c if (!crtc->state->active) crtc 208 drivers/gpu/drm/drm_debugfs_crc.c drm_modeset_unlock(&crtc->mutex); crtc 214 drivers/gpu/drm/drm_debugfs_crc.c ret = crtc->funcs->verify_crc_source(crtc, crc->source, &values_cnt); crtc 243 drivers/gpu/drm/drm_debugfs_crc.c ret = crtc->funcs->set_crc_source(crtc, crc->source); crtc 258 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc *crtc = filep->f_inode->i_private; crtc 259 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc_crc *crc = &crtc->crc; crtc 261 drivers/gpu/drm/drm_debugfs_crc.c crtc->funcs->set_crc_source(crtc, NULL); crtc 280 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc *crtc = filep->f_inode->i_private; crtc 281 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc_crc *crc = &crtc->crc; crtc 339 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc *crtc = file->f_inode->i_private; crtc 340 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc_crc *crc = &crtc->crc; crtc 363 drivers/gpu/drm/drm_debugfs_crc.c void drm_debugfs_crtc_crc_add(struct drm_crtc *crtc) crtc 367 drivers/gpu/drm/drm_debugfs_crc.c if (!crtc->funcs->set_crc_source || !crtc->funcs->verify_crc_source) crtc 370 drivers/gpu/drm/drm_debugfs_crc.c crc_ent = debugfs_create_dir("crc", crtc->debugfs_entry); crtc 372 drivers/gpu/drm/drm_debugfs_crc.c debugfs_create_file("control", S_IRUGO, crc_ent, crtc, crtc 374 drivers/gpu/drm/drm_debugfs_crc.c debugfs_create_file("data", S_IRUGO, crc_ent, crtc, crtc 388 drivers/gpu/drm/drm_debugfs_crc.c int drm_crtc_add_crc_entry(struct drm_crtc *crtc, bool has_frame, crtc 391 drivers/gpu/drm/drm_debugfs_crc.c struct drm_crtc_crc *crc = &crtc->crc; crtc 1048 drivers/gpu/drm/drm_dp_helper.c struct drm_crtc *crtc; crtc 1053 drivers/gpu/drm/drm_dp_helper.c if (WARN_ON(!aux->crtc)) crtc 1056 drivers/gpu/drm/drm_dp_helper.c crtc = aux->crtc; crtc 1057 drivers/gpu/drm/drm_dp_helper.c while (crtc->crc.opened) { crtc 1058 drivers/gpu/drm/drm_dp_helper.c drm_crtc_wait_one_vblank(crtc); crtc 1059 drivers/gpu/drm/drm_dp_helper.c if (!crtc->crc.opened) crtc 1080 drivers/gpu/drm/drm_dp_helper.c drm_crtc_add_crc_entry(crtc, false, 0, crcs); crtc 1194 drivers/gpu/drm/drm_dp_helper.c int drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc) crtc 1208 drivers/gpu/drm/drm_dp_helper.c aux->crtc = crtc; crtc 1235 drivers/gpu/drm/drm_dp_helper.c aux->crtc = NULL; crtc 208 drivers/gpu/drm/drm_encoder.c return connector->state->crtc; crtc 216 drivers/gpu/drm/drm_encoder.c return encoder->crtc; crtc 224 drivers/gpu/drm/drm_encoder.c struct drm_crtc *crtc; crtc 234 drivers/gpu/drm/drm_encoder.c crtc = drm_encoder_get_crtc(encoder); crtc 235 drivers/gpu/drm/drm_encoder.c if (crtc && drm_lease_held(file_priv, crtc->base.id)) crtc 236 drivers/gpu/drm/drm_encoder.c enc_resp->crtc_id = crtc->base.id; crtc 133 drivers/gpu/drm/drm_fb_helper.c static void drm_fb_helper_restore_lut_atomic(struct drm_crtc *crtc) crtc 137 drivers/gpu/drm/drm_fb_helper.c if (crtc->funcs->gamma_set == NULL) crtc 140 drivers/gpu/drm/drm_fb_helper.c r_base = crtc->gamma_store; crtc 141 drivers/gpu/drm/drm_fb_helper.c g_base = r_base + crtc->gamma_size; crtc 142 drivers/gpu/drm/drm_fb_helper.c b_base = g_base + crtc->gamma_size; crtc 144 drivers/gpu/drm/drm_fb_helper.c crtc->funcs->gamma_set(crtc, r_base, g_base, b_base, crtc 145 drivers/gpu/drm/drm_fb_helper.c crtc->gamma_size, NULL); crtc 161 drivers/gpu/drm/drm_fb_helper.c if (!mode_set->crtc->enabled) crtc 164 drivers/gpu/drm/drm_fb_helper.c funcs = mode_set->crtc->helper_private; crtc 168 drivers/gpu/drm/drm_fb_helper.c if (drm_drv_uses_atomic_modeset(mode_set->crtc->dev)) crtc 171 drivers/gpu/drm/drm_fb_helper.c funcs->mode_set_base_atomic(mode_set->crtc, crtc 192 drivers/gpu/drm/drm_fb_helper.c struct drm_crtc *crtc; crtc 199 drivers/gpu/drm/drm_fb_helper.c crtc = mode_set->crtc; crtc 200 drivers/gpu/drm/drm_fb_helper.c if (drm_drv_uses_atomic_modeset(crtc->dev)) crtc 203 drivers/gpu/drm/drm_fb_helper.c funcs = crtc->helper_private; crtc 204 drivers/gpu/drm/drm_fb_helper.c fb = crtc->primary->fb; crtc 206 drivers/gpu/drm/drm_fb_helper.c if (!crtc->enabled) crtc 217 drivers/gpu/drm/drm_fb_helper.c drm_fb_helper_restore_lut_atomic(mode_set->crtc); crtc 218 drivers/gpu/drm/drm_fb_helper.c funcs->mode_set_base_atomic(mode_set->crtc, fb, crtc->x, crtc 219 drivers/gpu/drm/drm_fb_helper.c crtc->y, LEAVE_ATOMIC_MODE_SET); crtc 957 drivers/gpu/drm/drm_fb_helper.c struct drm_crtc *crtc; crtc 963 drivers/gpu/drm/drm_fb_helper.c crtc = modeset->crtc; crtc 964 drivers/gpu/drm/drm_fb_helper.c if (!crtc->funcs->gamma_set || !crtc->gamma_size) crtc 967 drivers/gpu/drm/drm_fb_helper.c if (cmap->start + cmap->len > crtc->gamma_size) crtc 970 drivers/gpu/drm/drm_fb_helper.c r = crtc->gamma_store; crtc 971 drivers/gpu/drm/drm_fb_helper.c g = r + crtc->gamma_size; crtc 972 drivers/gpu/drm/drm_fb_helper.c b = g + crtc->gamma_size; crtc 978 drivers/gpu/drm/drm_fb_helper.c ret = crtc->funcs->gamma_set(crtc, r, g, b, crtc 979 drivers/gpu/drm/drm_fb_helper.c crtc->gamma_size, NULL); crtc 988 drivers/gpu/drm/drm_fb_helper.c static struct drm_property_blob *setcmap_new_gamma_lut(struct drm_crtc *crtc, crtc 991 drivers/gpu/drm/drm_fb_helper.c struct drm_device *dev = crtc->dev; crtc 994 drivers/gpu/drm/drm_fb_helper.c int size = crtc->gamma_size; crtc 1006 drivers/gpu/drm/drm_fb_helper.c u16 *r = crtc->gamma_store; crtc 1007 drivers/gpu/drm/drm_fb_helper.c u16 *g = r + crtc->gamma_size; crtc 1008 drivers/gpu/drm/drm_fb_helper.c u16 *b = g + crtc->gamma_size; crtc 1040 drivers/gpu/drm/drm_fb_helper.c struct drm_crtc *crtc; crtc 1056 drivers/gpu/drm/drm_fb_helper.c crtc = modeset->crtc; crtc 1059 drivers/gpu/drm/drm_fb_helper.c gamma_lut = setcmap_new_gamma_lut(crtc, cmap); crtc 1066 drivers/gpu/drm/drm_fb_helper.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 1085 drivers/gpu/drm/drm_fb_helper.c crtc = modeset->crtc; crtc 1087 drivers/gpu/drm/drm_fb_helper.c r = crtc->gamma_store; crtc 1088 drivers/gpu/drm/drm_fb_helper.c g = r + crtc->gamma_size; crtc 1089 drivers/gpu/drm/drm_fb_helper.c b = g + crtc->gamma_size; crtc 1166 drivers/gpu/drm/drm_fb_helper.c struct drm_crtc *crtc; crtc 1193 drivers/gpu/drm/drm_fb_helper.c crtc = fb_helper->client.modesets[0].crtc; crtc 1200 drivers/gpu/drm/drm_fb_helper.c ret = drm_crtc_vblank_get(crtc); crtc 1202 drivers/gpu/drm/drm_fb_helper.c drm_crtc_wait_one_vblank(crtc); crtc 1203 drivers/gpu/drm/drm_fb_helper.c drm_crtc_vblank_put(crtc); crtc 1552 drivers/gpu/drm/drm_fb_helper.c struct drm_crtc *crtc = mode_set->crtc; crtc 1553 drivers/gpu/drm/drm_fb_helper.c struct drm_plane *plane = crtc->primary; crtc 1556 drivers/gpu/drm/drm_fb_helper.c DRM_DEBUG("test CRTC %u primary plane\n", drm_crtc_index(crtc)); crtc 872 drivers/gpu/drm/drm_framebuffer.c if (disable_crtcs && plane_state->crtc->primary == plane) { crtc 875 drivers/gpu/drm/drm_framebuffer.c crtc_state = drm_atomic_get_existing_crtc_state(state, plane_state->crtc); crtc 877 drivers/gpu/drm/drm_framebuffer.c ret = drm_atomic_add_affected_connectors(state, plane_state->crtc); crtc 930 drivers/gpu/drm/drm_framebuffer.c struct drm_crtc *crtc; crtc 935 drivers/gpu/drm/drm_framebuffer.c drm_for_each_crtc(crtc, dev) { crtc 936 drivers/gpu/drm/drm_framebuffer.c if (crtc->primary->fb == fb) { crtc 938 drivers/gpu/drm/drm_framebuffer.c if (drm_crtc_force_disable(crtc)) crtc 939 drivers/gpu/drm/drm_framebuffer.c DRM_ERROR("failed to reset crtc %p when fb was deleted\n", crtc); crtc 148 drivers/gpu/drm/drm_internal.h void drm_debugfs_crtc_add(struct drm_crtc *crtc); crtc 149 drivers/gpu/drm/drm_internal.h void drm_debugfs_crtc_remove(struct drm_crtc *crtc); crtc 150 drivers/gpu/drm/drm_internal.h void drm_debugfs_crtc_crc_add(struct drm_crtc *crtc); crtc 169 drivers/gpu/drm/drm_internal.h static inline void drm_debugfs_crtc_add(struct drm_crtc *crtc) crtc 172 drivers/gpu/drm/drm_internal.h static inline void drm_debugfs_crtc_remove(struct drm_crtc *crtc) crtc 176 drivers/gpu/drm/drm_internal.h static inline void drm_debugfs_crtc_crc_add(struct drm_crtc *crtc) crtc 238 drivers/gpu/drm/drm_ioctl.c struct drm_crtc *crtc; crtc 282 drivers/gpu/drm/drm_ioctl.c drm_for_each_crtc(crtc, dev) { crtc 283 drivers/gpu/drm/drm_ioctl.c if (!crtc->funcs->page_flip_target) crtc 154 drivers/gpu/drm/drm_lease.c struct drm_crtc *crtc; crtc 166 drivers/gpu/drm/drm_lease.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 167 drivers/gpu/drm/drm_lease.c if (_drm_lease_held_master(master, crtc->base.id)) { crtc 443 drivers/gpu/drm/drm_lease.c struct drm_crtc *crtc = obj_to_crtc(obj); crtc 444 drivers/gpu/drm/drm_lease.c ret = idr_alloc(leases, &drm_lease_idr_object, crtc->primary->base.id, crtc->primary->base.id + 1, GFP_KERNEL); crtc 450 drivers/gpu/drm/drm_lease.c if (crtc->cursor) { crtc 451 drivers/gpu/drm/drm_lease.c ret = idr_alloc(leases, &drm_lease_idr_object, crtc->cursor->base.id, crtc->cursor->base.id + 1, GFP_KERNEL); crtc 302 drivers/gpu/drm/drm_mipi_dbi.c struct drm_crtc *crtc = &pipe->crtc; crtc 308 drivers/gpu/drm/drm_mipi_dbi.c if (crtc->state->event) { crtc 309 drivers/gpu/drm/drm_mipi_dbi.c spin_lock_irq(&crtc->dev->event_lock); crtc 310 drivers/gpu/drm/drm_mipi_dbi.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 311 drivers/gpu/drm/drm_mipi_dbi.c spin_unlock_irq(&crtc->dev->event_lock); crtc 312 drivers/gpu/drm/drm_mipi_dbi.c crtc->state->event = NULL; crtc 389 drivers/gpu/drm/drm_mipi_dbi.c struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); crtc 94 drivers/gpu/drm/drm_mode_config.c struct drm_crtc *crtc; crtc 127 drivers/gpu/drm/drm_mode_config.c drm_for_each_crtc(crtc, dev) { crtc 128 drivers/gpu/drm/drm_mode_config.c if (drm_lease_held(file_priv, crtc->base.id)) { crtc 130 drivers/gpu/drm/drm_mode_config.c put_user(crtc->base.id, crtc_id + count)) crtc 181 drivers/gpu/drm/drm_mode_config.c struct drm_crtc *crtc; crtc 191 drivers/gpu/drm/drm_mode_config.c drm_for_each_crtc(crtc, dev) crtc 192 drivers/gpu/drm/drm_mode_config.c if (crtc->funcs->reset) crtc 193 drivers/gpu/drm/drm_mode_config.c crtc->funcs->reset(crtc); crtc 438 drivers/gpu/drm/drm_mode_config.c struct drm_crtc *crtc, *ct; crtc 478 drivers/gpu/drm/drm_mode_config.c list_for_each_entry_safe(crtc, ct, &dev->mode_config.crtc_list, head) { crtc 479 drivers/gpu/drm/drm_mode_config.c crtc->funcs->destroy(crtc); crtc 169 drivers/gpu/drm/drm_modeset_helper.c int drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, crtc 175 drivers/gpu/drm/drm_modeset_helper.c return drm_crtc_init_with_planes(dev, crtc, primary, NULL, funcs, crtc 175 drivers/gpu/drm/drm_modeset_lock.c struct drm_crtc *crtc; crtc 181 drivers/gpu/drm/drm_modeset_lock.c drm_for_each_crtc(crtc, dev) crtc 182 drivers/gpu/drm/drm_modeset_lock.c WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); crtc 399 drivers/gpu/drm/drm_modeset_lock.c struct drm_crtc *crtc; crtc 407 drivers/gpu/drm/drm_modeset_lock.c drm_for_each_crtc(crtc, dev) { crtc 408 drivers/gpu/drm/drm_modeset_lock.c ret = drm_modeset_lock(&crtc->mutex, ctx); crtc 201 drivers/gpu/drm/drm_of.c struct drm_crtc *crtc = encoder->crtc; crtc 205 drivers/gpu/drm/drm_of.c if (!node || !crtc) crtc 211 drivers/gpu/drm/drm_of.c if (port == crtc->port) { crtc 441 drivers/gpu/drm/drm_plane.c plane->crtc = NULL; crtc 527 drivers/gpu/drm/drm_plane.c if (plane->state && plane->state->crtc && drm_lease_held(file_priv, plane->state->crtc->base.id)) crtc 528 drivers/gpu/drm/drm_plane.c plane_resp->crtc_id = plane->state->crtc->base.id; crtc 529 drivers/gpu/drm/drm_plane.c else if (!plane->state && plane->crtc && drm_lease_held(file_priv, plane->crtc->base.id)) crtc 530 drivers/gpu/drm/drm_plane.c plane_resp->crtc_id = plane->crtc->base.id; crtc 597 drivers/gpu/drm/drm_plane.c struct drm_crtc *crtc, crtc 607 drivers/gpu/drm/drm_plane.c if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) { crtc 674 drivers/gpu/drm/drm_plane.c struct drm_crtc *crtc, crtc 692 drivers/gpu/drm/drm_plane.c plane->crtc = NULL; crtc 700 drivers/gpu/drm/drm_plane.c ret = __setplane_check(plane, crtc, fb, crtc 707 drivers/gpu/drm/drm_plane.c ret = plane->funcs->update_plane(plane, crtc, fb, crtc 711 drivers/gpu/drm/drm_plane.c plane->crtc = crtc; crtc 727 drivers/gpu/drm/drm_plane.c struct drm_crtc *crtc, crtc 750 drivers/gpu/drm/drm_plane.c ret = __setplane_check(plane, crtc, fb, crtc 756 drivers/gpu/drm/drm_plane.c return plane->funcs->update_plane(plane, crtc, fb, crtc 762 drivers/gpu/drm/drm_plane.c struct drm_crtc *crtc, crtc 777 drivers/gpu/drm/drm_plane.c ret = __setplane_atomic(plane, crtc, fb, crtc 781 drivers/gpu/drm/drm_plane.c ret = __setplane_internal(plane, crtc, fb, crtc 795 drivers/gpu/drm/drm_plane.c struct drm_crtc *crtc = NULL; crtc 821 drivers/gpu/drm/drm_plane.c crtc = drm_crtc_find(dev, file_priv, plane_req->crtc_id); crtc 822 drivers/gpu/drm/drm_plane.c if (!crtc) { crtc 830 drivers/gpu/drm/drm_plane.c ret = setplane_internal(plane, crtc, fb, crtc 842 drivers/gpu/drm/drm_plane.c static int drm_mode_cursor_universal(struct drm_crtc *crtc, crtc 847 drivers/gpu/drm/drm_plane.c struct drm_device *dev = crtc->dev; crtc 848 drivers/gpu/drm/drm_plane.c struct drm_plane *plane = crtc->cursor; crtc 863 drivers/gpu/drm/drm_plane.c WARN_ON(plane->crtc != crtc && plane->crtc != NULL); crtc 897 drivers/gpu/drm/drm_plane.c crtc_x = crtc->cursor_x; crtc 898 drivers/gpu/drm/drm_plane.c crtc_y = crtc->cursor_y; crtc 909 drivers/gpu/drm/drm_plane.c ret = __setplane_atomic(plane, crtc, fb, crtc 913 drivers/gpu/drm/drm_plane.c ret = __setplane_internal(plane, crtc, fb, crtc 922 drivers/gpu/drm/drm_plane.c crtc->cursor_x = req->x; crtc 923 drivers/gpu/drm/drm_plane.c crtc->cursor_y = req->y; crtc 933 drivers/gpu/drm/drm_plane.c struct drm_crtc *crtc; crtc 943 drivers/gpu/drm/drm_plane.c crtc = drm_crtc_find(dev, file_priv, req->crtc_id); crtc 944 drivers/gpu/drm/drm_plane.c if (!crtc) { crtc 951 drivers/gpu/drm/drm_plane.c ret = drm_modeset_lock(&crtc->mutex, &ctx); crtc 958 drivers/gpu/drm/drm_plane.c if (crtc->cursor) { crtc 959 drivers/gpu/drm/drm_plane.c ret = drm_modeset_lock(&crtc->cursor->mutex, &ctx); crtc 963 drivers/gpu/drm/drm_plane.c if (!drm_lease_held(file_priv, crtc->cursor->base.id)) { crtc 968 drivers/gpu/drm/drm_plane.c ret = drm_mode_cursor_universal(crtc, req, file_priv, &ctx); crtc 973 drivers/gpu/drm/drm_plane.c if (!crtc->funcs->cursor_set && !crtc->funcs->cursor_set2) { crtc 978 drivers/gpu/drm/drm_plane.c if (crtc->funcs->cursor_set2) crtc 979 drivers/gpu/drm/drm_plane.c ret = crtc->funcs->cursor_set2(crtc, file_priv, req->handle, crtc 982 drivers/gpu/drm/drm_plane.c ret = crtc->funcs->cursor_set(crtc, file_priv, req->handle, crtc 987 drivers/gpu/drm/drm_plane.c if (crtc->funcs->cursor_move) { crtc 988 drivers/gpu/drm/drm_plane.c ret = crtc->funcs->cursor_move(crtc, req->x, req->y); crtc 1038 drivers/gpu/drm/drm_plane.c struct drm_crtc *crtc; crtc 1064 drivers/gpu/drm/drm_plane.c crtc = drm_crtc_find(dev, file_priv, page_flip->crtc_id); crtc 1065 drivers/gpu/drm/drm_plane.c if (!crtc) crtc 1068 drivers/gpu/drm/drm_plane.c plane = crtc->primary; crtc 1073 drivers/gpu/drm/drm_plane.c if (crtc->funcs->page_flip_target) { crtc 1077 drivers/gpu/drm/drm_plane.c r = drm_crtc_vblank_get(crtc); crtc 1081 drivers/gpu/drm/drm_plane.c current_vblank = (u32)drm_crtc_vblank_count(crtc); crtc 1089 drivers/gpu/drm/drm_plane.c drm_crtc_vblank_put(crtc); crtc 1097 drivers/gpu/drm/drm_plane.c drm_crtc_vblank_put(crtc); crtc 1107 drivers/gpu/drm/drm_plane.c } else if (crtc->funcs->page_flip == NULL || crtc 1114 drivers/gpu/drm/drm_plane.c ret = drm_modeset_lock(&crtc->mutex, &ctx); crtc 1150 drivers/gpu/drm/drm_plane.c ret = drm_crtc_check_viewport(crtc, crtc->x, crtc->y, crtc 1151 drivers/gpu/drm/drm_plane.c &crtc->mode, fb); crtc 1172 drivers/gpu/drm/drm_plane.c e->event.vbl.crtc_id = crtc->base.id; crtc 1183 drivers/gpu/drm/drm_plane.c if (crtc->funcs->page_flip_target) crtc 1184 drivers/gpu/drm/drm_plane.c ret = crtc->funcs->page_flip_target(crtc, fb, e, crtc 1189 drivers/gpu/drm/drm_plane.c ret = crtc->funcs->page_flip(crtc, fb, e, page_flip->flags, crtc 1219 drivers/gpu/drm/drm_plane.c if (ret && crtc->funcs->page_flip_target) crtc 1220 drivers/gpu/drm/drm_plane.c drm_crtc_vblank_put(crtc); crtc 71 drivers/gpu/drm/drm_plane_helper.c static int get_connectors_for_crtc(struct drm_crtc *crtc, crtc 75 drivers/gpu/drm/drm_plane_helper.c struct drm_device *dev = crtc->dev; crtc 89 drivers/gpu/drm/drm_plane_helper.c if (connector->encoder && connector->encoder->crtc == crtc) { crtc 102 drivers/gpu/drm/drm_plane_helper.c struct drm_crtc *crtc, crtc 115 drivers/gpu/drm/drm_plane_helper.c .crtc = crtc, crtc 129 drivers/gpu/drm/drm_plane_helper.c .crtc = crtc, crtc 130 drivers/gpu/drm/drm_plane_helper.c .enable = crtc->enabled, crtc 131 drivers/gpu/drm/drm_plane_helper.c .mode = crtc->mode, crtc 149 drivers/gpu/drm/drm_plane_helper.c static int drm_primary_helper_update(struct drm_plane *plane, struct drm_crtc *crtc, crtc 158 drivers/gpu/drm/drm_plane_helper.c .crtc = crtc, crtc 160 drivers/gpu/drm/drm_plane_helper.c .mode = &crtc->mode, crtc 180 drivers/gpu/drm/drm_plane_helper.c ret = drm_plane_helper_check_update(plane, crtc, fb, crtc 198 drivers/gpu/drm/drm_plane_helper.c num_connectors = get_connectors_for_crtc(crtc, NULL, 0); crtc 204 drivers/gpu/drm/drm_plane_helper.c get_connectors_for_crtc(crtc, connector_list, num_connectors); crtc 217 drivers/gpu/drm/drm_plane_helper.c ret = crtc->funcs->set_config(&set, ctx); crtc 104 drivers/gpu/drm/drm_probe_helper.c struct drm_crtc *crtc; crtc 122 drivers/gpu/drm/drm_probe_helper.c drm_for_each_crtc(crtc, dev) { crtc 123 drivers/gpu/drm/drm_probe_helper.c if (!drm_encoder_crtc_ok(encoder, crtc)) crtc 126 drivers/gpu/drm/drm_probe_helper.c ret = drm_crtc_mode_valid(crtc, mode); crtc 172 drivers/gpu/drm/drm_probe_helper.c enum drm_mode_status drm_crtc_mode_valid(struct drm_crtc *crtc, crtc 175 drivers/gpu/drm/drm_probe_helper.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 180 drivers/gpu/drm/drm_probe_helper.c return crtc_funcs->mode_valid(crtc, mode); crtc 59 drivers/gpu/drm/drm_self_refresh_helper.c struct drm_crtc *crtc; crtc 72 drivers/gpu/drm/drm_self_refresh_helper.c struct drm_crtc *crtc = sr_data->crtc; crtc 73 drivers/gpu/drm/drm_self_refresh_helper.c struct drm_device *dev = crtc->dev; crtc 92 drivers/gpu/drm/drm_self_refresh_helper.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 101 drivers/gpu/drm/drm_self_refresh_helper.c ret = drm_atomic_add_affected_connectors(state, crtc); crtc 149 drivers/gpu/drm/drm_self_refresh_helper.c struct drm_crtc *crtc; crtc 153 drivers/gpu/drm/drm_self_refresh_helper.c for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) { crtc 155 drivers/gpu/drm/drm_self_refresh_helper.c struct drm_self_refresh_data *sr_data = crtc->self_refresh_data; crtc 189 drivers/gpu/drm/drm_self_refresh_helper.c struct drm_crtc *crtc; crtc 194 drivers/gpu/drm/drm_self_refresh_helper.c for_each_old_crtc_in_state(state, crtc, crtc_state, i) { crtc 203 drivers/gpu/drm/drm_self_refresh_helper.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) { crtc 211 drivers/gpu/drm/drm_self_refresh_helper.c sr_data = crtc->self_refresh_data; crtc 232 drivers/gpu/drm/drm_self_refresh_helper.c int drm_self_refresh_helper_init(struct drm_crtc *crtc) crtc 234 drivers/gpu/drm/drm_self_refresh_helper.c struct drm_self_refresh_data *sr_data = crtc->self_refresh_data; crtc 246 drivers/gpu/drm/drm_self_refresh_helper.c sr_data->crtc = crtc; crtc 259 drivers/gpu/drm/drm_self_refresh_helper.c crtc->self_refresh_data = sr_data; crtc 268 drivers/gpu/drm/drm_self_refresh_helper.c void drm_self_refresh_helper_cleanup(struct drm_crtc *crtc) crtc 270 drivers/gpu/drm/drm_self_refresh_helper.c struct drm_self_refresh_data *sr_data = crtc->self_refresh_data; crtc 276 drivers/gpu/drm/drm_self_refresh_helper.c crtc->self_refresh_data = NULL; crtc 35 drivers/gpu/drm/drm_simple_kms_helper.c drm_simple_kms_crtc_mode_valid(struct drm_crtc *crtc, crtc 40 drivers/gpu/drm/drm_simple_kms_helper.c pipe = container_of(crtc, struct drm_simple_display_pipe, crtc); crtc 45 drivers/gpu/drm/drm_simple_kms_helper.c return pipe->funcs->mode_valid(crtc, mode); crtc 48 drivers/gpu/drm/drm_simple_kms_helper.c static int drm_simple_kms_crtc_check(struct drm_crtc *crtc, crtc 52 drivers/gpu/drm/drm_simple_kms_helper.c drm_plane_mask(crtc->primary); crtc 58 drivers/gpu/drm/drm_simple_kms_helper.c return drm_atomic_add_affected_planes(state->state, crtc); crtc 61 drivers/gpu/drm/drm_simple_kms_helper.c static void drm_simple_kms_crtc_enable(struct drm_crtc *crtc, crtc 67 drivers/gpu/drm/drm_simple_kms_helper.c pipe = container_of(crtc, struct drm_simple_display_pipe, crtc); crtc 72 drivers/gpu/drm/drm_simple_kms_helper.c pipe->funcs->enable(pipe, crtc->state, plane->state); crtc 75 drivers/gpu/drm/drm_simple_kms_helper.c static void drm_simple_kms_crtc_disable(struct drm_crtc *crtc, crtc 80 drivers/gpu/drm/drm_simple_kms_helper.c pipe = container_of(crtc, struct drm_simple_display_pipe, crtc); crtc 94 drivers/gpu/drm/drm_simple_kms_helper.c static int drm_simple_kms_crtc_enable_vblank(struct drm_crtc *crtc) crtc 98 drivers/gpu/drm/drm_simple_kms_helper.c pipe = container_of(crtc, struct drm_simple_display_pipe, crtc); crtc 105 drivers/gpu/drm/drm_simple_kms_helper.c static void drm_simple_kms_crtc_disable_vblank(struct drm_crtc *crtc) crtc 109 drivers/gpu/drm/drm_simple_kms_helper.c pipe = container_of(crtc, struct drm_simple_display_pipe, crtc); crtc 136 drivers/gpu/drm/drm_simple_kms_helper.c &pipe->crtc); crtc 268 drivers/gpu/drm/drm_simple_kms_helper.c struct drm_crtc *crtc = &pipe->crtc; crtc 283 drivers/gpu/drm/drm_simple_kms_helper.c drm_crtc_helper_add(crtc, &drm_simple_kms_crtc_helper_funcs); crtc 284 drivers/gpu/drm/drm_simple_kms_helper.c ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, crtc 289 drivers/gpu/drm/drm_simple_kms_helper.c encoder->possible_crtcs = drm_crtc_mask(crtc); crtc 16 drivers/gpu/drm/drm_trace.h TP_PROTO(int crtc, unsigned int seq), crtc 17 drivers/gpu/drm/drm_trace.h TP_ARGS(crtc, seq), crtc 19 drivers/gpu/drm/drm_trace.h __field(int, crtc) crtc 23 drivers/gpu/drm/drm_trace.h __entry->crtc = crtc; crtc 26 drivers/gpu/drm/drm_trace.h TP_printk("crtc=%d, seq=%u", __entry->crtc, __entry->seq) crtc 30 drivers/gpu/drm/drm_trace.h TP_PROTO(struct drm_file *file, int crtc, unsigned int seq), crtc 31 drivers/gpu/drm/drm_trace.h TP_ARGS(file, crtc, seq), crtc 34 drivers/gpu/drm/drm_trace.h __field(int, crtc) crtc 39 drivers/gpu/drm/drm_trace.h __entry->crtc = crtc; crtc 42 drivers/gpu/drm/drm_trace.h TP_printk("file=%p, crtc=%d, seq=%u", __entry->file, __entry->crtc, \ crtc 47 drivers/gpu/drm/drm_trace.h TP_PROTO(struct drm_file *file, int crtc, unsigned int seq), crtc 48 drivers/gpu/drm/drm_trace.h TP_ARGS(file, crtc, seq), crtc 51 drivers/gpu/drm/drm_trace.h __field(int, crtc) crtc 56 drivers/gpu/drm/drm_trace.h __entry->crtc = crtc; crtc 59 drivers/gpu/drm/drm_trace.h TP_printk("file=%p, crtc=%d, seq=%u", __entry->file, __entry->crtc, \ crtc 133 drivers/gpu/drm/drm_vblank.c struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe); crtc 135 drivers/gpu/drm/drm_vblank.c if (WARN_ON(!crtc)) crtc 138 drivers/gpu/drm/drm_vblank.c if (crtc->funcs->get_vblank_counter) crtc 139 drivers/gpu/drm/drm_vblank.c return crtc->funcs->get_vblank_counter(crtc); crtc 315 drivers/gpu/drm/drm_vblank.c u64 drm_crtc_accurate_vblank_count(struct drm_crtc *crtc) crtc 317 drivers/gpu/drm/drm_vblank.c struct drm_device *dev = crtc->dev; crtc 318 drivers/gpu/drm/drm_vblank.c unsigned int pipe = drm_crtc_index(crtc); crtc 339 drivers/gpu/drm/drm_vblank.c struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe); crtc 341 drivers/gpu/drm/drm_vblank.c if (WARN_ON(!crtc)) crtc 344 drivers/gpu/drm/drm_vblank.c if (crtc->funcs->disable_vblank) { crtc 345 drivers/gpu/drm/drm_vblank.c crtc->funcs->disable_vblank(crtc); crtc 499 drivers/gpu/drm/drm_vblank.c wait_queue_head_t *drm_crtc_vblank_waitqueue(struct drm_crtc *crtc) crtc 501 drivers/gpu/drm/drm_vblank.c return &crtc->dev->vblank[drm_crtc_index(crtc)].queue; crtc 517 drivers/gpu/drm/drm_vblank.c void drm_calc_timestamping_constants(struct drm_crtc *crtc, crtc 520 drivers/gpu/drm/drm_vblank.c struct drm_device *dev = crtc->dev; crtc 521 drivers/gpu/drm/drm_vblank.c unsigned int pipe = drm_crtc_index(crtc); crtc 551 drivers/gpu/drm/drm_vblank.c crtc->base.id); crtc 558 drivers/gpu/drm/drm_vblank.c crtc->base.id, mode->crtc_htotal, crtc 561 drivers/gpu/drm/drm_vblank.c crtc->base.id, dotclock, framedur_ns, linedur_ns); crtc 605 drivers/gpu/drm/drm_vblank.c struct drm_crtc *crtc; crtc 614 drivers/gpu/drm/drm_vblank.c crtc = drm_crtc_from_index(dev, pipe); crtc 616 drivers/gpu/drm/drm_vblank.c if (pipe >= dev->num_crtcs || !crtc) { crtc 630 drivers/gpu/drm/drm_vblank.c mode = &crtc->hwmode; crtc 769 drivers/gpu/drm/drm_vblank.c u64 drm_crtc_vblank_count(struct drm_crtc *crtc) crtc 771 drivers/gpu/drm/drm_vblank.c return drm_vblank_count(crtc->dev, drm_crtc_index(crtc)); crtc 821 drivers/gpu/drm/drm_vblank.c u64 drm_crtc_vblank_count_and_time(struct drm_crtc *crtc, crtc 824 drivers/gpu/drm/drm_vblank.c return drm_vblank_count_and_time(crtc->dev, drm_crtc_index(crtc), crtc 896 drivers/gpu/drm/drm_vblank.c void drm_crtc_arm_vblank_event(struct drm_crtc *crtc, crtc 899 drivers/gpu/drm/drm_vblank.c struct drm_device *dev = crtc->dev; crtc 900 drivers/gpu/drm/drm_vblank.c unsigned int pipe = drm_crtc_index(crtc); crtc 905 drivers/gpu/drm/drm_vblank.c e->sequence = drm_crtc_accurate_vblank_count(crtc) + 1; crtc 921 drivers/gpu/drm/drm_vblank.c void drm_crtc_send_vblank_event(struct drm_crtc *crtc, crtc 924 drivers/gpu/drm/drm_vblank.c struct drm_device *dev = crtc->dev; crtc 926 drivers/gpu/drm/drm_vblank.c unsigned int pipe = drm_crtc_index(crtc); crtc 944 drivers/gpu/drm/drm_vblank.c struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe); crtc 946 drivers/gpu/drm/drm_vblank.c if (WARN_ON(!crtc)) crtc 949 drivers/gpu/drm/drm_vblank.c if (crtc->funcs->enable_vblank) crtc 950 drivers/gpu/drm/drm_vblank.c return crtc->funcs->enable_vblank(crtc); crtc 1030 drivers/gpu/drm/drm_vblank.c int drm_crtc_vblank_get(struct drm_crtc *crtc) crtc 1032 drivers/gpu/drm/drm_vblank.c return drm_vblank_get(crtc->dev, drm_crtc_index(crtc)); crtc 1065 drivers/gpu/drm/drm_vblank.c void drm_crtc_vblank_put(struct drm_crtc *crtc) crtc 1067 drivers/gpu/drm/drm_vblank.c drm_vblank_put(crtc->dev, drm_crtc_index(crtc)); crtc 1115 drivers/gpu/drm/drm_vblank.c void drm_crtc_wait_one_vblank(struct drm_crtc *crtc) crtc 1117 drivers/gpu/drm/drm_vblank.c drm_wait_one_vblank(crtc->dev, drm_crtc_index(crtc)); crtc 1132 drivers/gpu/drm/drm_vblank.c void drm_crtc_vblank_off(struct drm_crtc *crtc) crtc 1134 drivers/gpu/drm/drm_vblank.c struct drm_device *dev = crtc->dev; crtc 1135 drivers/gpu/drm/drm_vblank.c unsigned int pipe = drm_crtc_index(crtc); crtc 1202 drivers/gpu/drm/drm_vblank.c void drm_crtc_vblank_reset(struct drm_crtc *crtc) crtc 1204 drivers/gpu/drm/drm_vblank.c struct drm_device *dev = crtc->dev; crtc 1206 drivers/gpu/drm/drm_vblank.c unsigned int pipe = drm_crtc_index(crtc); crtc 1241 drivers/gpu/drm/drm_vblank.c void drm_crtc_set_max_vblank_count(struct drm_crtc *crtc, crtc 1244 drivers/gpu/drm/drm_vblank.c struct drm_device *dev = crtc->dev; crtc 1245 drivers/gpu/drm/drm_vblank.c unsigned int pipe = drm_crtc_index(crtc); crtc 1265 drivers/gpu/drm/drm_vblank.c void drm_crtc_vblank_on(struct drm_crtc *crtc) crtc 1267 drivers/gpu/drm/drm_vblank.c struct drm_device *dev = crtc->dev; crtc 1268 drivers/gpu/drm/drm_vblank.c unsigned int pipe = drm_crtc_index(crtc); crtc 1356 drivers/gpu/drm/drm_vblank.c void drm_crtc_vblank_restore(struct drm_crtc *crtc) crtc 1358 drivers/gpu/drm/drm_vblank.c drm_vblank_restore(crtc->dev, drm_crtc_index(crtc)); crtc 1427 drivers/gpu/drm/drm_vblank.c pipe = modeset->crtc; crtc 1474 drivers/gpu/drm/drm_vblank.c struct drm_crtc *crtc = drm_crtc_from_index(dev, pipe); crtc 1475 drivers/gpu/drm/drm_vblank.c if (crtc) crtc 1476 drivers/gpu/drm/drm_vblank.c e->event.vbl.crtc_id = crtc->base.id; crtc 1575 drivers/gpu/drm/drm_vblank.c struct drm_crtc *crtc; crtc 1609 drivers/gpu/drm/drm_vblank.c drm_for_each_crtc(crtc, dev) { crtc 1610 drivers/gpu/drm/drm_vblank.c if (drm_lease_held(file_priv, crtc->base.id)) { crtc 1812 drivers/gpu/drm/drm_vblank.c bool drm_crtc_handle_vblank(struct drm_crtc *crtc) crtc 1814 drivers/gpu/drm/drm_vblank.c return drm_handle_vblank(crtc->dev, drm_crtc_index(crtc)); crtc 1829 drivers/gpu/drm/drm_vblank.c struct drm_crtc *crtc; crtc 1843 drivers/gpu/drm/drm_vblank.c crtc = drm_crtc_find(dev, file_priv, get_seq->crtc_id); crtc 1844 drivers/gpu/drm/drm_vblank.c if (!crtc) crtc 1847 drivers/gpu/drm/drm_vblank.c pipe = drm_crtc_index(crtc); crtc 1853 drivers/gpu/drm/drm_vblank.c ret = drm_crtc_vblank_get(crtc); crtc 1859 drivers/gpu/drm/drm_vblank.c drm_modeset_lock(&crtc->mutex, NULL); crtc 1860 drivers/gpu/drm/drm_vblank.c if (crtc->state) crtc 1861 drivers/gpu/drm/drm_vblank.c get_seq->active = crtc->state->enable; crtc 1863 drivers/gpu/drm/drm_vblank.c get_seq->active = crtc->enabled; crtc 1864 drivers/gpu/drm/drm_vblank.c drm_modeset_unlock(&crtc->mutex); crtc 1868 drivers/gpu/drm/drm_vblank.c drm_crtc_vblank_put(crtc); crtc 1883 drivers/gpu/drm/drm_vblank.c struct drm_crtc *crtc; crtc 1901 drivers/gpu/drm/drm_vblank.c crtc = drm_crtc_find(dev, file_priv, queue_seq->crtc_id); crtc 1902 drivers/gpu/drm/drm_vblank.c if (!crtc) crtc 1911 drivers/gpu/drm/drm_vblank.c pipe = drm_crtc_index(crtc); crtc 1919 drivers/gpu/drm/drm_vblank.c ret = drm_crtc_vblank_get(crtc); crtc 1961 drivers/gpu/drm/drm_vblank.c drm_crtc_vblank_put(crtc); crtc 1975 drivers/gpu/drm/drm_vblank.c drm_crtc_vblank_put(crtc); crtc 59 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct exynos_drm_crtc *crtc; crtc 102 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static int decon_enable_vblank(struct exynos_drm_crtc *crtc) crtc 104 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 108 drivers/gpu/drm/exynos/exynos5433_drm_decon.c if (crtc->i80_mode) crtc 122 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static void decon_disable_vblank(struct exynos_drm_crtc *crtc) crtc 124 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 157 drivers/gpu/drm/exynos/exynos5433_drm_decon.c if (!(ctx->crtc->i80_mode)) crtc 177 drivers/gpu/drm/exynos/exynos5433_drm_decon.c if (!ctx->crtc->i80_mode && !(ctx->out_type & I80_HW_TRG)) crtc 195 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static void decon_commit(struct exynos_drm_crtc *crtc) crtc 197 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 198 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct drm_display_mode *m = &crtc->base.mode; crtc 217 drivers/gpu/drm/exynos/exynos5433_drm_decon.c if (crtc->i80_mode) { crtc 233 drivers/gpu/drm/exynos/exynos5433_drm_decon.c if (!crtc->i80_mode) { crtc 388 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static void decon_atomic_begin(struct exynos_drm_crtc *crtc) crtc 390 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 399 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static void decon_update_plane(struct exynos_drm_crtc *crtc, crtc 404 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 412 drivers/gpu/drm/exynos/exynos5433_drm_decon.c if (crtc->base.mode.flags & DRM_MODE_FLAG_INTERLACE) { crtc 413 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = COORDINATE_X(state->crtc.x) | crtc 414 drivers/gpu/drm/exynos/exynos5433_drm_decon.c COORDINATE_Y(state->crtc.y / 2); crtc 417 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = COORDINATE_X(state->crtc.x + state->crtc.w - 1) | crtc 418 drivers/gpu/drm/exynos/exynos5433_drm_decon.c COORDINATE_Y((state->crtc.y + state->crtc.h) / 2 - 1); crtc 421 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = COORDINATE_X(state->crtc.x) | COORDINATE_Y(state->crtc.y); crtc 424 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = COORDINATE_X(state->crtc.x + state->crtc.w - 1) | crtc 425 drivers/gpu/drm/exynos/exynos5433_drm_decon.c COORDINATE_Y(state->crtc.y + state->crtc.h - 1); crtc 443 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = BIT_VAL(pitch - state->crtc.w * cpp, 27, 14) crtc 444 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | BIT_VAL(state->crtc.w * cpp, 13, 0); crtc 446 drivers/gpu/drm/exynos/exynos5433_drm_decon.c val = BIT_VAL(pitch - state->crtc.w * cpp, 29, 15) crtc 447 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | BIT_VAL(state->crtc.w * cpp, 14, 0); crtc 456 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static void decon_disable_plane(struct exynos_drm_crtc *crtc, crtc 459 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 465 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static void decon_atomic_flush(struct exynos_drm_crtc *crtc) crtc 467 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 478 drivers/gpu/drm/exynos/exynos5433_drm_decon.c exynos_crtc_handle_event(crtc); crtc 514 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static void decon_enable(struct exynos_drm_crtc *crtc) crtc 516 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 520 drivers/gpu/drm/exynos/exynos5433_drm_decon.c exynos_drm_pipe_clk_enable(crtc, true); crtc 524 drivers/gpu/drm/exynos/exynos5433_drm_decon.c decon_commit(ctx->crtc); crtc 527 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static void decon_disable(struct exynos_drm_crtc *crtc) crtc 529 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 542 drivers/gpu/drm/exynos/exynos5433_drm_decon.c decon_disable_plane(crtc, &ctx->planes[i]); crtc 546 drivers/gpu/drm/exynos/exynos5433_drm_decon.c exynos_drm_pipe_clk_enable(crtc, false); crtc 560 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static void decon_clear_channels(struct exynos_drm_crtc *crtc) crtc 562 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 586 drivers/gpu/drm/exynos/exynos5433_drm_decon.c static enum drm_mode_status decon_mode_valid(struct exynos_drm_crtc *crtc, crtc 589 drivers/gpu/drm/exynos/exynos5433_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 591 drivers/gpu/drm/exynos/exynos5433_drm_decon.c ctx->irq = crtc->i80_mode ? ctx->irq_lcd_sys : ctx->irq_vsync; crtc 597 drivers/gpu/drm/exynos/exynos5433_drm_decon.c crtc->i80_mode ? "command" : "video"); crtc 641 drivers/gpu/drm/exynos/exynos5433_drm_decon.c ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base, crtc 643 drivers/gpu/drm/exynos/exynos5433_drm_decon.c if (IS_ERR(ctx->crtc)) crtc 644 drivers/gpu/drm/exynos/exynos5433_drm_decon.c return PTR_ERR(ctx->crtc); crtc 646 drivers/gpu/drm/exynos/exynos5433_drm_decon.c decon_clear_channels(ctx->crtc); crtc 655 drivers/gpu/drm/exynos/exynos5433_drm_decon.c decon_disable(ctx->crtc); crtc 677 drivers/gpu/drm/exynos/exynos5433_drm_decon.c drm_crtc_handle_vblank(&ctx->crtc->base); crtc 44 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct exynos_drm_crtc *crtc; crtc 84 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_wait_for_vblank(struct exynos_drm_crtc *crtc) crtc 86 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 103 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_clear_channels(struct exynos_drm_crtc *crtc) crtc 105 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 121 drivers/gpu/drm/exynos/exynos7_drm_decon.c decon_wait_for_vblank(ctx->crtc); crtc 129 drivers/gpu/drm/exynos/exynos7_drm_decon.c decon_clear_channels(ctx->crtc); crtc 152 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_commit(struct exynos_drm_crtc *crtc) crtc 154 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 155 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct drm_display_mode *mode = &crtc->base.state->adjusted_mode; crtc 217 drivers/gpu/drm/exynos/exynos7_drm_decon.c static int decon_enable_vblank(struct exynos_drm_crtc *crtc) crtc 219 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 242 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_disable_vblank(struct exynos_drm_crtc *crtc) crtc 244 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 367 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_atomic_begin(struct exynos_drm_crtc *crtc) crtc 369 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 379 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_update_plane(struct exynos_drm_crtc *crtc, crtc 384 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 424 drivers/gpu/drm/exynos/exynos7_drm_decon.c state->crtc.w, state->crtc.h); crtc 426 drivers/gpu/drm/exynos/exynos7_drm_decon.c val = VIDOSDxA_TOPLEFT_X(state->crtc.x) | crtc 427 drivers/gpu/drm/exynos/exynos7_drm_decon.c VIDOSDxA_TOPLEFT_Y(state->crtc.y); crtc 430 drivers/gpu/drm/exynos/exynos7_drm_decon.c last_x = state->crtc.x + state->crtc.w; crtc 433 drivers/gpu/drm/exynos/exynos7_drm_decon.c last_y = state->crtc.y + state->crtc.h; crtc 442 drivers/gpu/drm/exynos/exynos7_drm_decon.c state->crtc.x, state->crtc.y, last_x, last_y); crtc 477 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_disable_plane(struct exynos_drm_crtc *crtc, crtc 480 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 500 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_atomic_flush(struct exynos_drm_crtc *crtc) crtc 502 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 510 drivers/gpu/drm/exynos/exynos7_drm_decon.c exynos_crtc_handle_event(crtc); crtc 530 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_enable(struct exynos_drm_crtc *crtc) crtc 532 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 543 drivers/gpu/drm/exynos/exynos7_drm_decon.c decon_enable_vblank(ctx->crtc); crtc 545 drivers/gpu/drm/exynos/exynos7_drm_decon.c decon_commit(ctx->crtc); crtc 550 drivers/gpu/drm/exynos/exynos7_drm_decon.c static void decon_disable(struct exynos_drm_crtc *crtc) crtc 552 drivers/gpu/drm/exynos/exynos7_drm_decon.c struct decon_context *ctx = crtc->ctx; crtc 564 drivers/gpu/drm/exynos/exynos7_drm_decon.c decon_disable_plane(crtc, &ctx->planes[i]); crtc 599 drivers/gpu/drm/exynos/exynos7_drm_decon.c drm_crtc_handle_vblank(&ctx->crtc->base); crtc 638 drivers/gpu/drm/exynos/exynos7_drm_decon.c ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base, crtc 640 drivers/gpu/drm/exynos/exynos7_drm_decon.c if (IS_ERR(ctx->crtc)) { crtc 642 drivers/gpu/drm/exynos/exynos7_drm_decon.c return PTR_ERR(ctx->crtc); crtc 657 drivers/gpu/drm/exynos/exynos7_drm_decon.c decon_disable(ctx->crtc); crtc 51 drivers/gpu/drm/exynos/exynos_dp.c if (!encoder->crtc) crtc 54 drivers/gpu/drm/exynos/exynos_dp.c exynos_drm_pipe_clk_enable(to_exynos_crtc(encoder->crtc), enable); crtc 21 drivers/gpu/drm/exynos/exynos_drm_crtc.c static void exynos_drm_crtc_atomic_enable(struct drm_crtc *crtc, crtc 24 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 29 drivers/gpu/drm/exynos/exynos_drm_crtc.c drm_crtc_vblank_on(crtc); crtc 32 drivers/gpu/drm/exynos/exynos_drm_crtc.c static void exynos_drm_crtc_atomic_disable(struct drm_crtc *crtc, crtc 35 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 37 drivers/gpu/drm/exynos/exynos_drm_crtc.c drm_crtc_vblank_off(crtc); crtc 42 drivers/gpu/drm/exynos/exynos_drm_crtc.c if (crtc->state->event && !crtc->state->active) { crtc 43 drivers/gpu/drm/exynos/exynos_drm_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 44 drivers/gpu/drm/exynos/exynos_drm_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 45 drivers/gpu/drm/exynos/exynos_drm_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 47 drivers/gpu/drm/exynos/exynos_drm_crtc.c crtc->state->event = NULL; crtc 51 drivers/gpu/drm/exynos/exynos_drm_crtc.c static int exynos_crtc_atomic_check(struct drm_crtc *crtc, crtc 54 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 65 drivers/gpu/drm/exynos/exynos_drm_crtc.c static void exynos_crtc_atomic_begin(struct drm_crtc *crtc, crtc 68 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 74 drivers/gpu/drm/exynos/exynos_drm_crtc.c static void exynos_crtc_atomic_flush(struct drm_crtc *crtc, crtc 77 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 83 drivers/gpu/drm/exynos/exynos_drm_crtc.c static enum drm_mode_status exynos_crtc_mode_valid(struct drm_crtc *crtc, crtc 86 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 94 drivers/gpu/drm/exynos/exynos_drm_crtc.c static bool exynos_crtc_mode_fixup(struct drm_crtc *crtc, crtc 98 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 120 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct drm_crtc *crtc = &exynos_crtc->base; crtc 121 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 126 drivers/gpu/drm/exynos/exynos_drm_crtc.c crtc->state->event = NULL; crtc 128 drivers/gpu/drm/exynos/exynos_drm_crtc.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 130 drivers/gpu/drm/exynos/exynos_drm_crtc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 131 drivers/gpu/drm/exynos/exynos_drm_crtc.c drm_crtc_arm_vblank_event(crtc, event); crtc 132 drivers/gpu/drm/exynos/exynos_drm_crtc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 135 drivers/gpu/drm/exynos/exynos_drm_crtc.c static void exynos_drm_crtc_destroy(struct drm_crtc *crtc) crtc 137 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 139 drivers/gpu/drm/exynos/exynos_drm_crtc.c drm_crtc_cleanup(crtc); crtc 143 drivers/gpu/drm/exynos/exynos_drm_crtc.c static int exynos_drm_crtc_enable_vblank(struct drm_crtc *crtc) crtc 145 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 153 drivers/gpu/drm/exynos/exynos_drm_crtc.c static void exynos_drm_crtc_disable_vblank(struct drm_crtc *crtc) crtc 155 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 179 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct drm_crtc *crtc; crtc 190 drivers/gpu/drm/exynos/exynos_drm_crtc.c crtc = &exynos_crtc->base; crtc 192 drivers/gpu/drm/exynos/exynos_drm_crtc.c ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL, crtc 197 drivers/gpu/drm/exynos/exynos_drm_crtc.c drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs); crtc 210 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct drm_crtc *crtc; crtc 212 drivers/gpu/drm/exynos/exynos_drm_crtc.c drm_for_each_crtc(crtc, drm_dev) crtc 213 drivers/gpu/drm/exynos/exynos_drm_crtc.c if (to_exynos_crtc(crtc)->type == out_type) crtc 214 drivers/gpu/drm/exynos/exynos_drm_crtc.c return to_exynos_crtc(crtc); crtc 222 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *crtc = exynos_drm_crtc_get_by_type(encoder->dev, crtc 225 drivers/gpu/drm/exynos/exynos_drm_crtc.c if (IS_ERR(crtc)) crtc 226 drivers/gpu/drm/exynos/exynos_drm_crtc.c return PTR_ERR(crtc); crtc 228 drivers/gpu/drm/exynos/exynos_drm_crtc.c encoder->possible_crtcs = drm_crtc_mask(&crtc->base); crtc 233 drivers/gpu/drm/exynos/exynos_drm_crtc.c void exynos_drm_crtc_te_handler(struct drm_crtc *crtc) crtc 235 drivers/gpu/drm/exynos/exynos_drm_crtc.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); crtc 38 drivers/gpu/drm/exynos/exynos_drm_crtc.h void exynos_drm_crtc_te_handler(struct drm_crtc *crtc); crtc 65 drivers/gpu/drm/exynos/exynos_drm_drv.h struct exynos_drm_rect crtc; crtc 136 drivers/gpu/drm/exynos/exynos_drm_drv.h void (*enable)(struct exynos_drm_crtc *crtc); crtc 137 drivers/gpu/drm/exynos/exynos_drm_drv.h void (*disable)(struct exynos_drm_crtc *crtc); crtc 138 drivers/gpu/drm/exynos/exynos_drm_drv.h int (*enable_vblank)(struct exynos_drm_crtc *crtc); crtc 139 drivers/gpu/drm/exynos/exynos_drm_drv.h void (*disable_vblank)(struct exynos_drm_crtc *crtc); crtc 140 drivers/gpu/drm/exynos/exynos_drm_drv.h enum drm_mode_status (*mode_valid)(struct exynos_drm_crtc *crtc, crtc 142 drivers/gpu/drm/exynos/exynos_drm_drv.h bool (*mode_fixup)(struct exynos_drm_crtc *crtc, crtc 145 drivers/gpu/drm/exynos/exynos_drm_drv.h int (*atomic_check)(struct exynos_drm_crtc *crtc, crtc 147 drivers/gpu/drm/exynos/exynos_drm_drv.h void (*atomic_begin)(struct exynos_drm_crtc *crtc); crtc 148 drivers/gpu/drm/exynos/exynos_drm_drv.h void (*update_plane)(struct exynos_drm_crtc *crtc, crtc 150 drivers/gpu/drm/exynos/exynos_drm_drv.h void (*disable_plane)(struct exynos_drm_crtc *crtc, crtc 152 drivers/gpu/drm/exynos/exynos_drm_drv.h void (*atomic_flush)(struct exynos_drm_crtc *crtc); crtc 153 drivers/gpu/drm/exynos/exynos_drm_drv.h void (*te_handler)(struct exynos_drm_crtc *crtc); crtc 178 drivers/gpu/drm/exynos/exynos_drm_drv.h static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc, crtc 181 drivers/gpu/drm/exynos/exynos_drm_drv.h if (crtc->pipe_clk) crtc 182 drivers/gpu/drm/exynos/exynos_drm_drv.h crtc->pipe_clk->enable(crtc->pipe_clk, enable); crtc 883 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct drm_display_mode *m = &dsi->encoder.crtc->state->adjusted_mode; crtc 1290 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_drm_crtc_te_handler(encoder->crtc); crtc 171 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct exynos_drm_crtc *crtc; crtc 244 drivers/gpu/drm/exynos/exynos_drm_fimd.c static int fimd_enable_vblank(struct exynos_drm_crtc *crtc) crtc 246 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 276 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_disable_vblank(struct exynos_drm_crtc *crtc) crtc 278 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 300 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_wait_for_vblank(struct exynos_drm_crtc *crtc) crtc 302 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 346 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_clear_channels(struct exynos_drm_crtc *crtc) crtc 348 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 376 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_enable_vblank(ctx->crtc); crtc 377 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_wait_for_vblank(ctx->crtc); crtc 378 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_disable_vblank(ctx->crtc); crtc 390 drivers/gpu/drm/exynos/exynos_drm_fimd.c static int fimd_atomic_check(struct exynos_drm_crtc *crtc, crtc 394 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 454 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_commit(struct exynos_drm_crtc *crtc) crtc 456 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 457 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct drm_display_mode *mode = &crtc->base.state->adjusted_mode; crtc 762 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_atomic_begin(struct exynos_drm_crtc *crtc) crtc 764 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 774 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_atomic_flush(struct exynos_drm_crtc *crtc) crtc 776 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 785 drivers/gpu/drm/exynos/exynos_drm_fimd.c exynos_crtc_handle_event(crtc); crtc 788 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_update_plane(struct exynos_drm_crtc *crtc, crtc 793 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 814 drivers/gpu/drm/exynos/exynos_drm_fimd.c size = pitch * state->crtc.h; crtc 822 drivers/gpu/drm/exynos/exynos_drm_fimd.c state->crtc.w, state->crtc.h); crtc 825 drivers/gpu/drm/exynos/exynos_drm_fimd.c buf_offsize = pitch - (state->crtc.w * cpp); crtc 826 drivers/gpu/drm/exynos/exynos_drm_fimd.c line_size = state->crtc.w * cpp; crtc 834 drivers/gpu/drm/exynos/exynos_drm_fimd.c val = VIDOSDxA_TOPLEFT_X(state->crtc.x) | crtc 835 drivers/gpu/drm/exynos/exynos_drm_fimd.c VIDOSDxA_TOPLEFT_Y(state->crtc.y) | crtc 836 drivers/gpu/drm/exynos/exynos_drm_fimd.c VIDOSDxA_TOPLEFT_X_E(state->crtc.x) | crtc 837 drivers/gpu/drm/exynos/exynos_drm_fimd.c VIDOSDxA_TOPLEFT_Y_E(state->crtc.y); crtc 840 drivers/gpu/drm/exynos/exynos_drm_fimd.c last_x = state->crtc.x + state->crtc.w; crtc 843 drivers/gpu/drm/exynos/exynos_drm_fimd.c last_y = state->crtc.y + state->crtc.h; crtc 854 drivers/gpu/drm/exynos/exynos_drm_fimd.c state->crtc.x, state->crtc.y, last_x, last_y); crtc 861 drivers/gpu/drm/exynos/exynos_drm_fimd.c val = state->crtc.w * state->crtc.h; crtc 883 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_disable_plane(struct exynos_drm_crtc *crtc, crtc 886 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 898 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_enable(struct exynos_drm_crtc *crtc) crtc 900 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 911 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_enable_vblank(ctx->crtc); crtc 913 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_commit(ctx->crtc); crtc 916 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_disable(struct exynos_drm_crtc *crtc) crtc 918 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 930 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_disable_plane(crtc, &ctx->planes[i]); crtc 932 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_enable_vblank(crtc); crtc 933 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_wait_for_vblank(crtc); crtc 934 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_disable_vblank(crtc); crtc 971 drivers/gpu/drm/exynos/exynos_drm_fimd.c static void fimd_te_handler(struct exynos_drm_crtc *crtc) crtc 973 drivers/gpu/drm/exynos/exynos_drm_fimd.c struct fimd_context *ctx = crtc->ctx; crtc 998 drivers/gpu/drm/exynos/exynos_drm_fimd.c drm_crtc_handle_vblank(&ctx->crtc->base); crtc 1038 drivers/gpu/drm/exynos/exynos_drm_fimd.c drm_crtc_handle_vblank(&ctx->crtc->base); crtc 1078 drivers/gpu/drm/exynos/exynos_drm_fimd.c ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base, crtc 1080 drivers/gpu/drm/exynos/exynos_drm_fimd.c if (IS_ERR(ctx->crtc)) crtc 1081 drivers/gpu/drm/exynos/exynos_drm_fimd.c return PTR_ERR(ctx->crtc); crtc 1085 drivers/gpu/drm/exynos/exynos_drm_fimd.c ctx->crtc->pipe_clk = &ctx->dp_clk; crtc 1092 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_clear_channels(ctx->crtc); crtc 1102 drivers/gpu/drm/exynos/exynos_drm_fimd.c fimd_disable(ctx->crtc); crtc 257 drivers/gpu/drm/exynos/exynos_drm_mic.c mic->i80_mode = to_exynos_crtc(bridge->encoder->crtc)->i80_mode; crtc 58 drivers/gpu/drm/exynos/exynos_drm_plane.c struct drm_crtc *crtc = state->crtc; crtc 60 drivers/gpu/drm/exynos/exynos_drm_plane.c drm_atomic_get_existing_crtc_state(state->state, crtc); crtc 112 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->crtc.x = crtc_x; crtc 113 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->crtc.y = crtc_y; crtc 114 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->crtc.w = actual_w; crtc 115 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->crtc.h = actual_h; crtc 117 drivers/gpu/drm/exynos/exynos_drm_plane.c DRM_DEV_DEBUG_KMS(crtc->dev->dev, crtc 119 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->crtc.x, exynos_state->crtc.y, crtc 120 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->crtc.w, exynos_state->crtc.h); crtc 203 drivers/gpu/drm/exynos/exynos_drm_plane.c struct drm_crtc *crtc = state->base.crtc; crtc 209 drivers/gpu/drm/exynos/exynos_drm_plane.c if (state->src.w == state->crtc.w) crtc 212 drivers/gpu/drm/exynos/exynos_drm_plane.c if (state->src.h == state->crtc.h) crtc 226 drivers/gpu/drm/exynos/exynos_drm_plane.c DRM_DEV_DEBUG_KMS(crtc->dev->dev, "scaling mode is not supported"); crtc 238 drivers/gpu/drm/exynos/exynos_drm_plane.c if (!state->crtc || !state->fb) crtc 256 drivers/gpu/drm/exynos/exynos_drm_plane.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(state->crtc); crtc 259 drivers/gpu/drm/exynos/exynos_drm_plane.c if (!state->crtc) crtc 270 drivers/gpu/drm/exynos/exynos_drm_plane.c struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state->crtc); crtc 272 drivers/gpu/drm/exynos/exynos_drm_plane.c if (!old_state->crtc) crtc 39 drivers/gpu/drm/exynos/exynos_drm_vidi.c struct exynos_drm_crtc *crtc; crtc 92 drivers/gpu/drm/exynos/exynos_drm_vidi.c static int vidi_enable_vblank(struct exynos_drm_crtc *crtc) crtc 94 drivers/gpu/drm/exynos/exynos_drm_vidi.c struct vidi_context *ctx = crtc->ctx; crtc 105 drivers/gpu/drm/exynos/exynos_drm_vidi.c static void vidi_disable_vblank(struct exynos_drm_crtc *crtc) crtc 109 drivers/gpu/drm/exynos/exynos_drm_vidi.c static void vidi_update_plane(struct exynos_drm_crtc *crtc, crtc 113 drivers/gpu/drm/exynos/exynos_drm_vidi.c struct vidi_context *ctx = crtc->ctx; crtc 123 drivers/gpu/drm/exynos/exynos_drm_vidi.c static void vidi_enable(struct exynos_drm_crtc *crtc) crtc 125 drivers/gpu/drm/exynos/exynos_drm_vidi.c struct vidi_context *ctx = crtc->ctx; crtc 133 drivers/gpu/drm/exynos/exynos_drm_vidi.c drm_crtc_vblank_on(&crtc->base); crtc 136 drivers/gpu/drm/exynos/exynos_drm_vidi.c static void vidi_disable(struct exynos_drm_crtc *crtc) crtc 138 drivers/gpu/drm/exynos/exynos_drm_vidi.c struct vidi_context *ctx = crtc->ctx; crtc 140 drivers/gpu/drm/exynos/exynos_drm_vidi.c drm_crtc_vblank_off(&crtc->base); crtc 162 drivers/gpu/drm/exynos/exynos_drm_vidi.c if (drm_crtc_handle_vblank(&ctx->crtc->base)) crtc 402 drivers/gpu/drm/exynos/exynos_drm_vidi.c ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base, crtc 404 drivers/gpu/drm/exynos/exynos_drm_vidi.c if (IS_ERR(ctx->crtc)) { crtc 406 drivers/gpu/drm/exynos/exynos_drm_vidi.c return PTR_ERR(ctx->crtc); crtc 802 drivers/gpu/drm/exynos/exynos_hdmi.c struct drm_display_mode *m = &hdata->encoder.crtc->state->mode; crtc 1123 drivers/gpu/drm/exynos/exynos_hdmi.c struct drm_display_mode *m = &hdata->encoder.crtc->state->mode; crtc 1198 drivers/gpu/drm/exynos/exynos_hdmi.c struct drm_display_mode *m = &hdata->encoder.crtc->state->mode; crtc 1277 drivers/gpu/drm/exynos/exynos_hdmi.c struct drm_display_mode *m = &hdata->encoder.crtc->state->mode; crtc 1279 drivers/gpu/drm/exynos/exynos_hdmi.c &hdata->encoder.crtc->state->adjusted_mode; crtc 1423 drivers/gpu/drm/exynos/exynos_hdmi.c struct drm_display_mode *m = &hdata->encoder.crtc->state->mode; crtc 1836 drivers/gpu/drm/exynos/exynos_hdmi.c struct exynos_drm_crtc *crtc; crtc 1852 drivers/gpu/drm/exynos/exynos_hdmi.c crtc = exynos_drm_crtc_get_by_type(drm_dev, EXYNOS_DISPLAY_TYPE_HDMI); crtc 1853 drivers/gpu/drm/exynos/exynos_hdmi.c crtc->pipe_clk = &hdata->phy_clk; crtc 98 drivers/gpu/drm/exynos/exynos_mixer.c struct exynos_drm_crtc *crtc; crtc 504 drivers/gpu/drm/exynos/exynos_mixer.c struct drm_display_mode *mode = &ctx->crtc->base.state->adjusted_mode; crtc 563 drivers/gpu/drm/exynos/exynos_mixer.c vp_reg_write(ctx, VP_DST_WIDTH, state->crtc.w); crtc 564 drivers/gpu/drm/exynos/exynos_mixer.c vp_reg_write(ctx, VP_DST_H_POSITION, state->crtc.x); crtc 569 drivers/gpu/drm/exynos/exynos_mixer.c vp_reg_write(ctx, VP_DST_HEIGHT, state->crtc.h / 2); crtc 570 drivers/gpu/drm/exynos/exynos_mixer.c vp_reg_write(ctx, VP_DST_V_POSITION, state->crtc.y / 2); crtc 574 drivers/gpu/drm/exynos/exynos_mixer.c vp_reg_write(ctx, VP_DST_HEIGHT, state->crtc.h); crtc 575 drivers/gpu/drm/exynos/exynos_mixer.c vp_reg_write(ctx, VP_DST_V_POSITION, state->crtc.y); crtc 645 drivers/gpu/drm/exynos/exynos_mixer.c dst_x_offset = state->crtc.x; crtc 646 drivers/gpu/drm/exynos/exynos_mixer.c dst_y_offset = state->crtc.y; crtc 762 drivers/gpu/drm/exynos/exynos_mixer.c drm_crtc_handle_vblank(&ctx->crtc->base); crtc 908 drivers/gpu/drm/exynos/exynos_mixer.c static int mixer_enable_vblank(struct exynos_drm_crtc *crtc) crtc 910 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *mixer_ctx = crtc->ctx; crtc 923 drivers/gpu/drm/exynos/exynos_mixer.c static void mixer_disable_vblank(struct exynos_drm_crtc *crtc) crtc 925 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *mixer_ctx = crtc->ctx; crtc 937 drivers/gpu/drm/exynos/exynos_mixer.c static void mixer_atomic_begin(struct exynos_drm_crtc *crtc) crtc 939 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *ctx = crtc->ctx; crtc 949 drivers/gpu/drm/exynos/exynos_mixer.c static void mixer_update_plane(struct exynos_drm_crtc *crtc, crtc 952 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *mixer_ctx = crtc->ctx; crtc 965 drivers/gpu/drm/exynos/exynos_mixer.c static void mixer_disable_plane(struct exynos_drm_crtc *crtc, crtc 968 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *mixer_ctx = crtc->ctx; crtc 981 drivers/gpu/drm/exynos/exynos_mixer.c static void mixer_atomic_flush(struct exynos_drm_crtc *crtc) crtc 983 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *mixer_ctx = crtc->ctx; crtc 989 drivers/gpu/drm/exynos/exynos_mixer.c exynos_crtc_handle_event(crtc); crtc 992 drivers/gpu/drm/exynos/exynos_mixer.c static void mixer_enable(struct exynos_drm_crtc *crtc) crtc 994 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *ctx = crtc->ctx; crtc 1001 drivers/gpu/drm/exynos/exynos_mixer.c exynos_drm_pipe_clk_enable(crtc, true); crtc 1021 drivers/gpu/drm/exynos/exynos_mixer.c static void mixer_disable(struct exynos_drm_crtc *crtc) crtc 1023 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *ctx = crtc->ctx; crtc 1033 drivers/gpu/drm/exynos/exynos_mixer.c mixer_disable_plane(crtc, &ctx->planes[i]); crtc 1035 drivers/gpu/drm/exynos/exynos_mixer.c exynos_drm_pipe_clk_enable(crtc, false); crtc 1042 drivers/gpu/drm/exynos/exynos_mixer.c static int mixer_mode_valid(struct exynos_drm_crtc *crtc, crtc 1045 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *ctx = crtc->ctx; crtc 1068 drivers/gpu/drm/exynos/exynos_mixer.c static bool mixer_mode_fixup(struct exynos_drm_crtc *crtc, crtc 1072 drivers/gpu/drm/exynos/exynos_mixer.c struct mixer_context *ctx = crtc->ctx; crtc 1194 drivers/gpu/drm/exynos/exynos_mixer.c ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base, crtc 1196 drivers/gpu/drm/exynos/exynos_mixer.c if (IS_ERR(ctx->crtc)) { crtc 1198 drivers/gpu/drm/exynos/exynos_mixer.c ret = PTR_ERR(ctx->crtc); crtc 23 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c static void fsl_dcu_drm_crtc_atomic_flush(struct drm_crtc *crtc, crtc 26 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c struct drm_device *dev = crtc->dev; crtc 28 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 34 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c crtc->state->event = NULL; crtc 36 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 37 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c if (drm_crtc_vblank_get(crtc) == 0) crtc 38 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c drm_crtc_arm_vblank_event(crtc, event); crtc 40 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 41 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 45 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c static void fsl_dcu_drm_crtc_atomic_disable(struct drm_crtc *crtc, crtc 48 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c struct drm_device *dev = crtc->dev; crtc 54 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c drm_crtc_vblank_off(crtc); crtc 64 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c static void fsl_dcu_drm_crtc_atomic_enable(struct drm_crtc *crtc, crtc 67 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c struct drm_device *dev = crtc->dev; crtc 77 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c drm_crtc_vblank_on(crtc); crtc 80 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 82 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c struct drm_device *dev = crtc->dev; crtc 85 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c struct drm_display_mode *mode = &crtc->state->mode; crtc 133 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c static int fsl_dcu_drm_crtc_enable_vblank(struct drm_crtc *crtc) crtc 135 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c struct drm_device *dev = crtc->dev; crtc 146 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c static void fsl_dcu_drm_crtc_disable_vblank(struct drm_crtc *crtc) crtc 148 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c struct drm_device *dev = crtc->dev; crtc 171 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c struct drm_crtc *crtc = &fsl_dev->crtc; crtc 180 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c ret = drm_crtc_init_with_planes(fsl_dev->drm, crtc, primary, NULL, crtc 187 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c drm_crtc_helper_add(crtc, &fsl_dcu_drm_crtc_helper_funcs); crtc 190 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h struct drm_crtc crtc; crtc 38 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c ret = fsl_dcu_drm_encoder_create(fsl_dev, &fsl_dev->crtc); crtc 25 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_output.h struct drm_crtc *crtc); crtc 40 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c if (!state->fb || !state->crtc) crtc 29 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c struct drm_crtc *crtc) crtc 20 drivers/gpu/drm/gma500/cdv_device.h struct drm_crtc *crtc); crtc 21 drivers/gpu/drm/gma500/cdv_device.h extern void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc); crtc 90 drivers/gpu/drm/gma500/cdv_intel_crt.c struct drm_crtc *crtc = encoder->crtc; crtc 91 drivers/gpu/drm/gma500/cdv_intel_crt.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 23 drivers/gpu/drm/gma500/cdv_intel_display.c struct drm_crtc *crtc, int target, crtc 212 drivers/gpu/drm/gma500/cdv_intel_display.c cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc, crtc 215 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 363 drivers/gpu/drm/gma500/cdv_intel_display.c static const struct gma_limit_t *cdv_intel_limit(struct drm_crtc *crtc, crtc 367 drivers/gpu/drm/gma500/cdv_intel_display.c if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { crtc 376 drivers/gpu/drm/gma500/cdv_intel_display.c } else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) || crtc 377 drivers/gpu/drm/gma500/cdv_intel_display.c gma_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) { crtc 401 drivers/gpu/drm/gma500/cdv_intel_display.c struct drm_crtc *crtc, int target, crtc 405 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 455 drivers/gpu/drm/gma500/cdv_intel_display.c struct drm_crtc *crtc; crtc 459 drivers/gpu/drm/gma500/cdv_intel_display.c crtc = dev_priv->pipe_to_crtc_mapping[pipe]; crtc 460 drivers/gpu/drm/gma500/cdv_intel_display.c gma_crtc = to_gma_crtc(crtc); crtc 462 drivers/gpu/drm/gma500/cdv_intel_display.c if (crtc->primary->fb == NULL || !gma_crtc->active) crtc 488 drivers/gpu/drm/gma500/cdv_intel_display.c void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc) crtc 491 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 517 drivers/gpu/drm/gma500/cdv_intel_display.c gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { crtc 568 drivers/gpu/drm/gma500/cdv_intel_display.c static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc, crtc 574 drivers/gpu/drm/gma500/cdv_intel_display.c struct drm_device *dev = crtc->dev; crtc 576 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 596 drivers/gpu/drm/gma500/cdv_intel_display.c || connector->encoder->crtc != crtc) crtc 653 drivers/gpu/drm/gma500/cdv_intel_display.c limit = gma_crtc->clock_funcs->limit(crtc, refclk); crtc 655 drivers/gpu/drm/gma500/cdv_intel_display.c ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, crtc 672 drivers/gpu/drm/gma500/cdv_intel_display.c cdv_intel_dp_set_m_n(crtc, mode, adjusted_mode); crtc 729 drivers/gpu/drm/gma500/cdv_intel_display.c cdv_dpll_set_clock_cdv(dev, crtc, &clock, is_lvds, ddi_select); crtc 817 drivers/gpu/drm/gma500/cdv_intel_display.c crtc->helper_private; crtc 818 drivers/gpu/drm/gma500/cdv_intel_display.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); crtc 840 drivers/gpu/drm/gma500/cdv_intel_display.c struct drm_crtc *crtc) crtc 843 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 919 drivers/gpu/drm/gma500/cdv_intel_display.c struct drm_crtc *crtc) crtc 921 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 949 drivers/gpu/drm/gma500/cdv_intel_display.c mode->clock = cdv_intel_crtc_clock_get(dev, crtc); crtc 986 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, crtc 989 drivers/gpu/drm/gma500/cdv_intel_dp.c struct drm_device *dev = crtc->dev; crtc 993 drivers/gpu/drm/gma500/cdv_intel_dp.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 1005 drivers/gpu/drm/gma500/cdv_intel_dp.c if (encoder->crtc != crtc) crtc 1043 drivers/gpu/drm/gma500/cdv_intel_dp.c struct drm_crtc *crtc = encoder->crtc; crtc 1044 drivers/gpu/drm/gma500/cdv_intel_dp.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 1887 drivers/gpu/drm/gma500/cdv_intel_dp.c if (encoder->base.crtc) { crtc 1888 drivers/gpu/drm/gma500/cdv_intel_dp.c struct drm_crtc *crtc = encoder->base.crtc; crtc 1889 drivers/gpu/drm/gma500/cdv_intel_dp.c drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc 1890 drivers/gpu/drm/gma500/cdv_intel_dp.c crtc->x, crtc->y, crtc 1891 drivers/gpu/drm/gma500/cdv_intel_dp.c crtc->primary->fb); crtc 71 drivers/gpu/drm/gma500/cdv_intel_hdmi.c struct drm_crtc *crtc = encoder->crtc; crtc 72 drivers/gpu/drm/gma500/cdv_intel_hdmi.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 160 drivers/gpu/drm/gma500/cdv_intel_hdmi.c struct gma_crtc *crtc = to_gma_crtc(encoder->crtc); crtc 164 drivers/gpu/drm/gma500/cdv_intel_hdmi.c if (!crtc) crtc 192 drivers/gpu/drm/gma500/cdv_intel_hdmi.c if (crtc->saved_mode.hdisplay != 0 && crtc 193 drivers/gpu/drm/gma500/cdv_intel_hdmi.c crtc->saved_mode.vdisplay != 0) { crtc 195 drivers/gpu/drm/gma500/cdv_intel_hdmi.c if (!drm_crtc_helper_set_mode(encoder->crtc, &crtc->saved_mode, crtc 196 drivers/gpu/drm/gma500/cdv_intel_hdmi.c encoder->crtc->x, encoder->crtc->y, encoder->crtc->primary->fb)) crtc 201 drivers/gpu/drm/gma500/cdv_intel_hdmi.c helpers->mode_set(encoder, &crtc->saved_mode, crtc 202 drivers/gpu/drm/gma500/cdv_intel_hdmi.c &crtc->saved_adjusted_mode); crtc 273 drivers/gpu/drm/gma500/cdv_intel_lvds.c && tmp_encoder->crtc == encoder->crtc) { crtc 345 drivers/gpu/drm/gma500/cdv_intel_lvds.c struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc); crtc 425 drivers/gpu/drm/gma500/cdv_intel_lvds.c struct gma_crtc *crtc = to_gma_crtc(encoder->crtc); crtc 428 drivers/gpu/drm/gma500/cdv_intel_lvds.c if (!crtc) crtc 455 drivers/gpu/drm/gma500/cdv_intel_lvds.c if (crtc->saved_mode.hdisplay != 0 && crtc 456 drivers/gpu/drm/gma500/cdv_intel_lvds.c crtc->saved_mode.vdisplay != 0) { crtc 457 drivers/gpu/drm/gma500/cdv_intel_lvds.c if (!drm_crtc_helper_set_mode(encoder->crtc, crtc 458 drivers/gpu/drm/gma500/cdv_intel_lvds.c &crtc->saved_mode, crtc 459 drivers/gpu/drm/gma500/cdv_intel_lvds.c encoder->crtc->x, crtc 460 drivers/gpu/drm/gma500/cdv_intel_lvds.c encoder->crtc->y, crtc 461 drivers/gpu/drm/gma500/cdv_intel_lvds.c encoder->crtc->primary->fb)) crtc 578 drivers/gpu/drm/gma500/cdv_intel_lvds.c struct drm_crtc *crtc; crtc 709 drivers/gpu/drm/gma500/cdv_intel_lvds.c crtc = psb_intel_get_crtc_from_pipe(dev, pipe); crtc 711 drivers/gpu/drm/gma500/cdv_intel_lvds.c if (crtc && (lvds & LVDS_PORT_EN)) { crtc 713 drivers/gpu/drm/gma500/cdv_intel_lvds.c cdv_intel_crtc_mode_get(dev, crtc); crtc 26 drivers/gpu/drm/gma500/gma_display.c bool gma_pipe_has_type(struct drm_crtc *crtc, int type) crtc 28 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = crtc->dev; crtc 33 drivers/gpu/drm/gma500/gma_display.c if (l_entry->encoder && l_entry->encoder->crtc == crtc) { crtc 50 drivers/gpu/drm/gma500/gma_display.c int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y, crtc 53 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = crtc->dev; crtc 55 drivers/gpu/drm/gma500/gma_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 56 drivers/gpu/drm/gma500/gma_display.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 136 drivers/gpu/drm/gma500/gma_display.c void gma_crtc_load_lut(struct drm_crtc *crtc) crtc 138 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = crtc->dev; crtc 140 drivers/gpu/drm/gma500/gma_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 147 drivers/gpu/drm/gma500/gma_display.c if (!crtc->enabled) crtc 150 drivers/gpu/drm/gma500/gma_display.c r = crtc->gamma_store; crtc 151 drivers/gpu/drm/gma500/gma_display.c g = r + crtc->gamma_size; crtc 152 drivers/gpu/drm/gma500/gma_display.c b = g + crtc->gamma_size; crtc 174 drivers/gpu/drm/gma500/gma_display.c int gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue, crtc 178 drivers/gpu/drm/gma500/gma_display.c gma_crtc_load_lut(crtc); crtc 189 drivers/gpu/drm/gma500/gma_display.c void gma_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 191 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = crtc->dev; crtc 193 drivers/gpu/drm/gma500/gma_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 253 drivers/gpu/drm/gma500/gma_display.c gma_crtc_load_lut(crtc); crtc 273 drivers/gpu/drm/gma500/gma_display.c drm_crtc_vblank_off(crtc); crtc 313 drivers/gpu/drm/gma500/gma_display.c dev_priv->ops->update_wm(dev, crtc); crtc 319 drivers/gpu/drm/gma500/gma_display.c int gma_crtc_cursor_set(struct drm_crtc *crtc, crtc 324 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = crtc->dev; crtc 326 drivers/gpu/drm/gma500/gma_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 440 drivers/gpu/drm/gma500/gma_display.c int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) crtc 442 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = crtc->dev; crtc 443 drivers/gpu/drm/gma500/gma_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 470 drivers/gpu/drm/gma500/gma_display.c void gma_crtc_prepare(struct drm_crtc *crtc) crtc 472 drivers/gpu/drm/gma500/gma_display.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 473 drivers/gpu/drm/gma500/gma_display.c crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF); crtc 476 drivers/gpu/drm/gma500/gma_display.c void gma_crtc_commit(struct drm_crtc *crtc) crtc 478 drivers/gpu/drm/gma500/gma_display.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 479 drivers/gpu/drm/gma500/gma_display.c crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON); crtc 482 drivers/gpu/drm/gma500/gma_display.c void gma_crtc_disable(struct drm_crtc *crtc) crtc 485 drivers/gpu/drm/gma500/gma_display.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 487 drivers/gpu/drm/gma500/gma_display.c crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF); crtc 489 drivers/gpu/drm/gma500/gma_display.c if (crtc->primary->fb) { crtc 490 drivers/gpu/drm/gma500/gma_display.c gt = to_gtt_range(crtc->primary->fb->obj[0]); crtc 495 drivers/gpu/drm/gma500/gma_display.c void gma_crtc_destroy(struct drm_crtc *crtc) crtc 497 drivers/gpu/drm/gma500/gma_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 500 drivers/gpu/drm/gma500/gma_display.c drm_crtc_cleanup(crtc); crtc 507 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = set->crtc->dev; crtc 524 drivers/gpu/drm/gma500/gma_display.c void gma_crtc_save(struct drm_crtc *crtc) crtc 526 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = crtc->dev; crtc 528 drivers/gpu/drm/gma500/gma_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 567 drivers/gpu/drm/gma500/gma_display.c void gma_crtc_restore(struct drm_crtc *crtc) crtc 569 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = crtc->dev; crtc 571 drivers/gpu/drm/gma500/gma_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 668 drivers/gpu/drm/gma500/gma_display.c bool gma_pll_is_valid(struct drm_crtc *crtc, crtc 700 drivers/gpu/drm/gma500/gma_display.c struct drm_crtc *crtc, int target, int refclk, crtc 703 drivers/gpu/drm/gma500/gma_display.c struct drm_device *dev = crtc->dev; crtc 705 drivers/gpu/drm/gma500/gma_display.c to_gma_crtc(crtc)->clock_funcs; crtc 709 drivers/gpu/drm/gma500/gma_display.c if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) && crtc 745 drivers/gpu/drm/gma500/gma_display.c if (!clock_funcs->pll_is_valid(crtc, crtc 49 drivers/gpu/drm/gma500/gma_display.h const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk); crtc 50 drivers/gpu/drm/gma500/gma_display.h bool (*pll_is_valid)(struct drm_crtc *crtc, crtc 56 drivers/gpu/drm/gma500/gma_display.h extern bool gma_pipe_has_type(struct drm_crtc *crtc, int type); crtc 58 drivers/gpu/drm/gma500/gma_display.h extern int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y, crtc 60 drivers/gpu/drm/gma500/gma_display.h extern int gma_crtc_cursor_set(struct drm_crtc *crtc, crtc 64 drivers/gpu/drm/gma500/gma_display.h extern int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y); crtc 65 drivers/gpu/drm/gma500/gma_display.h extern void gma_crtc_load_lut(struct drm_crtc *crtc); crtc 66 drivers/gpu/drm/gma500/gma_display.h extern int gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, crtc 69 drivers/gpu/drm/gma500/gma_display.h extern void gma_crtc_dpms(struct drm_crtc *crtc, int mode); crtc 70 drivers/gpu/drm/gma500/gma_display.h extern void gma_crtc_prepare(struct drm_crtc *crtc); crtc 71 drivers/gpu/drm/gma500/gma_display.h extern void gma_crtc_commit(struct drm_crtc *crtc); crtc 72 drivers/gpu/drm/gma500/gma_display.h extern void gma_crtc_disable(struct drm_crtc *crtc); crtc 73 drivers/gpu/drm/gma500/gma_display.h extern void gma_crtc_destroy(struct drm_crtc *crtc); crtc 77 drivers/gpu/drm/gma500/gma_display.h extern void gma_crtc_save(struct drm_crtc *crtc); crtc 78 drivers/gpu/drm/gma500/gma_display.h extern void gma_crtc_restore(struct drm_crtc *crtc); crtc 85 drivers/gpu/drm/gma500/gma_display.h extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk); crtc 87 drivers/gpu/drm/gma500/gma_display.h extern bool gma_pll_is_valid(struct drm_crtc *crtc, crtc 91 drivers/gpu/drm/gma500/gma_display.h struct drm_crtc *crtc, int target, int refclk, crtc 254 drivers/gpu/drm/gma500/mdfld_dsi_output.c struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc); crtc 288 drivers/gpu/drm/gma500/mdfld_dsi_output.c if (!drm_crtc_helper_set_mode(encoder->crtc, crtc 290 drivers/gpu/drm/gma500/mdfld_dsi_output.c encoder->crtc->x, crtc 291 drivers/gpu/drm/gma500/mdfld_dsi_output.c encoder->crtc->y, crtc 292 drivers/gpu/drm/gma500/mdfld_dsi_output.c encoder->crtc->primary->fb)) crtc 154 drivers/gpu/drm/gma500/mdfld_intel_display.c static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, crtc 157 drivers/gpu/drm/gma500/mdfld_intel_display.c struct drm_device *dev = crtc->dev; crtc 159 drivers/gpu/drm/gma500/mdfld_intel_display.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 160 drivers/gpu/drm/gma500/mdfld_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 295 drivers/gpu/drm/gma500/mdfld_intel_display.c static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 297 drivers/gpu/drm/gma500/mdfld_intel_display.c struct drm_device *dev = crtc->dev; crtc 299 drivers/gpu/drm/gma500/mdfld_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 411 drivers/gpu/drm/gma500/mdfld_intel_display.c gma_crtc_load_lut(crtc); crtc 580 drivers/gpu/drm/gma500/mdfld_intel_display.c static const struct mrst_limit_t *mdfld_limit(struct drm_crtc *crtc) crtc 583 drivers/gpu/drm/gma500/mdfld_intel_display.c struct drm_device *dev = crtc->dev; crtc 586 drivers/gpu/drm/gma500/mdfld_intel_display.c if (gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI) crtc 587 drivers/gpu/drm/gma500/mdfld_intel_display.c || gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI2)) { crtc 599 drivers/gpu/drm/gma500/mdfld_intel_display.c } else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) { crtc 630 drivers/gpu/drm/gma500/mdfld_intel_display.c mdfldFindBestPLL(struct drm_crtc *crtc, int target, int refclk, crtc 634 drivers/gpu/drm/gma500/mdfld_intel_display.c const struct mrst_limit_t *limit = mdfld_limit(crtc); crtc 656 drivers/gpu/drm/gma500/mdfld_intel_display.c static int mdfld_crtc_mode_set(struct drm_crtc *crtc, crtc 662 drivers/gpu/drm/gma500/mdfld_intel_display.c struct drm_device *dev = crtc->dev; crtc 663 drivers/gpu/drm/gma500/mdfld_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 688 drivers/gpu/drm/gma500/mdfld_intel_display.c android_hdmi_crtc_mode_set(crtc, mode, adjusted_mode, crtc 694 drivers/gpu/drm/gma500/mdfld_intel_display.c ret = check_fb(crtc->primary->fb); crtc 734 drivers/gpu/drm/gma500/mdfld_intel_display.c if (encoder->crtc != crtc) crtc 840 drivers/gpu/drm/gma500/mdfld_intel_display.c crtc->helper_private; crtc 841 drivers/gpu/drm/gma500/mdfld_intel_display.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); crtc 901 drivers/gpu/drm/gma500/mdfld_intel_display.c ok = mdfldFindBestPLL(crtc, clk_tmp, refclk, &clock); crtc 242 drivers/gpu/drm/gma500/oaktrail.h extern int oaktrail_crtc_hdmi_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, crtc 245 drivers/gpu/drm/gma500/oaktrail.h extern void oaktrail_crtc_hdmi_dpms(struct drm_crtc *crtc, int mode); crtc 37 drivers/gpu/drm/gma500/oaktrail_crtc.c struct drm_crtc *crtc, int target, crtc 41 drivers/gpu/drm/gma500/oaktrail_crtc.c struct drm_crtc *crtc, int target, crtc 80 drivers/gpu/drm/gma500/oaktrail_crtc.c static const struct gma_limit_t *mrst_limit(struct drm_crtc *crtc, crtc 84 drivers/gpu/drm/gma500/oaktrail_crtc.c struct drm_device *dev = crtc->dev; crtc 87 drivers/gpu/drm/gma500/oaktrail_crtc.c if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) crtc 88 drivers/gpu/drm/gma500/oaktrail_crtc.c || gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)) { crtc 100 drivers/gpu/drm/gma500/oaktrail_crtc.c } else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) { crtc 124 drivers/gpu/drm/gma500/oaktrail_crtc.c struct drm_crtc *crtc, int target, crtc 182 drivers/gpu/drm/gma500/oaktrail_crtc.c struct drm_crtc *crtc, int target, crtc 214 drivers/gpu/drm/gma500/oaktrail_crtc.c static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 216 drivers/gpu/drm/gma500/oaktrail_crtc.c struct drm_device *dev = crtc->dev; crtc 218 drivers/gpu/drm/gma500/oaktrail_crtc.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 223 drivers/gpu/drm/gma500/oaktrail_crtc.c int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0; crtc 225 drivers/gpu/drm/gma500/oaktrail_crtc.c if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) { crtc 226 drivers/gpu/drm/gma500/oaktrail_crtc.c oaktrail_crtc_hdmi_dpms(crtc, mode); crtc 279 drivers/gpu/drm/gma500/oaktrail_crtc.c gma_crtc_load_lut(crtc); crtc 356 drivers/gpu/drm/gma500/oaktrail_crtc.c static int oaktrail_crtc_mode_set(struct drm_crtc *crtc, crtc 362 drivers/gpu/drm/gma500/oaktrail_crtc.c struct drm_device *dev = crtc->dev; crtc 363 drivers/gpu/drm/gma500/oaktrail_crtc.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 379 drivers/gpu/drm/gma500/oaktrail_crtc.c int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0; crtc 381 drivers/gpu/drm/gma500/oaktrail_crtc.c if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) crtc 382 drivers/gpu/drm/gma500/oaktrail_crtc.c return oaktrail_crtc_hdmi_mode_set(crtc, mode, adjusted_mode, x, y, old_fb); crtc 395 drivers/gpu/drm/gma500/oaktrail_crtc.c if (!connector->encoder || connector->encoder->crtc != crtc) crtc 479 drivers/gpu/drm/gma500/oaktrail_crtc.c crtc->helper_private; crtc 480 drivers/gpu/drm/gma500/oaktrail_crtc.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); crtc 502 drivers/gpu/drm/gma500/oaktrail_crtc.c limit = mrst_limit(crtc, refclk); crtc 503 drivers/gpu/drm/gma500/oaktrail_crtc.c ok = limit->find_pll(limit, crtc, adjusted_mode->clock, crtc 588 drivers/gpu/drm/gma500/oaktrail_crtc.c static int oaktrail_pipe_set_base(struct drm_crtc *crtc, crtc 591 drivers/gpu/drm/gma500/oaktrail_crtc.c struct drm_device *dev = crtc->dev; crtc 593 drivers/gpu/drm/gma500/oaktrail_crtc.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 594 drivers/gpu/drm/gma500/oaktrail_crtc.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 176 drivers/gpu/drm/gma500/oaktrail_hdmi.c static void oaktrail_hdmi_find_dpll(struct drm_crtc *crtc, int target, crtc 261 drivers/gpu/drm/gma500/oaktrail_hdmi.c int oaktrail_crtc_hdmi_mode_set(struct drm_crtc *crtc, crtc 267 drivers/gpu/drm/gma500/oaktrail_hdmi.c struct drm_device *dev = crtc->dev; crtc 306 drivers/gpu/drm/gma500/oaktrail_hdmi.c oaktrail_hdmi_find_dpll(crtc, adjusted_mode->clock, refclk, &clock); crtc 352 drivers/gpu/drm/gma500/oaktrail_hdmi.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 353 drivers/gpu/drm/gma500/oaktrail_hdmi.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); crtc 381 drivers/gpu/drm/gma500/oaktrail_hdmi.c void oaktrail_crtc_hdmi_dpms(struct drm_crtc *crtc, int mode) crtc 383 drivers/gpu/drm/gma500/oaktrail_hdmi.c struct drm_device *dev = crtc->dev; crtc 469 drivers/gpu/drm/gma500/oaktrail_hdmi.c gma_crtc_load_lut(crtc); crtc 88 drivers/gpu/drm/gma500/oaktrail_lvds.c struct drm_crtc *crtc = encoder->crtc; crtc 114 drivers/gpu/drm/gma500/oaktrail_lvds.c if (!connector->encoder || connector->encoder->crtc != crtc) crtc 171 drivers/gpu/drm/gma500/psb_device.c struct drm_crtc *crtc; crtc 187 drivers/gpu/drm/gma500/psb_device.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 188 drivers/gpu/drm/gma500/psb_device.c if (drm_helper_crtc_in_use(crtc)) crtc 189 drivers/gpu/drm/gma500/psb_device.c dev_priv->ops->save_crtc(crtc); crtc 209 drivers/gpu/drm/gma500/psb_device.c struct drm_crtc *crtc; crtc 227 drivers/gpu/drm/gma500/psb_device.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) crtc 228 drivers/gpu/drm/gma500/psb_device.c if (drm_helper_crtc_in_use(crtc)) crtc 229 drivers/gpu/drm/gma500/psb_device.c dev_priv->ops->restore_crtc(crtc); crtc 644 drivers/gpu/drm/gma500/psb_drv.h void (*save_crtc)(struct drm_crtc *crtc); crtc 645 drivers/gpu/drm/gma500/psb_drv.h void (*restore_crtc)(struct drm_crtc *crtc); crtc 648 drivers/gpu/drm/gma500/psb_drv.h void (*update_wm)(struct drm_device *dev, struct drm_crtc *crtc); crtc 54 drivers/gpu/drm/gma500/psb_intel_display.c static const struct gma_limit_t *psb_intel_limit(struct drm_crtc *crtc, crtc 59 drivers/gpu/drm/gma500/psb_intel_display.c if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) crtc 91 drivers/gpu/drm/gma500/psb_intel_display.c static int psb_intel_crtc_mode_set(struct drm_crtc *crtc, crtc 97 drivers/gpu/drm/gma500/psb_intel_display.c struct drm_device *dev = crtc->dev; crtc 99 drivers/gpu/drm/gma500/psb_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 100 drivers/gpu/drm/gma500/psb_intel_display.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 113 drivers/gpu/drm/gma500/psb_intel_display.c if (crtc->primary->fb == NULL) { crtc 114 drivers/gpu/drm/gma500/psb_intel_display.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); crtc 122 drivers/gpu/drm/gma500/psb_intel_display.c || connector->encoder->crtc != crtc) crtc 140 drivers/gpu/drm/gma500/psb_intel_display.c limit = gma_crtc->clock_funcs->limit(crtc, refclk); crtc 142 drivers/gpu/drm/gma500/psb_intel_display.c ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, crtc 289 drivers/gpu/drm/gma500/psb_intel_display.c crtc_funcs->mode_set_base(crtc, x, y, old_fb); crtc 298 drivers/gpu/drm/gma500/psb_intel_display.c struct drm_crtc *crtc) crtc 300 drivers/gpu/drm/gma500/psb_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 374 drivers/gpu/drm/gma500/psb_intel_display.c struct drm_crtc *crtc) crtc 376 drivers/gpu/drm/gma500/psb_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 404 drivers/gpu/drm/gma500/psb_intel_display.c mode->clock = psb_intel_crtc_clock_get(dev, crtc); crtc 520 drivers/gpu/drm/gma500/psb_intel_display.c gma_crtc->mode_set.crtc = &gma_crtc->base; crtc 535 drivers/gpu/drm/gma500/psb_intel_display.c struct drm_crtc *crtc = NULL; crtc 537 drivers/gpu/drm/gma500/psb_intel_display.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 538 drivers/gpu/drm/gma500/psb_intel_display.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 542 drivers/gpu/drm/gma500/psb_intel_display.c return crtc; crtc 232 drivers/gpu/drm/gma500/psb_intel_drv.h struct drm_crtc *crtc); crtc 263 drivers/gpu/drm/gma500/psb_intel_drv.h extern void cdv_intel_dp_set_m_n(struct drm_crtc *crtc, crtc 368 drivers/gpu/drm/gma500/psb_intel_lvds.c struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc); crtc 389 drivers/gpu/drm/gma500/psb_intel_lvds.c && tmp_encoder->crtc == encoder->crtc) { crtc 544 drivers/gpu/drm/gma500/psb_intel_lvds.c struct gma_crtc *crtc = to_gma_crtc(encoder->crtc); crtc 547 drivers/gpu/drm/gma500/psb_intel_lvds.c if (!crtc) crtc 574 drivers/gpu/drm/gma500/psb_intel_lvds.c if (crtc->saved_mode.hdisplay != 0 && crtc 575 drivers/gpu/drm/gma500/psb_intel_lvds.c crtc->saved_mode.vdisplay != 0) { crtc 576 drivers/gpu/drm/gma500/psb_intel_lvds.c if (!drm_crtc_helper_set_mode(encoder->crtc, crtc 577 drivers/gpu/drm/gma500/psb_intel_lvds.c &crtc->saved_mode, crtc 578 drivers/gpu/drm/gma500/psb_intel_lvds.c encoder->crtc->x, crtc 579 drivers/gpu/drm/gma500/psb_intel_lvds.c encoder->crtc->y, crtc 580 drivers/gpu/drm/gma500/psb_intel_lvds.c encoder->crtc->primary->fb)) crtc 652 drivers/gpu/drm/gma500/psb_intel_lvds.c struct drm_crtc *crtc; crtc 774 drivers/gpu/drm/gma500/psb_intel_lvds.c crtc = psb_intel_get_crtc_from_pipe(dev, pipe); crtc 776 drivers/gpu/drm/gma500/psb_intel_lvds.c if (crtc && (lvds & LVDS_PORT_EN)) { crtc 778 drivers/gpu/drm/gma500/psb_intel_lvds.c psb_intel_crtc_mode_get(dev, crtc); crtc 999 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct drm_crtc *crtc = encoder->crtc; crtc 1000 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct gma_crtc *gma_crtc = to_gma_crtc(crtc); crtc 1802 drivers/gpu/drm/gma500/psb_intel_sdvo.c if (psb_intel_sdvo->base.base.crtc) { crtc 1803 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc; crtc 1804 drivers/gpu/drm/gma500/psb_intel_sdvo.c drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc 1805 drivers/gpu/drm/gma500/psb_intel_sdvo.c crtc->y, crtc->primary->fb); crtc 1826 drivers/gpu/drm/gma500/psb_intel_sdvo.c struct drm_crtc *crtc = encoder->crtc; crtc 1833 drivers/gpu/drm/gma500/psb_intel_sdvo.c drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y, crtc 61 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct drm_crtc *crtc = state->crtc; crtc 66 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c if (!crtc || !fb) crtc 69 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c crtc_state = drm_atomic_get_crtc_state(state->state, crtc); crtc 195 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc, crtc 199 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct hibmc_drm_private *priv = crtc->dev->dev_private; crtc 210 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c drm_crtc_vblank_on(crtc); crtc 213 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static void hibmc_crtc_atomic_disable(struct drm_crtc *crtc, crtc 217 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct hibmc_drm_private *priv = crtc->dev->dev_private; crtc 219 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c drm_crtc_vblank_off(crtc); crtc 361 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static void hibmc_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 364 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct drm_display_mode *mode = &crtc->state->mode; crtc 365 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct drm_device *dev = crtc->dev; crtc 395 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static void hibmc_crtc_atomic_begin(struct drm_crtc *crtc, crtc 399 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct drm_device *dev = crtc->dev; crtc 415 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static void hibmc_crtc_atomic_flush(struct drm_crtc *crtc, crtc 421 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 422 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c if (crtc->state->event) crtc 423 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 424 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c crtc->state->event = NULL; crtc 425 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 428 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static int hibmc_crtc_enable_vblank(struct drm_crtc *crtc) crtc 430 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct hibmc_drm_private *priv = crtc->dev->dev_private; crtc 438 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c static void hibmc_crtc_disable_vblank(struct drm_crtc *crtc) crtc 440 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct hibmc_drm_private *priv = crtc->dev->dev_private; crtc 468 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c struct drm_crtc *crtc; crtc 478 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c crtc = devm_kzalloc(dev->dev, sizeof(*crtc), GFP_KERNEL); crtc 479 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c if (!crtc) { crtc 484 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c ret = drm_crtc_init_with_planes(dev, crtc, plane, crtc 491 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c ret = drm_mode_crtc_set_gamma_size(crtc, 256); crtc 496 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c drm_crtc_helper_add(crtc, &hibmc_crtc_helper_funcs); crtc 644 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct drm_crtc *crtc = NULL; crtc 654 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c drm_for_each_crtc(crtc, encoder->dev) { crtc 661 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c crtc_funcs = crtc->helper_private; crtc 663 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c if (!crtc_funcs->mode_fixup(crtc, mode, &adj_mode)) crtc 52 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_crtc *crtc; crtc 140 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static bool ade_crtc_mode_fixup(struct drm_crtc *crtc, crtc 144 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); crtc 275 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static int ade_crtc_enable_vblank(struct drm_crtc *crtc) crtc 277 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); crtc 290 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static void ade_crtc_disable_vblank(struct drm_crtc *crtc) crtc 292 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); crtc 308 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_crtc *crtc = ctx->crtc; crtc 319 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c drm_crtc_handle_vblank(crtc); crtc 438 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static void ade_crtc_atomic_enable(struct drm_crtc *crtc, crtc 441 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); crtc 457 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c drm_crtc_vblank_on(crtc); crtc 461 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static void ade_crtc_atomic_disable(struct drm_crtc *crtc, crtc 464 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); crtc 470 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c drm_crtc_vblank_off(crtc); crtc 475 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static void ade_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 477 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); crtc 479 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_display_mode *mode = &crtc->state->mode; crtc 480 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_display_mode *adj_mode = &crtc->state->adjusted_mode; crtc 487 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static void ade_crtc_atomic_begin(struct drm_crtc *crtc, crtc 490 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); crtc 492 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_display_mode *mode = &crtc->state->mode; crtc 493 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_display_mode *adj_mode = &crtc->state->adjusted_mode; crtc 500 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c static void ade_crtc_atomic_flush(struct drm_crtc *crtc, crtc 504 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct kirin_crtc *kcrtc = to_kirin_crtc(crtc); crtc 506 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 517 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c crtc->state->event = NULL; crtc 519 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c spin_lock_irq(&crtc->dev->event_lock); crtc 520 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c if (drm_crtc_vblank_get(crtc) == 0) crtc 521 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c drm_crtc_arm_vblank_event(crtc, event); crtc 523 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c drm_crtc_send_vblank_event(crtc, event); crtc 524 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c spin_unlock_irq(&crtc->dev->event_lock); crtc 764 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_crtc *crtc = state->crtc; crtc 776 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c if (!crtc || !fb) crtc 783 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c crtc_state = drm_atomic_get_crtc_state(state->state, crtc); crtc 841 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c struct drm_crtc *crtc) crtc 903 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c ctx->crtc = crtc; crtc 35 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c struct kirin_crtc crtc; crtc 40 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c static int kirin_drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, crtc 56 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c crtc->port = port; crtc 58 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, crtc 65 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c drm_crtc_helper_add(crtc, driver_data->crtc_helper_funcs); crtc 120 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c ctx = driver_data->alloc_hw_ctx(pdev, &kirin_priv->crtc.base); crtc 147 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c ret = kirin_drm_crtc_init(dev, &kirin_priv->crtc.base, crtc 151 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c kirin_priv->crtc.hw_ctx = ctx; crtc 10 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h #define to_kirin_crtc(crtc) \ crtc 11 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h container_of(crtc, struct kirin_crtc, base) crtc 52 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h struct drm_crtc *crtc); crtc 290 drivers/gpu/drm/i2c/ch7006_drv.c struct drm_crtc *crtc = encoder->crtc; crtc 362 drivers/gpu/drm/i2c/ch7006_drv.c if (crtc) crtc 363 drivers/gpu/drm/i2c/ch7006_drv.c drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc 364 drivers/gpu/drm/i2c/ch7006_drv.c crtc->x, crtc->y, crtc 365 drivers/gpu/drm/i2c/ch7006_drv.c crtc->primary->fb); crtc 222 drivers/gpu/drm/i2c/sil164_drv.c bool duallink = (on && encoder->crtc->mode.clock > 165000); crtc 628 drivers/gpu/drm/i915/display/icl_dsi.c struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); crtc 1245 drivers/gpu/drm/i915/display/icl_dsi.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 1258 drivers/gpu/drm/i915/display/icl_dsi.c pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc); crtc 1268 drivers/gpu/drm/i915/display/icl_dsi.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 1276 drivers/gpu/drm/i915/display/icl_dsi.c intel_pch_panel_fitting(crtc, pipe_config, conn_state->scaling_mode); crtc 133 drivers/gpu/drm/i915/display/intel_atomic.c if (!new_state->crtc) crtc 136 drivers/gpu/drm/i915/display/intel_atomic.c crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc); crtc 187 drivers/gpu/drm/i915/display/intel_atomic.c intel_crtc_duplicate_state(struct drm_crtc *crtc) crtc 191 drivers/gpu/drm/i915/display/intel_atomic.c crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL); crtc 195 drivers/gpu/drm/i915/display/intel_atomic.c __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base); crtc 221 drivers/gpu/drm/i915/display/intel_atomic.c intel_crtc_destroy_state(struct drm_crtc *crtc, crtc 224 drivers/gpu/drm/i915/display/intel_atomic.c drm_atomic_helper_crtc_destroy_state(crtc, state); crtc 433 drivers/gpu/drm/i915/display/intel_atomic.c struct intel_crtc *crtc) crtc 436 drivers/gpu/drm/i915/display/intel_atomic.c crtc_state = drm_atomic_get_crtc_state(state, &crtc->base); crtc 35 drivers/gpu/drm/i915/display/intel_atomic.h struct drm_crtc_state *intel_crtc_duplicate_state(struct drm_crtc *crtc); crtc 36 drivers/gpu/drm/i915/display/intel_atomic.h void intel_crtc_destroy_state(struct drm_crtc *crtc, crtc 43 drivers/gpu/drm/i915/display/intel_atomic.h struct intel_crtc *crtc); crtc 155 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (!new_plane_state->base.crtc && !old_plane_state->base.crtc) crtc 188 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (new_plane_state->base.crtc) crtc 189 drivers/gpu/drm/i915/display/intel_atomic_plane.c return to_intel_crtc(new_plane_state->base.crtc); crtc 191 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (old_plane_state->base.crtc) crtc 192 drivers/gpu/drm/i915/display/intel_atomic_plane.c return to_intel_crtc(old_plane_state->base.crtc); crtc 207 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc *crtc = crtc 213 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (!crtc) crtc 216 drivers/gpu/drm/i915/display/intel_atomic_plane.c old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); crtc 217 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); crtc 227 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc *crtc, crtc 233 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_atomic_get_new_crtc_state(state, crtc); crtc 244 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (crtc->pipe != plane->pipe || crtc 273 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 275 drivers/gpu/drm/i915/display/intel_atomic_plane.c trace_intel_update_plane(&plane->base, crtc); crtc 283 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 285 drivers/gpu/drm/i915/display/intel_atomic_plane.c trace_intel_update_plane(&plane->base, crtc); crtc 292 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 294 drivers/gpu/drm/i915/display/intel_atomic_plane.c trace_intel_disable_plane(&plane->base, crtc); crtc 299 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc *crtc) crtc 302 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_atomic_get_old_crtc_state(state, crtc); crtc 304 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_atomic_get_new_crtc_state(state, crtc); crtc 315 drivers/gpu/drm/i915/display/intel_atomic_plane.c while ((plane = skl_next_plane_to_commit(state, crtc, crtc 347 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc *crtc) crtc 350 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_atomic_get_new_crtc_state(state, crtc); crtc 357 drivers/gpu/drm/i915/display/intel_atomic_plane.c if (crtc->pipe != plane->pipe || crtc 37 drivers/gpu/drm/i915/display/intel_atomic_plane.h struct intel_crtc *crtc); crtc 39 drivers/gpu/drm/i915/display/intel_atomic_plane.h struct intel_crtc *crtc); crtc 557 drivers/gpu/drm/i915/display/intel_audio.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 558 drivers/gpu/drm/i915/display/intel_audio.c enum pipe pipe = crtc->pipe; crtc 603 drivers/gpu/drm/i915/display/intel_audio.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 605 drivers/gpu/drm/i915/display/intel_audio.c enum pipe pipe = crtc->pipe; crtc 692 drivers/gpu/drm/i915/display/intel_audio.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 697 drivers/gpu/drm/i915/display/intel_audio.c enum pipe pipe = crtc->pipe; crtc 753 drivers/gpu/drm/i915/display/intel_audio.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 755 drivers/gpu/drm/i915/display/intel_audio.c enum pipe pipe = crtc->pipe; crtc 972 drivers/gpu/drm/i915/display/intel_audio.c struct intel_crtc *crtc; crtc 984 drivers/gpu/drm/i915/display/intel_audio.c if (!encoder || !encoder->base.crtc) { crtc 990 drivers/gpu/drm/i915/display/intel_audio.c crtc = to_intel_crtc(encoder->base.crtc); crtc 995 drivers/gpu/drm/i915/display/intel_audio.c hsw_audio_config_update(encoder, crtc->config); crtc 267 drivers/gpu/drm/i915/display/intel_bw.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 271 drivers/gpu/drm/i915/display/intel_bw.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 288 drivers/gpu/drm/i915/display/intel_bw.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 290 drivers/gpu/drm/i915/display/intel_bw.c bw_state->data_rate[crtc->pipe] = crtc 292 drivers/gpu/drm/i915/display/intel_bw.c bw_state->num_active_planes[crtc->pipe] = crtc 296 drivers/gpu/drm/i915/display/intel_bw.c pipe_name(crtc->pipe), crtc 297 drivers/gpu/drm/i915/display/intel_bw.c bw_state->data_rate[crtc->pipe], crtc 298 drivers/gpu/drm/i915/display/intel_bw.c bw_state->num_active_planes[crtc->pipe]); crtc 346 drivers/gpu/drm/i915/display/intel_bw.c struct intel_crtc *crtc; crtc 353 drivers/gpu/drm/i915/display/intel_bw.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, crtc 376 drivers/gpu/drm/i915/display/intel_bw.c bw_state->data_rate[crtc->pipe] = new_data_rate; crtc 377 drivers/gpu/drm/i915/display/intel_bw.c bw_state->num_active_planes[crtc->pipe] = new_active_planes; crtc 380 drivers/gpu/drm/i915/display/intel_bw.c pipe_name(crtc->pipe), crtc 381 drivers/gpu/drm/i915/display/intel_bw.c bw_state->data_rate[crtc->pipe], crtc 382 drivers/gpu/drm/i915/display/intel_bw.c bw_state->num_active_planes[crtc->pipe]); crtc 2220 drivers/gpu/drm/i915/display/intel_cdclk.c to_i915(crtc_state->base.crtc->dev); crtc 2297 drivers/gpu/drm/i915/display/intel_cdclk.c struct intel_crtc *crtc; crtc 2305 drivers/gpu/drm/i915/display/intel_cdclk.c for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { crtc 2332 drivers/gpu/drm/i915/display/intel_cdclk.c struct intel_crtc *crtc; crtc 2341 drivers/gpu/drm/i915/display/intel_cdclk.c for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { crtc 2419 drivers/gpu/drm/i915/display/intel_cdclk.c struct intel_crtc *crtc; crtc 2427 drivers/gpu/drm/i915/display/intel_cdclk.c for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { crtc 136 drivers/gpu/drm/i915/display/intel_color.c static void ilk_update_pipe_csc(struct intel_crtc *crtc, crtc 141 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 142 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 164 drivers/gpu/drm/i915/display/intel_color.c static void icl_update_output_csc(struct intel_crtc *crtc, crtc 169 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 170 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 192 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 257 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 258 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 265 drivers/gpu/drm/i915/display/intel_color.c ilk_update_pipe_csc(crtc, ilk_csc_off_zero, coeff, crtc 270 drivers/gpu/drm/i915/display/intel_color.c ilk_update_pipe_csc(crtc, ilk_csc_off_zero, crtc 274 drivers/gpu/drm/i915/display/intel_color.c ilk_update_pipe_csc(crtc, ilk_csc_off_zero, crtc 286 drivers/gpu/drm/i915/display/intel_color.c ilk_update_pipe_csc(crtc, ilk_csc_off_zero, crtc 291 drivers/gpu/drm/i915/display/intel_color.c I915_WRITE(PIPE_CSC_MODE(crtc->pipe), crtc_state->csc_mode); crtc 296 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 297 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 303 drivers/gpu/drm/i915/display/intel_color.c ilk_update_pipe_csc(crtc, ilk_csc_off_zero, crtc 308 drivers/gpu/drm/i915/display/intel_color.c icl_update_output_csc(crtc, ilk_csc_off_zero, crtc 312 drivers/gpu/drm/i915/display/intel_color.c icl_update_output_csc(crtc, ilk_csc_off_zero, crtc 317 drivers/gpu/drm/i915/display/intel_color.c I915_WRITE(PIPE_CSC_MODE(crtc->pipe), crtc_state->csc_mode); crtc 325 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 326 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 327 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 391 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 392 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 393 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 427 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 428 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 429 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 440 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 441 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 442 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 455 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 456 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 458 drivers/gpu/drm/i915/display/intel_color.c I915_WRITE(GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode); crtc 465 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 466 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 467 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 481 drivers/gpu/drm/i915/display/intel_color.c I915_WRITE(GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode); crtc 489 drivers/gpu/drm/i915/display/intel_color.c static void i965_load_lut_10p6(struct intel_crtc *crtc, crtc 492 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 495 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 511 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 517 drivers/gpu/drm/i915/display/intel_color.c i965_load_lut_10p6(crtc, gamma_lut); crtc 520 drivers/gpu/drm/i915/display/intel_color.c static void ilk_load_lut_10(struct intel_crtc *crtc, crtc 523 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 526 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 534 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 540 drivers/gpu/drm/i915/display/intel_color.c ilk_load_lut_10(crtc, gamma_lut); crtc 556 drivers/gpu/drm/i915/display/intel_color.c static void ivb_load_lut_10(struct intel_crtc *crtc, crtc 560 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 564 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 583 drivers/gpu/drm/i915/display/intel_color.c static void bdw_load_lut_10(struct intel_crtc *crtc, crtc 587 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 591 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 611 drivers/gpu/drm/i915/display/intel_color.c static void ivb_load_lut_ext_max(struct intel_crtc *crtc) crtc 613 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 614 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 635 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 642 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_10(crtc, degamma_lut, PAL_PREC_SPLIT_MODE | crtc 644 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_ext_max(crtc); crtc 645 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_10(crtc, gamma_lut, PAL_PREC_SPLIT_MODE | crtc 650 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_10(crtc, blob, crtc 652 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_ext_max(crtc); crtc 658 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 665 drivers/gpu/drm/i915/display/intel_color.c bdw_load_lut_10(crtc, degamma_lut, PAL_PREC_SPLIT_MODE | crtc 667 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_ext_max(crtc); crtc 668 drivers/gpu/drm/i915/display/intel_color.c bdw_load_lut_10(crtc, gamma_lut, PAL_PREC_SPLIT_MODE | crtc 673 drivers/gpu/drm/i915/display/intel_color.c bdw_load_lut_10(crtc, blob, crtc 675 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_ext_max(crtc); crtc 681 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 682 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 683 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 720 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 721 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 722 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 748 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 766 drivers/gpu/drm/i915/display/intel_color.c bdw_load_lut_10(crtc, gamma_lut, PAL_PREC_INDEX_VALUE(0)); crtc 767 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_ext_max(crtc); crtc 789 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 790 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 791 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 802 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 803 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 806 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 831 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 832 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 836 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 878 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_ext_max(crtc); crtc 884 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 900 drivers/gpu/drm/i915/display/intel_color.c bdw_load_lut_10(crtc, gamma_lut, PAL_PREC_INDEX_VALUE(0)); crtc 901 drivers/gpu/drm/i915/display/intel_color.c ivb_load_lut_ext_max(crtc); crtc 916 drivers/gpu/drm/i915/display/intel_color.c static void chv_load_cgm_degamma(struct intel_crtc *crtc, crtc 919 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 922 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 943 drivers/gpu/drm/i915/display/intel_color.c static void chv_load_cgm_gamma(struct intel_crtc *crtc, crtc 946 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 949 drivers/gpu/drm/i915/display/intel_color.c enum pipe pipe = crtc->pipe; crtc 961 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 973 drivers/gpu/drm/i915/display/intel_color.c chv_load_cgm_degamma(crtc, degamma_lut); crtc 976 drivers/gpu/drm/i915/display/intel_color.c chv_load_cgm_gamma(crtc, gamma_lut); crtc 981 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 988 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 995 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 999 drivers/gpu/drm/i915/display/intel_color.c intel_atomic_get_old_crtc_state(state, crtc); crtc 1007 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 1011 drivers/gpu/drm/i915/display/intel_color.c intel_atomic_get_old_crtc_state(state, crtc); crtc 1026 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 1030 drivers/gpu/drm/i915/display/intel_color.c intel_atomic_get_old_crtc_state(state, crtc); crtc 1044 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1051 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1075 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 1076 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1080 drivers/gpu/drm/i915/display/intel_color.c intel_atomic_get_old_crtc_state(state, crtc); crtc 1091 drivers/gpu/drm/i915/display/intel_color.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { crtc 1126 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1435 drivers/gpu/drm/i915/display/intel_color.c void intel_color_init(struct intel_crtc *crtc) crtc 1437 drivers/gpu/drm/i915/display/intel_color.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1440 drivers/gpu/drm/i915/display/intel_color.c drm_mode_crtc_set_gamma_size(&crtc->base, 256); crtc 1485 drivers/gpu/drm/i915/display/intel_color.c drm_crtc_enable_color_mgmt(&crtc->base, crtc 12 drivers/gpu/drm/i915/display/intel_color.h void intel_color_init(struct intel_crtc *crtc); crtc 167 drivers/gpu/drm/i915/display/intel_connector.c if (!connector->base.state->crtc) crtc 170 drivers/gpu/drm/i915/display/intel_connector.c return to_intel_crtc(connector->base.state->crtc)->pipe; crtc 164 drivers/gpu/drm/i915/display/intel_crt.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 182 drivers/gpu/drm/i915/display/intel_crt.c adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe); crtc 184 drivers/gpu/drm/i915/display/intel_crt.c adpa |= ADPA_PIPE_SEL(crtc->pipe); crtc 187 drivers/gpu/drm/i915/display/intel_crt.c I915_WRITE(BCLRPAT(crtc->pipe), 0); crtc 274 drivers/gpu/drm/i915/display/intel_crt.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 275 drivers/gpu/drm/i915/display/intel_crt.c enum pipe pipe = crtc->pipe; crtc 281 drivers/gpu/drm/i915/display/intel_crt.c dev_priv->display.fdi_link_train(crtc, crtc_state); crtc 291 drivers/gpu/drm/i915/display/intel_crt.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 292 drivers/gpu/drm/i915/display/intel_crt.c enum pipe pipe = crtc->pipe; crtc 853 drivers/gpu/drm/i915/display/intel_crt.c to_intel_crtc(connector->state->crtc)->pipe); crtc 1065 drivers/gpu/drm/i915/display/intel_ddi.c void hsw_fdi_link_train(struct intel_crtc *crtc, crtc 1068 drivers/gpu/drm/i915/display/intel_ddi.c struct drm_device *dev = crtc->base.dev; crtc 1073 drivers/gpu/drm/i915/display/intel_ddi.c for_each_encoder_on_crtc(dev, &crtc->base, encoder) { crtc 1209 drivers/gpu/drm/i915/display/intel_ddi.c intel_ddi_get_crtc_encoder(struct intel_crtc *crtc) crtc 1211 drivers/gpu/drm/i915/display/intel_ddi.c struct drm_device *dev = crtc->base.dev; crtc 1215 drivers/gpu/drm/i915/display/intel_ddi.c for_each_encoder_on_crtc(dev, &crtc->base, encoder) { crtc 1222 drivers/gpu/drm/i915/display/intel_ddi.c pipe_name(crtc->pipe)); crtc 1697 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1698 drivers/gpu/drm/i915/display/intel_ddi.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1751 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1752 drivers/gpu/drm/i915/display/intel_ddi.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1766 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1767 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_encoder *encoder = intel_ddi_get_crtc_encoder(crtc); crtc 1768 drivers/gpu/drm/i915/display/intel_ddi.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1769 drivers/gpu/drm/i915/display/intel_ddi.c enum pipe pipe = crtc->pipe; crtc 1853 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1854 drivers/gpu/drm/i915/display/intel_ddi.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 2152 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 2153 drivers/gpu/drm/i915/display/intel_ddi.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 2154 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_encoder *encoder = intel_ddi_get_crtc_encoder(crtc); crtc 2170 drivers/gpu/drm/i915/display/intel_ddi.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 2855 drivers/gpu/drm/i915/display/intel_ddi.c if (!encoder->base.crtc && intel_encoder_is_dp(encoder)) { crtc 2869 drivers/gpu/drm/i915/display/intel_ddi.c ddi_clk_needed = encoder->base.crtc; crtc 3280 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 3281 drivers/gpu/drm/i915/display/intel_ddi.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 3282 drivers/gpu/drm/i915/display/intel_ddi.c enum pipe pipe = crtc->pipe; crtc 3692 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc) crtc 3695 drivers/gpu/drm/i915/display/intel_ddi.c crtc ? intel_atomic_get_new_crtc_state(state, crtc) : NULL; crtc 3698 drivers/gpu/drm/i915/display/intel_ddi.c WARN_ON(crtc && crtc->active); crtc 3702 drivers/gpu/drm/i915/display/intel_ddi.c intel_update_active_dpll(state, crtc, encoder); crtc 3708 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc) crtc 3831 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); crtc 3978 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 3993 drivers/gpu/drm/i915/display/intel_ddi.c if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A && crtc 4045 drivers/gpu/drm/i915/display/intel_ddi.c static int modeset_pipe(struct drm_crtc *crtc, crtc 4052 drivers/gpu/drm/i915/display/intel_ddi.c state = drm_atomic_state_alloc(crtc->dev); crtc 4058 drivers/gpu/drm/i915/display/intel_ddi.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 4083 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_crtc *crtc; crtc 4097 drivers/gpu/drm/i915/display/intel_ddi.c crtc = to_intel_crtc(conn_state->crtc); crtc 4098 drivers/gpu/drm/i915/display/intel_ddi.c if (!crtc) crtc 4101 drivers/gpu/drm/i915/display/intel_ddi.c ret = drm_modeset_lock(&crtc->base.mutex, ctx); crtc 4105 drivers/gpu/drm/i915/display/intel_ddi.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 4141 drivers/gpu/drm/i915/display/intel_ddi.c return modeset_pipe(&crtc->base, ctx); crtc 25 drivers/gpu/drm/i915/display/intel_ddi.h void hsw_fdi_link_train(struct intel_crtc *crtc, crtc 117 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_crtc_clock_get(struct intel_crtc *crtc, crtc 119 drivers/gpu/drm/i915/display/intel_display.c static void ironlake_pch_clock_get(struct intel_crtc *crtc, crtc 134 drivers/gpu/drm/i915/display/intel_display.c static void vlv_prepare_pll(struct intel_crtc *crtc, crtc 136 drivers/gpu/drm/i915/display/intel_display.c static void chv_prepare_pll(struct intel_crtc *crtc, crtc 140 drivers/gpu/drm/i915/display/intel_display.c static void intel_crtc_init_scalers(struct intel_crtc *crtc, crtc 147 drivers/gpu/drm/i915/display/intel_display.c static void intel_pre_disable_primary_noatomic(struct drm_crtc *crtc); crtc 635 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 671 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc_state->base.crtc->dev; crtc 729 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc_state->base.crtc->dev; crtc 785 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc_state->base.crtc->dev; crtc 879 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 880 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 939 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 940 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 1002 drivers/gpu/drm/i915/display/intel_display.c bool intel_crtc_active(struct intel_crtc *crtc) crtc 1017 drivers/gpu/drm/i915/display/intel_display.c return crtc->active && crtc->base.primary->state->fb && crtc 1018 drivers/gpu/drm/i915/display/intel_display.c crtc->config->base.adjusted_mode.crtc_clock; crtc 1024 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 1026 drivers/gpu/drm/i915/display/intel_display.c return crtc->config->cpu_transcoder; crtc 1048 drivers/gpu/drm/i915/display/intel_display.c static void wait_for_pipe_scanline_moving(struct intel_crtc *crtc, bool state) crtc 1050 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1051 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 1059 drivers/gpu/drm/i915/display/intel_display.c static void intel_wait_for_pipe_scanline_stopped(struct intel_crtc *crtc) crtc 1061 drivers/gpu/drm/i915/display/intel_display.c wait_for_pipe_scanline_moving(crtc, false); crtc 1064 drivers/gpu/drm/i915/display/intel_display.c static void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc) crtc 1066 drivers/gpu/drm/i915/display/intel_display.c wait_for_pipe_scanline_moving(crtc, true); crtc 1072 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 1073 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1084 drivers/gpu/drm/i915/display/intel_display.c intel_wait_for_pipe_scanline_stopped(crtc); crtc 1286 drivers/gpu/drm/i915/display/intel_display.c static void assert_planes_disabled(struct intel_crtc *crtc) crtc 1288 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1291 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) crtc 1295 drivers/gpu/drm/i915/display/intel_display.c static void assert_vblank_disabled(struct drm_crtc *crtc) crtc 1297 drivers/gpu/drm/i915/display/intel_display.c if (I915_STATE_WARN_ON(drm_crtc_vblank_get(crtc) == 0)) crtc 1298 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_vblank_put(crtc); crtc 1375 drivers/gpu/drm/i915/display/intel_display.c static void _vlv_enable_pll(struct intel_crtc *crtc, crtc 1378 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1379 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 1389 drivers/gpu/drm/i915/display/intel_display.c static void vlv_enable_pll(struct intel_crtc *crtc, crtc 1392 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1393 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 1401 drivers/gpu/drm/i915/display/intel_display.c _vlv_enable_pll(crtc, pipe_config); crtc 1408 drivers/gpu/drm/i915/display/intel_display.c static void _chv_enable_pll(struct intel_crtc *crtc, crtc 1411 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1412 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 1438 drivers/gpu/drm/i915/display/intel_display.c static void chv_enable_pll(struct intel_crtc *crtc, crtc 1441 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1442 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 1450 drivers/gpu/drm/i915/display/intel_display.c _chv_enable_pll(crtc, pipe_config); crtc 1483 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_enable_pll(struct intel_crtc *crtc, crtc 1486 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1487 drivers/gpu/drm/i915/display/intel_display.c i915_reg_t reg = DPLL(crtc->pipe); crtc 1491 drivers/gpu/drm/i915/display/intel_display.c assert_pipe_disabled(dev_priv, crtc->pipe); crtc 1495 drivers/gpu/drm/i915/display/intel_display.c assert_panel_unlocked(dev_priv, crtc->pipe); crtc 1510 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(DPLL_MD(crtc->pipe), crtc 1531 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1532 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1533 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 1622 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1623 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1624 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 1754 drivers/gpu/drm/i915/display/intel_display.c enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc) crtc 1756 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1761 drivers/gpu/drm/i915/display/intel_display.c return crtc->pipe; crtc 1766 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1786 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1788 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_set_max_vblank_count(&crtc->base, crtc 1790 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_vblank_on(&crtc->base); crtc 1795 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 1796 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1798 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 1804 drivers/gpu/drm/i915/display/intel_display.c assert_planes_disabled(crtc); crtc 1820 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_pch_transcoder(crtc)); crtc 1827 drivers/gpu/drm/i915/display/intel_display.c trace_intel_pipe_enable(crtc); crtc 1848 drivers/gpu/drm/i915/display/intel_display.c intel_wait_for_pipe_scanline_moving(crtc); crtc 1853 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 1854 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1856 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 1866 drivers/gpu/drm/i915/display/intel_display.c assert_planes_disabled(crtc); crtc 1868 drivers/gpu/drm/i915/display/intel_display.c trace_intel_pipe_disable(crtc); crtc 2499 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 2506 drivers/gpu/drm/i915/display/intel_display.c crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A); crtc 2507 drivers/gpu/drm/i915/display/intel_display.c if (!crtc) crtc 2510 drivers/gpu/drm/i915/display/intel_display.c plane = to_intel_plane(crtc->base.primary); crtc 3034 drivers/gpu/drm/i915/display/intel_display.c intel_alloc_initial_plane_obj(struct intel_crtc *crtc, crtc 3037 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 3127 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 3142 drivers/gpu/drm/i915/display/intel_display.c static void intel_plane_disable_noatomic(struct intel_crtc *crtc, crtc 3146 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc_state(crtc->base.state); crtc 3152 drivers/gpu/drm/i915/display/intel_display.c crtc->base.base.id, crtc->base.name); crtc 3159 drivers/gpu/drm/i915/display/intel_display.c intel_pre_disable_primary_noatomic(&crtc->base); crtc 3271 drivers/gpu/drm/i915/display/intel_display.c plane_state->crtc = &intel_crtc->base; crtc 3597 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 3598 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 3608 drivers/gpu/drm/i915/display/intel_display.c dspcntr |= DISPPLANE_SEL_PIPE(crtc->pipe); crtc 3927 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 4122 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 4178 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 4226 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc; crtc 4240 drivers/gpu/drm/i915/display/intel_display.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) { crtc 4373 drivers/gpu/drm/i915/display/intel_display.c static void icl_set_pipe_chicken(struct intel_crtc *crtc) crtc 4375 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 4376 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 4400 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 4401 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 4404 drivers/gpu/drm/i915/display/intel_display.c crtc->base.mode = new_crtc_state->base.mode; crtc 4415 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PIPESRC(crtc->pipe), crtc 4433 drivers/gpu/drm/i915/display/intel_display.c icl_set_pipe_chicken(crtc); crtc 4436 drivers/gpu/drm/i915/display/intel_display.c static void intel_fdi_normal_train(struct intel_crtc *crtc) crtc 4438 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 4440 drivers/gpu/drm/i915/display/intel_display.c int pipe = crtc->pipe; crtc 4478 drivers/gpu/drm/i915/display/intel_display.c static void ironlake_fdi_link_train(struct intel_crtc *crtc, crtc 4481 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 4483 drivers/gpu/drm/i915/display/intel_display.c int pipe = crtc->pipe; crtc 4579 drivers/gpu/drm/i915/display/intel_display.c static void gen6_fdi_link_train(struct intel_crtc *crtc, crtc 4582 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 4584 drivers/gpu/drm/i915/display/intel_display.c int pipe = crtc->pipe; crtc 4712 drivers/gpu/drm/i915/display/intel_display.c static void ivb_manual_fdi_link_train(struct intel_crtc *crtc, crtc 4715 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 4717 drivers/gpu/drm/i915/display/intel_display.c int pipe = crtc->pipe; crtc 4833 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 4898 drivers/gpu/drm/i915/display/intel_display.c static void ironlake_fdi_disable(struct drm_crtc *crtc) crtc 4900 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->dev; crtc 4902 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 4953 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc; crtc 4956 drivers/gpu/drm/i915/display/intel_display.c drm_for_each_crtc(crtc, &dev_priv->drm) { crtc 4958 drivers/gpu/drm/i915/display/intel_display.c spin_lock(&crtc->commit_lock); crtc 4959 drivers/gpu/drm/i915/display/intel_display.c commit = list_first_entry_or_null(&crtc->commit_list, crtc 4963 drivers/gpu/drm/i915/display/intel_display.c spin_unlock(&crtc->commit_lock); crtc 4968 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_wait_one_vblank(crtc); crtc 4994 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 4995 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5110 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5111 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5153 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5154 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5156 drivers/gpu/drm/i915/display/intel_display.c switch (crtc->pipe) { crtc 5183 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5191 drivers/gpu/drm/i915/display/intel_display.c if (connector_state->crtc != &crtc->base) crtc 5199 drivers/gpu/drm/i915/display/intel_display.c num_encoders, pipe_name(crtc->pipe)); crtc 5215 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5216 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 5218 drivers/gpu/drm/i915/display/intel_display.c int pipe = crtc->pipe; crtc 5232 drivers/gpu/drm/i915/display/intel_display.c dev_priv->display.fdi_link_train(crtc, crtc_state); crtc 5263 drivers/gpu/drm/i915/display/intel_display.c intel_fdi_normal_train(crtc); crtc 5299 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5300 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5416 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc(crtc_state->base.crtc); crtc 5603 drivers/gpu/drm/i915/display/intel_display.c static void skylake_scaler_disable(struct intel_crtc *crtc) crtc 5607 drivers/gpu/drm/i915/display/intel_display.c for (i = 0; i < crtc->num_scalers; i++) crtc 5608 drivers/gpu/drm/i915/display/intel_display.c skl_detach_scaler(crtc, i); crtc 5613 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5614 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5615 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 5650 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5651 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5652 drivers/gpu/drm/i915/display/intel_display.c int pipe = crtc->pipe; crtc 5671 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5672 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 5707 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5708 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 5729 drivers/gpu/drm/i915/display/intel_display.c intel_wait_for_vblank(dev_priv, crtc->pipe); crtc 5759 drivers/gpu/drm/i915/display/intel_display.c intel_post_enable_primary(struct drm_crtc *crtc, crtc 5762 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->dev; crtc 5764 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 5784 drivers/gpu/drm/i915/display/intel_display.c intel_pre_disable_primary_noatomic(struct drm_crtc *crtc) crtc 5786 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->dev; crtc 5788 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 5798 drivers/gpu/drm/i915/display/intel_display.c hsw_disable_ips(to_intel_crtc_state(crtc->state)); crtc 5817 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 5818 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5844 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 5845 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5901 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 5902 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 5907 drivers/gpu/drm/i915/display/intel_display.c crtc); crtc 5908 drivers/gpu/drm/i915/display/intel_display.c struct drm_plane *primary = crtc->base.primary; crtc 5912 drivers/gpu/drm/i915/display/intel_display.c intel_frontbuffer_flip(to_i915(crtc->base.dev), pipe_config->fb_bits); crtc 5915 drivers/gpu/drm/i915/display/intel_display.c intel_update_watermarks(crtc); crtc 5924 drivers/gpu/drm/i915/display/intel_display.c intel_fbc_post_update(crtc); crtc 5929 drivers/gpu/drm/i915/display/intel_display.c intel_post_enable_primary(&crtc->base, pipe_config); crtc 5934 drivers/gpu/drm/i915/display/intel_display.c skl_wa_827(dev_priv, crtc->pipe, false); crtc 5938 drivers/gpu/drm/i915/display/intel_display.c icl_wa_scalerclkgating(dev_priv, crtc->pipe, false); crtc 5944 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 5945 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 5948 drivers/gpu/drm/i915/display/intel_display.c struct drm_plane *primary = crtc->base.primary; crtc 5963 drivers/gpu/drm/i915/display/intel_display.c intel_fbc_pre_update(crtc, pipe_config, new_primary_state); crtc 5970 drivers/gpu/drm/i915/display/intel_display.c intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, false); crtc 5976 drivers/gpu/drm/i915/display/intel_display.c skl_wa_827(dev_priv, crtc->pipe, true); crtc 5981 drivers/gpu/drm/i915/display/intel_display.c icl_wa_scalerclkgating(dev_priv, crtc->pipe, true); crtc 5994 drivers/gpu/drm/i915/display/intel_display.c intel_wait_for_vblank(dev_priv, crtc->pipe); crtc 6005 drivers/gpu/drm/i915/display/intel_display.c intel_wait_for_vblank(dev_priv, crtc->pipe); crtc 6032 drivers/gpu/drm/i915/display/intel_display.c intel_update_watermarks(crtc); crtc 6036 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc) crtc 6038 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 6040 drivers/gpu/drm/i915/display/intel_display.c intel_atomic_get_new_crtc_state(state, crtc); crtc 6047 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_dpms_overlay_disable(crtc); crtc 6050 drivers/gpu/drm/i915/display/intel_display.c if (crtc->pipe != plane->pipe || crtc 6091 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *old_crtc = old_conn_state->crtc ? crtc 6092 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc(old_conn_state->crtc) : NULL; crtc 6093 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *new_crtc = new_conn_state->crtc ? crtc 6094 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc(new_conn_state->crtc) : NULL; crtc 6111 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 6122 drivers/gpu/drm/i915/display/intel_display.c crtc = new_conn_state->crtc ? crtc 6123 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc(new_conn_state->crtc) : NULL; crtc 6124 drivers/gpu/drm/i915/display/intel_display.c encoder->update_prepare(state, encoder, crtc); crtc 6138 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 6149 drivers/gpu/drm/i915/display/intel_display.c crtc = new_conn_state->crtc ? crtc 6150 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc(new_conn_state->crtc) : NULL; crtc 6151 drivers/gpu/drm/i915/display/intel_display.c encoder->update_complete(state, encoder, crtc); crtc 6155 drivers/gpu/drm/i915/display/intel_display.c static void intel_encoders_pre_pll_enable(struct intel_crtc *crtc, crtc 6167 drivers/gpu/drm/i915/display/intel_display.c if (conn_state->crtc != &crtc->base) crtc 6175 drivers/gpu/drm/i915/display/intel_display.c static void intel_encoders_pre_enable(struct intel_crtc *crtc, crtc 6187 drivers/gpu/drm/i915/display/intel_display.c if (conn_state->crtc != &crtc->base) crtc 6195 drivers/gpu/drm/i915/display/intel_display.c static void intel_encoders_enable(struct intel_crtc *crtc, crtc 6207 drivers/gpu/drm/i915/display/intel_display.c if (conn_state->crtc != &crtc->base) crtc 6216 drivers/gpu/drm/i915/display/intel_display.c static void intel_encoders_disable(struct intel_crtc *crtc, crtc 6228 drivers/gpu/drm/i915/display/intel_display.c if (old_conn_state->crtc != &crtc->base) crtc 6237 drivers/gpu/drm/i915/display/intel_display.c static void intel_encoders_post_disable(struct intel_crtc *crtc, crtc 6249 drivers/gpu/drm/i915/display/intel_display.c if (old_conn_state->crtc != &crtc->base) crtc 6257 drivers/gpu/drm/i915/display/intel_display.c static void intel_encoders_post_pll_disable(struct intel_crtc *crtc, crtc 6269 drivers/gpu/drm/i915/display/intel_display.c if (old_conn_state->crtc != &crtc->base) crtc 6277 drivers/gpu/drm/i915/display/intel_display.c static void intel_encoders_update_pipe(struct intel_crtc *crtc, crtc 6289 drivers/gpu/drm/i915/display/intel_display.c if (conn_state->crtc != &crtc->base) crtc 6299 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 6300 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(crtc->base.primary); crtc 6308 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc = pipe_config->base.crtc; crtc 6309 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->dev; crtc 6311 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 6378 drivers/gpu/drm/i915/display/intel_display.c assert_vblank_disabled(crtc); crtc 6401 drivers/gpu/drm/i915/display/intel_display.c static bool hsw_crtc_supports_ips(struct intel_crtc *crtc) crtc 6403 drivers/gpu/drm/i915/display/intel_display.c return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A; crtc 6420 drivers/gpu/drm/i915/display/intel_display.c static void icl_pipe_mbus_enable(struct intel_crtc *crtc) crtc 6422 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 6423 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 6442 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc = pipe_config->base.crtc; crtc 6443 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 6444 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 6530 drivers/gpu/drm/i915/display/intel_display.c assert_vblank_disabled(crtc); crtc 6551 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 6552 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 6553 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 6567 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc = old_crtc_state->base.crtc; crtc 6568 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->dev; crtc 6570 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 6583 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_vblank_off(crtc); crtc 6584 drivers/gpu/drm/i915/display/intel_display.c assert_vblank_disabled(crtc); crtc 6591 drivers/gpu/drm/i915/display/intel_display.c ironlake_fdi_disable(crtc); crtc 6626 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc = old_crtc_state->base.crtc; crtc 6627 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 6628 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 6633 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_vblank_off(crtc); crtc 6634 drivers/gpu/drm/i915/display/intel_display.c assert_vblank_disabled(crtc); crtc 6660 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 6661 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 6671 drivers/gpu/drm/i915/display/intel_display.c assert_pipe_disabled(dev_priv, crtc->pipe); crtc 6678 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(BCLRPAT(crtc->pipe), 0); crtc 6790 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 6791 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 6793 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 6825 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 6826 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 6830 drivers/gpu/drm/i915/display/intel_display.c old_domains = crtc->enabled_power_domains; crtc 6831 drivers/gpu/drm/i915/display/intel_display.c crtc->enabled_power_domains = new_domains = crtc 6854 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc = pipe_config->base.crtc; crtc 6855 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->dev; crtc 6857 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 6902 drivers/gpu/drm/i915/display/intel_display.c assert_vblank_disabled(crtc); crtc 6910 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 6911 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 6913 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(FP0(crtc->pipe), crtc_state->dpll_hw_state.fp0); crtc 6914 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(FP1(crtc->pipe), crtc_state->dpll_hw_state.fp1); crtc 6920 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc = pipe_config->base.crtc; crtc 6921 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->dev; crtc 6923 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 6962 drivers/gpu/drm/i915/display/intel_display.c assert_vblank_disabled(crtc); crtc 6970 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 6971 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 6976 drivers/gpu/drm/i915/display/intel_display.c assert_pipe_disabled(dev_priv, crtc->pipe); crtc 6986 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc = old_crtc_state->base.crtc; crtc 6987 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->dev; crtc 6989 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 7001 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_vblank_off(crtc); crtc 7002 drivers/gpu/drm/i915/display/intel_display.c assert_vblank_disabled(crtc); crtc 7032 drivers/gpu/drm/i915/display/intel_display.c static void intel_crtc_disable_noatomic(struct drm_crtc *crtc, crtc 7036 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 7037 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 7058 drivers/gpu/drm/i915/display/intel_display.c state = drm_atomic_state_alloc(crtc->dev); crtc 7061 drivers/gpu/drm/i915/display/intel_display.c crtc->base.id, crtc->name); crtc 7069 drivers/gpu/drm/i915/display/intel_display.c ret = drm_atomic_add_affected_connectors(state, crtc); crtc 7078 drivers/gpu/drm/i915/display/intel_display.c crtc->base.id, crtc->name); crtc 7080 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(drm_atomic_set_mode_for_crtc(crtc->state, NULL) < 0); crtc 7081 drivers/gpu/drm/i915/display/intel_display.c crtc->state->active = false; crtc 7083 drivers/gpu/drm/i915/display/intel_display.c crtc->enabled = false; crtc 7084 drivers/gpu/drm/i915/display/intel_display.c crtc->state->connector_mask = 0; crtc 7085 drivers/gpu/drm/i915/display/intel_display.c crtc->state->encoder_mask = 0; crtc 7087 drivers/gpu/drm/i915/display/intel_display.c for_each_encoder_on_crtc(crtc->dev, crtc, encoder) crtc 7088 drivers/gpu/drm/i915/display/intel_display.c encoder->base.crtc = NULL; crtc 7092 drivers/gpu/drm/i915/display/intel_display.c intel_disable_shared_dpll(to_intel_crtc_state(crtc->state)); crtc 7163 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(conn_state->crtc != encoder->base.crtc, crtc 7304 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 7305 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 7308 drivers/gpu/drm/i915/display/intel_display.c if (!hsw_crtc_supports_ips(crtc)) crtc 7334 drivers/gpu/drm/i915/display/intel_display.c to_i915(crtc_state->base.crtc->dev); crtc 7362 drivers/gpu/drm/i915/display/intel_display.c static bool intel_crtc_supports_double_wide(const struct intel_crtc *crtc) crtc 7364 drivers/gpu/drm/i915/display/intel_display.c const struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 7368 drivers/gpu/drm/i915/display/intel_display.c (crtc->pipe == PIPE_A || IS_I915G(dev_priv)); crtc 7408 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 7419 drivers/gpu/drm/i915/display/intel_display.c static int intel_crtc_compute_config(struct intel_crtc *crtc, crtc 7422 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 7433 drivers/gpu/drm/i915/display/intel_display.c if (intel_crtc_supports_double_wide(crtc) && crtc 7488 drivers/gpu/drm/i915/display/intel_display.c return ironlake_fdi_compute_config(crtc, pipe_config); crtc 7563 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_update_pll_dividers(struct intel_crtc *crtc, crtc 7567 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 7622 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 7623 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 7624 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 7649 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 7650 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 7651 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 7704 drivers/gpu/drm/i915/display/intel_display.c static void vlv_compute_dpll(struct intel_crtc *crtc, crtc 7709 drivers/gpu/drm/i915/display/intel_display.c if (crtc->pipe != PIPE_A) crtc 7721 drivers/gpu/drm/i915/display/intel_display.c static void chv_compute_dpll(struct intel_crtc *crtc, crtc 7726 drivers/gpu/drm/i915/display/intel_display.c if (crtc->pipe != PIPE_A) crtc 7737 drivers/gpu/drm/i915/display/intel_display.c static void vlv_prepare_pll(struct intel_crtc *crtc, crtc 7740 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 7742 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 7837 drivers/gpu/drm/i915/display/intel_display.c static void chv_prepare_pll(struct intel_crtc *crtc, crtc 7840 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 7842 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 7955 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 7962 drivers/gpu/drm/i915/display/intel_display.c pipe_config->base.crtc = &crtc->base; crtc 7967 drivers/gpu/drm/i915/display/intel_display.c chv_compute_dpll(crtc, pipe_config); crtc 7968 drivers/gpu/drm/i915/display/intel_display.c chv_prepare_pll(crtc, pipe_config); crtc 7969 drivers/gpu/drm/i915/display/intel_display.c chv_enable_pll(crtc, pipe_config); crtc 7971 drivers/gpu/drm/i915/display/intel_display.c vlv_compute_dpll(crtc, pipe_config); crtc 7972 drivers/gpu/drm/i915/display/intel_display.c vlv_prepare_pll(crtc, pipe_config); crtc 7973 drivers/gpu/drm/i915/display/intel_display.c vlv_enable_pll(crtc, pipe_config); crtc 7997 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_compute_dpll(struct intel_crtc *crtc, crtc 8001 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 8005 drivers/gpu/drm/i915/display/intel_display.c i9xx_update_pll_dividers(crtc, crtc_state, reduced_clock); crtc 8070 drivers/gpu/drm/i915/display/intel_display.c static void i8xx_compute_dpll(struct intel_crtc *crtc, crtc 8074 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 8079 drivers/gpu/drm/i915/display/intel_display.c i9xx_update_pll_dividers(crtc, crtc_state, reduced_clock); crtc 8122 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 8123 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 8124 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 8184 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 8185 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 8186 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 8196 drivers/gpu/drm/i915/display/intel_display.c static void intel_get_pipe_timings(struct intel_crtc *crtc, crtc 8199 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 8241 drivers/gpu/drm/i915/display/intel_display.c static void intel_get_pipe_src_size(struct intel_crtc *crtc, crtc 8244 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 8248 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(PIPESRC(crtc->pipe)); crtc 8281 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 8282 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 8289 drivers/gpu/drm/i915/display/intel_display.c pipeconf |= I915_READ(PIPECONF(crtc->pipe)) & PIPECONF_ENABLE; crtc 8334 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PIPECONF(crtc->pipe), pipeconf); crtc 8335 drivers/gpu/drm/i915/display/intel_display.c POSTING_READ(PIPECONF(crtc->pipe)); crtc 8338 drivers/gpu/drm/i915/display/intel_display.c static int i8xx_crtc_compute_clock(struct intel_crtc *crtc, crtc 8341 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 8369 drivers/gpu/drm/i915/display/intel_display.c i8xx_compute_dpll(crtc, crtc_state, NULL); crtc 8374 drivers/gpu/drm/i915/display/intel_display.c static int g4x_crtc_compute_clock(struct intel_crtc *crtc, crtc 8377 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 8411 drivers/gpu/drm/i915/display/intel_display.c i9xx_compute_dpll(crtc, crtc_state, NULL); crtc 8416 drivers/gpu/drm/i915/display/intel_display.c static int pnv_crtc_compute_clock(struct intel_crtc *crtc, crtc 8419 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 8445 drivers/gpu/drm/i915/display/intel_display.c i9xx_compute_dpll(crtc, crtc_state, NULL); crtc 8450 drivers/gpu/drm/i915/display/intel_display.c static int i9xx_crtc_compute_clock(struct intel_crtc *crtc, crtc 8453 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 8479 drivers/gpu/drm/i915/display/intel_display.c i9xx_compute_dpll(crtc, crtc_state, NULL); crtc 8484 drivers/gpu/drm/i915/display/intel_display.c static int chv_crtc_compute_clock(struct intel_crtc *crtc, crtc 8500 drivers/gpu/drm/i915/display/intel_display.c chv_compute_dpll(crtc, crtc_state); crtc 8505 drivers/gpu/drm/i915/display/intel_display.c static int vlv_crtc_compute_clock(struct intel_crtc *crtc, crtc 8521 drivers/gpu/drm/i915/display/intel_display.c vlv_compute_dpll(crtc, crtc_state); crtc 8535 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_get_pfit_config(struct intel_crtc *crtc, crtc 8538 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 8550 drivers/gpu/drm/i915/display/intel_display.c if (crtc->pipe != PIPE_B) crtc 8553 drivers/gpu/drm/i915/display/intel_display.c if ((tmp & PFIT_PIPE_MASK) != (crtc->pipe << PFIT_PIPE_SHIFT)) crtc 8561 drivers/gpu/drm/i915/display/intel_display.c static void vlv_crtc_clock_get(struct intel_crtc *crtc, crtc 8564 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 8589 drivers/gpu/drm/i915/display/intel_display.c i9xx_get_initial_plane_config(struct intel_crtc *crtc, crtc 8592 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 8594 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(crtc->base.primary); crtc 8606 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(pipe != crtc->pipe); crtc 8664 drivers/gpu/drm/i915/display/intel_display.c crtc->base.name, plane->base.name, fb->width, fb->height, crtc 8671 drivers/gpu/drm/i915/display/intel_display.c static void chv_crtc_clock_get(struct intel_crtc *crtc, crtc 8674 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 8705 drivers/gpu/drm/i915/display/intel_display.c static void intel_get_crtc_ycbcr_config(struct intel_crtc *crtc, crtc 8708 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 8714 drivers/gpu/drm/i915/display/intel_display.c u32 tmp = I915_READ(PIPEMISC(crtc->pipe)); crtc 8750 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 8751 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(crtc->base.primary); crtc 8752 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 8766 drivers/gpu/drm/i915/display/intel_display.c static bool i9xx_get_pipe_config(struct intel_crtc *crtc, crtc 8769 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 8775 drivers/gpu/drm/i915/display/intel_display.c power_domain = POWER_DOMAIN_PIPE(crtc->pipe); crtc 8781 drivers/gpu/drm/i915/display/intel_display.c pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; crtc 8786 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(PIPECONF(crtc->pipe)); crtc 8815 drivers/gpu/drm/i915/display/intel_display.c pipe_config->cgm_mode = I915_READ(CGM_PIPE_MODE(crtc->pipe)); crtc 8823 drivers/gpu/drm/i915/display/intel_display.c intel_get_pipe_timings(crtc, pipe_config); crtc 8824 drivers/gpu/drm/i915/display/intel_display.c intel_get_pipe_src_size(crtc, pipe_config); crtc 8826 drivers/gpu/drm/i915/display/intel_display.c i9xx_get_pfit_config(crtc, pipe_config); crtc 8830 drivers/gpu/drm/i915/display/intel_display.c if (IS_CHERRYVIEW(dev_priv) && crtc->pipe != PIPE_A) crtc 8831 drivers/gpu/drm/i915/display/intel_display.c tmp = dev_priv->chv_dpll_md[crtc->pipe]; crtc 8833 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(DPLL_MD(crtc->pipe)); crtc 8840 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(DPLL(crtc->pipe)); crtc 8850 drivers/gpu/drm/i915/display/intel_display.c pipe_config->dpll_hw_state.dpll = I915_READ(DPLL(crtc->pipe)); crtc 8852 drivers/gpu/drm/i915/display/intel_display.c pipe_config->dpll_hw_state.fp0 = I915_READ(FP0(crtc->pipe)); crtc 8853 drivers/gpu/drm/i915/display/intel_display.c pipe_config->dpll_hw_state.fp1 = I915_READ(FP1(crtc->pipe)); crtc 8862 drivers/gpu/drm/i915/display/intel_display.c chv_crtc_clock_get(crtc, pipe_config); crtc 8864 drivers/gpu/drm/i915/display/intel_display.c vlv_crtc_clock_get(crtc, pipe_config); crtc 8866 drivers/gpu/drm/i915/display/intel_display.c i9xx_crtc_clock_get(crtc, pipe_config); crtc 9389 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 9390 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 9391 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 9433 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 9434 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 9452 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 9453 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 9490 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PIPEMISC(crtc->pipe), val); crtc 9493 drivers/gpu/drm/i915/display/intel_display.c int bdw_get_pipemisc_bpp(struct intel_crtc *crtc) crtc 9495 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 9498 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(PIPEMISC(crtc->pipe)); crtc 9531 drivers/gpu/drm/i915/display/intel_display.c static void ironlake_compute_dpll(struct intel_crtc *crtc, crtc 9535 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 9633 drivers/gpu/drm/i915/display/intel_display.c static int ironlake_crtc_compute_clock(struct intel_crtc *crtc, crtc 9636 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 9678 drivers/gpu/drm/i915/display/intel_display.c ironlake_compute_dpll(crtc, crtc_state, NULL); crtc 9680 drivers/gpu/drm/i915/display/intel_display.c if (!intel_reserve_shared_dplls(state, crtc, NULL)) { crtc 9682 drivers/gpu/drm/i915/display/intel_display.c pipe_name(crtc->pipe)); crtc 9689 drivers/gpu/drm/i915/display/intel_display.c static void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc, crtc 9692 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 9694 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 9705 drivers/gpu/drm/i915/display/intel_display.c static void intel_cpu_transcoder_get_m_n(struct intel_crtc *crtc, crtc 9710 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 9711 drivers/gpu/drm/i915/display/intel_display.c enum pipe pipe = crtc->pipe; crtc 9742 drivers/gpu/drm/i915/display/intel_display.c void intel_dp_get_m_n(struct intel_crtc *crtc, crtc 9746 drivers/gpu/drm/i915/display/intel_display.c intel_pch_transcoder_get_m_n(crtc, &pipe_config->dp_m_n); crtc 9748 drivers/gpu/drm/i915/display/intel_display.c intel_cpu_transcoder_get_m_n(crtc, pipe_config->cpu_transcoder, crtc 9753 drivers/gpu/drm/i915/display/intel_display.c static void ironlake_get_fdi_m_n_config(struct intel_crtc *crtc, crtc 9756 drivers/gpu/drm/i915/display/intel_display.c intel_cpu_transcoder_get_m_n(crtc, pipe_config->cpu_transcoder, crtc 9760 drivers/gpu/drm/i915/display/intel_display.c static void skylake_get_pfit_config(struct intel_crtc *crtc, crtc 9763 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 9771 drivers/gpu/drm/i915/display/intel_display.c for (i = 0; i < crtc->num_scalers; i++) { crtc 9772 drivers/gpu/drm/i915/display/intel_display.c ps_ctrl = I915_READ(SKL_PS_CTRL(crtc->pipe, i)); crtc 9776 drivers/gpu/drm/i915/display/intel_display.c pipe_config->pch_pfit.pos = I915_READ(SKL_PS_WIN_POS(crtc->pipe, i)); crtc 9777 drivers/gpu/drm/i915/display/intel_display.c pipe_config->pch_pfit.size = I915_READ(SKL_PS_WIN_SZ(crtc->pipe, i)); crtc 9792 drivers/gpu/drm/i915/display/intel_display.c skylake_get_initial_plane_config(struct intel_crtc *crtc, crtc 9795 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 9797 drivers/gpu/drm/i915/display/intel_display.c struct intel_plane *plane = to_intel_plane(crtc->base.primary); crtc 9809 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(pipe != crtc->pipe); crtc 9907 drivers/gpu/drm/i915/display/intel_display.c crtc->base.name, plane->base.name, fb->width, fb->height, crtc 9918 drivers/gpu/drm/i915/display/intel_display.c static void ironlake_get_pfit_config(struct intel_crtc *crtc, crtc 9921 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 9925 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(PF_CTL(crtc->pipe)); crtc 9929 drivers/gpu/drm/i915/display/intel_display.c pipe_config->pch_pfit.pos = I915_READ(PF_WIN_POS(crtc->pipe)); crtc 9930 drivers/gpu/drm/i915/display/intel_display.c pipe_config->pch_pfit.size = I915_READ(PF_WIN_SZ(crtc->pipe)); crtc 9937 drivers/gpu/drm/i915/display/intel_display.c PF_PIPE_SEL_IVB(crtc->pipe)); crtc 9942 drivers/gpu/drm/i915/display/intel_display.c static bool ironlake_get_pipe_config(struct intel_crtc *crtc, crtc 9945 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 9952 drivers/gpu/drm/i915/display/intel_display.c power_domain = POWER_DOMAIN_PIPE(crtc->pipe); crtc 9958 drivers/gpu/drm/i915/display/intel_display.c pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; crtc 9962 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(PIPECONF(crtc->pipe)); crtc 9989 drivers/gpu/drm/i915/display/intel_display.c pipe_config->csc_mode = I915_READ(PIPE_CSC_MODE(crtc->pipe)); crtc 9994 drivers/gpu/drm/i915/display/intel_display.c if (I915_READ(PCH_TRANSCONF(crtc->pipe)) & TRANS_ENABLE) { crtc 10000 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(FDI_RX_CTL(crtc->pipe)); crtc 10004 drivers/gpu/drm/i915/display/intel_display.c ironlake_get_fdi_m_n_config(crtc, pipe_config); crtc 10011 drivers/gpu/drm/i915/display/intel_display.c pll_id = (enum intel_dpll_id) crtc->pipe; crtc 10014 drivers/gpu/drm/i915/display/intel_display.c if (tmp & TRANS_DPLLB_SEL(crtc->pipe)) crtc 10032 drivers/gpu/drm/i915/display/intel_display.c ironlake_pch_clock_get(crtc, pipe_config); crtc 10037 drivers/gpu/drm/i915/display/intel_display.c intel_get_pipe_timings(crtc, pipe_config); crtc 10038 drivers/gpu/drm/i915/display/intel_display.c intel_get_pipe_src_size(crtc, pipe_config); crtc 10040 drivers/gpu/drm/i915/display/intel_display.c ironlake_get_pfit_config(crtc, pipe_config); crtc 10049 drivers/gpu/drm/i915/display/intel_display.c static int haswell_crtc_compute_clock(struct intel_crtc *crtc, crtc 10052 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 10061 drivers/gpu/drm/i915/display/intel_display.c if (!intel_reserve_shared_dplls(state, crtc, encoder)) { crtc 10063 drivers/gpu/drm/i915/display/intel_display.c pipe_name(crtc->pipe)); crtc 10200 drivers/gpu/drm/i915/display/intel_display.c static bool hsw_get_transcoder_state(struct intel_crtc *crtc, crtc 10205 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 10225 drivers/gpu/drm/i915/display/intel_display.c pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; crtc 10269 drivers/gpu/drm/i915/display/intel_display.c if (trans_pipe == crtc->pipe) { crtc 10296 drivers/gpu/drm/i915/display/intel_display.c static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc, crtc 10301 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 10341 drivers/gpu/drm/i915/display/intel_display.c if ((tmp & BXT_PIPE_SELECT_MASK) != BXT_PIPE_SELECT(crtc->pipe)) crtc 10351 drivers/gpu/drm/i915/display/intel_display.c static void haswell_get_ddi_port_state(struct intel_crtc *crtc, crtc 10354 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 10396 drivers/gpu/drm/i915/display/intel_display.c ironlake_get_fdi_m_n_config(crtc, pipe_config); crtc 10400 drivers/gpu/drm/i915/display/intel_display.c static bool haswell_get_pipe_config(struct intel_crtc *crtc, crtc 10403 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 10409 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_init_scalers(crtc, pipe_config); crtc 10411 drivers/gpu/drm/i915/display/intel_display.c power_domain = POWER_DOMAIN_PIPE(crtc->pipe); crtc 10421 drivers/gpu/drm/i915/display/intel_display.c active = hsw_get_transcoder_state(crtc, pipe_config, crtc 10425 drivers/gpu/drm/i915/display/intel_display.c bxt_get_dsi_transcoder_state(crtc, pipe_config, crtc 10436 drivers/gpu/drm/i915/display/intel_display.c haswell_get_ddi_port_state(crtc, pipe_config); crtc 10437 drivers/gpu/drm/i915/display/intel_display.c intel_get_pipe_timings(crtc, pipe_config); crtc 10440 drivers/gpu/drm/i915/display/intel_display.c intel_get_pipe_src_size(crtc, pipe_config); crtc 10441 drivers/gpu/drm/i915/display/intel_display.c intel_get_crtc_ycbcr_config(crtc, pipe_config); crtc 10443 drivers/gpu/drm/i915/display/intel_display.c pipe_config->gamma_mode = I915_READ(GAMMA_MODE(crtc->pipe)); crtc 10445 drivers/gpu/drm/i915/display/intel_display.c pipe_config->csc_mode = I915_READ(PIPE_CSC_MODE(crtc->pipe)); crtc 10448 drivers/gpu/drm/i915/display/intel_display.c u32 tmp = I915_READ(SKL_BOTTOM_COLOR(crtc->pipe)); crtc 10461 drivers/gpu/drm/i915/display/intel_display.c power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe); crtc 10470 drivers/gpu/drm/i915/display/intel_display.c skylake_get_pfit_config(crtc, pipe_config); crtc 10472 drivers/gpu/drm/i915/display/intel_display.c ironlake_get_pfit_config(crtc, pipe_config); crtc 10475 drivers/gpu/drm/i915/display/intel_display.c if (hsw_crtc_supports_ips(crtc)) { crtc 10785 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 10786 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 10799 drivers/gpu/drm/i915/display/intel_display.c cntl |= MCURSOR_PIPE_SELECT(crtc->pipe); crtc 11062 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc) crtc 11068 drivers/gpu/drm/i915/display/intel_display.c ret = drm_atomic_add_affected_planes(state, crtc); crtc 11073 drivers/gpu/drm/i915/display/intel_display.c if (plane_state->crtc != crtc) crtc 11096 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc = NULL; crtc 11124 drivers/gpu/drm/i915/display/intel_display.c if (connector->state->crtc) { crtc 11125 drivers/gpu/drm/i915/display/intel_display.c crtc = connector->state->crtc; crtc 11127 drivers/gpu/drm/i915/display/intel_display.c ret = drm_modeset_lock(&crtc->mutex, ctx); crtc 11150 drivers/gpu/drm/i915/display/intel_display.c crtc = possible_crtc; crtc 11157 drivers/gpu/drm/i915/display/intel_display.c if (!crtc) { crtc 11164 drivers/gpu/drm/i915/display/intel_display.c intel_crtc = to_intel_crtc(crtc); crtc 11182 drivers/gpu/drm/i915/display/intel_display.c ret = drm_atomic_set_crtc_for_connector(connector_state, crtc); crtc 11201 drivers/gpu/drm/i915/display/intel_display.c ret = intel_modeset_disable_planes(state, crtc); crtc 11207 drivers/gpu/drm/i915/display/intel_display.c ret = PTR_ERR_OR_ZERO(drm_atomic_get_crtc_state(restore_state, crtc)); crtc 11209 drivers/gpu/drm/i915/display/intel_display.c ret = drm_atomic_add_affected_planes(restore_state, crtc); crtc 11284 drivers/gpu/drm/i915/display/intel_display.c static void i9xx_crtc_clock_get(struct intel_crtc *crtc, crtc 11287 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 11392 drivers/gpu/drm/i915/display/intel_display.c static void ironlake_pch_clock_get(struct intel_crtc *crtc, crtc 11395 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 11398 drivers/gpu/drm/i915/display/intel_display.c i9xx_crtc_clock_get(crtc, pipe_config); crtc 11417 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 11423 drivers/gpu/drm/i915/display/intel_display.c crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 11435 drivers/gpu/drm/i915/display/intel_display.c crtc_state->base.crtc = &crtc->base; crtc 11437 drivers/gpu/drm/i915/display/intel_display.c if (!dev_priv->display.get_pipe_config(crtc, crtc_state)) { crtc 11452 drivers/gpu/drm/i915/display/intel_display.c static void intel_crtc_destroy(struct drm_crtc *crtc) crtc 11454 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 11456 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_cleanup(crtc); crtc 11506 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 11508 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 11554 drivers/gpu/drm/i915/display/intel_display.c crtc->base.base.id, crtc->base.name, crtc 11640 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc, crtc 11649 drivers/gpu/drm/i915/display/intel_display.c if (connector_state->crtc != &crtc->base) crtc 11686 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 11687 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 11701 drivers/gpu/drm/i915/display/intel_display.c if (plane->pipe != crtc->pipe || !plane_state->linked_plane) crtc 11719 drivers/gpu/drm/i915/display/intel_display.c if (plane->pipe != crtc->pipe || crtc 11723 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, linked) { crtc 11758 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 11762 drivers/gpu/drm/i915/display/intel_display.c intel_atomic_get_old_crtc_state(state, crtc); crtc 11767 drivers/gpu/drm/i915/display/intel_display.c static int intel_crtc_atomic_check(struct drm_crtc *crtc, crtc 11770 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 11771 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 11860 drivers/gpu/drm/i915/display/intel_display.c if (connector->base.state->crtc) crtc 11866 drivers/gpu/drm/i915/display/intel_display.c connector->base.state->crtc = crtc 11867 drivers/gpu/drm/i915/display/intel_display.c connector->base.encoder->crtc; crtc 11872 drivers/gpu/drm/i915/display/intel_display.c connector->base.state->crtc = NULL; crtc 11917 drivers/gpu/drm/i915/display/intel_display.c compute_baseline_pipe_bpp(struct intel_crtc *crtc, crtc 11920 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 11940 drivers/gpu/drm/i915/display/intel_display.c if (connector_state->crtc != &crtc->base) crtc 12074 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 12075 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 12082 drivers/gpu/drm/i915/display/intel_display.c crtc->base.base.id, crtc->base.name, crtc 12141 drivers/gpu/drm/i915/display/intel_display.c crtc->num_scalers, crtc 12167 drivers/gpu/drm/i915/display/intel_display.c if (plane->pipe == crtc->pipe) crtc 12202 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(!connector_state->crtc); crtc 12242 drivers/gpu/drm/i915/display/intel_display.c to_i915(crtc_state->base.crtc->dev); crtc 12276 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc = pipe_config->base.crtc; crtc 12290 drivers/gpu/drm/i915/display/intel_display.c (enum transcoder) to_intel_crtc(crtc)->pipe; crtc 12305 drivers/gpu/drm/i915/display/intel_display.c ret = compute_baseline_pipe_bpp(to_intel_crtc(crtc), crtc 12325 drivers/gpu/drm/i915/display/intel_display.c if (connector_state->crtc != crtc) crtc 12330 drivers/gpu/drm/i915/display/intel_display.c if (!check_single_encoder_cloning(state, to_intel_crtc(crtc), encoder)) { crtc 12361 drivers/gpu/drm/i915/display/intel_display.c if (connector_state->crtc != crtc) crtc 12381 drivers/gpu/drm/i915/display/intel_display.c ret = intel_crtc_compute_config(to_intel_crtc(crtc), pipe_config); crtc 12542 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(current_config->base.crtc->dev); crtc 12875 drivers/gpu/drm/i915/display/intel_display.c static void verify_wm_state(struct intel_crtc *crtc, crtc 12878 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 12888 drivers/gpu/drm/i915/display/intel_display.c const enum pipe pipe = crtc->pipe; crtc 12898 drivers/gpu/drm/i915/display/intel_display.c skl_pipe_wm_get_hw_state(crtc, &hw->wm); crtc 12901 drivers/gpu/drm/i915/display/intel_display.c skl_pipe_ddb_get_hw_state(crtc, hw->ddb_y, hw->ddb_uv); crtc 13016 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc) crtc 13026 drivers/gpu/drm/i915/display/intel_display.c if (new_conn_state->crtc != &crtc->base) crtc 13029 drivers/gpu/drm/i915/display/intel_display.c if (crtc) crtc 13030 drivers/gpu/drm/i915/display/intel_display.c crtc_state = intel_atomic_get_new_crtc_state(state, crtc); crtc 13064 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(new_conn_state->crtc != crtc 13065 drivers/gpu/drm/i915/display/intel_display.c encoder->base.crtc, crtc 13072 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(!!encoder->base.crtc != enabled, crtc 13075 drivers/gpu/drm/i915/display/intel_display.c !!encoder->base.crtc, enabled); crtc 13077 drivers/gpu/drm/i915/display/intel_display.c if (!encoder->base.crtc) { crtc 13089 drivers/gpu/drm/i915/display/intel_display.c verify_crtc_state(struct intel_crtc *crtc, crtc 13093 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 13104 drivers/gpu/drm/i915/display/intel_display.c pipe_config->base.crtc = &crtc->base; crtc 13107 drivers/gpu/drm/i915/display/intel_display.c DRM_DEBUG_KMS("[CRTC:%d:%s]\n", crtc->base.base.id, crtc->base.name); crtc 13109 drivers/gpu/drm/i915/display/intel_display.c active = dev_priv->display.get_pipe_config(crtc, pipe_config); crtc 13119 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(crtc->active != new_crtc_state->base.active, crtc 13121 drivers/gpu/drm/i915/display/intel_display.c "(expected %i, found %i)\n", new_crtc_state->base.active, crtc->active); crtc 13123 drivers/gpu/drm/i915/display/intel_display.c for_each_encoder_on_crtc(dev, &crtc->base, encoder) { crtc 13131 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(active && crtc->pipe != pipe, crtc 13170 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc, crtc 13193 drivers/gpu/drm/i915/display/intel_display.c if (!crtc) { crtc 13201 drivers/gpu/drm/i915/display/intel_display.c crtc_mask = drm_crtc_mask(&crtc->base); crtc 13206 drivers/gpu/drm/i915/display/intel_display.c pipe_name(drm_crtc_index(&crtc->base)), pll->active_mask); crtc 13210 drivers/gpu/drm/i915/display/intel_display.c pipe_name(drm_crtc_index(&crtc->base)), pll->active_mask); crtc 13223 drivers/gpu/drm/i915/display/intel_display.c verify_shared_dpll_state(struct intel_crtc *crtc, crtc 13227 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 13230 drivers/gpu/drm/i915/display/intel_display.c verify_single_dpll_state(dev_priv, new_crtc_state->shared_dpll, crtc, new_crtc_state); crtc 13234 drivers/gpu/drm/i915/display/intel_display.c unsigned int crtc_mask = drm_crtc_mask(&crtc->base); crtc 13239 drivers/gpu/drm/i915/display/intel_display.c pipe_name(drm_crtc_index(&crtc->base))); crtc 13242 drivers/gpu/drm/i915/display/intel_display.c pipe_name(drm_crtc_index(&crtc->base))); crtc 13247 drivers/gpu/drm/i915/display/intel_display.c intel_modeset_verify_crtc(struct intel_crtc *crtc, crtc 13255 drivers/gpu/drm/i915/display/intel_display.c verify_wm_state(crtc, new_crtc_state); crtc 13256 drivers/gpu/drm/i915/display/intel_display.c verify_connector_state(state, crtc); crtc 13257 drivers/gpu/drm/i915/display/intel_display.c verify_crtc_state(crtc, old_crtc_state, new_crtc_state); crtc 13258 drivers/gpu/drm/i915/display/intel_display.c verify_shared_dpll_state(crtc, old_crtc_state, new_crtc_state); crtc 13281 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 13282 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 13319 drivers/gpu/drm/i915/display/intel_display.c crtc->scanline_offset = vtotal - 1; crtc 13322 drivers/gpu/drm/i915/display/intel_display.c crtc->scanline_offset = 2; crtc 13324 drivers/gpu/drm/i915/display/intel_display.c crtc->scanline_offset = 1; crtc 13331 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13337 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 13341 drivers/gpu/drm/i915/display/intel_display.c intel_release_shared_dplls(state, crtc); crtc 13354 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13361 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { crtc 13371 drivers/gpu/drm/i915/display/intel_display.c first_pipe = crtc->pipe; crtc 13380 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(state->base.dev, crtc) { crtc 13381 drivers/gpu/drm/i915/display/intel_display.c crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); crtc 13395 drivers/gpu/drm/i915/display/intel_display.c enabled_pipe = crtc->pipe; crtc 13409 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13412 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 13415 drivers/gpu/drm/i915/display/intel_display.c crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); crtc 13426 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13432 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 13436 drivers/gpu/drm/i915/display/intel_display.c crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); crtc 13446 drivers/gpu/drm/i915/display/intel_display.c &crtc->base); crtc 13451 drivers/gpu/drm/i915/display/intel_display.c &crtc->base); crtc 13463 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13481 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, crtc 13489 drivers/gpu/drm/i915/display/intel_display.c state->active_pipe_changes |= drm_crtc_mask(&crtc->base); crtc 13519 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13523 drivers/gpu/drm/i915/display/intel_display.c crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 13524 drivers/gpu/drm/i915/display/intel_display.c crtc_state = intel_atomic_get_new_crtc_state(state, crtc); crtc 13617 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13622 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, crtc 13633 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, crtc 13682 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, crtc 13703 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, crtc 13716 drivers/gpu/drm/i915/display/intel_display.c u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc) crtc 13718 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 13719 drivers/gpu/drm/i915/display/intel_display.c struct drm_vblank_crtc *vblank = &dev->vblank[drm_crtc_index(&crtc->base)]; crtc 13722 drivers/gpu/drm/i915/display/intel_display.c return (u32)drm_crtc_accurate_vblank_count(&crtc->base); crtc 13724 drivers/gpu/drm/i915/display/intel_display.c return crtc->base.funcs->get_vblank_counter(&crtc->base); crtc 13727 drivers/gpu/drm/i915/display/intel_display.c static void intel_update_crtc(struct intel_crtc *crtc, crtc 13737 drivers/gpu/drm/i915/display/intel_display.c to_intel_plane(crtc->base.primary)); crtc 13744 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_enable_pipe_crc(crtc); crtc 13754 drivers/gpu/drm/i915/display/intel_display.c intel_encoders_update_pipe(crtc, new_crtc_state, state); crtc 13758 drivers/gpu/drm/i915/display/intel_display.c intel_fbc_disable(crtc); crtc 13760 drivers/gpu/drm/i915/display/intel_display.c intel_fbc_enable(crtc, new_crtc_state, new_plane_state); crtc 13762 drivers/gpu/drm/i915/display/intel_display.c intel_begin_crtc_commit(state, crtc); crtc 13765 drivers/gpu/drm/i915/display/intel_display.c skl_update_planes_on_crtc(state, crtc); crtc 13767 drivers/gpu/drm/i915/display/intel_display.c i9xx_update_planes_on_crtc(state, crtc); crtc 13769 drivers/gpu/drm/i915/display/intel_display.c intel_finish_crtc_commit(state, crtc); crtc 13774 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13778 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 13782 drivers/gpu/drm/i915/display/intel_display.c intel_update_crtc(crtc, state, old_crtc_state, crtc 13790 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13800 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) crtc 13818 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 13820 drivers/gpu/drm/i915/display/intel_display.c unsigned int cmask = drm_crtc_mask(&crtc->base); crtc 13822 drivers/gpu/drm/i915/display/intel_display.c pipe = crtc->pipe; crtc 13847 drivers/gpu/drm/i915/display/intel_display.c intel_update_crtc(crtc, state, old_crtc_state, crtc 13925 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 13937 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 13941 drivers/gpu/drm/i915/display/intel_display.c put_domains[crtc->pipe] = crtc 13951 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_disable_planes(state, crtc); crtc 13957 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_disable_pipe_crc(crtc); crtc 13960 drivers/gpu/drm/i915/display/intel_display.c crtc->active = false; crtc 13961 drivers/gpu/drm/i915/display/intel_display.c intel_fbc_disable(crtc); crtc 13981 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) crtc 13982 drivers/gpu/drm/i915/display/intel_display.c crtc->config = new_crtc_state; crtc 14003 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 14009 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_send_vblank_event(&crtc->base, new_crtc_state->base.event); crtc 14042 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 14058 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 14064 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 14070 drivers/gpu/drm/i915/display/intel_display.c intel_modeset_verify_crtc(crtc, state, old_crtc_state, new_crtc_state); crtc 14184 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 14187 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) crtc 14247 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc; crtc 14266 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_vblank_put(wait->crtc); crtc 14273 drivers/gpu/drm/i915/display/intel_display.c static void add_rps_boost_after_vblank(struct drm_crtc *crtc, crtc 14281 drivers/gpu/drm/i915/display/intel_display.c if (INTEL_GEN(to_i915(crtc->dev)) < 6) crtc 14284 drivers/gpu/drm/i915/display/intel_display.c if (drm_crtc_vblank_get(crtc)) crtc 14289 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_vblank_put(crtc); crtc 14294 drivers/gpu/drm/i915/display/intel_display.c wait->crtc = crtc; crtc 14299 drivers/gpu/drm/i915/display/intel_display.c add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait); crtc 14379 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc(plane->state->crtc)); crtc 14446 drivers/gpu/drm/i915/display/intel_display.c add_rps_boost_after_vblank(new_state->crtc, fence); crtc 14450 drivers/gpu/drm/i915/display/intel_display.c add_rps_boost_after_vblank(new_state->crtc, new_state->fence); crtc 14501 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 14502 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 14533 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc) crtc 14535 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 14537 drivers/gpu/drm/i915/display/intel_display.c intel_atomic_get_old_crtc_state(state, crtc); crtc 14539 drivers/gpu/drm/i915/display/intel_display.c intel_atomic_get_new_crtc_state(state, crtc); crtc 14566 drivers/gpu/drm/i915/display/intel_display.c void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc, crtc 14569 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 14572 drivers/gpu/drm/i915/display/intel_display.c intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true); crtc 14576 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_pch_transcoder(crtc); crtc 14583 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc) crtc 14586 drivers/gpu/drm/i915/display/intel_display.c intel_atomic_get_old_crtc_state(state, crtc); crtc 14588 drivers/gpu/drm/i915/display/intel_display.c intel_atomic_get_new_crtc_state(state, crtc); crtc 14595 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_arm_fifo_underrun(crtc, new_crtc_state); crtc 14686 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc, crtc 14694 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 14698 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc_state(crtc->state); crtc 14725 drivers/gpu/drm/i915/display/intel_display.c if (old_plane_state->crtc != crtc || crtc 14737 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state = to_intel_crtc_state(intel_crtc_duplicate_state(crtc)); crtc 14800 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_destroy_state(crtc, &new_crtc_state->base); crtc 14808 drivers/gpu/drm/i915/display/intel_display.c return drm_atomic_helper_update_plane(plane, crtc, fb, crtc 15013 drivers/gpu/drm/i915/display/intel_display.c static void intel_crtc_init_scalers(struct intel_crtc *crtc, crtc 15018 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 15021 drivers/gpu/drm/i915/display/intel_display.c crtc->num_scalers = RUNTIME_INFO(dev_priv)->num_scalers[crtc->pipe]; crtc 15022 drivers/gpu/drm/i915/display/intel_display.c if (!crtc->num_scalers) crtc 15025 drivers/gpu/drm/i915/display/intel_display.c for (i = 0; i < crtc->num_scalers; i++) { crtc 15214 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 15220 drivers/gpu/drm/i915/display/intel_display.c crtc = to_intel_crtc(drmmode_crtc); crtc 15221 drivers/gpu/drm/i915/display/intel_display.c pipe_from_crtc_id->pipe = crtc->pipe; crtc 15986 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 16042 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) { crtc 16046 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc_state(crtc->base.state)->wm = crtc_state->wm; crtc 16076 drivers/gpu/drm/i915/display/intel_display.c struct drm_crtc *crtc; crtc 16089 drivers/gpu/drm/i915/display/intel_display.c drm_for_each_crtc(crtc, dev) { crtc 16090 drivers/gpu/drm/i915/display/intel_display.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 16097 drivers/gpu/drm/i915/display/intel_display.c ret = drm_atomic_add_affected_planes(state, crtc); crtc 16132 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 16241 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(dev, crtc) { crtc 16244 drivers/gpu/drm/i915/display/intel_display.c if (!crtc->active) crtc 16254 drivers/gpu/drm/i915/display/intel_display.c dev_priv->display.get_initial_plane_config(crtc, crtc 16261 drivers/gpu/drm/i915/display/intel_display.c intel_find_initial_plane_obj(crtc, &plane_config); crtc 16287 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 16352 drivers/gpu/drm/i915/display/intel_display.c intel_wait_for_pipe_scanline_moving(crtc); crtc 16357 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 16371 drivers/gpu/drm/i915/display/intel_display.c intel_wait_for_pipe_scanline_stopped(crtc); crtc 16380 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 16385 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 16387 drivers/gpu/drm/i915/display/intel_display.c to_intel_plane(crtc->base.primary); crtc 16394 drivers/gpu/drm/i915/display/intel_display.c if (pipe == crtc->pipe) crtc 16405 drivers/gpu/drm/i915/display/intel_display.c static bool intel_crtc_has_encoders(struct intel_crtc *crtc) crtc 16407 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 16410 drivers/gpu/drm/i915/display/intel_display.c for_each_encoder_on_crtc(dev, &crtc->base, encoder) crtc 16434 drivers/gpu/drm/i915/display/intel_display.c static void intel_sanitize_crtc(struct intel_crtc *crtc, crtc 16437 drivers/gpu/drm/i915/display/intel_display.c struct drm_device *dev = crtc->base.dev; crtc 16439 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); crtc 16443 drivers/gpu/drm/i915/display/intel_display.c if (crtc->active && !transcoder_is_dsi(cpu_transcoder)) { crtc 16454 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_plane_on_crtc(dev, crtc, plane) { crtc 16460 drivers/gpu/drm/i915/display/intel_display.c intel_plane_disable_noatomic(crtc, plane); crtc 16468 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(SKL_BOTTOM_COLOR(crtc->pipe), crtc 16475 drivers/gpu/drm/i915/display/intel_display.c if (crtc_state->base.active && !intel_crtc_has_encoders(crtc)) crtc 16476 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_disable_noatomic(&crtc->base, ctx); crtc 16492 drivers/gpu/drm/i915/display/intel_display.c crtc->cpu_fifo_underrun_disabled = true; crtc 16502 drivers/gpu/drm/i915/display/intel_display.c if (has_pch_trancoder(dev_priv, crtc->pipe)) crtc 16503 drivers/gpu/drm/i915/display/intel_display.c crtc->pch_fifo_underrun_disabled = true; crtc 16509 drivers/gpu/drm/i915/display/intel_display.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 16531 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); crtc 16532 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *crtc_state = crtc ? crtc 16533 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc_state(crtc->base.state) : NULL; crtc 16543 drivers/gpu/drm/i915/display/intel_display.c pipe_name(crtc->pipe)); crtc 16576 drivers/gpu/drm/i915/display/intel_display.c encoder->base.crtc = NULL; crtc 16631 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 16642 drivers/gpu/drm/i915/display/intel_display.c crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 16643 drivers/gpu/drm/i915/display/intel_display.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 16652 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 16654 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc_state(crtc->base.state); crtc 16664 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 16672 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(dev, crtc) { crtc 16674 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc_state(crtc->base.state); crtc 16678 drivers/gpu/drm/i915/display/intel_display.c __drm_atomic_helper_crtc_reset(&crtc->base, &crtc_state->base); crtc 16681 drivers/gpu/drm/i915/display/intel_display.c dev_priv->display.get_pipe_config(crtc, crtc_state); crtc 16683 drivers/gpu/drm/i915/display/intel_display.c crtc->base.enabled = crtc_state->base.enable; crtc 16684 drivers/gpu/drm/i915/display/intel_display.c crtc->active = crtc_state->base.active; crtc 16687 drivers/gpu/drm/i915/display/intel_display.c dev_priv->active_crtcs |= 1 << crtc->pipe; crtc 16690 drivers/gpu/drm/i915/display/intel_display.c crtc->base.base.id, crtc->base.name, crtc 16709 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(dev, crtc) { crtc 16711 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc_state(crtc->base.state); crtc 16715 drivers/gpu/drm/i915/display/intel_display.c pll->state.crtc_mask |= 1 << crtc->pipe; crtc 16729 drivers/gpu/drm/i915/display/intel_display.c crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 16730 drivers/gpu/drm/i915/display/intel_display.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 16732 drivers/gpu/drm/i915/display/intel_display.c encoder->base.crtc = &crtc->base; crtc 16735 drivers/gpu/drm/i915/display/intel_display.c encoder->base.crtc = NULL; crtc 16740 drivers/gpu/drm/i915/display/intel_display.c enableddisabled(encoder->base.crtc), crtc 16752 drivers/gpu/drm/i915/display/intel_display.c if (encoder->base.crtc && crtc 16753 drivers/gpu/drm/i915/display/intel_display.c encoder->base.crtc->state->active) { crtc 16759 drivers/gpu/drm/i915/display/intel_display.c encoder->base.crtc->state->connector_mask |= crtc 16761 drivers/gpu/drm/i915/display/intel_display.c encoder->base.crtc->state->encoder_mask |= crtc 16775 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(dev, crtc) { crtc 16779 drivers/gpu/drm/i915/display/intel_display.c to_intel_crtc_state(crtc->base.state); crtc 16783 drivers/gpu/drm/i915/display/intel_display.c memset(&crtc->base.mode, 0, sizeof(crtc->base.mode)); crtc 16785 drivers/gpu/drm/i915/display/intel_display.c intel_mode_from_pipe_config(&crtc->base.mode, crtc_state); crtc 16786 drivers/gpu/drm/i915/display/intel_display.c crtc->base.mode.hdisplay = crtc_state->pipe_src_w; crtc 16787 drivers/gpu/drm/i915/display/intel_display.c crtc->base.mode.vdisplay = crtc_state->pipe_src_h; crtc 16789 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(drm_atomic_set_mode_for_crtc(crtc->base.state, &crtc->base.mode)); crtc 16810 drivers/gpu/drm/i915/display/intel_display.c drm_calc_timestamping_constants(&crtc->base, crtc 16815 drivers/gpu/drm/i915/display/intel_display.c dev_priv->min_cdclk[crtc->pipe] = min_cdclk; crtc 16816 drivers/gpu/drm/i915/display/intel_display.c dev_priv->min_voltage_level[crtc->pipe] = crtc 16819 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { crtc 16853 drivers/gpu/drm/i915/display/intel_display.c if (!encoder->base.crtc) crtc 16856 drivers/gpu/drm/i915/display/intel_display.c crtc_state = to_intel_crtc_state(encoder->base.crtc->state); crtc 16950 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc; crtc 16980 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 16981 drivers/gpu/drm/i915/display/intel_display.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 16983 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_vblank_reset(&crtc->base); crtc 16994 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 16995 drivers/gpu/drm/i915/display/intel_display.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 16996 drivers/gpu/drm/i915/display/intel_display.c intel_sanitize_crtc(crtc, ctx); crtc 17027 drivers/gpu/drm/i915/display/intel_display.c for_each_intel_crtc(dev, crtc) { crtc 17030 drivers/gpu/drm/i915/display/intel_display.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 320 drivers/gpu/drm/i915/display/intel_display.h #define for_each_crtc(dev, crtc) \ crtc 321 drivers/gpu/drm/i915/display/intel_display.h list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head) crtc 366 drivers/gpu/drm/i915/display/intel_display.h for_each_if((intel_encoder)->base.crtc == (__crtc)) crtc 388 drivers/gpu/drm/i915/display/intel_display.h #define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \ crtc 391 drivers/gpu/drm/i915/display/intel_display.h ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ crtc 394 drivers/gpu/drm/i915/display/intel_display.h for_each_if(crtc) crtc 405 drivers/gpu/drm/i915/display/intel_display.h #define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \ crtc 408 drivers/gpu/drm/i915/display/intel_display.h ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \ crtc 412 drivers/gpu/drm/i915/display/intel_display.h for_each_if(crtc) crtc 428 drivers/gpu/drm/i915/display/intel_display.h enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc); crtc 460 drivers/gpu/drm/i915/display/intel_display.h u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc); crtc 498 drivers/gpu/drm/i915/display/intel_display.h void intel_dp_get_m_n(struct intel_crtc *crtc, crtc 509 drivers/gpu/drm/i915/display/intel_display.h bool intel_crtc_active(struct intel_crtc *crtc); crtc 518 drivers/gpu/drm/i915/display/intel_display.h void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc, crtc 539 drivers/gpu/drm/i915/display/intel_display.h int bdw_get_pipemisc_bpp(struct intel_crtc *crtc); crtc 4247 drivers/gpu/drm/i915/display/intel_display_power.c struct intel_crtc *crtc; crtc 4249 drivers/gpu/drm/i915/display/intel_display_power.c for_each_intel_crtc(dev, crtc) crtc 4250 drivers/gpu/drm/i915/display/intel_display_power.c I915_STATE_WARN(crtc->active, "CRTC for pipe %c enabled\n", crtc 4251 drivers/gpu/drm/i915/display/intel_display_power.c pipe_name(crtc->pipe)); crtc 1478 drivers/gpu/drm/i915/display/intel_display_types.h struct intel_crtc *crtc) crtc 1481 drivers/gpu/drm/i915/display/intel_display_types.h &crtc->base)); crtc 1486 drivers/gpu/drm/i915/display/intel_display_types.h struct intel_crtc *crtc) crtc 1489 drivers/gpu/drm/i915/display/intel_display_types.h &crtc->base)); crtc 1515 drivers/gpu/drm/i915/display/intel_display_types.h const struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 1517 drivers/gpu/drm/i915/display/intel_display_types.h if (crtc->active) crtc 2195 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 2212 drivers/gpu/drm/i915/display/intel_dp.c intel_pch_panel_fitting(crtc, crtc_state, DRM_MODE_SCALE_FULLSCREEN); crtc 2250 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); crtc 2361 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 2407 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe); crtc 2413 drivers/gpu/drm/i915/display/intel_dp.c trans_dp = I915_READ(TRANS_DP_CTL(crtc->pipe)); crtc 2418 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(TRANS_DP_CTL(crtc->pipe), trans_dp); crtc 2433 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe); crtc 2435 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PIPE_SEL(crtc->pipe); crtc 2949 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 2950 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 2952 drivers/gpu/drm/i915/display/intel_dp.c assert_pipe_disabled(dev_priv, crtc->pipe); crtc 2977 drivers/gpu/drm/i915/display/intel_dp.c intel_wait_for_vblank_if_active(dev_priv, !crtc->pipe); crtc 2989 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 2990 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 2992 drivers/gpu/drm/i915/display/intel_dp.c assert_pipe_disabled(dev_priv, crtc->pipe); crtc 3149 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 3161 drivers/gpu/drm/i915/display/intel_dp.c u32 trans_dp = I915_READ(TRANS_DP_CTL(crtc->pipe)); crtc 3192 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_get_m_n(crtc, pipe_config); crtc 3416 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 3418 drivers/gpu/drm/i915/display/intel_dp.c enum pipe pipe = crtc->pipe; crtc 3547 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 3554 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe != crtc->pipe) { crtc 3567 drivers/gpu/drm/i915/display/intel_dp.c vlv_steal_power_sequencer(dev_priv, crtc->pipe); crtc 3569 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->active_pipe = crtc->pipe; crtc 3575 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe = crtc->pipe; crtc 4068 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 4097 drivers/gpu/drm/i915/display/intel_dp.c if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B && port != PORT_A) { crtc 4801 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *crtc; crtc 4816 drivers/gpu/drm/i915/display/intel_dp.c crtc = to_intel_crtc(conn_state->crtc); crtc 4817 drivers/gpu/drm/i915/display/intel_dp.c if (!crtc) crtc 4820 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_modeset_lock(&crtc->base.mutex, ctx); crtc 4824 drivers/gpu/drm/i915/display/intel_dp.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 4839 drivers/gpu/drm/i915/display/intel_dp.c intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, false); crtc 4842 drivers/gpu/drm/i915/display/intel_dp.c intel_crtc_pch_transcoder(crtc), false); crtc 4848 drivers/gpu/drm/i915/display/intel_dp.c intel_wait_for_vblank(dev_priv, crtc->pipe); crtc 4850 drivers/gpu/drm/i915/display/intel_dp.c intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true); crtc 4853 drivers/gpu/drm/i915/display/intel_dp.c intel_crtc_pch_transcoder(crtc), true); crtc 6653 drivers/gpu/drm/i915/display/intel_dp.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 6815 drivers/gpu/drm/i915/display/intel_dp.c struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc; crtc 6817 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config, crtc 6838 drivers/gpu/drm/i915/display/intel_dp.c struct drm_crtc *crtc; crtc 6852 drivers/gpu/drm/i915/display/intel_dp.c crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc; crtc 6853 drivers/gpu/drm/i915/display/intel_dp.c pipe = to_intel_crtc(crtc)->pipe; crtc 6860 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config, crtc 6881 drivers/gpu/drm/i915/display/intel_dp.c struct drm_crtc *crtc; crtc 6895 drivers/gpu/drm/i915/display/intel_dp.c crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc; crtc 6896 drivers/gpu/drm/i915/display/intel_dp.c pipe = to_intel_crtc(crtc)->pipe; crtc 6903 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config, crtc 170 drivers/gpu/drm/i915/display/intel_dp_mst.c struct drm_crtc *new_crtc = new_conn_state->crtc; crtc 179 drivers/gpu/drm/i915/display/intel_dp_mst.c if (!old_conn_state->crtc) crtc 464 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_crtc *crtc = to_intel_crtc(state->crtc); crtc 466 drivers/gpu/drm/i915/display/intel_dp_mst.c return &intel_dp->mst_encoders[crtc->pipe]->base.base; crtc 490 drivers/gpu/drm/i915/display/intel_dp_mst.c if (connector->encoder && connector->base.state->crtc) { crtc 646 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); crtc 742 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 743 drivers/gpu/drm/i915/display/intel_dpio_phy.c enum pipe pipe = crtc->pipe; crtc 786 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 788 drivers/gpu/drm/i915/display/intel_dpio_phy.c enum pipe pipe = crtc->pipe; crtc 867 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 869 drivers/gpu/drm/i915/display/intel_dpio_phy.c enum pipe pipe = crtc->pipe; crtc 956 drivers/gpu/drm/i915/display/intel_dpio_phy.c enum pipe pipe = to_intel_crtc(old_crtc_state->base.crtc)->pipe; crtc 991 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); crtc 1019 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1021 drivers/gpu/drm/i915/display/intel_dpio_phy.c enum pipe pipe = crtc->pipe; crtc 1049 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1051 drivers/gpu/drm/i915/display/intel_dpio_phy.c enum pipe pipe = crtc->pipe; crtc 1078 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 1080 drivers/gpu/drm/i915/display/intel_dpio_phy.c enum pipe pipe = crtc->pipe; crtc 139 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 140 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 166 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 167 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 169 drivers/gpu/drm/i915/display/intel_dpll_mgr.c unsigned int crtc_mask = drm_crtc_mask(&crtc->base); crtc 186 drivers/gpu/drm/i915/display/intel_dpll_mgr.c crtc->base.base.id); crtc 211 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 212 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 214 drivers/gpu/drm/i915/display/intel_dpll_mgr.c unsigned int crtc_mask = drm_crtc_mask(&crtc->base); crtc 229 drivers/gpu/drm/i915/display/intel_dpll_mgr.c crtc->base.base.id); crtc 248 drivers/gpu/drm/i915/display/intel_dpll_mgr.c const struct intel_crtc *crtc, crtc 253 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 274 drivers/gpu/drm/i915/display/intel_dpll_mgr.c crtc->base.base.id, crtc->base.name, crtc 285 drivers/gpu/drm/i915/display/intel_dpll_mgr.c crtc->base.base.id, crtc->base.name, crtc 295 drivers/gpu/drm/i915/display/intel_dpll_mgr.c const struct intel_crtc *crtc, crtc 308 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pipe_name(crtc->pipe)); crtc 310 drivers/gpu/drm/i915/display/intel_dpll_mgr.c shared_dpll[id].crtc_mask |= 1 << crtc->pipe; crtc 314 drivers/gpu/drm/i915/display/intel_dpll_mgr.c const struct intel_crtc *crtc, crtc 320 drivers/gpu/drm/i915/display/intel_dpll_mgr.c shared_dpll[pll->info->id].crtc_mask &= ~(1 << crtc->pipe); crtc 324 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc) crtc 327 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_old_crtc_state(state, crtc); crtc 329 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 336 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_unreference_shared_dpll(state, crtc, old_crtc_state->shared_dpll); crtc 447 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 451 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 452 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 458 drivers/gpu/drm/i915/display/intel_dpll_mgr.c i = (enum intel_dpll_id) crtc->pipe; crtc 462 drivers/gpu/drm/i915/display/intel_dpll_mgr.c crtc->base.base.id, crtc->base.name, crtc 465 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pll = intel_find_shared_dpll(state, crtc, crtc 475 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_reference_shared_dpll(state, crtc, crtc 814 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc) crtc 817 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 830 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pll = intel_find_shared_dpll(state, crtc, crtc 843 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 872 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 876 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 883 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pll = hsw_ddi_hdmi_get_dpll(state, crtc); crtc 893 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pll = intel_find_shared_dpll(state, crtc, crtc 903 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_reference_shared_dpll(state, crtc, crtc 1438 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 1442 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 1463 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pll = intel_find_shared_dpll(state, crtc, crtc 1468 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pll = intel_find_shared_dpll(state, crtc, crtc 1475 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_reference_shared_dpll(state, crtc, crtc 1752 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1763 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pipe_name(crtc->pipe)); crtc 1887 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 1891 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 1892 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1909 drivers/gpu/drm/i915/display/intel_dpll_mgr.c crtc->base.base.id, crtc->base.name, pll->info->name); crtc 1911 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_reference_shared_dpll(state, crtc, crtc 1948 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 1951 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc); crtc 1953 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 2275 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 2391 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 2395 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 2417 drivers/gpu/drm/i915/display/intel_dpll_mgr.c pll = intel_find_shared_dpll(state, crtc, crtc 2426 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_reference_shared_dpll(state, crtc, crtc 2541 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 2563 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 2574 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 2700 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 2881 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 2885 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 2902 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 2906 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 2909 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 2922 drivers/gpu/drm/i915/display/intel_dpll_mgr.c port_dpll->pll = intel_find_shared_dpll(state, crtc, crtc 2933 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_reference_shared_dpll(state, crtc, crtc 2936 drivers/gpu/drm/i915/display/intel_dpll_mgr.c icl_update_active_dpll(state, crtc, encoder); crtc 2942 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 2947 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 2957 drivers/gpu/drm/i915/display/intel_dpll_mgr.c port_dpll->pll = intel_find_shared_dpll(state, crtc, crtc 2965 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_reference_shared_dpll(state, crtc, crtc 2977 drivers/gpu/drm/i915/display/intel_dpll_mgr.c port_dpll->pll = intel_find_shared_dpll(state, crtc, crtc 2985 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_reference_shared_dpll(state, crtc, crtc 2988 drivers/gpu/drm/i915/display/intel_dpll_mgr.c icl_update_active_dpll(state, crtc, encoder); crtc 2994 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_unreference_shared_dpll(state, crtc, port_dpll->pll); crtc 3000 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 3007 drivers/gpu/drm/i915/display/intel_dpll_mgr.c return icl_get_combo_phy_dpll(state, crtc, encoder); crtc 3009 drivers/gpu/drm/i915/display/intel_dpll_mgr.c return icl_get_tc_phy_dplls(state, crtc, encoder); crtc 3017 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc) crtc 3020 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_old_crtc_state(state, crtc); crtc 3022 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_atomic_get_new_crtc_state(state, crtc); crtc 3038 drivers/gpu/drm/i915/display/intel_dpll_mgr.c intel_unreference_shared_dpll(state, crtc, old_port_dpll->pll); crtc 3569 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 3578 drivers/gpu/drm/i915/display/intel_dpll_mgr.c return dpll_mgr->get_dplls(state, crtc, encoder); crtc 3593 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc) crtc 3607 drivers/gpu/drm/i915/display/intel_dpll_mgr.c dpll_mgr->put_dplls(state, crtc); crtc 3621 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc *crtc, crtc 3630 drivers/gpu/drm/i915/display/intel_dpll_mgr.c dpll_mgr->update_active_dpll(state, crtc, encoder); crtc 361 drivers/gpu/drm/i915/display/intel_dpll_mgr.h struct intel_crtc *crtc, crtc 364 drivers/gpu/drm/i915/display/intel_dpll_mgr.h struct intel_crtc *crtc); crtc 368 drivers/gpu/drm/i915/display/intel_dpll_mgr.h struct intel_crtc *crtc, crtc 280 drivers/gpu/drm/i915/display/intel_dvo.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 283 drivers/gpu/drm/i915/display/intel_dvo.c int pipe = crtc->pipe; crtc 147 drivers/gpu/drm/i915/display/intel_fbc.c fbc_ctl2 |= FBC_CTL_PLANE(params->crtc.i9xx_plane); crtc 149 drivers/gpu/drm/i915/display/intel_fbc.c I915_WRITE(FBC_FENCE_OFF, params->crtc.fence_y_offset); crtc 173 drivers/gpu/drm/i915/display/intel_fbc.c dpfc_ctl = DPFC_CTL_PLANE(params->crtc.i9xx_plane) | DPFC_SR_EN; crtc 181 drivers/gpu/drm/i915/display/intel_fbc.c I915_WRITE(DPFC_FENCE_YOFF, params->crtc.fence_y_offset); crtc 220 drivers/gpu/drm/i915/display/intel_fbc.c dpfc_ctl = DPFC_CTL_PLANE(params->crtc.i9xx_plane); crtc 246 drivers/gpu/drm/i915/display/intel_fbc.c params->crtc.fence_y_offset); crtc 255 drivers/gpu/drm/i915/display/intel_fbc.c I915_WRITE(ILK_DPFC_FENCE_YOFF, params->crtc.fence_y_offset); crtc 302 drivers/gpu/drm/i915/display/intel_fbc.c dpfc_ctl |= IVB_DPFC_CTL_PLANE(params->crtc.i9xx_plane); crtc 325 drivers/gpu/drm/i915/display/intel_fbc.c I915_WRITE(DPFC_CPU_FENCE_OFFSET, params->crtc.fence_y_offset); crtc 341 drivers/gpu/drm/i915/display/intel_fbc.c I915_WRITE(CHICKEN_PIPESL_1(params->crtc.pipe), crtc 342 drivers/gpu/drm/i915/display/intel_fbc.c I915_READ(CHICKEN_PIPESL_1(params->crtc.pipe)) | crtc 422 drivers/gpu/drm/i915/display/intel_fbc.c static bool multiple_pipes_ok(struct intel_crtc *crtc, crtc 425 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 427 drivers/gpu/drm/i915/display/intel_fbc.c enum pipe pipe = crtc->pipe; crtc 490 drivers/gpu/drm/i915/display/intel_fbc.c static int intel_fbc_alloc_cfb(struct intel_crtc *crtc) crtc 492 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 629 drivers/gpu/drm/i915/display/intel_fbc.c static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc) crtc 631 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 657 drivers/gpu/drm/i915/display/intel_fbc.c static void intel_fbc_update_state_cache(struct intel_crtc *crtc, crtc 661 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 669 drivers/gpu/drm/i915/display/intel_fbc.c cache->crtc.mode_flags = crtc_state->base.adjusted_mode.flags; crtc 671 drivers/gpu/drm/i915/display/intel_fbc.c cache->crtc.hsw_bdw_pixel_rate = crtc_state->pixel_rate; crtc 700 drivers/gpu/drm/i915/display/intel_fbc.c static bool intel_fbc_can_activate(struct intel_crtc *crtc) crtc 702 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 719 drivers/gpu/drm/i915/display/intel_fbc.c if (cache->crtc.mode_flags & DRM_MODE_FLAG_INTERLACE) { crtc 724 drivers/gpu/drm/i915/display/intel_fbc.c if (!intel_fbc_hw_tracking_covers_screen(crtc)) { crtc 770 drivers/gpu/drm/i915/display/intel_fbc.c cache->crtc.hsw_bdw_pixel_rate >= dev_priv->cdclk.hw.cdclk * 95 / 100) { crtc 827 drivers/gpu/drm/i915/display/intel_fbc.c static void intel_fbc_get_reg_params(struct intel_crtc *crtc, crtc 830 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 842 drivers/gpu/drm/i915/display/intel_fbc.c params->crtc.pipe = crtc->pipe; crtc 843 drivers/gpu/drm/i915/display/intel_fbc.c params->crtc.i9xx_plane = to_intel_plane(crtc->base.primary)->i9xx_plane; crtc 844 drivers/gpu/drm/i915/display/intel_fbc.c params->crtc.fence_y_offset = get_crtc_fence_y_offset(fbc); crtc 856 drivers/gpu/drm/i915/display/intel_fbc.c void intel_fbc_pre_update(struct intel_crtc *crtc, crtc 860 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 869 drivers/gpu/drm/i915/display/intel_fbc.c if (!multiple_pipes_ok(crtc, plane_state)) { crtc 874 drivers/gpu/drm/i915/display/intel_fbc.c if (!fbc->enabled || fbc->crtc != crtc) crtc 877 drivers/gpu/drm/i915/display/intel_fbc.c intel_fbc_update_state_cache(crtc, crtc_state, plane_state); crtc 896 drivers/gpu/drm/i915/display/intel_fbc.c struct intel_crtc *crtc = fbc->crtc; crtc 902 drivers/gpu/drm/i915/display/intel_fbc.c DRM_DEBUG_KMS("Disabling FBC on pipe %c\n", pipe_name(crtc->pipe)); crtc 907 drivers/gpu/drm/i915/display/intel_fbc.c fbc->crtc = NULL; crtc 910 drivers/gpu/drm/i915/display/intel_fbc.c static void __intel_fbc_post_update(struct intel_crtc *crtc) crtc 912 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 917 drivers/gpu/drm/i915/display/intel_fbc.c if (!fbc->enabled || fbc->crtc != crtc) crtc 930 drivers/gpu/drm/i915/display/intel_fbc.c intel_fbc_get_reg_params(crtc, &fbc->params); crtc 932 drivers/gpu/drm/i915/display/intel_fbc.c if (!intel_fbc_can_activate(crtc)) crtc 942 drivers/gpu/drm/i915/display/intel_fbc.c void intel_fbc_post_update(struct intel_crtc *crtc) crtc 944 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 951 drivers/gpu/drm/i915/display/intel_fbc.c __intel_fbc_post_update(crtc); crtc 958 drivers/gpu/drm/i915/display/intel_fbc.c return to_intel_plane(fbc->crtc->base.primary)->frontbuffer_bit; crtc 1005 drivers/gpu/drm/i915/display/intel_fbc.c __intel_fbc_post_update(fbc->crtc); crtc 1036 drivers/gpu/drm/i915/display/intel_fbc.c if (fbc->crtc && crtc 1037 drivers/gpu/drm/i915/display/intel_fbc.c !intel_atomic_get_new_crtc_state(state, fbc->crtc)) crtc 1049 drivers/gpu/drm/i915/display/intel_fbc.c struct intel_crtc *crtc = to_intel_crtc(plane_state->base.crtc); crtc 1057 drivers/gpu/drm/i915/display/intel_fbc.c crtc_state = intel_atomic_get_new_crtc_state(state, crtc); crtc 1082 drivers/gpu/drm/i915/display/intel_fbc.c void intel_fbc_enable(struct intel_crtc *crtc, crtc 1086 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1095 drivers/gpu/drm/i915/display/intel_fbc.c WARN_ON(fbc->crtc == NULL); crtc 1096 drivers/gpu/drm/i915/display/intel_fbc.c if (fbc->crtc == crtc) { crtc 1107 drivers/gpu/drm/i915/display/intel_fbc.c WARN_ON(fbc->crtc != NULL); crtc 1109 drivers/gpu/drm/i915/display/intel_fbc.c intel_fbc_update_state_cache(crtc, crtc_state, plane_state); crtc 1110 drivers/gpu/drm/i915/display/intel_fbc.c if (intel_fbc_alloc_cfb(crtc)) { crtc 1115 drivers/gpu/drm/i915/display/intel_fbc.c DRM_DEBUG_KMS("Enabling FBC on pipe %c\n", pipe_name(crtc->pipe)); crtc 1119 drivers/gpu/drm/i915/display/intel_fbc.c fbc->crtc = crtc; crtc 1130 drivers/gpu/drm/i915/display/intel_fbc.c void intel_fbc_disable(struct intel_crtc *crtc) crtc 1132 drivers/gpu/drm/i915/display/intel_fbc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1139 drivers/gpu/drm/i915/display/intel_fbc.c if (fbc->crtc == crtc) crtc 1159 drivers/gpu/drm/i915/display/intel_fbc.c WARN_ON(fbc->crtc->active); crtc 1256 drivers/gpu/drm/i915/display/intel_fbc.c struct intel_crtc *crtc; crtc 1262 drivers/gpu/drm/i915/display/intel_fbc.c for_each_intel_crtc(&dev_priv->drm, crtc) crtc 1263 drivers/gpu/drm/i915/display/intel_fbc.c if (intel_crtc_active(crtc) && crtc 1264 drivers/gpu/drm/i915/display/intel_fbc.c crtc->base.primary->state->visible) crtc 1265 drivers/gpu/drm/i915/display/intel_fbc.c dev_priv->fbc.visible_pipes_mask |= (1 << crtc->pipe); crtc 22 drivers/gpu/drm/i915/display/intel_fbc.h void intel_fbc_pre_update(struct intel_crtc *crtc, crtc 25 drivers/gpu/drm/i915/display/intel_fbc.h void intel_fbc_post_update(struct intel_crtc *crtc); crtc 28 drivers/gpu/drm/i915/display/intel_fbc.h void intel_fbc_enable(struct intel_crtc *crtc, crtc 31 drivers/gpu/drm/i915/display/intel_fbc.h void intel_fbc_disable(struct intel_crtc *crtc); crtc 320 drivers/gpu/drm/i915/display/intel_fbdev.c struct drm_crtc *crtc; crtc 325 drivers/gpu/drm/i915/display/intel_fbdev.c for_each_crtc(dev, crtc) { crtc 327 drivers/gpu/drm/i915/display/intel_fbdev.c intel_fb_obj(crtc->primary->state->fb); crtc 328 drivers/gpu/drm/i915/display/intel_fbdev.c intel_crtc = to_intel_crtc(crtc); crtc 330 drivers/gpu/drm/i915/display/intel_fbdev.c if (!crtc->state->active || !obj) { crtc 339 drivers/gpu/drm/i915/display/intel_fbdev.c fb = to_intel_framebuffer(crtc->primary->state->fb); crtc 350 drivers/gpu/drm/i915/display/intel_fbdev.c for_each_crtc(dev, crtc) { crtc 353 drivers/gpu/drm/i915/display/intel_fbdev.c intel_crtc = to_intel_crtc(crtc); crtc 355 drivers/gpu/drm/i915/display/intel_fbdev.c if (!crtc->state->active) { crtc 369 drivers/gpu/drm/i915/display/intel_fbdev.c cur_size = crtc->state->adjusted_mode.crtc_hdisplay; crtc 379 drivers/gpu/drm/i915/display/intel_fbdev.c cur_size = crtc->state->adjusted_mode.crtc_vdisplay; crtc 384 drivers/gpu/drm/i915/display/intel_fbdev.c crtc->state->adjusted_mode.crtc_hdisplay, crtc 385 drivers/gpu/drm/i915/display/intel_fbdev.c crtc->state->adjusted_mode.crtc_vdisplay, crtc 413 drivers/gpu/drm/i915/display/intel_fbdev.c for_each_crtc(dev, crtc) { crtc 414 drivers/gpu/drm/i915/display/intel_fbdev.c intel_crtc = to_intel_crtc(crtc); crtc 416 drivers/gpu/drm/i915/display/intel_fbdev.c if (!crtc->state->active) crtc 419 drivers/gpu/drm/i915/display/intel_fbdev.c WARN(!crtc->primary->state->fb, crtc 421 drivers/gpu/drm/i915/display/intel_fbdev.c crtc->base.id); crtc 57 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct intel_crtc *crtc; crtc 63 drivers/gpu/drm/i915/display/intel_fifo_underrun.c crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 65 drivers/gpu/drm/i915/display/intel_fifo_underrun.c if (crtc->cpu_fifo_underrun_disabled) crtc 76 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct intel_crtc *crtc; crtc 81 drivers/gpu/drm/i915/display/intel_fifo_underrun.c crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 83 drivers/gpu/drm/i915/display/intel_fifo_underrun.c if (crtc->pch_fifo_underrun_disabled) crtc 90 drivers/gpu/drm/i915/display/intel_fifo_underrun.c static void i9xx_check_fifo_underruns(struct intel_crtc *crtc) crtc 92 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 93 drivers/gpu/drm/i915/display/intel_fifo_underrun.c i915_reg_t reg = PIPESTAT(crtc->pipe); crtc 101 drivers/gpu/drm/i915/display/intel_fifo_underrun.c enable_mask = i915_pipestat_enable_mask(dev_priv, crtc->pipe); crtc 105 drivers/gpu/drm/i915/display/intel_fifo_underrun.c trace_intel_cpu_fifo_underrun(dev_priv, crtc->pipe); crtc 106 drivers/gpu/drm/i915/display/intel_fifo_underrun.c DRM_ERROR("pipe %c underrun\n", pipe_name(crtc->pipe)); crtc 142 drivers/gpu/drm/i915/display/intel_fifo_underrun.c static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc) crtc 144 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 145 drivers/gpu/drm/i915/display/intel_fifo_underrun.c enum pipe pipe = crtc->pipe; crtc 208 drivers/gpu/drm/i915/display/intel_fifo_underrun.c static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc) crtc 210 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 211 drivers/gpu/drm/i915/display/intel_fifo_underrun.c enum pipe pch_transcoder = crtc->pipe; crtc 256 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 261 drivers/gpu/drm/i915/display/intel_fifo_underrun.c old = !crtc->cpu_fifo_underrun_disabled; crtc 262 drivers/gpu/drm/i915/display/intel_fifo_underrun.c crtc->cpu_fifo_underrun_disabled = !enable; crtc 324 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct intel_crtc *crtc = crtc 340 drivers/gpu/drm/i915/display/intel_fifo_underrun.c old = !crtc->pch_fifo_underrun_disabled; crtc 341 drivers/gpu/drm/i915/display/intel_fifo_underrun.c crtc->pch_fifo_underrun_disabled = !enable; crtc 368 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 371 drivers/gpu/drm/i915/display/intel_fifo_underrun.c if (crtc == NULL) crtc 376 drivers/gpu/drm/i915/display/intel_fifo_underrun.c crtc->cpu_fifo_underrun_disabled) crtc 419 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct intel_crtc *crtc; crtc 423 drivers/gpu/drm/i915/display/intel_fifo_underrun.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 424 drivers/gpu/drm/i915/display/intel_fifo_underrun.c if (crtc->cpu_fifo_underrun_disabled) crtc 428 drivers/gpu/drm/i915/display/intel_fifo_underrun.c i9xx_check_fifo_underruns(crtc); crtc 430 drivers/gpu/drm/i915/display/intel_fifo_underrun.c ivybridge_check_fifo_underruns(crtc); crtc 446 drivers/gpu/drm/i915/display/intel_fifo_underrun.c struct intel_crtc *crtc; crtc 450 drivers/gpu/drm/i915/display/intel_fifo_underrun.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 451 drivers/gpu/drm/i915/display/intel_fifo_underrun.c if (crtc->pch_fifo_underrun_disabled) crtc 455 drivers/gpu/drm/i915/display/intel_fifo_underrun.c cpt_check_pch_fifo_underruns(crtc); crtc 1953 drivers/gpu/drm/i915/display/intel_hdcp.c if (!new_state->crtc) { crtc 1977 drivers/gpu/drm/i915/display/intel_hdcp.c new_state->crtc); crtc 282 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 318 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 322 drivers/gpu/drm/i915/display/intel_hdmi.c val = I915_READ(TVIDEO_DIP_CTL(crtc->pipe)); crtc 327 drivers/gpu/drm/i915/display/intel_hdmi.c I915_WRITE(TVIDEO_DIP_CTL(crtc->pipe), val); crtc 330 drivers/gpu/drm/i915/display/intel_hdmi.c *data++ = I915_READ(TVIDEO_DIP_DATA(crtc->pipe)); crtc 337 drivers/gpu/drm/i915/display/intel_hdmi.c enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; crtc 359 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 398 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 402 drivers/gpu/drm/i915/display/intel_hdmi.c val = I915_READ(TVIDEO_DIP_CTL(crtc->pipe)); crtc 407 drivers/gpu/drm/i915/display/intel_hdmi.c I915_WRITE(TVIDEO_DIP_CTL(crtc->pipe), val); crtc 410 drivers/gpu/drm/i915/display/intel_hdmi.c *data++ = I915_READ(TVIDEO_DIP_DATA(crtc->pipe)); crtc 417 drivers/gpu/drm/i915/display/intel_hdmi.c enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; crtc 435 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 471 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 475 drivers/gpu/drm/i915/display/intel_hdmi.c val = I915_READ(VLV_TVIDEO_DIP_CTL(crtc->pipe)); crtc 480 drivers/gpu/drm/i915/display/intel_hdmi.c I915_WRITE(VLV_TVIDEO_DIP_CTL(crtc->pipe), val); crtc 483 drivers/gpu/drm/i915/display/intel_hdmi.c *data++ = I915_READ(VLV_TVIDEO_DIP_DATA(crtc->pipe)); crtc 490 drivers/gpu/drm/i915/display/intel_hdmi.c enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; crtc 951 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 961 drivers/gpu/drm/i915/display/intel_hdmi.c reg = VLV_TVIDEO_DIP_GCP(crtc->pipe); crtc 963 drivers/gpu/drm/i915/display/intel_hdmi.c reg = TVIDEO_DIP_GCP(crtc->pipe); crtc 976 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 986 drivers/gpu/drm/i915/display/intel_hdmi.c reg = VLV_TVIDEO_DIP_GCP(crtc->pipe); crtc 988 drivers/gpu/drm/i915/display/intel_hdmi.c reg = TVIDEO_DIP_GCP(crtc->pipe); crtc 1023 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1082 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1131 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1433 drivers/gpu/drm/i915/display/intel_hdmi.c struct drm_crtc *crtc = connector->base.state->crtc; crtc 1434 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *intel_crtc = container_of(crtc, crtc 1723 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1747 drivers/gpu/drm/i915/display/intel_hdmi.c hdmi_val |= SDVO_PIPE_SEL_CPT(crtc->pipe); crtc 1749 drivers/gpu/drm/i915/display/intel_hdmi.c hdmi_val |= SDVO_PIPE_SEL_CHV(crtc->pipe); crtc 1751 drivers/gpu/drm/i915/display/intel_hdmi.c hdmi_val |= SDVO_PIPE_SEL(crtc->pipe); crtc 1847 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 1851 drivers/gpu/drm/i915/display/intel_hdmi.c pipe_name(crtc->pipe)); crtc 1933 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 1935 drivers/gpu/drm/i915/display/intel_hdmi.c enum pipe pipe = crtc->pipe; crtc 1997 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 2011 drivers/gpu/drm/i915/display/intel_hdmi.c if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) { crtc 2195 drivers/gpu/drm/i915/display/intel_hdmi.c to_i915(crtc_state->base.crtc->dev); crtc 2225 drivers/gpu/drm/i915/display/intel_hdmi.c if (connector_state->crtc != crtc_state->base.crtc) crtc 2268 drivers/gpu/drm/i915/display/intel_hdmi.c struct intel_crtc *intel_crtc = to_intel_crtc(config->base.crtc); crtc 233 drivers/gpu/drm/i915/display/intel_lvds.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 235 drivers/gpu/drm/i915/display/intel_lvds.c int pipe = crtc->pipe; crtc 396 drivers/gpu/drm/i915/display/intel_lvds.c struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); crtc 179 drivers/gpu/drm/i915/display/intel_overlay.c struct intel_crtc *crtc; crtc 280 drivers/gpu/drm/i915/display/intel_overlay.c enum pipe pipe = overlay->crtc->pipe; crtc 347 drivers/gpu/drm/i915/display/intel_overlay.c INTEL_FRONTBUFFER_OVERLAY(overlay->crtc->pipe)); crtc 365 drivers/gpu/drm/i915/display/intel_overlay.c overlay->crtc->overlay = NULL; crtc 366 drivers/gpu/drm/i915/display/intel_overlay.c overlay->crtc = NULL; crtc 484 drivers/gpu/drm/i915/display/intel_overlay.c overlay->crtc = NULL; crtc 664 drivers/gpu/drm/i915/display/intel_overlay.c to_intel_plane_state(overlay->crtc->base.primary->state); crtc 749 drivers/gpu/drm/i915/display/intel_overlay.c enum pipe pipe = overlay->crtc->pipe; crtc 875 drivers/gpu/drm/i915/display/intel_overlay.c struct intel_crtc *crtc) crtc 877 drivers/gpu/drm/i915/display/intel_overlay.c if (!crtc->active) crtc 881 drivers/gpu/drm/i915/display/intel_overlay.c if (crtc->config->double_wide) crtc 914 drivers/gpu/drm/i915/display/intel_overlay.c overlay->crtc->config; crtc 1059 drivers/gpu/drm/i915/display/intel_overlay.c struct intel_crtc *crtc; crtc 1084 drivers/gpu/drm/i915/display/intel_overlay.c crtc = to_intel_crtc(drmmode_crtc); crtc 1103 drivers/gpu/drm/i915/display/intel_overlay.c if (overlay->crtc != crtc) { crtc 1108 drivers/gpu/drm/i915/display/intel_overlay.c ret = check_overlay_possible_on_crtc(overlay, crtc); crtc 1112 drivers/gpu/drm/i915/display/intel_overlay.c overlay->crtc = crtc; crtc 1113 drivers/gpu/drm/i915/display/intel_overlay.c crtc->overlay = overlay; crtc 1116 drivers/gpu/drm/i915/display/intel_overlay.c if (crtc->config->pipe_src_w > 1024 && crtc 1117 drivers/gpu/drm/i915/display/intel_overlay.c crtc->config->gmch_pfit.control & PFIT_ENABLE) { crtc 654 drivers/gpu/drm/i915/display/intel_panel.c enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; crtc 707 drivers/gpu/drm/i915/display/intel_panel.c if (!panel->backlight.present || !conn_state->crtc) crtc 790 drivers/gpu/drm/i915/display/intel_panel.c enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; crtc 1015 drivers/gpu/drm/i915/display/intel_panel.c enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; crtc 1050 drivers/gpu/drm/i915/display/intel_panel.c enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; crtc 1080 drivers/gpu/drm/i915/display/intel_panel.c enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; crtc 1192 drivers/gpu/drm/i915/display/intel_panel.c enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; crtc 28 drivers/gpu/drm/i915/display/intel_panel.h void intel_pch_panel_fitting(struct intel_crtc *crtc, crtc 31 drivers/gpu/drm/i915/display/intel_panel.h void intel_gmch_panel_fitting(struct intel_crtc *crtc, crtc 79 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct intel_crtc *crtc; crtc 87 drivers/gpu/drm/i915/display/intel_pipe_crc.c if (!encoder->base.crtc) crtc 90 drivers/gpu/drm/i915/display/intel_pipe_crc.c crtc = to_intel_crtc(encoder->base.crtc); crtc 92 drivers/gpu/drm/i915/display/intel_pipe_crc.c if (crtc->pipe != pipe) crtc 287 drivers/gpu/drm/i915/display/intel_pipe_crc.c intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable) crtc 289 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 306 drivers/gpu/drm/i915/display/intel_pipe_crc.c pipe_config = intel_atomic_get_crtc_state(state, crtc); crtc 316 drivers/gpu/drm/i915/display/intel_pipe_crc.c pipe_config->base.active && crtc->pipe == PIPE_A && crtc 559 drivers/gpu/drm/i915/display/intel_pipe_crc.c const char *const *intel_crtc_get_crc_sources(struct drm_crtc *crtc, crtc 566 drivers/gpu/drm/i915/display/intel_pipe_crc.c int intel_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name, crtc 569 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 586 drivers/gpu/drm/i915/display/intel_pipe_crc.c int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name) crtc 588 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 589 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[crtc->index]; crtc 602 drivers/gpu/drm/i915/display/intel_pipe_crc.c power_domain = POWER_DOMAIN_PIPE(crtc->index); crtc 611 drivers/gpu/drm/i915/display/intel_pipe_crc.c intel_crtc_crc_setup_workarounds(to_intel_crtc(crtc), true); crtc 613 drivers/gpu/drm/i915/display/intel_pipe_crc.c ret = get_new_crc_ctl_reg(dev_priv, crtc->index, &source, &val); crtc 618 drivers/gpu/drm/i915/display/intel_pipe_crc.c I915_WRITE(PIPE_CRC_CTL(crtc->index), val); crtc 619 drivers/gpu/drm/i915/display/intel_pipe_crc.c POSTING_READ(PIPE_CRC_CTL(crtc->index)); crtc 623 drivers/gpu/drm/i915/display/intel_pipe_crc.c vlv_undo_pipe_scramble_reset(dev_priv, crtc->index); crtc 630 drivers/gpu/drm/i915/display/intel_pipe_crc.c intel_crtc_crc_setup_workarounds(to_intel_crtc(crtc), false); crtc 639 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct drm_crtc *crtc = &intel_crtc->base; crtc 640 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 641 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[crtc->index]; crtc 644 drivers/gpu/drm/i915/display/intel_pipe_crc.c if (!crtc->crc.opened) crtc 647 drivers/gpu/drm/i915/display/intel_pipe_crc.c if (get_new_crc_ctl_reg(dev_priv, crtc->index, &pipe_crc->source, &val) < 0) crtc 653 drivers/gpu/drm/i915/display/intel_pipe_crc.c I915_WRITE(PIPE_CRC_CTL(crtc->index), val); crtc 654 drivers/gpu/drm/i915/display/intel_pipe_crc.c POSTING_READ(PIPE_CRC_CTL(crtc->index)); crtc 659 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct drm_crtc *crtc = &intel_crtc->base; crtc 660 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 661 drivers/gpu/drm/i915/display/intel_pipe_crc.c struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[crtc->index]; crtc 668 drivers/gpu/drm/i915/display/intel_pipe_crc.c I915_WRITE(PIPE_CRC_CTL(crtc->index), 0); crtc 669 drivers/gpu/drm/i915/display/intel_pipe_crc.c POSTING_READ(PIPE_CRC_CTL(crtc->index)); crtc 17 drivers/gpu/drm/i915/display/intel_pipe_crc.h int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name); crtc 18 drivers/gpu/drm/i915/display/intel_pipe_crc.h int intel_crtc_verify_crc_source(struct drm_crtc *crtc, crtc 20 drivers/gpu/drm/i915/display/intel_pipe_crc.h const char *const *intel_crtc_get_crc_sources(struct drm_crtc *crtc, crtc 22 drivers/gpu/drm/i915/display/intel_pipe_crc.h void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc); crtc 23 drivers/gpu/drm/i915/display/intel_pipe_crc.h void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc); crtc 29 drivers/gpu/drm/i915/display/intel_pipe_crc.h static inline void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc) crtc 33 drivers/gpu/drm/i915/display/intel_pipe_crc.h static inline void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc) crtc 735 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; crtc 949 drivers/gpu/drm/i915/display/intel_psr.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 950 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1005 drivers/gpu/drm/i915/display/intel_psr.c struct drm_crtc *crtc; crtc 1016 drivers/gpu/drm/i915/display/intel_psr.c drm_for_each_crtc(crtc, dev) { crtc 1020 drivers/gpu/drm/i915/display/intel_psr.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 1432 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1530 drivers/gpu/drm/i915/display/intel_sdvo.c sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe); crtc 1532 drivers/gpu/drm/i915/display/intel_sdvo.c sdvox |= SDVO_PIPE_SEL(crtc->pipe); crtc 1726 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 1747 drivers/gpu/drm/i915/display/intel_sdvo.c if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) { crtc 1788 drivers/gpu/drm/i915/display/intel_sdvo.c struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); crtc 2333 drivers/gpu/drm/i915/display/intel_sdvo.c if (state->crtc) { crtc 2335 drivers/gpu/drm/i915/display/intel_sdvo.c drm_atomic_get_new_crtc_state(state->state, state->crtc); crtc 2441 drivers/gpu/drm/i915/display/intel_sdvo.c if (new_conn_state->crtc && crtc 2446 drivers/gpu/drm/i915/display/intel_sdvo.c new_conn_state->crtc); crtc 97 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 98 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 102 drivers/gpu/drm/i915/display/intel_sprite.c wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base); crtc 120 drivers/gpu/drm/i915/display/intel_sprite.c if (WARN_ON(drm_crtc_vblank_get(&crtc->base))) crtc 134 drivers/gpu/drm/i915/display/intel_sprite.c crtc->debug.min_vbl = min; crtc 135 drivers/gpu/drm/i915/display/intel_sprite.c crtc->debug.max_vbl = max; crtc 136 drivers/gpu/drm/i915/display/intel_sprite.c trace_i915_pipe_update_start(crtc); crtc 146 drivers/gpu/drm/i915/display/intel_sprite.c scanline = intel_get_crtc_scanline(crtc); crtc 152 drivers/gpu/drm/i915/display/intel_sprite.c pipe_name(crtc->pipe)); crtc 165 drivers/gpu/drm/i915/display/intel_sprite.c drm_crtc_vblank_put(&crtc->base); crtc 183 drivers/gpu/drm/i915/display/intel_sprite.c scanline = intel_get_crtc_scanline(crtc); crtc 185 drivers/gpu/drm/i915/display/intel_sprite.c crtc->debug.scanline_start = scanline; crtc 186 drivers/gpu/drm/i915/display/intel_sprite.c crtc->debug.start_vbl_time = ktime_get(); crtc 187 drivers/gpu/drm/i915/display/intel_sprite.c crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc); crtc 189 drivers/gpu/drm/i915/display/intel_sprite.c trace_i915_pipe_update_vblank_evaded(crtc); crtc 206 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 207 drivers/gpu/drm/i915/display/intel_sprite.c enum pipe pipe = crtc->pipe; crtc 208 drivers/gpu/drm/i915/display/intel_sprite.c int scanline_end = intel_get_crtc_scanline(crtc); crtc 209 drivers/gpu/drm/i915/display/intel_sprite.c u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc); crtc 211 drivers/gpu/drm/i915/display/intel_sprite.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 213 drivers/gpu/drm/i915/display/intel_sprite.c trace_i915_pipe_update_end(crtc, end_vbl_count, scanline_end); crtc 220 drivers/gpu/drm/i915/display/intel_sprite.c WARN_ON(drm_crtc_vblank_get(&crtc->base) != 0); crtc 222 drivers/gpu/drm/i915/display/intel_sprite.c spin_lock(&crtc->base.dev->event_lock); crtc 223 drivers/gpu/drm/i915/display/intel_sprite.c drm_crtc_arm_vblank_event(&crtc->base, new_crtc_state->base.event); crtc 224 drivers/gpu/drm/i915/display/intel_sprite.c spin_unlock(&crtc->base.dev->event_lock); crtc 234 drivers/gpu/drm/i915/display/intel_sprite.c if (crtc->debug.start_vbl_count && crtc 235 drivers/gpu/drm/i915/display/intel_sprite.c crtc->debug.start_vbl_count != end_vbl_count) { crtc 237 drivers/gpu/drm/i915/display/intel_sprite.c pipe_name(pipe), crtc->debug.start_vbl_count, crtc 239 drivers/gpu/drm/i915/display/intel_sprite.c ktime_us_delta(end_vbl_time, crtc->debug.start_vbl_time), crtc 240 drivers/gpu/drm/i915/display/intel_sprite.c crtc->debug.min_vbl, crtc->debug.max_vbl, crtc 241 drivers/gpu/drm/i915/display/intel_sprite.c crtc->debug.scanline_start, scanline_end); crtc 244 drivers/gpu/drm/i915/display/intel_sprite.c else if (ktime_us_delta(end_vbl_time, crtc->debug.start_vbl_time) > crtc 248 drivers/gpu/drm/i915/display/intel_sprite.c ktime_us_delta(end_vbl_time, crtc->debug.start_vbl_time), crtc 1953 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_crtc *crtc = crtc 1958 drivers/gpu/drm/i915/display/intel_sprite.c crtc->base.primary); crtc 423 drivers/gpu/drm/i915/display/intel_tc.c else if (encoder->base.crtc) crtc 424 drivers/gpu/drm/i915/display/intel_tc.c active_links = to_intel_crtc(encoder->base.crtc)->active; crtc 927 drivers/gpu/drm/i915/display/intel_tv.c to_intel_crtc(pipe_config->base.crtc)->pipe); crtc 1421 drivers/gpu/drm/i915/display/intel_tv.c struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); crtc 1568 drivers/gpu/drm/i915/display/intel_tv.c struct drm_crtc *crtc = connector->state->crtc; crtc 1569 drivers/gpu/drm/i915/display/intel_tv.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 1831 drivers/gpu/drm/i915/display/intel_tv.c if (!new_state->crtc) crtc 1835 drivers/gpu/drm/i915/display/intel_tv.c new_crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc); crtc 462 drivers/gpu/drm/i915/display/intel_vdsc.c struct drm_i915_private *i915 = to_i915(crtc_state->base.crtc->dev); crtc 486 drivers/gpu/drm/i915/display/intel_vdsc.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 489 drivers/gpu/drm/i915/display/intel_vdsc.c enum pipe pipe = crtc->pipe; crtc 905 drivers/gpu/drm/i915/display/intel_vdsc.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 907 drivers/gpu/drm/i915/display/intel_vdsc.c enum pipe pipe = crtc->pipe; crtc 941 drivers/gpu/drm/i915/display/intel_vdsc.c struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc); crtc 942 drivers/gpu/drm/i915/display/intel_vdsc.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 943 drivers/gpu/drm/i915/display/intel_vdsc.c enum pipe pipe = crtc->pipe; crtc 264 drivers/gpu/drm/i915/display/vlv_dsi.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 276 drivers/gpu/drm/i915/display/vlv_dsi.c intel_gmch_panel_fitting(crtc, pipe_config, crtc 279 drivers/gpu/drm/i915/display/vlv_dsi.c intel_pch_panel_fitting(crtc, pipe_config, crtc 627 drivers/gpu/drm/i915/display/vlv_dsi.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 666 drivers/gpu/drm/i915/display/vlv_dsi.c temp |= crtc->pipe ? crtc 749 drivers/gpu/drm/i915/display/vlv_dsi.c struct drm_crtc *crtc = pipe_config->base.crtc; crtc 750 drivers/gpu/drm/i915/display/vlv_dsi.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 751 drivers/gpu/drm/i915/display/vlv_dsi.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 1037 drivers/gpu/drm/i915/display/vlv_dsi.c struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); crtc 1048 drivers/gpu/drm/i915/display/vlv_dsi.c adjusted_mode_sw = &crtc->config->base.adjusted_mode; crtc 1063 drivers/gpu/drm/i915/display/vlv_dsi.c pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc); crtc 1318 drivers/gpu/drm/i915/display/vlv_dsi.c struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); crtc 1574 drivers/gpu/drm/i915/display/vlv_dsi.c struct intel_crtc *crtc; crtc 1582 drivers/gpu/drm/i915/display/vlv_dsi.c crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 1583 drivers/gpu/drm/i915/display/vlv_dsi.c plane = to_intel_plane(crtc->base.primary); crtc 2437 drivers/gpu/drm/i915/i915_debugfs.c struct drm_crtc *crtc = &intel_crtc->base; crtc 2451 drivers/gpu/drm/i915/i915_debugfs.c struct drm_display_mode *mode = &crtc->mode; crtc 2464 drivers/gpu/drm/i915/i915_debugfs.c struct drm_crtc *crtc = &intel_crtc->base; crtc 2466 drivers/gpu/drm/i915/i915_debugfs.c struct drm_plane_state *plane_state = crtc->primary->state; crtc 2475 drivers/gpu/drm/i915/i915_debugfs.c for_each_encoder_on_crtc(dev, crtc, intel_encoder) crtc 2721 drivers/gpu/drm/i915/i915_debugfs.c struct intel_crtc *crtc; crtc 2730 drivers/gpu/drm/i915/i915_debugfs.c for_each_intel_crtc(dev, crtc) { crtc 2733 drivers/gpu/drm/i915/i915_debugfs.c drm_modeset_lock(&crtc->base.mutex, NULL); crtc 2734 drivers/gpu/drm/i915/i915_debugfs.c pipe_config = to_intel_crtc_state(crtc->base.state); crtc 2737 drivers/gpu/drm/i915/i915_debugfs.c crtc->base.base.id, pipe_name(crtc->pipe), crtc 2744 drivers/gpu/drm/i915/i915_debugfs.c to_intel_plane(crtc->base.cursor); crtc 2746 drivers/gpu/drm/i915/i915_debugfs.c intel_crtc_info(m, crtc); crtc 2755 drivers/gpu/drm/i915/i915_debugfs.c intel_scaler_info(m, crtc); crtc 2756 drivers/gpu/drm/i915/i915_debugfs.c intel_plane_info(m, crtc); crtc 2760 drivers/gpu/drm/i915/i915_debugfs.c yesno(!crtc->cpu_fifo_underrun_disabled), crtc 2761 drivers/gpu/drm/i915/i915_debugfs.c yesno(!crtc->pch_fifo_underrun_disabled)); crtc 2762 drivers/gpu/drm/i915/i915_debugfs.c drm_modeset_unlock(&crtc->base.mutex); crtc 2958 drivers/gpu/drm/i915/i915_debugfs.c struct intel_crtc *crtc; crtc 2967 drivers/gpu/drm/i915/i915_debugfs.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 2969 drivers/gpu/drm/i915/i915_debugfs.c to_intel_crtc_state(crtc->base.state); crtc 2970 drivers/gpu/drm/i915/i915_debugfs.c enum pipe pipe = crtc->pipe; crtc 2975 drivers/gpu/drm/i915/i915_debugfs.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 3004 drivers/gpu/drm/i915/i915_debugfs.c if (connector->state->crtc != &intel_crtc->base) crtc 4166 drivers/gpu/drm/i915/i915_debugfs.c struct intel_crtc *crtc; crtc 4171 drivers/gpu/drm/i915/i915_debugfs.c for_each_intel_crtc(dev, crtc) { crtc 4178 drivers/gpu/drm/i915/i915_debugfs.c ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); crtc 4182 drivers/gpu/drm/i915/i915_debugfs.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 4222 drivers/gpu/drm/i915/i915_debugfs.c drm_modeset_unlock(&crtc->base.mutex); crtc 4492 drivers/gpu/drm/i915/i915_debugfs.c struct drm_crtc *crtc; crtc 4512 drivers/gpu/drm/i915/i915_debugfs.c crtc = connector->state->crtc; crtc 4513 drivers/gpu/drm/i915/i915_debugfs.c if (connector->status != connector_status_connected || !crtc) { crtc 4517 drivers/gpu/drm/i915/i915_debugfs.c ret = drm_modeset_lock(&crtc->mutex, &ctx); crtc 4529 drivers/gpu/drm/i915/i915_debugfs.c crtc_state = to_intel_crtc_state(crtc->state); crtc 273 drivers/gpu/drm/i915/i915_drv.h void (*update_wm)(struct intel_crtc *crtc); crtc 281 drivers/gpu/drm/i915/i915_drv.h int (*crtc_compute_clock)(struct intel_crtc *crtc, crtc 294 drivers/gpu/drm/i915/i915_drv.h void (*fdi_link_train)(struct intel_crtc *crtc, crtc 358 drivers/gpu/drm/i915/i915_drv.h struct intel_crtc *crtc; crtc 384 drivers/gpu/drm/i915/i915_drv.h } crtc; crtc 426 drivers/gpu/drm/i915/i915_drv.h } crtc; crtc 760 drivers/gpu/drm/i915/i915_irq.c u32 i915_get_vblank_counter(struct drm_crtc *crtc) crtc 762 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 763 drivers/gpu/drm/i915/i915_irq.c struct drm_vblank_crtc *vblank = &dev_priv->drm.vblank[drm_crtc_index(crtc)]; crtc 765 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 826 drivers/gpu/drm/i915/i915_irq.c u32 g4x_get_vblank_counter(struct drm_crtc *crtc) crtc 828 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 829 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 842 drivers/gpu/drm/i915/i915_irq.c static u32 __intel_get_crtc_scanline_from_timestamp(struct intel_crtc *crtc) crtc 844 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 846 drivers/gpu/drm/i915/i915_irq.c &crtc->base.dev->vblank[drm_crtc_index(&crtc->base)]; crtc 866 drivers/gpu/drm/i915/i915_irq.c scan_prev_time = I915_READ_FW(PIPE_FRMTMSTMP(crtc->pipe)); crtc 874 drivers/gpu/drm/i915/i915_irq.c scan_post_time = I915_READ_FW(PIPE_FRMTMSTMP(crtc->pipe)); crtc 886 drivers/gpu/drm/i915/i915_irq.c static int __intel_get_crtc_scanline(struct intel_crtc *crtc) crtc 888 drivers/gpu/drm/i915/i915_irq.c struct drm_device *dev = crtc->base.dev; crtc 892 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = crtc->pipe; crtc 895 drivers/gpu/drm/i915/i915_irq.c if (!crtc->active) crtc 898 drivers/gpu/drm/i915/i915_irq.c vblank = &crtc->base.dev->vblank[drm_crtc_index(&crtc->base)]; crtc 902 drivers/gpu/drm/i915/i915_irq.c return __intel_get_crtc_scanline_from_timestamp(crtc); crtc 942 drivers/gpu/drm/i915/i915_irq.c return (position + crtc->scanline_offset) % vtotal; crtc 1062 drivers/gpu/drm/i915/i915_irq.c int intel_get_crtc_scanline(struct intel_crtc *crtc) crtc 1064 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1069 drivers/gpu/drm/i915/i915_irq.c position = __intel_get_crtc_scanline(crtc); crtc 1578 drivers/gpu/drm/i915/i915_irq.c struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 1581 drivers/gpu/drm/i915/i915_irq.c trace_intel_pipe_crc(crtc, crcs); crtc 1600 drivers/gpu/drm/i915/i915_irq.c drm_crtc_add_crc_entry(&crtc->base, true, crtc 1601 drivers/gpu/drm/i915/i915_irq.c drm_crtc_accurate_vblank_count(&crtc->base), crtc 2942 drivers/gpu/drm/i915/i915_irq.c int i8xx_enable_vblank(struct drm_crtc *crtc) crtc 2944 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 2945 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 2955 drivers/gpu/drm/i915/i915_irq.c int i945gm_enable_vblank(struct drm_crtc *crtc) crtc 2957 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 2962 drivers/gpu/drm/i915/i915_irq.c return i8xx_enable_vblank(crtc); crtc 2965 drivers/gpu/drm/i915/i915_irq.c int i965_enable_vblank(struct drm_crtc *crtc) crtc 2967 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 2968 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 2979 drivers/gpu/drm/i915/i915_irq.c int ilk_enable_vblank(struct drm_crtc *crtc) crtc 2981 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 2982 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 2995 drivers/gpu/drm/i915/i915_irq.c drm_crtc_vblank_restore(crtc); crtc 3000 drivers/gpu/drm/i915/i915_irq.c int bdw_enable_vblank(struct drm_crtc *crtc) crtc 3002 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 3003 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 3014 drivers/gpu/drm/i915/i915_irq.c drm_crtc_vblank_restore(crtc); crtc 3022 drivers/gpu/drm/i915/i915_irq.c void i8xx_disable_vblank(struct drm_crtc *crtc) crtc 3024 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 3025 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 3033 drivers/gpu/drm/i915/i915_irq.c void i945gm_disable_vblank(struct drm_crtc *crtc) crtc 3035 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 3037 drivers/gpu/drm/i915/i915_irq.c i8xx_disable_vblank(crtc); crtc 3043 drivers/gpu/drm/i915/i915_irq.c void i965_disable_vblank(struct drm_crtc *crtc) crtc 3045 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 3046 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 3055 drivers/gpu/drm/i915/i915_irq.c void ilk_disable_vblank(struct drm_crtc *crtc) crtc 3057 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 3058 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 3068 drivers/gpu/drm/i915/i915_irq.c void bdw_disable_vblank(struct drm_crtc *crtc) crtc 3070 drivers/gpu/drm/i915/i915_irq.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 3071 drivers/gpu/drm/i915/i915_irq.c enum pipe pipe = to_intel_crtc(crtc)->pipe; crtc 104 drivers/gpu/drm/i915/i915_irq.h int intel_get_crtc_scanline(struct intel_crtc *crtc); crtc 121 drivers/gpu/drm/i915/i915_irq.h u32 i915_get_vblank_counter(struct drm_crtc *crtc); crtc 122 drivers/gpu/drm/i915/i915_irq.h u32 g4x_get_vblank_counter(struct drm_crtc *crtc); crtc 124 drivers/gpu/drm/i915/i915_irq.h int i8xx_enable_vblank(struct drm_crtc *crtc); crtc 125 drivers/gpu/drm/i915/i915_irq.h int i945gm_enable_vblank(struct drm_crtc *crtc); crtc 126 drivers/gpu/drm/i915/i915_irq.h int i965_enable_vblank(struct drm_crtc *crtc); crtc 127 drivers/gpu/drm/i915/i915_irq.h int ilk_enable_vblank(struct drm_crtc *crtc); crtc 128 drivers/gpu/drm/i915/i915_irq.h int bdw_enable_vblank(struct drm_crtc *crtc); crtc 129 drivers/gpu/drm/i915/i915_irq.h void i8xx_disable_vblank(struct drm_crtc *crtc); crtc 130 drivers/gpu/drm/i915/i915_irq.h void i945gm_disable_vblank(struct drm_crtc *crtc); crtc 131 drivers/gpu/drm/i915/i915_irq.h void i965_disable_vblank(struct drm_crtc *crtc); crtc 132 drivers/gpu/drm/i915/i915_irq.h void ilk_disable_vblank(struct drm_crtc *crtc); crtc 133 drivers/gpu/drm/i915/i915_irq.h void bdw_disable_vblank(struct drm_crtc *crtc); crtc 24 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct intel_crtc *crtc), crtc 25 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(crtc), crtc 33 drivers/gpu/drm/i915/i915_trace.h struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 39 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 50 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct intel_crtc *crtc), crtc 51 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(crtc), crtc 60 drivers/gpu/drm/i915/i915_trace.h struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 66 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 77 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct intel_crtc *crtc, const u32 *crcs), crtc 78 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(crtc, crcs), crtc 88 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 89 drivers/gpu/drm/i915/i915_trace.h __entry->frame = intel_crtc_get_vblank_counter(crtc); crtc 90 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = intel_get_crtc_scanline(crtc); crtc 111 drivers/gpu/drm/i915/i915_trace.h struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 113 drivers/gpu/drm/i915/i915_trace.h __entry->frame = intel_crtc_get_vblank_counter(crtc); crtc 114 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = intel_get_crtc_scanline(crtc); crtc 134 drivers/gpu/drm/i915/i915_trace.h struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 136 drivers/gpu/drm/i915/i915_trace.h __entry->frame = intel_crtc_get_vblank_counter(crtc); crtc 137 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = intel_get_crtc_scanline(crtc); crtc 157 drivers/gpu/drm/i915/i915_trace.h struct intel_crtc *crtc; crtc 158 drivers/gpu/drm/i915/i915_trace.h for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 159 drivers/gpu/drm/i915/i915_trace.h __entry->frame[crtc->pipe] = intel_crtc_get_vblank_counter(crtc); crtc 160 drivers/gpu/drm/i915/i915_trace.h __entry->scanline[crtc->pipe] = intel_get_crtc_scanline(crtc); crtc 174 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct intel_crtc *crtc, const struct g4x_wm_values *wm), crtc 175 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(crtc, wm), crtc 196 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 197 drivers/gpu/drm/i915/i915_trace.h __entry->frame = intel_crtc_get_vblank_counter(crtc); crtc 198 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = intel_get_crtc_scanline(crtc); crtc 199 drivers/gpu/drm/i915/i915_trace.h __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY]; crtc 200 drivers/gpu/drm/i915/i915_trace.h __entry->sprite = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0]; crtc 201 drivers/gpu/drm/i915/i915_trace.h __entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR]; crtc 222 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct intel_crtc *crtc, const struct vlv_wm_values *wm), crtc 223 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(crtc, wm), crtc 240 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 241 drivers/gpu/drm/i915/i915_trace.h __entry->frame = intel_crtc_get_vblank_counter(crtc); crtc 242 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = intel_get_crtc_scanline(crtc); crtc 245 drivers/gpu/drm/i915/i915_trace.h __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY]; crtc 246 drivers/gpu/drm/i915/i915_trace.h __entry->sprite0 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0]; crtc 247 drivers/gpu/drm/i915/i915_trace.h __entry->sprite1 = wm->pipe[crtc->pipe].plane[PLANE_SPRITE1]; crtc 248 drivers/gpu/drm/i915/i915_trace.h __entry->cursor = wm->pipe[crtc->pipe].plane[PLANE_CURSOR]; crtc 261 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct intel_crtc *crtc, u32 sprite0_start, u32 sprite1_start, u32 fifo_size), crtc 262 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(crtc, sprite0_start, sprite1_start, fifo_size), crtc 274 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 275 drivers/gpu/drm/i915/i915_trace.h __entry->frame = intel_crtc_get_vblank_counter(crtc); crtc 276 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = intel_get_crtc_scanline(crtc); crtc 291 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc), crtc 292 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(plane, crtc), crtc 305 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 306 drivers/gpu/drm/i915/i915_trace.h __entry->frame = intel_crtc_get_vblank_counter(crtc); crtc 307 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = intel_get_crtc_scanline(crtc); crtc 320 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct drm_plane *plane, struct intel_crtc *crtc), crtc 321 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(plane, crtc), crtc 332 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 333 drivers/gpu/drm/i915/i915_trace.h __entry->frame = intel_crtc_get_vblank_counter(crtc); crtc 334 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = intel_get_crtc_scanline(crtc); crtc 345 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct intel_crtc *crtc), crtc 346 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(crtc), crtc 357 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 358 drivers/gpu/drm/i915/i915_trace.h __entry->frame = intel_crtc_get_vblank_counter(crtc); crtc 359 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = intel_get_crtc_scanline(crtc); crtc 360 drivers/gpu/drm/i915/i915_trace.h __entry->min = crtc->debug.min_vbl; crtc 361 drivers/gpu/drm/i915/i915_trace.h __entry->max = crtc->debug.max_vbl; crtc 370 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct intel_crtc *crtc), crtc 371 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(crtc), crtc 382 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 383 drivers/gpu/drm/i915/i915_trace.h __entry->frame = crtc->debug.start_vbl_count; crtc 384 drivers/gpu/drm/i915/i915_trace.h __entry->scanline = crtc->debug.scanline_start; crtc 385 drivers/gpu/drm/i915/i915_trace.h __entry->min = crtc->debug.min_vbl; crtc 386 drivers/gpu/drm/i915/i915_trace.h __entry->max = crtc->debug.max_vbl; crtc 395 drivers/gpu/drm/i915/i915_trace.h TP_PROTO(struct intel_crtc *crtc, u32 frame, int scanline_end), crtc 396 drivers/gpu/drm/i915/i915_trace.h TP_ARGS(crtc, frame, scanline_end), crtc 405 drivers/gpu/drm/i915/i915_trace.h __entry->pipe = crtc->pipe; crtc 495 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 496 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 498 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 848 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc, *enabled = NULL; crtc 850 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 851 drivers/gpu/drm/i915/intel_pm.c if (intel_crtc_active(crtc)) { crtc 854 drivers/gpu/drm/i915/intel_pm.c enabled = crtc; crtc 864 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 879 drivers/gpu/drm/i915/intel_pm.c crtc = single_enabled_crtc(dev_priv); crtc 880 drivers/gpu/drm/i915/intel_pm.c if (crtc) { crtc 882 drivers/gpu/drm/i915/intel_pm.c &crtc->config->base.adjusted_mode; crtc 884 drivers/gpu/drm/i915/intel_pm.c crtc->base.primary->state->fb; crtc 1178 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1194 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1296 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1307 drivers/gpu/drm/i915/intel_pm.c static void g4x_invalidate_wms(struct intel_crtc *crtc, crtc 1313 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) crtc 1334 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1351 drivers/gpu/drm/i915/intel_pm.c if (new_plane_state->base.crtc != &crtc->base && crtc 1352 drivers/gpu/drm/i915/intel_pm.c old_plane_state->base.crtc != &crtc->base) crtc 1367 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) crtc 1401 drivers/gpu/drm/i915/intel_pm.c g4x_invalidate_wms(crtc, wm_state, level); crtc 1423 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 1429 drivers/gpu/drm/i915/intel_pm.c intel_atomic_get_old_crtc_state(intel_state, crtc); crtc 1447 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 1500 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 1507 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 1508 drivers/gpu/drm/i915/intel_pm.c const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x; crtc 1510 drivers/gpu/drm/i915/intel_pm.c if (!crtc->active) crtc 1529 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 1530 drivers/gpu/drm/i915/intel_pm.c const struct g4x_wm_state *wm_state = &crtc->wm.active.g4x; crtc 1531 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 1534 drivers/gpu/drm/i915/intel_pm.c if (crtc->active && wm->cxsr) crtc 1536 drivers/gpu/drm/i915/intel_pm.c if (crtc->active && wm->hpll_en) crtc 1565 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1566 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1569 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate; crtc 1577 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1578 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1584 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.g4x = crtc_state->wm.g4x.optimal; crtc 1665 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1699 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 1720 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 1746 drivers/gpu/drm/i915/intel_pm.c static void vlv_invalidate_wms(struct intel_crtc *crtc, crtc 1749 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1754 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) crtc 1777 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 1852 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1853 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1872 drivers/gpu/drm/i915/intel_pm.c if (new_plane_state->base.crtc != &crtc->base && crtc 1873 drivers/gpu/drm/i915/intel_pm.c old_plane_state->base.crtc != &crtc->base) crtc 1895 drivers/gpu/drm/i915/intel_pm.c intel_atomic_get_old_crtc_state(state, crtc); crtc 1916 drivers/gpu/drm/i915/intel_pm.c wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1; crtc 1925 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 1949 drivers/gpu/drm/i915/intel_pm.c vlv_invalidate_wms(crtc, wm_state, level); crtc 1960 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 1961 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 1977 drivers/gpu/drm/i915/intel_pm.c trace_vlv_fifo_size(crtc, sprite0_start, sprite1_start, fifo_size); crtc 1990 drivers/gpu/drm/i915/intel_pm.c switch (crtc->pipe) { crtc 2056 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 2062 drivers/gpu/drm/i915/intel_pm.c intel_atomic_get_old_crtc_state(intel_state, crtc); crtc 2080 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 2092 drivers/gpu/drm/i915/intel_pm.c vlv_invalidate_wms(crtc, intermediate, level); crtc 2108 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 2114 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 2115 drivers/gpu/drm/i915/intel_pm.c const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv; crtc 2117 drivers/gpu/drm/i915/intel_pm.c if (!crtc->active) crtc 2133 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 2134 drivers/gpu/drm/i915/intel_pm.c const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv; crtc 2135 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 2138 drivers/gpu/drm/i915/intel_pm.c if (crtc->active && wm->cxsr) crtc 2184 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 2185 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 2188 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate; crtc 2196 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 2197 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 2203 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.vlv = crtc_state->wm.vlv.optimal; crtc 2211 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 2217 drivers/gpu/drm/i915/intel_pm.c crtc = single_enabled_crtc(dev_priv); crtc 2218 drivers/gpu/drm/i915/intel_pm.c if (crtc) { crtc 2222 drivers/gpu/drm/i915/intel_pm.c &crtc->config->base.adjusted_mode; crtc 2224 drivers/gpu/drm/i915/intel_pm.c crtc->base.primary->state->fb; crtc 2227 drivers/gpu/drm/i915/intel_pm.c int hdisplay = crtc->config->pipe_src_w; crtc 2242 drivers/gpu/drm/i915/intel_pm.c crtc->base.cursor->state->crtc_w, 4, crtc 2290 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc, *enabled = NULL; crtc 2300 drivers/gpu/drm/i915/intel_pm.c crtc = intel_get_crtc_for_plane(dev_priv, PLANE_A); crtc 2301 drivers/gpu/drm/i915/intel_pm.c if (intel_crtc_active(crtc)) { crtc 2303 drivers/gpu/drm/i915/intel_pm.c &crtc->config->base.adjusted_mode; crtc 2305 drivers/gpu/drm/i915/intel_pm.c crtc->base.primary->state->fb; crtc 2316 drivers/gpu/drm/i915/intel_pm.c enabled = crtc; crtc 2327 drivers/gpu/drm/i915/intel_pm.c crtc = intel_get_crtc_for_plane(dev_priv, PLANE_B); crtc 2328 drivers/gpu/drm/i915/intel_pm.c if (intel_crtc_active(crtc)) { crtc 2330 drivers/gpu/drm/i915/intel_pm.c &crtc->config->base.adjusted_mode; crtc 2332 drivers/gpu/drm/i915/intel_pm.c crtc->base.primary->state->fb; crtc 2344 drivers/gpu/drm/i915/intel_pm.c enabled = crtc; crtc 2427 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 2432 drivers/gpu/drm/i915/intel_pm.c crtc = single_enabled_crtc(dev_priv); crtc 2433 drivers/gpu/drm/i915/intel_pm.c if (crtc == NULL) crtc 2436 drivers/gpu/drm/i915/intel_pm.c adjusted_mode = &crtc->config->base.adjusted_mode; crtc 3116 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 3198 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *intel_crtc = to_intel_crtc(newstate->base.crtc); crtc 3752 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 3784 drivers/gpu/drm/i915/intel_pm.c crtc = intel_get_crtc_for_pipe(dev_priv, pipe); crtc 3785 drivers/gpu/drm/i915/intel_pm.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 3787 drivers/gpu/drm/i915/intel_pm.c if (crtc->base.state->adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) crtc 3790 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(dev, crtc, plane) { crtc 3868 drivers/gpu/drm/i915/intel_pm.c struct drm_crtc *for_crtc = crtc_state->base.crtc; crtc 3869 drivers/gpu/drm/i915/intel_pm.c const struct intel_crtc *crtc; crtc 3912 drivers/gpu/drm/i915/intel_pm.c for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) { crtc 3915 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 3949 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 4024 drivers/gpu/drm/i915/intel_pm.c void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc, crtc 4028 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 4030 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 4039 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) crtc 4338 drivers/gpu/drm/i915/intel_pm.c struct drm_crtc *crtc = crtc_state->base.crtc; crtc 4339 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->dev); crtc 4340 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc); crtc 4645 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 4646 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 4771 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 4895 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 4931 drivers/gpu/drm/i915/intel_pm.c struct drm_device *dev = crtc_state->base.crtc->dev; crtc 5091 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 5228 drivers/gpu/drm/i915/intel_pm.c static bool skl_pipe_wm_equals(struct intel_crtc *crtc, crtc 5232 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5235 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 5269 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 5273 drivers/gpu/drm/i915/intel_pm.c for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) crtc 5274 drivers/gpu/drm/i915/intel_pm.c ret |= drm_crtc_mask(&crtc->base); crtc 5284 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); crtc 5285 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5288 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { crtc 5315 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 5320 drivers/gpu/drm/i915/intel_pm.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, crtc 5347 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 5353 drivers/gpu/drm/i915/intel_pm.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, crtc 5360 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { crtc 5376 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { crtc 5459 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 5479 drivers/gpu/drm/i915/intel_pm.c for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) crtc 5531 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc_mask(dev, crtc, realloc_pipes) { crtc 5532 drivers/gpu/drm/i915/intel_pm.c crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); crtc 5563 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc) crtc 5565 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5567 drivers/gpu/drm/i915/intel_pm.c intel_atomic_get_old_crtc_state(state, crtc); crtc 5569 drivers/gpu/drm/i915/intel_pm.c intel_atomic_get_new_crtc_state(state, crtc); crtc 5572 drivers/gpu/drm/i915/intel_pm.c for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { crtc 5603 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 5623 drivers/gpu/drm/i915/intel_pm.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, crtc 5629 drivers/gpu/drm/i915/intel_pm.c ret = skl_wm_add_affected_planes(state, crtc); crtc 5633 drivers/gpu/drm/i915/intel_pm.c if (!skl_pipe_wm_equals(crtc, crtc 5636 drivers/gpu/drm/i915/intel_pm.c results->dirty_pipes |= drm_crtc_mask(&crtc->base); crtc 5651 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5654 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 5656 drivers/gpu/drm/i915/intel_pm.c if (!(state->wm_results.dirty_pipes & drm_crtc_mask(&crtc->base))) crtc 5665 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5684 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 5687 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 5688 drivers/gpu/drm/i915/intel_pm.c const struct intel_pipe_wm *wm = &crtc->wm.active.ilk; crtc 5734 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 5735 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5738 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.ilk = crtc_state->wm.ilk.intermediate; crtc 5746 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); crtc 5747 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); crtc 5753 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.ilk = crtc_state->wm.ilk.optimal; crtc 5768 drivers/gpu/drm/i915/intel_pm.c void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc, crtc 5771 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 5772 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 5779 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 5799 drivers/gpu/drm/i915/intel_pm.c if (!crtc->active) crtc 5809 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 5813 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 5814 drivers/gpu/drm/i915/intel_pm.c crtc_state = to_intel_crtc_state(crtc->base.state); crtc 5816 drivers/gpu/drm/i915/intel_pm.c skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal); crtc 5818 drivers/gpu/drm/i915/intel_pm.c if (crtc->active) crtc 5819 drivers/gpu/drm/i915/intel_pm.c hw->dirty_pipes |= drm_crtc_mask(&crtc->base); crtc 5828 drivers/gpu/drm/i915/intel_pm.c static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc) crtc 5830 drivers/gpu/drm/i915/intel_pm.c struct drm_device *dev = crtc->base.dev; crtc 5833 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); crtc 5835 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 5848 drivers/gpu/drm/i915/intel_pm.c active->pipe_enabled = crtc->active; crtc 5876 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.ilk = *active; crtc 5989 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 5995 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 5997 drivers/gpu/drm/i915/intel_pm.c to_intel_crtc_state(crtc->base.state); crtc 5998 drivers/gpu/drm/i915/intel_pm.c struct g4x_wm_state *active = &crtc->wm.active.g4x; crtc 6000 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 6011 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 6025 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) crtc 6047 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) crtc 6073 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 6078 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = crtc 6081 drivers/gpu/drm/i915/intel_pm.c to_intel_crtc_state(crtc->base.state); crtc 6112 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 6114 drivers/gpu/drm/i915/intel_pm.c to_intel_crtc_state(crtc->base.state); crtc 6118 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.g4x = crtc_state->wm.g4x.optimal; crtc 6129 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 6171 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 6173 drivers/gpu/drm/i915/intel_pm.c to_intel_crtc_state(crtc->base.state); crtc 6174 drivers/gpu/drm/i915/intel_pm.c struct vlv_wm_state *active = &crtc->wm.active.vlv; crtc 6177 drivers/gpu/drm/i915/intel_pm.c enum pipe pipe = crtc->pipe; crtc 6193 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) { crtc 6203 drivers/gpu/drm/i915/intel_pm.c for_each_plane_id_on_crtc(crtc, plane_id) crtc 6206 drivers/gpu/drm/i915/intel_pm.c vlv_invalidate_wms(crtc, active, level); crtc 6226 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 6231 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = crtc 6234 drivers/gpu/drm/i915/intel_pm.c to_intel_crtc_state(crtc->base.state); crtc 6258 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) { crtc 6260 drivers/gpu/drm/i915/intel_pm.c to_intel_crtc_state(crtc->base.state); crtc 6264 drivers/gpu/drm/i915/intel_pm.c crtc->wm.active.vlv = crtc_state->wm.vlv.optimal; crtc 6291 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc; crtc 6295 drivers/gpu/drm/i915/intel_pm.c for_each_intel_crtc(&dev_priv->drm, crtc) crtc 6296 drivers/gpu/drm/i915/intel_pm.c ilk_pipe_wm_get_hw_state(crtc); crtc 6352 drivers/gpu/drm/i915/intel_pm.c void intel_update_watermarks(struct intel_crtc *crtc) crtc 6354 drivers/gpu/drm/i915/intel_pm.c struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); crtc 6357 drivers/gpu/drm/i915/intel_pm.c dev_priv->display.update_wm(crtc); crtc 28 drivers/gpu/drm/i915/intel_pm.h void intel_update_watermarks(struct intel_crtc *crtc); crtc 49 drivers/gpu/drm/i915/intel_pm.h void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc, crtc 54 drivers/gpu/drm/i915/intel_pm.h void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc, crtc 44 drivers/gpu/drm/imx/ipuv3-crtc.c static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc) crtc 46 drivers/gpu/drm/imx/ipuv3-crtc.c return container_of(crtc, struct ipu_crtc, base); crtc 49 drivers/gpu/drm/imx/ipuv3-crtc.c static void ipu_crtc_atomic_enable(struct drm_crtc *crtc, crtc 52 drivers/gpu/drm/imx/ipuv3-crtc.c struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); crtc 81 drivers/gpu/drm/imx/ipuv3-crtc.c static void ipu_crtc_atomic_disable(struct drm_crtc *crtc, crtc 84 drivers/gpu/drm/imx/ipuv3-crtc.c struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); crtc 98 drivers/gpu/drm/imx/ipuv3-crtc.c drm_crtc_vblank_off(crtc); crtc 100 drivers/gpu/drm/imx/ipuv3-crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 101 drivers/gpu/drm/imx/ipuv3-crtc.c if (crtc->state->event && !crtc->state->active) { crtc 102 drivers/gpu/drm/imx/ipuv3-crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 103 drivers/gpu/drm/imx/ipuv3-crtc.c crtc->state->event = NULL; crtc 105 drivers/gpu/drm/imx/ipuv3-crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 108 drivers/gpu/drm/imx/ipuv3-crtc.c static void imx_drm_crtc_reset(struct drm_crtc *crtc) crtc 112 drivers/gpu/drm/imx/ipuv3-crtc.c if (crtc->state) { crtc 113 drivers/gpu/drm/imx/ipuv3-crtc.c if (crtc->state->mode_blob) crtc 114 drivers/gpu/drm/imx/ipuv3-crtc.c drm_property_blob_put(crtc->state->mode_blob); crtc 116 drivers/gpu/drm/imx/ipuv3-crtc.c state = to_imx_crtc_state(crtc->state); crtc 122 drivers/gpu/drm/imx/ipuv3-crtc.c crtc->state = &state->base; crtc 125 drivers/gpu/drm/imx/ipuv3-crtc.c state->base.crtc = crtc; crtc 128 drivers/gpu/drm/imx/ipuv3-crtc.c static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc) crtc 136 drivers/gpu/drm/imx/ipuv3-crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); crtc 138 drivers/gpu/drm/imx/ipuv3-crtc.c WARN_ON(state->base.crtc != crtc); crtc 139 drivers/gpu/drm/imx/ipuv3-crtc.c state->base.crtc = crtc; crtc 144 drivers/gpu/drm/imx/ipuv3-crtc.c static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc, crtc 151 drivers/gpu/drm/imx/ipuv3-crtc.c static int ipu_enable_vblank(struct drm_crtc *crtc) crtc 153 drivers/gpu/drm/imx/ipuv3-crtc.c struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); crtc 160 drivers/gpu/drm/imx/ipuv3-crtc.c static void ipu_disable_vblank(struct drm_crtc *crtc) crtc 162 drivers/gpu/drm/imx/ipuv3-crtc.c struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); crtc 181 drivers/gpu/drm/imx/ipuv3-crtc.c struct drm_crtc *crtc = &ipu_crtc->base; crtc 185 drivers/gpu/drm/imx/ipuv3-crtc.c drm_crtc_handle_vblank(crtc); crtc 199 drivers/gpu/drm/imx/ipuv3-crtc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 200 drivers/gpu/drm/imx/ipuv3-crtc.c drm_crtc_send_vblank_event(crtc, ipu_crtc->event); crtc 202 drivers/gpu/drm/imx/ipuv3-crtc.c drm_crtc_vblank_put(crtc); crtc 203 drivers/gpu/drm/imx/ipuv3-crtc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 210 drivers/gpu/drm/imx/ipuv3-crtc.c static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc, crtc 214 drivers/gpu/drm/imx/ipuv3-crtc.c struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); crtc 232 drivers/gpu/drm/imx/ipuv3-crtc.c static int ipu_crtc_atomic_check(struct drm_crtc *crtc, crtc 235 drivers/gpu/drm/imx/ipuv3-crtc.c u32 primary_plane_mask = drm_plane_mask(crtc->primary); crtc 243 drivers/gpu/drm/imx/ipuv3-crtc.c static void ipu_crtc_atomic_begin(struct drm_crtc *crtc, crtc 246 drivers/gpu/drm/imx/ipuv3-crtc.c drm_crtc_vblank_on(crtc); crtc 249 drivers/gpu/drm/imx/ipuv3-crtc.c static void ipu_crtc_atomic_flush(struct drm_crtc *crtc, crtc 252 drivers/gpu/drm/imx/ipuv3-crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 253 drivers/gpu/drm/imx/ipuv3-crtc.c if (crtc->state->event) { crtc 254 drivers/gpu/drm/imx/ipuv3-crtc.c struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); crtc 256 drivers/gpu/drm/imx/ipuv3-crtc.c WARN_ON(drm_crtc_vblank_get(crtc)); crtc 257 drivers/gpu/drm/imx/ipuv3-crtc.c ipu_crtc->event = crtc->state->event; crtc 258 drivers/gpu/drm/imx/ipuv3-crtc.c crtc->state->event = NULL; crtc 260 drivers/gpu/drm/imx/ipuv3-crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 263 drivers/gpu/drm/imx/ipuv3-crtc.c static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 265 drivers/gpu/drm/imx/ipuv3-crtc.c struct drm_device *dev = crtc->dev; crtc 267 drivers/gpu/drm/imx/ipuv3-crtc.c struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); crtc 268 drivers/gpu/drm/imx/ipuv3-crtc.c struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 269 drivers/gpu/drm/imx/ipuv3-crtc.c struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state); crtc 279 drivers/gpu/drm/imx/ipuv3-crtc.c if (encoder->crtc == crtc) crtc 363 drivers/gpu/drm/imx/ipuv3-crtc.c struct drm_crtc *crtc = &ipu_crtc->base; crtc 383 drivers/gpu/drm/imx/ipuv3-crtc.c crtc->port = pdata->of_node; crtc 384 drivers/gpu/drm/imx/ipuv3-crtc.c drm_crtc_helper_add(crtc, &ipu_helper_funcs); crtc 385 drivers/gpu/drm/imx/ipuv3-crtc.c drm_crtc_init_with_planes(drm, crtc, &ipu_crtc->plane[0]->base, NULL, crtc 362 drivers/gpu/drm/imx/ipuv3-plane.c if (!state->crtc) crtc 366 drivers/gpu/drm/imx/ipuv3-plane.c drm_atomic_get_existing_crtc_state(state->state, state->crtc); crtc 550 drivers/gpu/drm/imx/ipuv3-plane.c struct drm_crtc_state *crtc_state = state->crtc->state; crtc 727 drivers/gpu/drm/imx/ipuv3-plane.c if (!state->crtc) crtc 751 drivers/gpu/drm/imx/ipuv3-plane.c struct drm_crtc *crtc; crtc 755 drivers/gpu/drm/imx/ipuv3-plane.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) { crtc 756 drivers/gpu/drm/imx/ipuv3-plane.c ret = drm_atomic_add_affected_planes(state, crtc); crtc 37 drivers/gpu/drm/imx/ipuv3-plane.h int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc, crtc 160 drivers/gpu/drm/ingenic/ingenic-drm.c struct drm_crtc crtc; crtc 209 drivers/gpu/drm/ingenic/ingenic-drm.c static inline struct ingenic_drm *drm_crtc_get_priv(struct drm_crtc *crtc) crtc 211 drivers/gpu/drm/ingenic/ingenic-drm.c return container_of(crtc, struct ingenic_drm, crtc); crtc 225 drivers/gpu/drm/ingenic/ingenic-drm.c static void ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc, crtc 228 drivers/gpu/drm/ingenic/ingenic-drm.c struct ingenic_drm *priv = drm_crtc_get_priv(crtc); crtc 236 drivers/gpu/drm/ingenic/ingenic-drm.c drm_crtc_vblank_on(crtc); crtc 239 drivers/gpu/drm/ingenic/ingenic-drm.c static void ingenic_drm_crtc_atomic_disable(struct drm_crtc *crtc, crtc 242 drivers/gpu/drm/ingenic/ingenic-drm.c struct ingenic_drm *priv = drm_crtc_get_priv(crtc); crtc 245 drivers/gpu/drm/ingenic/ingenic-drm.c drm_crtc_vblank_off(crtc); crtc 319 drivers/gpu/drm/ingenic/ingenic-drm.c static int ingenic_drm_crtc_atomic_check(struct drm_crtc *crtc, crtc 322 drivers/gpu/drm/ingenic/ingenic-drm.c struct ingenic_drm *priv = drm_crtc_get_priv(crtc); crtc 336 drivers/gpu/drm/ingenic/ingenic-drm.c static void ingenic_drm_crtc_atomic_flush(struct drm_crtc *crtc, crtc 339 drivers/gpu/drm/ingenic/ingenic-drm.c struct ingenic_drm *priv = drm_crtc_get_priv(crtc); crtc 340 drivers/gpu/drm/ingenic/ingenic-drm.c struct drm_crtc_state *state = crtc->state; crtc 342 drivers/gpu/drm/ingenic/ingenic-drm.c struct drm_framebuffer *drm_fb = crtc->primary->state->fb; crtc 359 drivers/gpu/drm/ingenic/ingenic-drm.c spin_lock_irq(&crtc->dev->event_lock); crtc 360 drivers/gpu/drm/ingenic/ingenic-drm.c if (drm_crtc_vblank_get(crtc) == 0) crtc 361 drivers/gpu/drm/ingenic/ingenic-drm.c drm_crtc_arm_vblank_event(crtc, event); crtc 363 drivers/gpu/drm/ingenic/ingenic-drm.c drm_crtc_send_vblank_event(crtc, event); crtc 364 drivers/gpu/drm/ingenic/ingenic-drm.c spin_unlock_irq(&crtc->dev->event_lock); crtc 378 drivers/gpu/drm/ingenic/ingenic-drm.c width = state->crtc->state->adjusted_mode.hdisplay; crtc 379 drivers/gpu/drm/ingenic/ingenic-drm.c height = state->crtc->state->adjusted_mode.vdisplay; crtc 479 drivers/gpu/drm/ingenic/ingenic-drm.c drm_crtc_handle_vblank(&priv->crtc); crtc 493 drivers/gpu/drm/ingenic/ingenic-drm.c static int ingenic_drm_enable_vblank(struct drm_crtc *crtc) crtc 495 drivers/gpu/drm/ingenic/ingenic-drm.c struct ingenic_drm *priv = drm_crtc_get_priv(crtc); crtc 503 drivers/gpu/drm/ingenic/ingenic-drm.c static void ingenic_drm_disable_vblank(struct drm_crtc *crtc) crtc 505 drivers/gpu/drm/ingenic/ingenic-drm.c struct ingenic_drm *priv = drm_crtc_get_priv(crtc); crtc 711 drivers/gpu/drm/ingenic/ingenic-drm.c drm_crtc_helper_add(&priv->crtc, &ingenic_drm_crtc_helper_funcs); crtc 713 drivers/gpu/drm/ingenic/ingenic-drm.c ret = drm_crtc_init_with_planes(drm, &priv->crtc, &priv->primary, crtc 125 drivers/gpu/drm/mcde/mcde_display.c drm_crtc_handle_vblank(&mcde->pipe.crtc); crtc 816 drivers/gpu/drm/mcde/mcde_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 818 drivers/gpu/drm/mcde/mcde_display.c struct drm_device *drm = crtc->dev; crtc 938 drivers/gpu/drm/mcde/mcde_display.c drm_crtc_vblank_on(crtc); crtc 946 drivers/gpu/drm/mcde/mcde_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 947 drivers/gpu/drm/mcde/mcde_display.c struct drm_device *drm = crtc->dev; crtc 951 drivers/gpu/drm/mcde/mcde_display.c drm_crtc_vblank_off(crtc); crtc 1009 drivers/gpu/drm/mcde/mcde_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 1010 drivers/gpu/drm/mcde/mcde_display.c struct drm_device *drm = crtc->dev; crtc 1012 drivers/gpu/drm/mcde/mcde_display.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 1023 drivers/gpu/drm/mcde/mcde_display.c crtc->state->event = NULL; crtc 1025 drivers/gpu/drm/mcde/mcde_display.c spin_lock_irq(&crtc->dev->event_lock); crtc 1033 drivers/gpu/drm/mcde/mcde_display.c if (crtc->state->active && drm_crtc_vblank_get(crtc) == 0) { crtc 1035 drivers/gpu/drm/mcde/mcde_display.c drm_crtc_arm_vblank_event(crtc, event); crtc 1038 drivers/gpu/drm/mcde/mcde_display.c drm_crtc_send_vblank_event(crtc, event); crtc 1041 drivers/gpu/drm/mcde/mcde_display.c spin_unlock_irq(&crtc->dev->event_lock); crtc 1066 drivers/gpu/drm/mcde/mcde_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 1067 drivers/gpu/drm/mcde/mcde_display.c struct drm_device *drm = crtc->dev; crtc 1085 drivers/gpu/drm/mcde/mcde_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 1086 drivers/gpu/drm/mcde/mcde_display.c struct drm_device *drm = crtc->dev; crtc 37 drivers/gpu/drm/mediatek/mtk_disp_color.c struct drm_crtc *crtc; crtc 62 drivers/gpu/drm/mediatek/mtk_disp_ovl.c struct drm_crtc *crtc; crtc 79 drivers/gpu/drm/mediatek/mtk_disp_ovl.c if (!priv->crtc) crtc 82 drivers/gpu/drm/mediatek/mtk_disp_ovl.c mtk_crtc_ddp_irq(priv->crtc, ovl); crtc 88 drivers/gpu/drm/mediatek/mtk_disp_ovl.c struct drm_crtc *crtc) crtc 92 drivers/gpu/drm/mediatek/mtk_disp_ovl.c ovl->crtc = crtc; crtc 101 drivers/gpu/drm/mediatek/mtk_disp_ovl.c ovl->crtc = NULL; crtc 63 drivers/gpu/drm/mediatek/mtk_disp_rdma.c struct drm_crtc *crtc; crtc 80 drivers/gpu/drm/mediatek/mtk_disp_rdma.c if (!priv->crtc) crtc 83 drivers/gpu/drm/mediatek/mtk_disp_rdma.c mtk_crtc_ddp_irq(priv->crtc, rdma); crtc 98 drivers/gpu/drm/mediatek/mtk_disp_rdma.c struct drm_crtc *crtc) crtc 102 drivers/gpu/drm/mediatek/mtk_disp_rdma.c rdma->crtc = crtc; crtc 111 drivers/gpu/drm/mediatek/mtk_disp_rdma.c rdma->crtc = NULL; crtc 73 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct drm_crtc *crtc = &mtk_crtc->base; crtc 76 drivers/gpu/drm/mediatek/mtk_drm_crtc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 77 drivers/gpu/drm/mediatek/mtk_drm_crtc.c drm_crtc_send_vblank_event(crtc, mtk_crtc->event); crtc 78 drivers/gpu/drm/mediatek/mtk_drm_crtc.c drm_crtc_vblank_put(crtc); crtc 80 drivers/gpu/drm/mediatek/mtk_drm_crtc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 92 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_drm_crtc_destroy(struct drm_crtc *crtc) crtc 94 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); crtc 98 drivers/gpu/drm/mediatek/mtk_drm_crtc.c drm_crtc_cleanup(crtc); crtc 101 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_drm_crtc_reset(struct drm_crtc *crtc) crtc 105 drivers/gpu/drm/mediatek/mtk_drm_crtc.c if (crtc->state) { crtc 106 drivers/gpu/drm/mediatek/mtk_drm_crtc.c __drm_atomic_helper_crtc_destroy_state(crtc->state); crtc 108 drivers/gpu/drm/mediatek/mtk_drm_crtc.c state = to_mtk_crtc_state(crtc->state); crtc 114 drivers/gpu/drm/mediatek/mtk_drm_crtc.c crtc->state = &state->base; crtc 117 drivers/gpu/drm/mediatek/mtk_drm_crtc.c state->base.crtc = crtc; crtc 120 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static struct drm_crtc_state *mtk_drm_crtc_duplicate_state(struct drm_crtc *crtc) crtc 128 drivers/gpu/drm/mediatek/mtk_drm_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); crtc 130 drivers/gpu/drm/mediatek/mtk_drm_crtc.c WARN_ON(state->base.crtc != crtc); crtc 131 drivers/gpu/drm/mediatek/mtk_drm_crtc.c state->base.crtc = crtc; crtc 136 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_drm_crtc_destroy_state(struct drm_crtc *crtc, crtc 143 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static bool mtk_drm_crtc_mode_fixup(struct drm_crtc *crtc, crtc 151 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 153 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_crtc_state *state = to_mtk_crtc_state(crtc->state); crtc 155 drivers/gpu/drm/mediatek/mtk_drm_crtc.c state->pending_width = crtc->mode.hdisplay; crtc 156 drivers/gpu/drm/mediatek/mtk_drm_crtc.c state->pending_height = crtc->mode.vdisplay; crtc 157 drivers/gpu/drm/mediatek/mtk_drm_crtc.c state->pending_vrefresh = crtc->mode.vrefresh; crtc 162 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static int mtk_drm_crtc_enable_vblank(struct drm_crtc *crtc) crtc 164 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); crtc 172 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_drm_crtc_disable_vblank(struct drm_crtc *crtc) crtc 174 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); crtc 212 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct drm_crtc *crtc = &mtk_crtc->base; crtc 221 drivers/gpu/drm/mediatek/mtk_drm_crtc.c if (WARN_ON(!crtc->state)) crtc 224 drivers/gpu/drm/mediatek/mtk_drm_crtc.c width = crtc->state->adjusted_mode.hdisplay; crtc 225 drivers/gpu/drm/mediatek/mtk_drm_crtc.c height = crtc->state->adjusted_mode.vdisplay; crtc 226 drivers/gpu/drm/mediatek/mtk_drm_crtc.c vrefresh = crtc->state->adjusted_mode.vrefresh; crtc 228 drivers/gpu/drm/mediatek/mtk_drm_crtc.c drm_for_each_encoder(encoder, crtc->dev) { crtc 229 drivers/gpu/drm/mediatek/mtk_drm_crtc.c if (encoder->crtc != crtc) crtc 232 drivers/gpu/drm/mediatek/mtk_drm_crtc.c drm_connector_list_iter_begin(crtc->dev, &conn_iter); crtc 243 drivers/gpu/drm/mediatek/mtk_drm_crtc.c ret = pm_runtime_get_sync(crtc->dev->dev); crtc 294 drivers/gpu/drm/mediatek/mtk_drm_crtc.c pm_runtime_put(crtc->dev->dev); crtc 301 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct drm_crtc *crtc = &mtk_crtc->base; crtc 324 drivers/gpu/drm/mediatek/mtk_drm_crtc.c if (crtc->state->event && !crtc->state->active) { crtc 325 drivers/gpu/drm/mediatek/mtk_drm_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 326 drivers/gpu/drm/mediatek/mtk_drm_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 327 drivers/gpu/drm/mediatek/mtk_drm_crtc.c crtc->state->event = NULL; crtc 328 drivers/gpu/drm/mediatek/mtk_drm_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 332 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_crtc_ddp_config(struct drm_crtc *crtc) crtc 334 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); crtc 368 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc, crtc 371 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); crtc 375 drivers/gpu/drm/mediatek/mtk_drm_crtc.c DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); crtc 389 drivers/gpu/drm/mediatek/mtk_drm_crtc.c drm_crtc_vblank_on(crtc); crtc 393 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc, crtc 396 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); crtc 400 drivers/gpu/drm/mediatek/mtk_drm_crtc.c DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); crtc 416 drivers/gpu/drm/mediatek/mtk_drm_crtc.c drm_crtc_wait_one_vblank(crtc); crtc 418 drivers/gpu/drm/mediatek/mtk_drm_crtc.c drm_crtc_vblank_off(crtc); crtc 425 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_drm_crtc_atomic_begin(struct drm_crtc *crtc, crtc 428 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_crtc_state *state = to_mtk_crtc_state(crtc->state); crtc 429 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); crtc 435 drivers/gpu/drm/mediatek/mtk_drm_crtc.c state->base.event->pipe = drm_crtc_index(crtc); crtc 436 drivers/gpu/drm/mediatek/mtk_drm_crtc.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 442 drivers/gpu/drm/mediatek/mtk_drm_crtc.c static void mtk_drm_crtc_atomic_flush(struct drm_crtc *crtc, crtc 445 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); crtc 446 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_private *priv = crtc->dev->dev_private; crtc 465 drivers/gpu/drm/mediatek/mtk_drm_crtc.c if (crtc->state->color_mgmt_changed) crtc 467 drivers/gpu/drm/mediatek/mtk_drm_crtc.c mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state); crtc 471 drivers/gpu/drm/mediatek/mtk_drm_crtc.c mtk_crtc_ddp_config(crtc); crtc 526 drivers/gpu/drm/mediatek/mtk_drm_crtc.c void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *comp) crtc 528 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); crtc 529 drivers/gpu/drm/mediatek/mtk_drm_crtc.c struct mtk_drm_private *priv = crtc->dev->dev_private; crtc 532 drivers/gpu/drm/mediatek/mtk_drm_crtc.c mtk_crtc_ddp_config(crtc); crtc 17 drivers/gpu/drm/mediatek/mtk_drm_crtc.h void mtk_drm_crtc_commit(struct drm_crtc *crtc); crtc 18 drivers/gpu/drm/mediatek/mtk_drm_crtc.h void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *comp); crtc 71 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h void (*enable_vblank)(struct mtk_ddp_comp *comp, struct drm_crtc *crtc); crtc 112 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h struct drm_crtc *crtc) crtc 115 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h comp->funcs->enable_vblank(comp, crtc); crtc 91 drivers/gpu/drm/mediatek/mtk_drm_plane.c if (!state->crtc) crtc 94 drivers/gpu/drm/mediatek/mtk_drm_plane.c crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); crtc 108 drivers/gpu/drm/mediatek/mtk_drm_plane.c struct drm_crtc *crtc = plane->state->crtc; crtc 115 drivers/gpu/drm/mediatek/mtk_drm_plane.c if (!crtc || WARN_ON(!fb)) crtc 44 drivers/gpu/drm/meson/meson_crtc.c static int meson_crtc_enable_vblank(struct drm_crtc *crtc) crtc 46 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); crtc 54 drivers/gpu/drm/meson/meson_crtc.c static void meson_crtc_disable_vblank(struct drm_crtc *crtc) crtc 56 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); crtc 74 drivers/gpu/drm/meson/meson_crtc.c static void meson_g12a_crtc_atomic_enable(struct drm_crtc *crtc, crtc 77 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); crtc 78 drivers/gpu/drm/meson/meson_crtc.c struct drm_crtc_state *crtc_state = crtc->state; crtc 107 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_vblank_on(crtc); crtc 110 drivers/gpu/drm/meson/meson_crtc.c static void meson_crtc_atomic_enable(struct drm_crtc *crtc, crtc 113 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); crtc 114 drivers/gpu/drm/meson/meson_crtc.c struct drm_crtc_state *crtc_state = crtc->state; crtc 135 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_vblank_on(crtc); crtc 138 drivers/gpu/drm/meson/meson_crtc.c static void meson_g12a_crtc_atomic_disable(struct drm_crtc *crtc, crtc 141 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); crtc 146 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_vblank_off(crtc); crtc 154 drivers/gpu/drm/meson/meson_crtc.c if (crtc->state->event && !crtc->state->active) { crtc 155 drivers/gpu/drm/meson/meson_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 156 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 157 drivers/gpu/drm/meson/meson_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 159 drivers/gpu/drm/meson/meson_crtc.c crtc->state->event = NULL; crtc 163 drivers/gpu/drm/meson/meson_crtc.c static void meson_crtc_atomic_disable(struct drm_crtc *crtc, crtc 166 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); crtc 171 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_vblank_off(crtc); crtc 184 drivers/gpu/drm/meson/meson_crtc.c if (crtc->state->event && !crtc->state->active) { crtc 185 drivers/gpu/drm/meson/meson_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 186 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 187 drivers/gpu/drm/meson/meson_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 189 drivers/gpu/drm/meson/meson_crtc.c crtc->state->event = NULL; crtc 193 drivers/gpu/drm/meson/meson_crtc.c static void meson_crtc_atomic_begin(struct drm_crtc *crtc, crtc 196 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); crtc 199 drivers/gpu/drm/meson/meson_crtc.c if (crtc->state->event) { crtc 200 drivers/gpu/drm/meson/meson_crtc.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 202 drivers/gpu/drm/meson/meson_crtc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 203 drivers/gpu/drm/meson/meson_crtc.c meson_crtc->event = crtc->state->event; crtc 204 drivers/gpu/drm/meson/meson_crtc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 205 drivers/gpu/drm/meson/meson_crtc.c crtc->state->event = NULL; crtc 209 drivers/gpu/drm/meson/meson_crtc.c static void meson_crtc_atomic_flush(struct drm_crtc *crtc, crtc 212 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(crtc); crtc 277 drivers/gpu/drm/meson/meson_crtc.c struct meson_crtc *meson_crtc = to_meson_crtc(priv->crtc); crtc 546 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_handle_vblank(priv->crtc); crtc 550 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_send_vblank_event(priv->crtc, meson_crtc->event); crtc 551 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_vblank_put(priv->crtc); crtc 560 drivers/gpu/drm/meson/meson_crtc.c struct drm_crtc *crtc; crtc 569 drivers/gpu/drm/meson/meson_crtc.c crtc = &meson_crtc->base; crtc 570 drivers/gpu/drm/meson/meson_crtc.c ret = drm_crtc_init_with_planes(priv->drm, crtc, crtc 582 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_helper_add(crtc, &meson_g12a_crtc_helper_funcs); crtc 586 drivers/gpu/drm/meson/meson_crtc.c drm_crtc_helper_add(crtc, &meson_crtc_helper_funcs); crtc 589 drivers/gpu/drm/meson/meson_crtc.c priv->crtc = crtc; crtc 41 drivers/gpu/drm/meson/meson_drv.h struct drm_crtc *crtc; crtc 92 drivers/gpu/drm/meson/meson_overlay.c if (!state->crtc) crtc 95 drivers/gpu/drm/meson/meson_overlay.c crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); crtc 147 drivers/gpu/drm/meson/meson_overlay.c struct drm_crtc_state *crtc_state = priv->crtc->state; crtc 349 drivers/gpu/drm/meson/meson_overlay.c interlace_mode = state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE; crtc 77 drivers/gpu/drm/meson/meson_plane.c if (!state->crtc) crtc 80 drivers/gpu/drm/meson/meson_plane.c crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); crtc 189 drivers/gpu/drm/meson/meson_plane.c if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { crtc 211 drivers/gpu/drm/meson/meson_plane.c if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { crtc 220 drivers/gpu/drm/meson/meson_plane.c if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) crtc 252 drivers/gpu/drm/meson/meson_plane.c if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) crtc 28 drivers/gpu/drm/mgag200/mgag200_cursor.c int mga_crtc_cursor_set(struct drm_crtc *crtc, crtc 34 drivers/gpu/drm/mgag200/mgag200_cursor.c struct drm_device *dev = crtc->dev; crtc 235 drivers/gpu/drm/mgag200/mgag200_cursor.c int mga_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) crtc 237 drivers/gpu/drm/mgag200/mgag200_cursor.c struct mga_device *mdev = (struct mga_device *)crtc->dev->dev_private; crtc 111 drivers/gpu/drm/mgag200/mgag200_drv.h struct mga_crtc *crtc; crtc 225 drivers/gpu/drm/mgag200/mgag200_drv.h int mga_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, crtc 227 drivers/gpu/drm/mgag200/mgag200_drv.h int mga_crtc_cursor_move(struct drm_crtc *crtc, int x, int y); crtc 27 drivers/gpu/drm/mgag200/mgag200_mode.c static void mga_crtc_load_lut(struct drm_crtc *crtc) crtc 29 drivers/gpu/drm/mgag200/mgag200_mode.c struct drm_device *dev = crtc->dev; crtc 31 drivers/gpu/drm/mgag200/mgag200_mode.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 35 drivers/gpu/drm/mgag200/mgag200_mode.c if (!crtc->enabled) crtc 38 drivers/gpu/drm/mgag200/mgag200_mode.c r_ptr = crtc->gamma_store; crtc 39 drivers/gpu/drm/mgag200/mgag200_mode.c g_ptr = r_ptr + crtc->gamma_size; crtc 40 drivers/gpu/drm/mgag200/mgag200_mode.c b_ptr = g_ptr + crtc->gamma_size; crtc 728 drivers/gpu/drm/mgag200/mgag200_mode.c static void mga_g200wb_prepare(struct drm_crtc *crtc) crtc 730 drivers/gpu/drm/mgag200/mgag200_mode.c struct mga_device *mdev = crtc->dev->dev_private; crtc 782 drivers/gpu/drm/mgag200/mgag200_mode.c static void mga_g200wb_commit(struct drm_crtc *crtc) crtc 785 drivers/gpu/drm/mgag200/mgag200_mode.c struct mga_device *mdev = crtc->dev->dev_private; crtc 833 drivers/gpu/drm/mgag200/mgag200_mode.c static void mga_set_start_address(struct drm_crtc *crtc, unsigned offset) crtc 835 drivers/gpu/drm/mgag200/mgag200_mode.c struct mga_device *mdev = crtc->dev->dev_private; crtc 859 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_crtc_do_set_base(struct drm_crtc *crtc, crtc 872 drivers/gpu/drm/mgag200/mgag200_mode.c gbo = drm_gem_vram_of_gem(crtc->primary->fb->obj[0]); crtc 883 drivers/gpu/drm/mgag200/mgag200_mode.c mga_set_start_address(crtc, (u32)gpu_addr); crtc 892 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, crtc 895 drivers/gpu/drm/mgag200/mgag200_mode.c return mga_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 898 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_crtc_mode_set(struct drm_crtc *crtc, crtc 903 drivers/gpu/drm/mgag200/mgag200_mode.c struct drm_device *dev = crtc->dev; crtc 905 drivers/gpu/drm/mgag200/mgag200_mode.c const struct drm_framebuffer *fb = crtc->primary->fb; crtc 1140 drivers/gpu/drm/mgag200/mgag200_mode.c mga_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 1204 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_suspend(struct drm_crtc *crtc) crtc 1206 drivers/gpu/drm/mgag200/mgag200_mode.c struct mga_crtc *mga_crtc = to_mga_crtc(crtc); crtc 1207 drivers/gpu/drm/mgag200/mgag200_mode.c struct drm_device *dev = crtc->dev; crtc 1236 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_resume(struct drm_crtc *crtc) crtc 1238 drivers/gpu/drm/mgag200/mgag200_mode.c struct mga_crtc *mga_crtc = to_mga_crtc(crtc); crtc 1239 drivers/gpu/drm/mgag200/mgag200_mode.c struct drm_device *dev = crtc->dev; crtc 1262 drivers/gpu/drm/mgag200/mgag200_mode.c static void mga_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 1264 drivers/gpu/drm/mgag200/mgag200_mode.c struct drm_device *dev = crtc->dev; crtc 1272 drivers/gpu/drm/mgag200/mgag200_mode.c mga_crtc_load_lut(crtc); crtc 1290 drivers/gpu/drm/mgag200/mgag200_mode.c mga_suspend(crtc); crtc 1305 drivers/gpu/drm/mgag200/mgag200_mode.c mga_resume(crtc); crtc 1316 drivers/gpu/drm/mgag200/mgag200_mode.c static void mga_crtc_prepare(struct drm_crtc *crtc) crtc 1318 drivers/gpu/drm/mgag200/mgag200_mode.c struct drm_device *dev = crtc->dev; crtc 1343 drivers/gpu/drm/mgag200/mgag200_mode.c mga_g200wb_prepare(crtc); crtc 1352 drivers/gpu/drm/mgag200/mgag200_mode.c static void mga_crtc_commit(struct drm_crtc *crtc) crtc 1354 drivers/gpu/drm/mgag200/mgag200_mode.c struct drm_device *dev = crtc->dev; crtc 1356 drivers/gpu/drm/mgag200/mgag200_mode.c const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; crtc 1360 drivers/gpu/drm/mgag200/mgag200_mode.c mga_g200wb_commit(crtc); crtc 1375 drivers/gpu/drm/mgag200/mgag200_mode.c crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON); crtc 1383 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, crtc 1387 drivers/gpu/drm/mgag200/mgag200_mode.c mga_crtc_load_lut(crtc); crtc 1393 drivers/gpu/drm/mgag200/mgag200_mode.c static void mga_crtc_destroy(struct drm_crtc *crtc) crtc 1395 drivers/gpu/drm/mgag200/mgag200_mode.c struct mga_crtc *mga_crtc = to_mga_crtc(crtc); crtc 1397 drivers/gpu/drm/mgag200/mgag200_mode.c drm_crtc_cleanup(crtc); crtc 1401 drivers/gpu/drm/mgag200/mgag200_mode.c static void mga_crtc_disable(struct drm_crtc *crtc) crtc 1404 drivers/gpu/drm/mgag200/mgag200_mode.c mga_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 1405 drivers/gpu/drm/mgag200/mgag200_mode.c if (crtc->primary->fb) { crtc 1406 drivers/gpu/drm/mgag200/mgag200_mode.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 1411 drivers/gpu/drm/mgag200/mgag200_mode.c crtc->primary->fb = NULL; crtc 1447 drivers/gpu/drm/mgag200/mgag200_mode.c mdev->mode_info.crtc = mga_crtc; crtc 32 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) crtc 36 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!crtc->dev || !crtc->dev->dev_private) { crtc 41 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c priv = crtc->dev->dev_private; crtc 50 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c static bool _dpu_core_video_mode_intf_connected(struct drm_crtc *crtc) crtc 54 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c drm_for_each_crtc(tmp_crtc, crtc->dev) { crtc 67 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c struct drm_crtc *crtc, crtc 73 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!kms || !kms->catalog || !crtc || !state || !perf) { crtc 98 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c crtc->base.id, perf->core_clk_rate, crtc 102 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c int dpu_core_perf_crtc_check(struct drm_crtc *crtc, crtc 113 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!crtc || !state) { crtc 118 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms = _dpu_crtc_get_kms(crtc); crtc 125 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (dpu_crtc_get_client_type(crtc) == NRT_CLIENT) crtc 131 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c _dpu_core_perf_calc_crtc(kms, crtc, state, &dpu_cstate->new_perf); crtc 134 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c curr_client_type = dpu_crtc_get_client_type(crtc); crtc 136 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c drm_for_each_crtc(tmp_crtc, crtc->dev) { crtc 139 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c curr_client_type) && (tmp_crtc != crtc)) { crtc 158 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c is_video_mode = dpu_crtc_get_intf_mode(crtc) == INTF_MODE_VIDEO; crtc 160 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c _dpu_core_video_mode_intf_connected(crtc)) ? crtc 182 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c struct drm_crtc *crtc) crtc 186 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c = dpu_crtc_get_client_type(crtc); crtc 191 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c drm_for_each_crtc(tmp_crtc, crtc->dev) { crtc 215 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc) crtc 221 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!crtc) { crtc 226 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms = _dpu_crtc_get_kms(crtc); crtc 232 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c dpu_crtc = to_dpu_crtc(crtc); crtc 233 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c dpu_cstate = to_dpu_crtc_state(crtc->state); crtc 240 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c trace_dpu_cmd_release_bw(crtc->base.id); crtc 241 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c DPU_DEBUG("Release BW crtc=%d\n", crtc->base.id); crtc 243 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c _dpu_core_perf_crtc_update_bus(kms, crtc); crtc 261 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c struct drm_crtc *crtc; crtc 264 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c drm_for_each_crtc(crtc, kms->dev) { crtc 265 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (crtc->enabled) { crtc 266 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c dpu_cstate = to_dpu_crtc_state(crtc->state); crtc 282 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c int dpu_core_perf_crtc_update(struct drm_crtc *crtc, crtc 294 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (!crtc) { crtc 299 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c kms = _dpu_crtc_get_kms(crtc); crtc 306 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c dpu_crtc = to_dpu_crtc(crtc); crtc 307 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c dpu_cstate = to_dpu_crtc_state(crtc->state); crtc 310 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c crtc->base.id, stop_req, kms->perf.core_clk_rate); crtc 315 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c if (crtc->enabled && !stop_req) { crtc 328 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c crtc->base.id, params_changed, crtc 343 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c DPU_DEBUG("crtc=%d disable\n", crtc->base.id); crtc 350 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c trace_dpu_perf_crtc_update(crtc->base.id, new->bw_ctl, crtc 354 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c ret = _dpu_core_perf_crtc_update_bus(kms, crtc); crtc 357 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c crtc->base.id); crtc 88 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h int dpu_core_perf_crtc_check(struct drm_crtc *crtc, crtc 98 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h int dpu_core_perf_crtc_update(struct drm_crtc *crtc, crtc 105 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc); crtc 43 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) crtc 45 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct msm_drm_private *priv = crtc->dev->dev_private; crtc 50 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void dpu_crtc_destroy(struct drm_crtc *crtc) crtc 52 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 56 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc) crtc 59 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_crtc_cleanup(crtc); crtc 89 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc) crtc 95 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc = to_dpu_crtc(crtc); crtc 96 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc_state = to_dpu_crtc_state(crtc->state); crtc 115 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, crtc 121 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state); crtc 132 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { crtc 143 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->base.id, crtc 160 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_setup_mixer(DRMID(crtc), DRMID(plane), crtc 181 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c _dpu_crtc_program_lm_output_roi(crtc); crtc 188 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) crtc 190 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 191 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state); crtc 214 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c _dpu_crtc_blend_setup_mixer(crtc, dpu_crtc, mixer); crtc 248 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void _dpu_crtc_complete_flip(struct drm_crtc *crtc) crtc 250 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 251 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_device *dev = crtc->dev; crtc 258 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_complete_flip(DRMID(crtc)); crtc 259 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_crtc_send_vblank_event(crtc, dpu_crtc->event); crtc 265 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc) crtc 269 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc || !crtc->dev) { crtc 274 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); crtc 277 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) crtc 283 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c void dpu_crtc_vblank_callback(struct drm_crtc *crtc) crtc 285 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 292 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c _dpu_crtc_complete_flip(crtc); crtc 293 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_crtc_handle_vblank(crtc); crtc 294 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_vblank_cb(DRMID(crtc)); crtc 301 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_crtc *crtc = fevent->crtc; crtc 302 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 308 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DRM_DEBUG_KMS("crtc%d event:%u ts:%lld\n", crtc->base.id, fevent->event, crtc 319 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_frame_event_done(DRMID(crtc), crtc 321 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_core_perf_crtc_release_bw(crtc); crtc 323 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_frame_event_more_pending(DRMID(crtc), crtc 328 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_core_perf_crtc_update(crtc, 0, false); crtc 337 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->base.id, ktime_to_ns(fevent->ts)); crtc 359 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_crtc *crtc = (struct drm_crtc *)data; crtc 370 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc = to_dpu_crtc(crtc); crtc 371 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c priv = crtc->dev->dev_private; crtc 372 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc_id = drm_crtc_index(crtc); crtc 374 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_frame_event_cb(DRMID(crtc), event); crtc 384 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DRM_ERROR("crtc%d event %d overflow\n", crtc->base.id, event); crtc 389 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c fevent->crtc = crtc; crtc 394 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c void dpu_crtc_complete_commit(struct drm_crtc *crtc) crtc 396 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_complete_commit(DRMID(crtc)); crtc 399 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc, crtc 414 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_setup_lm_bounds(DRMID(crtc), i, r); crtc 420 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void dpu_crtc_atomic_begin(struct drm_crtc *crtc, crtc 430 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc) { crtc 435 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc->state->enable) { crtc 437 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->base.id, crtc->state->enable); crtc 441 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DPU_DEBUG("crtc%d\n", crtc->base.id); crtc 443 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc = to_dpu_crtc(crtc); crtc 444 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c cstate = to_dpu_crtc_state(crtc->state); crtc 445 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dev = crtc->dev; crtc 448 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c _dpu_crtc_setup_lm_bounds(crtc, crtc->state); crtc 454 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc->event = crtc->state->event; crtc 455 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->state->event = NULL; crtc 460 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) crtc 471 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c _dpu_crtc_blend_setup(crtc); crtc 482 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void dpu_crtc_atomic_flush(struct drm_crtc *crtc, crtc 493 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc->state->enable) { crtc 495 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->base.id, crtc->state->enable); crtc 499 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DPU_DEBUG("crtc%d\n", crtc->base.id); crtc 501 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc = to_dpu_crtc(crtc); crtc 502 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c cstate = to_dpu_crtc_state(crtc->state); crtc 503 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dev = crtc->dev; crtc 506 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (crtc->index >= ARRAY_SIZE(priv->event_thread)) { crtc 507 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DPU_ERROR("invalid crtc index[%d]\n", crtc->index); crtc 511 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c event_thread = &priv->event_thread[crtc->index]; crtc 517 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc->event = crtc->state->event; crtc 518 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->state->event = NULL; crtc 537 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) crtc 541 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_core_perf_crtc_update(crtc, 1, false); crtc 548 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { crtc 562 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void dpu_crtc_destroy_state(struct drm_crtc *crtc, crtc 568 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc || !state) { crtc 573 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc = to_dpu_crtc(crtc); crtc 576 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DPU_DEBUG("crtc%d\n", crtc->base.id); crtc 583 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static int _dpu_crtc_wait_for_frame_done(struct drm_crtc *crtc) crtc 585 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 605 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c void dpu_crtc_commit_kickoff(struct drm_crtc *crtc) crtc 608 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 609 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc); crtc 610 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state); crtc 626 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc 627 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->state->encoder_mask) crtc 632 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DPU_DEBUG("crtc%d first commit\n", crtc->base.id); crtc 634 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DPU_DEBUG("crtc%d commit\n", crtc->base.id); crtc 640 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) crtc 647 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void dpu_crtc_reset(struct drm_crtc *crtc) crtc 651 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (crtc->state) crtc 652 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc_destroy_state(crtc, crtc->state); crtc 654 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c __drm_atomic_helper_crtc_reset(crtc, &cstate->base); crtc 662 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static struct drm_crtc_state *dpu_crtc_duplicate_state(struct drm_crtc *crtc) crtc 667 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc || !crtc->state) { crtc 672 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc = to_dpu_crtc(crtc); crtc 673 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c old_cstate = to_dpu_crtc_state(crtc->state); crtc 681 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &cstate->base); crtc 686 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void dpu_crtc_disable(struct drm_crtc *crtc, crtc 697 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc || !crtc->dev || !crtc->dev->dev_private || !crtc->state) { crtc 701 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc = to_dpu_crtc(crtc); crtc 702 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c cstate = to_dpu_crtc_state(crtc->state); crtc 704 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c priv = crtc->dev->dev_private; crtc 706 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DRM_DEBUG_KMS("crtc%d\n", crtc->base.id); crtc 709 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_crtc_vblank_off(crtc); crtc 711 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc 723 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (_dpu_crtc_wait_for_frame_done(crtc)) crtc 725 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->base.id, crtc 728 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_disable(DRMID(crtc), false, dpu_crtc); crtc 732 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_disable_frame_pending(DRMID(crtc), crtc 735 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_core_perf_crtc_release_bw(crtc); crtc 739 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_core_perf_crtc_update(crtc, 0, true); crtc 741 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) crtc 751 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (crtc->state->event && !crtc->state->active) { crtc 752 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 753 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 754 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->state->event = NULL; crtc 755 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 758 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c pm_runtime_put_sync(crtc->dev->dev); crtc 761 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void dpu_crtc_enable(struct drm_crtc *crtc, crtc 769 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc || !crtc->dev || !crtc->dev->dev_private) { crtc 773 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c priv = crtc->dev->dev_private; crtc 775 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c pm_runtime_get_sync(crtc->dev->dev); crtc 777 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c DRM_DEBUG_KMS("crtc%d\n", crtc->base.id); crtc 778 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc = to_dpu_crtc(crtc); crtc 780 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) { crtc 788 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc_frame_event_cb, (void *)crtc); crtc 792 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c atomic_inc(&_dpu_crtc_get_kms(crtc)->bandwidth_ref); crtc 794 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_enable(DRMID(crtc), true, dpu_crtc); crtc 797 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) crtc 798 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_encoder_assign_crtc(encoder, crtc); crtc 801 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_crtc_vblank_on(crtc); crtc 811 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static int dpu_crtc_atomic_check(struct drm_crtc *crtc, crtc 830 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c if (!crtc) { crtc 837 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_crtc = to_dpu_crtc(crtc); crtc 842 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->base.id, state->enable, state->active); crtc 857 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c _dpu_crtc_setup_lm_bounds(crtc, state); crtc 967 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c atomic_inc(&_dpu_crtc_get_kms(crtc)->bandwidth_ref); crtc 969 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c rc = dpu_core_perf_crtc_check(crtc, state); crtc 972 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->base.id, rc); crtc 1043 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c int dpu_crtc_vblank(struct drm_crtc *crtc, bool en) crtc 1045 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 1065 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c list_for_each_entry(enc, &crtc->dev->mode_config.encoder_list, head) { crtc 1066 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c trace_dpu_crtc_vblank_enable(DRMID(crtc), DRMID(enc), en, crtc 1069 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c dpu_encoder_toggle_vblank_for_crtc(enc, crtc, en); crtc 1082 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_crtc *crtc; crtc 1092 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc = &dpu_crtc->base; crtc 1094 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_modeset_lock_all(crtc->dev); crtc 1095 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c cstate = to_dpu_crtc_state(crtc->state); crtc 1097 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c mode = &crtc->state->adjusted_mode; crtc 1100 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c seq_printf(s, "crtc:%d width:%d height:%d\n", crtc->base.id, crtc 1119 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { crtc 1183 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_modeset_unlock_all(crtc->dev); crtc 1208 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_crtc *crtc = (struct drm_crtc *) s->private; crtc 1209 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 1211 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c seq_printf(s, "client type: %d\n", dpu_crtc_get_client_type(crtc)); crtc 1212 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c seq_printf(s, "intf_mode: %d\n", dpu_crtc_get_intf_mode(crtc)); crtc 1223 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc) crtc 1225 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 1235 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->dev->primary->debugfs_root); crtc 1248 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static int _dpu_crtc_init_debugfs(struct drm_crtc *crtc) crtc 1254 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static int dpu_crtc_late_register(struct drm_crtc *crtc) crtc 1256 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c return _dpu_crtc_init_debugfs(crtc); crtc 1259 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c static void dpu_crtc_early_unregister(struct drm_crtc *crtc) crtc 1261 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); crtc 1289 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c struct drm_crtc *crtc = NULL; crtc 1302 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc = &dpu_crtc->base; crtc 1303 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc->dev = dev; crtc 1320 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_crtc_init_with_planes(dev, crtc, plane, cursor, &dpu_crtc_funcs, crtc 1323 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c drm_crtc_helper_add(crtc, &dpu_crtc_helper_funcs); crtc 1326 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c snprintf(dpu_crtc->name, DPU_CRTC_NAME_SIZE, "crtc%u", crtc->base.id); crtc 1332 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c return crtc; crtc 96 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h struct drm_crtc *crtc; crtc 220 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc) crtc 222 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL; crtc 230 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h int dpu_crtc_vblank(struct drm_crtc *crtc, bool en); crtc 236 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h void dpu_crtc_vblank_callback(struct drm_crtc *crtc); crtc 242 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h void dpu_crtc_commit_kickoff(struct drm_crtc *crtc); crtc 248 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h void dpu_crtc_complete_commit(struct drm_crtc *crtc); crtc 274 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc); crtc 281 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h struct drm_crtc *crtc) crtc 283 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT; crtc 185 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c struct drm_crtc *crtc; crtc 739 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c !drm_enc->crtc) { crtc 817 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (dpu_crtc_frame_pending(drm_enc->crtc) > 1) { crtc 1155 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c cur_mode = &dpu_enc->base.crtc->state->adjusted_mode; crtc 1207 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c mode = &drm_enc->crtc->state->adjusted_mode; crtc 1274 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (dpu_enc->crtc) crtc 1275 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_crtc_vblank_callback(dpu_enc->crtc); crtc 1295 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_assign_crtc(struct drm_encoder *drm_enc, struct drm_crtc *crtc) crtc 1302 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c WARN_ON(crtc && dpu_enc->crtc); crtc 1303 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_enc->crtc = crtc; crtc 1308 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c struct drm_crtc *crtc, bool enable) crtc 1317 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (dpu_enc->crtc != crtc) { crtc 1694 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (!drm_enc->crtc || !drm_enc->crtc->state) { crtc 1698 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c mode = &drm_enc->crtc->state->adjusted_mode; crtc 1738 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c !drm_enc->crtc) { crtc 1745 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (drm_enc->crtc->index >= ARRAY_SIZE(priv->event_thread)) { crtc 1749 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c event_thread = &priv->event_thread[drm_enc->crtc->index]; crtc 1752 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c drm_enc->crtc->index); crtc 1827 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c drm_mode_vrefresh(&drm_enc->crtc->state->adjusted_mode); crtc 43 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h struct drm_crtc *crtc); crtc 53 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h struct drm_crtc *crtc, bool enable); crtc 329 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state); crtc 243 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static int dpu_kms_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) crtc 245 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c return dpu_crtc_vblank(crtc, true); crtc 248 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static void dpu_kms_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) crtc 250 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dpu_crtc_vblank(crtc, false); crtc 265 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c static ktime_t dpu_kms_vsync_time(struct msm_kms *kms, struct drm_crtc *crtc) crtc 269 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) { crtc 285 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct drm_crtc *crtc; crtc 300 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) { crtc 301 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c drm_for_each_encoder_mask(encoder, crtc->dev, crtc 311 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct drm_crtc *crtc; crtc 313 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask) { crtc 314 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!crtc->state->active) crtc 317 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c trace_dpu_kms_commit(DRMID(crtc)); crtc 318 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dpu_crtc_commit_kickoff(crtc); crtc 330 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct drm_crtc *crtc; crtc 337 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c drm_for_each_crtc(crtc, dev) { crtc 338 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!(crtc->state->encoder_mask & drm_encoder_mask(encoder))) crtc 341 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c trace_dpu_kms_enc_enable(DRMID(crtc)); crtc 348 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct drm_crtc *crtc; crtc 352 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask) crtc 353 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dpu_crtc_complete_commit(crtc); crtc 359 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct drm_crtc *crtc) crtc 365 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!kms || !crtc || !crtc->state) { crtc 370 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dev = crtc->dev; crtc 372 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!crtc->state->enable) { crtc 373 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c DPU_DEBUG("[crtc:%d] not enable\n", crtc->base.id); crtc 377 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!crtc->state->active) { crtc 378 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c DPU_DEBUG("[crtc:%d] not active\n", crtc->base.id); crtc 383 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (encoder->crtc != crtc) crtc 390 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c trace_dpu_kms_wait_for_commit_done(DRMID(crtc)); crtc 402 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct drm_crtc *crtc; crtc 404 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c for_each_crtc_mask(dpu_kms->dev, crtc, crtc_mask) crtc 405 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c dpu_kms_wait_for_commit_done(kms, crtc); crtc 501 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c struct drm_crtc *crtc; crtc 558 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c crtc = dpu_crtc_init(dev, primary_planes[i], cursor_planes[i]); crtc 559 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (IS_ERR(crtc)) { crtc 560 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c ret = PTR_ERR(crtc); crtc 563 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c priv->crtcs[priv->num_crtcs++] = crtc; crtc 225 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); crtc 226 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); crtc 370 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct drm_crtc *crtc) crtc 382 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode); crtc 852 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (state->crtc) crtc 854 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c state->crtc); crtc 974 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c struct drm_crtc *crtc = state->crtc; crtc 985 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c pdpu->is_rt_pipe = (dpu_crtc_get_client_type(crtc) != NRT_CLIENT); crtc 990 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c crtc->base.id, DRM_RECT_ARG(&state->dst), crtc 1088 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c _dpu_plane_set_ot_limit(plane, crtc); crtc 620 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c enc->base.id, crtc_state->crtc->base.id, test_only); crtc 141 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(u32 crtc, u64 bw_ctl, u32 core_clk_rate, crtc 143 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(crtc, bw_ctl, core_clk_rate, stop_req, update_bus, update_clk), crtc 145 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __field(u32, crtc) crtc 153 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->crtc = crtc; crtc 162 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->crtc, crtc 708 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h struct dpu_crtc *crtc), crtc 709 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, enc_id, enable, crtc), crtc 720 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->enabled = crtc->enabled; crtc 729 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), crtc 730 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, enable, crtc), crtc 739 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->enabled = crtc->enabled; crtc 746 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), crtc 747 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, enable, crtc) crtc 750 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), crtc 751 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, enable, crtc) crtc 754 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), crtc 755 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, enable, crtc) crtc 61 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static struct mdp4_kms *get_kms(struct drm_crtc *crtc) crtc 63 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct msm_drm_private *priv = crtc->dev->dev_private; crtc 67 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void request_pending(struct drm_crtc *crtc, uint32_t pending) crtc 69 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 72 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c mdp_irq_register(&get_kms(crtc)->base, &mdp4_crtc->vblank); crtc 75 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void crtc_flush(struct drm_crtc *crtc) crtc 77 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 78 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 82 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { crtc 97 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void complete_flip(struct drm_crtc *crtc, struct drm_file *file) crtc 99 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 100 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_device *dev = crtc->dev; crtc 109 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 125 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void mdp4_crtc_destroy(struct drm_crtc *crtc) crtc 127 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 129 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_crtc_cleanup(crtc); crtc 155 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_crtc *crtc; crtc 161 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c list_for_each_entry(crtc, &config->crtc_list, head) { crtc 162 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 165 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { crtc 176 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void blend_setup(struct drm_crtc *crtc) crtc 178 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 179 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 189 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { crtc 224 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void mdp4_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 226 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 227 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 232 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c if (WARN_ON(!crtc->state)) crtc 235 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c mode = &crtc->state->adjusted_mode; crtc 266 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void mdp4_crtc_atomic_disable(struct drm_crtc *crtc, crtc 269 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 270 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 278 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_crtc_vblank_off(crtc); crtc 286 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void mdp4_crtc_atomic_enable(struct drm_crtc *crtc, crtc 289 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 290 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 300 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_crtc_vblank_on(crtc); crtc 304 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c crtc_flush(crtc); crtc 309 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static int mdp4_crtc_atomic_check(struct drm_crtc *crtc, crtc 312 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 318 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void mdp4_crtc_atomic_begin(struct drm_crtc *crtc, crtc 321 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 325 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void mdp4_crtc_atomic_flush(struct drm_crtc *crtc, crtc 328 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 329 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_device *dev = crtc->dev; crtc 332 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c DBG("%s: event: %p", mdp4_crtc->name, crtc->state->event); crtc 337 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c mdp4_crtc->event = crtc->state->event; crtc 338 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c crtc->state->event = NULL; crtc 341 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c blend_setup(crtc); crtc 342 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c crtc_flush(crtc); crtc 343 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c request_pending(crtc, PENDING_FLIP); crtc 354 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void update_cursor(struct drm_crtc *crtc) crtc 356 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 357 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 402 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static int mdp4_crtc_cursor_set(struct drm_crtc *crtc, crtc 406 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 407 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 409 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_device *dev = crtc->dev; crtc 450 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c request_pending(crtc, PENDING_CURSOR); crtc 459 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static int mdp4_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) crtc 461 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 469 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c crtc_flush(crtc); crtc 470 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c request_pending(crtc, PENDING_CURSOR); crtc 498 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_crtc *crtc = &mdp4_crtc->base; crtc 499 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct msm_drm_private *priv = crtc->dev->dev_private; crtc 502 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c mdp_irq_unregister(&get_kms(crtc)->base, &mdp4_crtc->vblank); crtc 507 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c complete_flip(crtc, NULL); crtc 511 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c update_cursor(crtc); crtc 519 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_crtc *crtc = &mdp4_crtc->base; crtc 521 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c crtc_flush(crtc); crtc 524 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c static void mdp4_crtc_wait_for_flush_done(struct drm_crtc *crtc) crtc 526 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_device *dev = crtc->dev; crtc 527 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 528 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 531 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c ret = drm_crtc_vblank_get(crtc); crtc 535 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c ret = wait_event_timeout(dev->vblank[drm_crtc_index(crtc)].queue, crtc 544 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_crtc_vblank_put(crtc); crtc 547 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c uint32_t mdp4_crtc_vblank(struct drm_crtc *crtc) crtc 549 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 554 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c void mdp4_crtc_set_config(struct drm_crtc *crtc, uint32_t config) crtc 556 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 557 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 563 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c void mdp4_crtc_set_intf(struct drm_crtc *crtc, enum mdp4_intf intf, int mixer) crtc 565 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc); crtc 566 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct mdp4_kms *mdp4_kms = get_kms(crtc); crtc 596 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c blend_setup(crtc); crtc 603 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c void mdp4_crtc_wait_for_commit_done(struct drm_crtc *crtc) crtc 609 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c mdp4_crtc_wait_for_flush_done(crtc); crtc 621 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c struct drm_crtc *crtc = NULL; crtc 628 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c crtc = &mdp4_crtc->base; crtc 649 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_crtc_init_with_planes(dev, crtc, plane, NULL, &mdp4_crtc_funcs, crtc 651 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c drm_crtc_helper_add(crtc, &mdp4_crtc_helper_funcs); crtc 653 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c return crtc; crtc 124 drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c mdp4_crtc_set_config(encoder->crtc, crtc 133 drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c mdp4_crtc_set_intf(encoder->crtc, INTF_DSI_VIDEO, 0); crtc 181 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_crtc_set_config(encoder->crtc, crtc 186 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 1); crtc 91 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) crtc 97 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c mdp4_crtc_vblank(crtc), true); crtc 103 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) crtc 109 drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c mdp4_crtc_vblank(crtc), false); crtc 114 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct drm_crtc *crtc; crtc 118 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) crtc 119 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c drm_crtc_vblank_get(crtc); crtc 130 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct drm_crtc *crtc; crtc 132 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c for_each_crtc_mask(mdp4_kms->dev, crtc, crtc_mask) crtc 133 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c mdp4_crtc_wait_for_commit_done(crtc); crtc 139 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct drm_crtc *crtc; crtc 142 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c for_each_crtc_mask(mdp4_kms->dev, crtc, crtc_mask) crtc 143 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c drm_crtc_vblank_put(crtc); crtc 341 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c struct drm_crtc *crtc; crtc 382 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c crtc = mdp4_crtc_init(dev, plane, priv->num_crtcs, i, crtc 384 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c if (IS_ERR(crtc)) { crtc 387 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c ret = PTR_ERR(crtc); crtc 391 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c priv->crtcs[priv->num_crtcs++] = crtc; crtc 164 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); crtc 165 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); crtc 189 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h uint32_t mdp4_crtc_vblank(struct drm_crtc *crtc); crtc 190 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h void mdp4_crtc_set_config(struct drm_crtc *crtc, uint32_t config); crtc 191 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h void mdp4_crtc_set_intf(struct drm_crtc *crtc, enum mdp4_intf intf, int mixer); crtc 192 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h void mdp4_crtc_wait_for_commit_done(struct drm_crtc *crtc); crtc 382 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c mdp4_crtc_set_config(encoder->crtc, config); crtc 383 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0); crtc 47 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct drm_crtc *crtc, struct drm_framebuffer *fb, crtc 121 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c state->crtc, state->fb, crtc 193 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c struct drm_crtc *crtc, struct drm_framebuffer *fb, crtc 209 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (!(crtc && fb)) { crtc 224 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h); crtc 46 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc); crtc 90 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc); crtc 116 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc); crtc 131 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c mdp5_crtc_set_pipeline(encoder->crtc); crtc 139 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); crtc 159 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); crtc 65 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_restore_cursor(struct drm_crtc *crtc); crtc 67 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static struct mdp5_kms *get_kms(struct drm_crtc *crtc) crtc 69 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct msm_drm_private *priv = crtc->dev->dev_private; crtc 73 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void request_pending(struct drm_crtc *crtc, uint32_t pending) crtc 75 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 78 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp_irq_register(&get_kms(crtc)->base, &mdp5_crtc->vblank); crtc 81 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void request_pp_done_pending(struct drm_crtc *crtc) crtc 83 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 87 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static u32 crtc_flush(struct drm_crtc *crtc, u32 flush_mask) crtc 89 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 96 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c DBG("%s: flush=%08x", crtc->name, flush_mask); crtc 106 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static u32 crtc_flush_all(struct drm_crtc *crtc) crtc 108 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 117 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { crtc 130 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c return crtc_flush(crtc, flush_mask); crtc 134 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void complete_flip(struct drm_crtc *crtc, struct drm_file *file) crtc 136 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 138 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 140 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_device *dev = crtc->dev; crtc 148 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c DBG("%s: send event: %p", crtc->name, event); crtc 149 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 153 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (ctl && !crtc->state->enable) { crtc 172 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_destroy(struct drm_crtc *crtc) crtc 174 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 176 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_cleanup(crtc); crtc 210 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void blend_setup(struct drm_crtc *crtc) crtc 212 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 213 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 215 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(crtc); crtc 245 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { crtc 362 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 364 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 365 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 366 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(crtc); crtc 374 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (WARN_ON(!crtc->state)) crtc 377 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mode = &crtc->state->adjusted_mode; crtc 379 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c DBG("%s: set mode: " DRM_MODE_FMT, crtc->name, DRM_MODE_ARG(mode)); crtc 411 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_atomic_disable(struct drm_crtc *crtc, crtc 414 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 415 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 416 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(crtc); crtc 420 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c DBG("%s", crtc->name); crtc 426 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_vblank_off(crtc); crtc 434 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (crtc->state->event && !crtc->state->active) { crtc 437 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 438 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c crtc->state->event = NULL; crtc 445 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_vblank_on(struct drm_crtc *crtc) crtc 447 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 452 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_set_max_vblank_count(crtc, count); crtc 454 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_vblank_on(crtc); crtc 457 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_atomic_enable(struct drm_crtc *crtc, crtc 460 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 461 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 462 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(crtc); crtc 465 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c DBG("%s", crtc->name); crtc 481 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc_restore_cursor(crtc); crtc 493 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc_vblank_on(crtc); crtc 495 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc_mode_set_nofb(crtc); crtc 505 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c int mdp5_crtc_setup_pipeline(struct drm_crtc *crtc, crtc 531 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c ret = mdp5_mixer_assign(new_crtc_state->state, crtc, caps, crtc 587 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static enum mdp_mixer_stage_id get_start_stage(struct drm_crtc *crtc, crtc 610 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static int mdp5_crtc_atomic_check(struct drm_crtc *crtc, crtc 613 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(crtc); crtc 615 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_device *dev = crtc->dev; crtc 626 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c DBG("%s: check", crtc->name); crtc 660 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c ret = mdp5_crtc_setup_pipeline(crtc, state, need_right_mixer); crtc 673 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c start = get_start_stage(crtc, state, &pstates[0].state->base); crtc 689 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c DBG("%s: assign pipe %s on stage=%d", crtc->name, crtc 697 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_atomic_begin(struct drm_crtc *crtc, crtc 700 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c DBG("%s: begin", crtc->name); crtc 703 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_atomic_flush(struct drm_crtc *crtc, crtc 706 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 707 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 708 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_device *dev = crtc->dev; crtc 711 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c DBG("%s: event: %p", crtc->name, crtc->state->event); crtc 716 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc->event = crtc->state->event; crtc 717 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c crtc->state->event = NULL; crtc 729 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c blend_setup(crtc); crtc 738 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c request_pp_done_pending(crtc); crtc 740 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc->flushed_mask = crtc_flush_all(crtc); crtc 747 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c request_pending(crtc, PENDING_FLIP); crtc 750 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void get_roi(struct drm_crtc *crtc, uint32_t *roi_w, uint32_t *roi_h) crtc 752 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 753 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c uint32_t xres = crtc->mode.hdisplay; crtc 754 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c uint32_t yres = crtc->mode.vdisplay; crtc 787 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_restore_cursor(struct drm_crtc *crtc) crtc 790 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 791 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 792 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(crtc); crtc 810 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c get_roi(crtc, &roi_w, &roi_h); crtc 830 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c crtc->name, x, y, roi_w, roi_h, src_x, src_y); crtc 855 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static int mdp5_crtc_cursor_set(struct drm_crtc *crtc, crtc 859 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 860 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 862 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_device *dev = crtc->dev; crtc 863 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(crtc); crtc 918 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc_restore_cursor(crtc); crtc 930 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c crtc_flush(crtc, flush_mask); crtc 937 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c request_pending(crtc, PENDING_CURSOR); crtc 942 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) crtc 944 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(crtc); crtc 945 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 946 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 948 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_device *dev = crtc->dev; crtc 964 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (unlikely(!crtc->state->enable)) crtc 971 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c get_roi(crtc, &roi_w, &roi_h); crtc 976 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc_restore_cursor(crtc); crtc 979 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c crtc_flush(crtc, flush_mask); crtc 992 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(state->crtc); crtc 1011 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc_duplicate_state(struct drm_crtc *crtc) crtc 1015 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (WARN_ON(!crtc->state)) crtc 1018 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_cstate = kmemdup(to_mdp5_crtc_state(crtc->state), crtc 1023 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &mdp5_cstate->base); crtc 1028 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *state) crtc 1037 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_reset(struct drm_crtc *crtc) crtc 1042 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (crtc->state) crtc 1043 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc_destroy_state(crtc, crtc->state); crtc 1045 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c __drm_atomic_helper_crtc_reset(crtc, &mdp5_cstate->base); crtc 1047 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_vblank_reset(crtc); crtc 1074 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_crtc *crtc = &mdp5_crtc->base; crtc 1075 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct msm_drm_private *priv = crtc->dev->dev_private; crtc 1078 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp_irq_unregister(&get_kms(crtc)->base, &mdp5_crtc->vblank); crtc 1083 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c complete_flip(crtc, NULL); crtc 1105 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_wait_for_pp_done(struct drm_crtc *crtc) crtc 1107 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_device *dev = crtc->dev; crtc 1108 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 1109 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 1119 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c static void mdp5_crtc_wait_for_flush_done(struct drm_crtc *crtc) crtc 1121 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_device *dev = crtc->dev; crtc 1122 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 1123 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 1131 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c ret = drm_crtc_vblank_get(crtc); crtc 1135 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c ret = wait_event_timeout(dev->vblank[drm_crtc_index(crtc)].queue, crtc 1144 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_vblank_put(crtc); crtc 1147 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c uint32_t mdp5_crtc_vblank(struct drm_crtc *crtc) crtc 1149 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); crtc 1153 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c void mdp5_crtc_set_pipeline(struct drm_crtc *crtc) crtc 1155 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 1156 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_kms *mdp5_kms = get_kms(crtc); crtc 1164 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_ctl *mdp5_crtc_get_ctl(struct drm_crtc *crtc) crtc 1166 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 1171 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_hw_mixer *mdp5_crtc_get_mixer(struct drm_crtc *crtc) crtc 1175 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (WARN_ON(!crtc)) crtc 1178 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 1184 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_pipeline *mdp5_crtc_get_pipeline(struct drm_crtc *crtc) crtc 1188 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (WARN_ON(!crtc)) crtc 1191 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 1196 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c void mdp5_crtc_wait_for_commit_done(struct drm_crtc *crtc) crtc 1198 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state); crtc 1201 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc_wait_for_pp_done(crtc); crtc 1203 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_crtc_wait_for_flush_done(crtc); crtc 1211 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_crtc *crtc = NULL; crtc 1218 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c crtc = &mdp5_crtc->base; crtc 1232 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_init_with_planes(dev, crtc, plane, cursor_plane, crtc 1238 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c drm_crtc_helper_add(crtc, &mdp5_crtc_helper_funcs); crtc 1240 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c return crtc; crtc 191 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c mdp5_crtc_set_pipeline(encoder->crtc); crtc 199 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); crtc 200 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc); crtc 236 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); crtc 283 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c struct drm_crtc_state *cstate = encoder->crtc->state; crtc 104 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) crtc 111 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c mdp5_crtc_vblank(crtc), true); crtc 117 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) crtc 124 drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c mdp5_crtc_vblank(crtc), false); crtc 180 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct drm_crtc *crtc; crtc 182 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c for_each_crtc_mask(mdp5_kms->dev, crtc, crtc_mask) crtc 183 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c mdp5_crtc_wait_for_commit_done(crtc); crtc 526 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct drm_crtc *crtc; crtc 528 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c crtc = mdp5_crtc_init(dev, primary[i], cursor[i], i); crtc 529 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c if (IS_ERR(crtc)) { crtc 530 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c ret = PTR_ERR(crtc); crtc 534 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c priv->crtcs[priv->num_crtcs++] = crtc; crtc 586 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c static struct drm_encoder *get_encoder_from_crtc(struct drm_crtc *crtc) crtc 588 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct drm_device *dev = crtc->dev; crtc 592 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c if (encoder->crtc == crtc) crtc 604 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct drm_crtc *crtc; crtc 608 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c crtc = priv->crtcs[pipe]; crtc 609 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c if (!crtc) { crtc 614 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c encoder = get_encoder_from_crtc(crtc); crtc 661 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c struct drm_crtc *crtc; crtc 667 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c crtc = priv->crtcs[pipe]; crtc 668 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c if (!crtc) crtc 671 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c encoder = get_encoder_from_crtc(crtc); crtc 268 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); crtc 269 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); crtc 279 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h struct mdp5_ctl *mdp5_crtc_get_ctl(struct drm_crtc *crtc); crtc 280 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h uint32_t mdp5_crtc_vblank(struct drm_crtc *crtc); crtc 282 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h struct mdp5_hw_mixer *mdp5_crtc_get_mixer(struct drm_crtc *crtc); crtc 283 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h struct mdp5_pipeline *mdp5_crtc_get_pipeline(struct drm_crtc *crtc); crtc 284 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h void mdp5_crtc_set_pipeline(struct drm_crtc *crtc); crtc 285 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h void mdp5_crtc_wait_for_commit_done(struct drm_crtc *crtc); crtc 38 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c int mdp5_mixer_assign(struct drm_atomic_state *s, struct drm_crtc *crtc, crtc 64 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c new_state->hwmixer_to_crtc[cur->idx] != crtc) crtc 107 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c DBG("assigning Layer Mixer %d to crtc %s", (*mixer)->lm, crtc->name); crtc 109 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c new_state->hwmixer_to_crtc[(*mixer)->idx] = crtc; crtc 112 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c crtc->name); crtc 113 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c new_state->hwmixer_to_crtc[(*r_mixer)->idx] = crtc; crtc 30 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.h int mdp5_mixer_assign(struct drm_atomic_state *s, struct drm_crtc *crtc, crtc 23 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_crtc *crtc, struct drm_framebuffer *fb, crtc 408 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_crtc *crtc; crtc 411 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c crtc = state->crtc ? state->crtc : plane->state->crtc; crtc 412 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (!crtc) crtc 415 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); crtc 433 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c state->crtc, state->fb, crtc 449 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c state->crtc); crtc 463 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (plane->state->crtc != state->crtc || crtc 507 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c mdp5_crtc_get_pipeline(new_state->crtc); crtc 510 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = mdp5_plane_mode_set(plane, new_state->crtc, new_state->fb, crtc 514 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ctl = mdp5_crtc_get_ctl(new_state->crtc); crtc 914 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c struct drm_crtc *crtc, struct drm_framebuffer *fb, crtc 967 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h); crtc 88 drivers/gpu/drm/msm/hdmi/hdmi_bridge.c struct drm_crtc *crtc = hdmi->encoder->crtc; crtc 89 drivers/gpu/drm/msm/hdmi/hdmi_bridge.c const struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 105 drivers/gpu/drm/msm/msm_atomic.c struct drm_crtc *crtc; crtc 115 drivers/gpu/drm/msm/msm_atomic.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) { crtc 120 drivers/gpu/drm/msm/msm_atomic.c *async_crtc = crtc; crtc 133 drivers/gpu/drm/msm/msm_atomic.c struct drm_crtc *crtc; crtc 136 drivers/gpu/drm/msm/msm_atomic.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) crtc 137 drivers/gpu/drm/msm/msm_atomic.c mask |= drm_crtc_mask(crtc); crtc 31 drivers/gpu/drm/msm/msm_kms.h int (*enable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc); crtc 32 drivers/gpu/drm/msm/msm_kms.h void (*disable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc); crtc 68 drivers/gpu/drm/msm/msm_kms.h ktime_t (*vsync_time)(struct msm_kms *kms, struct drm_crtc *crtc); crtc 193 drivers/gpu/drm/msm/msm_kms.h #define for_each_crtc_mask(dev, crtc, crtc_mask) \ crtc 194 drivers/gpu/drm/msm/msm_kms.h drm_for_each_crtc(crtc, dev) \ crtc 195 drivers/gpu/drm/msm/msm_kms.h for_each_if (drm_crtc_mask(crtc) & (crtc_mask)) crtc 48 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_crtc *crtc = &mxsfb->pipe.crtc; crtc 49 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_device *drm = crtc->dev; crtc 50 drivers/gpu/drm/mxsfb/mxsfb_crtc.c const u32 format = crtc->primary->state->fb->format->format; crtc 91 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_crtc *crtc = &mxsfb->pipe.crtc; crtc 92 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_device *drm = crtc->dev; crtc 207 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode; crtc 306 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_crtc *crtc = &pipe->crtc; crtc 310 drivers/gpu/drm/mxsfb/mxsfb_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 311 drivers/gpu/drm/mxsfb/mxsfb_crtc.c event = crtc->state->event; crtc 313 drivers/gpu/drm/mxsfb/mxsfb_crtc.c crtc->state->event = NULL; crtc 315 drivers/gpu/drm/mxsfb/mxsfb_crtc.c if (drm_crtc_vblank_get(crtc) == 0) { crtc 316 drivers/gpu/drm/mxsfb/mxsfb_crtc.c drm_crtc_arm_vblank_event(crtc, event); crtc 318 drivers/gpu/drm/mxsfb/mxsfb_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 321 drivers/gpu/drm/mxsfb/mxsfb_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 117 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct drm_crtc *crtc = &pipe->crtc; crtc 126 drivers/gpu/drm/mxsfb/mxsfb_drv.c event = crtc->state->event; crtc 128 drivers/gpu/drm/mxsfb/mxsfb_drv.c crtc->state->event = NULL; crtc 129 drivers/gpu/drm/mxsfb/mxsfb_drv.c drm_crtc_send_vblank_event(crtc, event); crtc 307 drivers/gpu/drm/mxsfb/mxsfb_drv.c drm_crtc_handle_vblank(&mxsfb->pipe.crtc); crtc 48 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, crtc 52 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index) crtc 54 drivers/gpu/drm/nouveau/dispnv04/crtc.c NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index, crtc 58 drivers/gpu/drm/nouveau/dispnv04/crtc.c static void nv_crtc_set_digital_vibrance(struct drm_crtc *crtc, int level) crtc 60 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 61 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 65 drivers/gpu/drm/nouveau/dispnv04/crtc.c if (nv_crtc->saturation && nv_gf4_disp_arch(crtc->dev)) { crtc 68 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_5B); crtc 70 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_CSB); crtc 73 drivers/gpu/drm/nouveau/dispnv04/crtc.c static void nv_crtc_set_image_sharpening(struct drm_crtc *crtc, int level) crtc 75 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 76 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 83 drivers/gpu/drm/nouveau/dispnv04/crtc.c NVWriteRAMDAC(crtc->dev, nv_crtc->index, NV_PRAMDAC_634, regp->ramdac_634); crtc 112 drivers/gpu/drm/nouveau/dispnv04/crtc.c static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mode * mode, int dot_clock) crtc 114 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 118 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 170 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 172 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 173 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 232 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode) crtc 234 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 235 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 237 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 259 drivers/gpu/drm/nouveau/dispnv04/crtc.c if (encoder->crtc == crtc && crtc 456 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode) crtc 458 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 460 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 463 drivers/gpu/drm/nouveau/dispnv04/crtc.c const struct drm_framebuffer *fb = crtc->primary->fb; crtc 472 drivers/gpu/drm/nouveau/dispnv04/crtc.c if (encoder->crtc != crtc) crtc 529 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_set_digital_vibrance(crtc, nv_crtc->saturation); crtc 595 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_set_image_sharpening(crtc, nv_crtc->sharpness); crtc 605 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb) crtc 607 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nv04_display *disp = nv04_display(crtc->dev); crtc 608 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_framebuffer *nvfb = nouveau_framebuffer(crtc->primary->fb); crtc 609 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 631 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, crtc 635 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 636 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 643 drivers/gpu/drm/nouveau/dispnv04/crtc.c ret = nv_crtc_swap_fbs(crtc, old_fb); crtc 650 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_mode_set_vga(crtc, adjusted_mode); crtc 654 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_mode_set_regs(crtc, adjusted_mode); crtc 655 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_calc_state_ext(crtc, mode, adjusted_mode->clock); crtc 659 drivers/gpu/drm/nouveau/dispnv04/crtc.c static void nv_crtc_save(struct drm_crtc *crtc) crtc 661 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 662 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 668 drivers/gpu/drm/nouveau/dispnv04/crtc.c if (nv_two_heads(crtc->dev)) crtc 669 drivers/gpu/drm/nouveau/dispnv04/crtc.c NVSetOwner(crtc->dev, nv_crtc->index); crtc 671 drivers/gpu/drm/nouveau/dispnv04/crtc.c nouveau_hw_save_state(crtc->dev, nv_crtc->index, saved); crtc 680 drivers/gpu/drm/nouveau/dispnv04/crtc.c static void nv_crtc_restore(struct drm_crtc *crtc) crtc 682 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 683 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 687 drivers/gpu/drm/nouveau/dispnv04/crtc.c if (nv_two_heads(crtc->dev)) crtc 688 drivers/gpu/drm/nouveau/dispnv04/crtc.c NVSetOwner(crtc->dev, head); crtc 690 drivers/gpu/drm/nouveau/dispnv04/crtc.c nouveau_hw_load_state(crtc->dev, head, &nv04_display(dev)->saved_reg); crtc 691 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_lock_vga_crtc_shadow(crtc->dev, head, saved_cr21); crtc 696 drivers/gpu/drm/nouveau/dispnv04/crtc.c static void nv_crtc_prepare(struct drm_crtc *crtc) crtc 698 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 700 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 701 drivers/gpu/drm/nouveau/dispnv04/crtc.c const struct drm_crtc_helper_funcs *funcs = crtc->helper_private; crtc 706 drivers/gpu/drm/nouveau/dispnv04/crtc.c drm_crtc_vblank_off(crtc); crtc 707 drivers/gpu/drm/nouveau/dispnv04/crtc.c funcs->dpms(crtc, DRM_MODE_DPMS_OFF); crtc 719 drivers/gpu/drm/nouveau/dispnv04/crtc.c static void nv_crtc_commit(struct drm_crtc *crtc) crtc 721 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 722 drivers/gpu/drm/nouveau/dispnv04/crtc.c const struct drm_crtc_helper_funcs *funcs = crtc->helper_private; crtc 723 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 726 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_mode_set_base(crtc, crtc->x, crtc->y, NULL); crtc 737 drivers/gpu/drm/nouveau/dispnv04/crtc.c funcs->dpms(crtc, DRM_MODE_DPMS_ON); crtc 738 drivers/gpu/drm/nouveau/dispnv04/crtc.c drm_crtc_vblank_on(crtc); crtc 741 drivers/gpu/drm/nouveau/dispnv04/crtc.c static void nv_crtc_destroy(struct drm_crtc *crtc) crtc 743 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nv04_display *disp = nv04_display(crtc->dev); crtc 744 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 749 drivers/gpu/drm/nouveau/dispnv04/crtc.c drm_crtc_cleanup(crtc); crtc 762 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_gamma_load(struct drm_crtc *crtc) crtc 764 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 771 drivers/gpu/drm/nouveau/dispnv04/crtc.c r = crtc->gamma_store; crtc 772 drivers/gpu/drm/nouveau/dispnv04/crtc.c g = r + crtc->gamma_size; crtc 773 drivers/gpu/drm/nouveau/dispnv04/crtc.c b = g + crtc->gamma_size; crtc 785 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_disable(struct drm_crtc *crtc) crtc 787 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nv04_display *disp = nv04_display(crtc->dev); crtc 788 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 795 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b, crtc 799 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 811 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_gamma_load(crtc); crtc 817 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, crtc 821 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 822 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 832 drivers/gpu/drm/nouveau/dispnv04/crtc.c if (!atomic && !crtc->primary->fb) { crtc 844 drivers/gpu/drm/nouveau/dispnv04/crtc.c drm_fb = crtc->primary->fb; crtc 845 drivers/gpu/drm/nouveau/dispnv04/crtc.c fb = nouveau_framebuffer(crtc->primary->fb); crtc 852 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_gamma_load(crtc); crtc 861 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_PIXEL_INDEX); crtc 870 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_RPC0_INDEX); crtc 871 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(crtc, regp, NV_CIO_CR_OFFSET_INDEX); crtc 872 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_42); crtc 880 drivers/gpu/drm/nouveau/dispnv04/crtc.c nouveau_calc_arb(dev, crtc->mode.clock, drm_fb->format->cpp[0] * 8, crtc 885 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_FF_INDEX); crtc 886 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_FFLWM__INDEX); crtc 890 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_47); crtc 897 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, crtc 900 drivers/gpu/drm/nouveau/dispnv04/crtc.c int ret = nv_crtc_swap_fbs(crtc, old_fb); crtc 903 drivers/gpu/drm/nouveau/dispnv04/crtc.c return nv04_crtc_do_mode_set_base(crtc, old_fb, x, y, false); crtc 907 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_mode_set_base_atomic(struct drm_crtc *crtc, crtc 911 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_drm *drm = nouveau_drm(crtc->dev); crtc 919 drivers/gpu/drm/nouveau/dispnv04/crtc.c return nv04_crtc_do_mode_set_base(crtc, fb, x, y, true); crtc 983 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, crtc 986 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_drm *drm = nouveau_drm(crtc->dev); crtc 988 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 1025 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) crtc 1027 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 1036 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_crtc *crtc; crtc 1061 drivers/gpu/drm/nouveau/dispnv04/crtc.c drm_crtc_arm_vblank_event(s->crtc, s->event); crtc 1064 drivers/gpu/drm/nouveau/dispnv04/crtc.c drm_crtc_vblank_put(s->crtc); crtc 1085 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_set_crtc_base(drm->dev, drm_crtc_index(state.crtc), crtc 1086 drivers/gpu/drm/nouveau/dispnv04/crtc.c state.offset + state.crtc->y * crtc 1087 drivers/gpu/drm/nouveau/dispnv04/crtc.c state.pitch + state.crtc->x * crtc 1139 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv04_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, crtc 1144 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct drm_device *dev = crtc->dev; crtc 1146 drivers/gpu/drm/nouveau/dispnv04/crtc.c struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo; crtc 1153 drivers/gpu/drm/nouveau/dispnv04/crtc.c int head = nouveau_crtc(crtc)->index; crtc 1193 drivers/gpu/drm/nouveau/dispnv04/crtc.c { { }, event, crtc, fb->format->cpp[0] * 8, fb->pitches[0], crtc 1197 drivers/gpu/drm/nouveau/dispnv04/crtc.c drm_crtc_vblank_get(crtc); crtc 1223 drivers/gpu/drm/nouveau/dispnv04/crtc.c crtc->primary->fb = fb; crtc 1233 drivers/gpu/drm/nouveau/dispnv04/crtc.c drm_crtc_vblank_put(crtc); crtc 31 drivers/gpu/drm/nouveau/dispnv04/cursor.c crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index) crtc 33 drivers/gpu/drm/nouveau/dispnv04/cursor.c NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index, crtc 43 drivers/gpu/drm/nouveau/dispnv04/cursor.c struct drm_crtc *crtc = &nv_crtc->base; crtc 50 drivers/gpu/drm/nouveau/dispnv04/cursor.c if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN) crtc 55 drivers/gpu/drm/nouveau/dispnv04/cursor.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX); crtc 56 drivers/gpu/drm/nouveau/dispnv04/cursor.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX); crtc 57 drivers/gpu/drm/nouveau/dispnv04/cursor.c crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX); crtc 63 drivers/gpu/drm/nouveau/dispnv04/cursor.c nv04_cursor_init(struct nouveau_crtc *crtc) crtc 65 drivers/gpu/drm/nouveau/dispnv04/cursor.c crtc->cursor.set_offset = nv04_cursor_set_offset; crtc 66 drivers/gpu/drm/nouveau/dispnv04/cursor.c crtc->cursor.set_pos = nv04_cursor_set_pos; crtc 67 drivers/gpu/drm/nouveau/dispnv04/cursor.c crtc->cursor.hide = nv04_cursor_hide; crtc 68 drivers/gpu/drm/nouveau/dispnv04/cursor.c crtc->cursor.show = nv04_cursor_show; crtc 367 drivers/gpu/drm/nouveau/dispnv04/dac.c int head = nouveau_crtc(encoder->crtc)->index; crtc 380 drivers/gpu/drm/nouveau/dispnv04/dac.c int head = nouveau_crtc(encoder->crtc)->index; crtc 415 drivers/gpu/drm/nouveau/dispnv04/dac.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 116 drivers/gpu/drm/nouveau/dispnv04/dfp.c struct drm_crtc *crtc; crtc 121 drivers/gpu/drm/nouveau/dispnv04/dfp.c nv_crtc = nouveau_crtc(encoder->crtc); crtc 135 drivers/gpu/drm/nouveau/dispnv04/dfp.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 136 drivers/gpu/drm/nouveau/dispnv04/dfp.c nv_crtc = nouveau_crtc(crtc); crtc 249 drivers/gpu/drm/nouveau/dispnv04/dfp.c int head = nouveau_crtc(encoder->crtc)->index; crtc 286 drivers/gpu/drm/nouveau/dispnv04/dfp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 293 drivers/gpu/drm/nouveau/dispnv04/dfp.c const struct drm_framebuffer *fb = encoder->crtc->primary->fb; crtc 450 drivers/gpu/drm/nouveau/dispnv04/dfp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 453 drivers/gpu/drm/nouveau/dispnv04/dfp.c int head = nouveau_crtc(encoder->crtc)->index; crtc 515 drivers/gpu/drm/nouveau/dispnv04/dfp.c struct drm_crtc *crtc = encoder->crtc; crtc 534 drivers/gpu/drm/nouveau/dispnv04/dfp.c int head = crtc ? nouveau_crtc(crtc)->index : crtc 552 drivers/gpu/drm/nouveau/dispnv04/dfp.c nv04_dfp_prepare_sel_clk(dev, nv_encoder, nouveau_crtc(crtc)->index); crtc 40 drivers/gpu/drm/nouveau/dispnv04/disp.c struct drm_crtc *crtc; crtc 54 drivers/gpu/drm/nouveau/dispnv04/disp.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 57 drivers/gpu/drm/nouveau/dispnv04/disp.c nouveau_fb = nouveau_framebuffer(crtc->primary->fb); crtc 64 drivers/gpu/drm/nouveau/dispnv04/disp.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 65 drivers/gpu/drm/nouveau/dispnv04/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 80 drivers/gpu/drm/nouveau/dispnv04/disp.c struct drm_crtc *crtc; crtc 91 drivers/gpu/drm/nouveau/dispnv04/disp.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 92 drivers/gpu/drm/nouveau/dispnv04/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 106 drivers/gpu/drm/nouveau/dispnv04/disp.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 109 drivers/gpu/drm/nouveau/dispnv04/disp.c nouveau_fb = nouveau_framebuffer(crtc->primary->fb); crtc 118 drivers/gpu/drm/nouveau/dispnv04/disp.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 119 drivers/gpu/drm/nouveau/dispnv04/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 131 drivers/gpu/drm/nouveau/dispnv04/disp.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 132 drivers/gpu/drm/nouveau/dispnv04/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 147 drivers/gpu/drm/nouveau/dispnv04/disp.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 148 drivers/gpu/drm/nouveau/dispnv04/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 196 drivers/gpu/drm/nouveau/dispnv04/disp.c struct nouveau_crtc *crtc; crtc 274 drivers/gpu/drm/nouveau/dispnv04/disp.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) crtc 275 drivers/gpu/drm/nouveau/dispnv04/disp.c crtc->save(&crtc->base); crtc 168 drivers/gpu/drm/nouveau/dispnv04/disp.h struct dcb_output *outp, int crtc) crtc 172 drivers/gpu/drm/nouveau/dispnv04/disp.h init.head = crtc; crtc 112 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, crtc 124 drivers/gpu/drm/nouveau/dispnv04/overlay.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 361 drivers/gpu/drm/nouveau/dispnv04/overlay.c nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, crtc 319 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c struct drm_display_mode *mode = &encoder->crtc->mode; crtc 546 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c int head = nouveau_crtc(encoder->crtc)->index; crtc 548 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c struct drm_display_mode *crtc_mode = &encoder->crtc->mode; crtc 88 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c int head = nouveau_crtc(encoder->crtc)->index; crtc 127 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c int head = nouveau_crtc(encoder->crtc)->index; crtc 145 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 169 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 402 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c int head = nouveau_crtc(encoder->crtc)->index; crtc 423 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c !enc->crtc && crtc 463 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c int head = nouveau_crtc(encoder->crtc)->index; crtc 576 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 692 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c struct drm_crtc *crtc = encoder->crtc; crtc 699 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (encoder->crtc) { crtc 725 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (encoder->crtc) crtc 752 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (crtc) crtc 753 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc 754 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c crtc->x, crtc->y, crtc 755 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c crtc->primary->fb); crtc 144 drivers/gpu/drm/nouveau/dispnv50/atom.h nv50_head_atom_get(struct drm_atomic_state *state, struct drm_crtc *crtc) crtc 146 drivers/gpu/drm/nouveau/dispnv50/atom.h struct drm_crtc_state *statec = drm_atomic_get_crtc_state(state, crtc); crtc 74 drivers/gpu/drm/nouveau/dispnv50/curs507a.c struct nv50_head *head = nv50_head(asyw->state.crtc); crtc 380 drivers/gpu/drm/nouveau/dispnv50/disp.c if (nv_encoder->crtc) crtc 382 drivers/gpu/drm/nouveau/dispnv50/disp.c nv_encoder->crtc = NULL; crtc 390 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 399 drivers/gpu/drm/nouveau/dispnv50/disp.c nv_encoder->crtc = encoder->crtc; crtc 505 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 559 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 836 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_head *head = nv50_head(encoder->crtc); crtc 943 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_head *head = nv50_head(connector_state->crtc); crtc 995 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_crtc *new_crtc = new_conn_state->crtc; crtc 997 drivers/gpu/drm/nouveau/dispnv50/disp.c if (!old_conn_state->crtc) crtc 1430 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc); crtc 1432 drivers/gpu/drm/nouveau/dispnv50/disp.c nv_encoder->crtc = NULL; crtc 1458 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 1479 drivers/gpu/drm/nouveau/dispnv50/disp.c nv_encoder->crtc = encoder->crtc; crtc 1665 drivers/gpu/drm/nouveau/dispnv50/disp.c if (nv_encoder->crtc) crtc 1667 drivers/gpu/drm/nouveau/dispnv50/disp.c nv_encoder->crtc = NULL; crtc 1675 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); crtc 1703 drivers/gpu/drm/nouveau/dispnv50/disp.c nv_encoder->crtc = encoder->crtc; crtc 1829 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_crtc *crtc; crtc 1848 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 1850 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_head *head = nv50_head(crtc); crtc 1852 drivers/gpu/drm/nouveau/dispnv50/disp.c NV_ATOMIC(drm, "%s: clr %04x (set %04x)\n", crtc->name, crtc 1857 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_crtc_vblank_off(crtc); crtc 1931 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 1933 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_head *head = nv50_head(crtc); crtc 1935 drivers/gpu/drm/nouveau/dispnv50/disp.c NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name, crtc 1945 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_crtc_vblank_on(crtc); crtc 1949 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_crtc_vblank_get(crtc); crtc 1992 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 1997 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_crtc_accurate_vblank_count(crtc); crtc 1998 drivers/gpu/drm/nouveau/dispnv50/disp.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 1999 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_crtc_send_vblank_event(crtc, new_crtc_state->event); crtc 2000 drivers/gpu/drm/nouveau/dispnv50/disp.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 2004 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_crtc_vblank_put(crtc); crtc 2112 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_crtc *crtc; crtc 2115 drivers/gpu/drm/nouveau/dispnv50/disp.c if (!(crtc = old_connector_state->crtc)) crtc 2118 drivers/gpu/drm/nouveau/dispnv50/disp.c old_crtc_state = drm_atomic_get_old_crtc_state(&atom->state, crtc); crtc 2119 drivers/gpu/drm/nouveau/dispnv50/disp.c new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc); crtc 2142 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_crtc *crtc; crtc 2145 drivers/gpu/drm/nouveau/dispnv50/disp.c if (!(crtc = connector_state->crtc)) crtc 2148 drivers/gpu/drm/nouveau/dispnv50/disp.c new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc); crtc 2168 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_crtc *crtc; crtc 2172 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { crtc 2174 drivers/gpu/drm/nouveau/dispnv50/disp.c ret = drm_atomic_add_affected_planes(state, crtc); crtc 294 drivers/gpu/drm/nouveau/dispnv50/head.c nv50_head_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state) crtc 296 drivers/gpu/drm/nouveau/dispnv50/head.c struct nouveau_drm *drm = nouveau_drm(crtc->dev); crtc 297 drivers/gpu/drm/nouveau/dispnv50/head.c struct nv50_head *head = nv50_head(crtc); crtc 298 drivers/gpu/drm/nouveau/dispnv50/head.c struct nv50_head_atom *armh = nv50_head_atom(crtc->state); crtc 305 drivers/gpu/drm/nouveau/dispnv50/head.c NV_ATOMIC(drm, "%s atomic_check %d\n", crtc->name, asyh->state.active); crtc 308 drivers/gpu/drm/nouveau/dispnv50/head.c if (conns->crtc == crtc) { crtc 409 drivers/gpu/drm/nouveau/dispnv50/head.c nv50_head_atomic_destroy_state(struct drm_crtc *crtc, crtc 418 drivers/gpu/drm/nouveau/dispnv50/head.c nv50_head_atomic_duplicate_state(struct drm_crtc *crtc) crtc 420 drivers/gpu/drm/nouveau/dispnv50/head.c struct nv50_head_atom *armh = nv50_head_atom(crtc->state); crtc 424 drivers/gpu/drm/nouveau/dispnv50/head.c __drm_atomic_helper_crtc_duplicate_state(crtc, &asyh->state); crtc 443 drivers/gpu/drm/nouveau/dispnv50/head.c nv50_head_reset(struct drm_crtc *crtc) crtc 450 drivers/gpu/drm/nouveau/dispnv50/head.c if (crtc->state) crtc 451 drivers/gpu/drm/nouveau/dispnv50/head.c nv50_head_atomic_destroy_state(crtc, crtc->state); crtc 453 drivers/gpu/drm/nouveau/dispnv50/head.c __drm_atomic_helper_crtc_reset(crtc, &asyh->state); crtc 457 drivers/gpu/drm/nouveau/dispnv50/head.c nv50_head_destroy(struct drm_crtc *crtc) crtc 459 drivers/gpu/drm/nouveau/dispnv50/head.c struct nv50_head *head = nv50_head(crtc); crtc 461 drivers/gpu/drm/nouveau/dispnv50/head.c drm_crtc_cleanup(crtc); crtc 483 drivers/gpu/drm/nouveau/dispnv50/head.c struct drm_crtc *crtc; crtc 509 drivers/gpu/drm/nouveau/dispnv50/head.c crtc = &head->base.base; crtc 510 drivers/gpu/drm/nouveau/dispnv50/head.c drm_crtc_init_with_planes(dev, crtc, &base->plane, &curs->plane, crtc 512 drivers/gpu/drm/nouveau/dispnv50/head.c drm_crtc_helper_add(crtc, &nv50_head_help); crtc 513 drivers/gpu/drm/nouveau/dispnv50/head.c drm_mode_crtc_set_gamma_size(crtc, 256); crtc 515 drivers/gpu/drm/nouveau/dispnv50/head.c drm_crtc_enable_color_mgmt(crtc, 256, true, 256); crtc 517 drivers/gpu/drm/nouveau/dispnv50/head.c drm_crtc_enable_color_mgmt(crtc, 0, false, 256); crtc 527 drivers/gpu/drm/nouveau/dispnv50/head.c nv50_head_destroy(crtc); crtc 405 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (asyw->state.crtc) { crtc 406 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc); crtc 416 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (armw->state.crtc) { crtc 417 drivers/gpu/drm/nouveau/dispnv50/wndw.c harm = nv50_head_atom_get(asyw->state.state, armw->state.crtc); crtc 510 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc); crtc 785 drivers/gpu/drm/nouveau/nouveau_connector.c if (connector->encoder && connector->encoder->crtc) { crtc 786 drivers/gpu/drm/nouveau/nouveau_connector.c ret = drm_crtc_helper_set_mode(connector->encoder->crtc, crtc 787 drivers/gpu/drm/nouveau/nouveau_connector.c &connector->encoder->crtc->mode, crtc 788 drivers/gpu/drm/nouveau/nouveau_connector.c connector->encoder->crtc->x, crtc 789 drivers/gpu/drm/nouveau/nouveau_connector.c connector->encoder->crtc->y, crtc 163 drivers/gpu/drm/nouveau/nouveau_connector.h struct drm_crtc *crtc = to_drm_crtc(nv_crtc); crtc 167 drivers/gpu/drm/nouveau/nouveau_connector.h if (connector->encoder && connector->encoder->crtc == crtc) { crtc 68 drivers/gpu/drm/nouveau/nouveau_crtc.h void (*save)(struct drm_crtc *crtc); crtc 69 drivers/gpu/drm/nouveau/nouveau_crtc.h void (*restore)(struct drm_crtc *crtc); crtc 72 drivers/gpu/drm/nouveau/nouveau_crtc.h static inline struct nouveau_crtc *nouveau_crtc(struct drm_crtc *crtc) crtc 74 drivers/gpu/drm/nouveau/nouveau_crtc.h return crtc ? container_of(crtc, struct nouveau_crtc, base) : NULL; crtc 77 drivers/gpu/drm/nouveau/nouveau_crtc.h static inline struct drm_crtc *to_drm_crtc(struct nouveau_crtc *crtc) crtc 79 drivers/gpu/drm/nouveau/nouveau_crtc.h return &crtc->base; crtc 59 drivers/gpu/drm/nouveau/nouveau_display.c struct drm_crtc *crtc; crtc 62 drivers/gpu/drm/nouveau/nouveau_display.c crtc = drm_crtc_from_index(dev, pipe); crtc 63 drivers/gpu/drm/nouveau/nouveau_display.c if (!crtc) crtc 66 drivers/gpu/drm/nouveau/nouveau_display.c nv_crtc = nouveau_crtc(crtc); crtc 75 drivers/gpu/drm/nouveau/nouveau_display.c struct drm_crtc *crtc; crtc 78 drivers/gpu/drm/nouveau/nouveau_display.c crtc = drm_crtc_from_index(dev, pipe); crtc 79 drivers/gpu/drm/nouveau/nouveau_display.c if (!crtc) crtc 82 drivers/gpu/drm/nouveau/nouveau_display.c nv_crtc = nouveau_crtc(crtc); crtc 101 drivers/gpu/drm/nouveau/nouveau_display.c nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos, crtc 109 drivers/gpu/drm/nouveau/nouveau_display.c .base.head = nouveau_crtc(crtc)->index, crtc 111 drivers/gpu/drm/nouveau/nouveau_display.c struct nouveau_display *disp = nouveau_display(crtc->dev); crtc 112 drivers/gpu/drm/nouveau/nouveau_display.c struct drm_vblank_crtc *vblank = &crtc->dev->vblank[drm_crtc_index(crtc)]; crtc 144 drivers/gpu/drm/nouveau/nouveau_display.c struct drm_crtc *crtc; crtc 146 drivers/gpu/drm/nouveau/nouveau_display.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 147 drivers/gpu/drm/nouveau/nouveau_display.c if (nouveau_crtc(crtc)->index == pipe) { crtc 148 drivers/gpu/drm/nouveau/nouveau_display.c return nouveau_display_scanoutpos_head(crtc, vpos, hpos, crtc 159 drivers/gpu/drm/nouveau/nouveau_display.c struct drm_crtc *crtc; crtc 161 drivers/gpu/drm/nouveau/nouveau_display.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 162 drivers/gpu/drm/nouveau/nouveau_display.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 171 drivers/gpu/drm/nouveau/nouveau_display.c struct drm_crtc *crtc; crtc 174 drivers/gpu/drm/nouveau/nouveau_display.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 175 drivers/gpu/drm/nouveau/nouveau_display.c struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); crtc 53 drivers/gpu/drm/nouveau/nouveau_encoder.h struct drm_crtc *crtc; crtc 56 drivers/gpu/drm/omapdrm/omap_crtc.c struct videomode *omap_crtc_timings(struct drm_crtc *crtc) crtc 58 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 62 drivers/gpu/drm/omapdrm/omap_crtc.c enum omap_channel omap_crtc_channel(struct drm_crtc *crtc) crtc 64 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 68 drivers/gpu/drm/omapdrm/omap_crtc.c static bool omap_crtc_is_pending(struct drm_crtc *crtc) crtc 70 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 74 drivers/gpu/drm/omapdrm/omap_crtc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 76 drivers/gpu/drm/omapdrm/omap_crtc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 81 drivers/gpu/drm/omapdrm/omap_crtc.c int omap_crtc_wait_pending(struct drm_crtc *crtc) crtc 83 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 90 drivers/gpu/drm/omapdrm/omap_crtc.c !omap_crtc_is_pending(crtc), crtc 110 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) crtc 112 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc_state *omap_state = to_omap_crtc_state(crtc->state); crtc 113 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_device *dev = crtc->dev; crtc 115 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 125 drivers/gpu/drm/omapdrm/omap_crtc.c omap_irq_enable_framedone(crtc, enable); crtc 186 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_crtc *crtc = priv->channels[channel]->crtc; crtc 187 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 199 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_crtc *crtc = priv->channels[channel]->crtc; crtc 200 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 209 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_crtc *crtc = priv->channels[channel]->crtc; crtc 210 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 220 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_crtc *crtc = priv->channels[channel]->crtc; crtc 221 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 232 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_crtc *crtc = priv->channels[channel]->crtc; crtc 233 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 251 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_crtc *crtc = priv->channels[channel]->crtc; crtc 252 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 278 drivers/gpu/drm/omapdrm/omap_crtc.c void omap_crtc_error_irq(struct drm_crtc *crtc, u32 irqstatus) crtc 280 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 291 drivers/gpu/drm/omapdrm/omap_crtc.c void omap_crtc_vblank_irq(struct drm_crtc *crtc) crtc 293 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 298 drivers/gpu/drm/omapdrm/omap_crtc.c spin_lock(&crtc->dev->event_lock); crtc 304 drivers/gpu/drm/omapdrm/omap_crtc.c spin_unlock(&crtc->dev->event_lock); crtc 310 drivers/gpu/drm/omapdrm/omap_crtc.c drm_crtc_send_vblank_event(crtc, omap_crtc->event); crtc 316 drivers/gpu/drm/omapdrm/omap_crtc.c spin_unlock(&crtc->dev->event_lock); crtc 319 drivers/gpu/drm/omapdrm/omap_crtc.c drm_crtc_vblank_put(crtc); crtc 327 drivers/gpu/drm/omapdrm/omap_crtc.c void omap_crtc_framedone_irq(struct drm_crtc *crtc, uint32_t irqstatus) crtc 329 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 336 drivers/gpu/drm/omapdrm/omap_crtc.c spin_lock(&crtc->dev->event_lock); crtc 339 drivers/gpu/drm/omapdrm/omap_crtc.c drm_crtc_send_vblank_event(crtc, omap_crtc->event); crtc 343 drivers/gpu/drm/omapdrm/omap_crtc.c spin_unlock(&crtc->dev->event_lock); crtc 349 drivers/gpu/drm/omapdrm/omap_crtc.c void omap_crtc_flush(struct drm_crtc *crtc) crtc 351 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 352 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc_state *omap_state = to_omap_crtc_state(crtc->state); crtc 365 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_display_mode *mode = &omap_crtc->pipe->crtc->mode; crtc 394 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) crtc 396 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_drm_private *priv = crtc->dev->dev_private; crtc 397 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 414 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_destroy(struct drm_crtc *crtc) crtc 416 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 420 drivers/gpu/drm/omapdrm/omap_crtc.c drm_crtc_cleanup(crtc); crtc 425 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_arm_event(struct drm_crtc *crtc) crtc 427 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 432 drivers/gpu/drm/omapdrm/omap_crtc.c if (crtc->state->event) { crtc 433 drivers/gpu/drm/omapdrm/omap_crtc.c omap_crtc->event = crtc->state->event; crtc 434 drivers/gpu/drm/omapdrm/omap_crtc.c crtc->state->event = NULL; crtc 438 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_atomic_enable(struct drm_crtc *crtc, crtc 441 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_drm_private *priv = crtc->dev->dev_private; crtc 442 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 443 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc_state *omap_state = to_omap_crtc_state(crtc->state); crtc 454 drivers/gpu/drm/omapdrm/omap_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 455 drivers/gpu/drm/omapdrm/omap_crtc.c drm_crtc_vblank_on(crtc); crtc 456 drivers/gpu/drm/omapdrm/omap_crtc.c ret = drm_crtc_vblank_get(crtc); crtc 459 drivers/gpu/drm/omapdrm/omap_crtc.c omap_crtc_arm_event(crtc); crtc 460 drivers/gpu/drm/omapdrm/omap_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 463 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_atomic_disable(struct drm_crtc *crtc, crtc 466 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_drm_private *priv = crtc->dev->dev_private; crtc 467 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 468 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_device *dev = crtc->dev; crtc 472 drivers/gpu/drm/omapdrm/omap_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 473 drivers/gpu/drm/omapdrm/omap_crtc.c if (crtc->state->event) { crtc 474 drivers/gpu/drm/omapdrm/omap_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 475 drivers/gpu/drm/omapdrm/omap_crtc.c crtc->state->event = NULL; crtc 477 drivers/gpu/drm/omapdrm/omap_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 481 drivers/gpu/drm/omapdrm/omap_crtc.c if (!omap_crtc_wait_pending(crtc)) crtc 484 drivers/gpu/drm/omapdrm/omap_crtc.c drm_crtc_vblank_off(crtc); crtc 489 drivers/gpu/drm/omapdrm/omap_crtc.c static enum drm_mode_status omap_crtc_mode_valid(struct drm_crtc *crtc, crtc 492 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_drm_private *priv = crtc->dev->dev_private; crtc 493 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 543 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 545 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 546 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 554 drivers/gpu/drm/omapdrm/omap_crtc.c static bool omap_crtc_is_manually_updated(struct drm_crtc *crtc) crtc 556 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 570 drivers/gpu/drm/omapdrm/omap_crtc.c static int omap_crtc_atomic_check(struct drm_crtc *crtc, crtc 583 drivers/gpu/drm/omapdrm/omap_crtc.c pri_state = drm_atomic_get_new_plane_state(state->state, crtc->primary); crtc 593 drivers/gpu/drm/omapdrm/omap_crtc.c omap_crtc_state->manually_updated = omap_crtc_is_manually_updated(crtc); crtc 599 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_atomic_begin(struct drm_crtc *crtc, crtc 604 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_atomic_flush(struct drm_crtc *crtc, crtc 607 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_drm_private *priv = crtc->dev->dev_private; crtc 608 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc *omap_crtc = to_omap_crtc(crtc); crtc 609 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_crtc_state *omap_crtc_state = to_omap_crtc_state(crtc->state); crtc 612 drivers/gpu/drm/omapdrm/omap_crtc.c if (crtc->state->color_mgmt_changed) { crtc 616 drivers/gpu/drm/omapdrm/omap_crtc.c if (crtc->state->gamma_lut) { crtc 618 drivers/gpu/drm/omapdrm/omap_crtc.c crtc->state->gamma_lut->data; crtc 619 drivers/gpu/drm/omapdrm/omap_crtc.c length = crtc->state->gamma_lut->length / crtc 626 drivers/gpu/drm/omapdrm/omap_crtc.c omap_crtc_write_crtc_properties(crtc); crtc 636 drivers/gpu/drm/omapdrm/omap_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 637 drivers/gpu/drm/omapdrm/omap_crtc.c omap_crtc_flush(crtc); crtc 638 drivers/gpu/drm/omapdrm/omap_crtc.c omap_crtc_arm_event(crtc); crtc 639 drivers/gpu/drm/omapdrm/omap_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 643 drivers/gpu/drm/omapdrm/omap_crtc.c ret = drm_crtc_vblank_get(crtc); crtc 646 drivers/gpu/drm/omapdrm/omap_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 648 drivers/gpu/drm/omapdrm/omap_crtc.c omap_crtc_arm_event(crtc); crtc 649 drivers/gpu/drm/omapdrm/omap_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 652 drivers/gpu/drm/omapdrm/omap_crtc.c static int omap_crtc_atomic_set_property(struct drm_crtc *crtc, crtc 657 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_drm_private *priv = crtc->dev->dev_private; crtc 666 drivers/gpu/drm/omapdrm/omap_crtc.c plane_state = drm_atomic_get_plane_state(state->state, crtc->primary); crtc 670 drivers/gpu/drm/omapdrm/omap_crtc.c if (property == crtc->primary->rotation_property) crtc 680 drivers/gpu/drm/omapdrm/omap_crtc.c static int omap_crtc_atomic_get_property(struct drm_crtc *crtc, crtc 685 drivers/gpu/drm/omapdrm/omap_crtc.c struct omap_drm_private *priv = crtc->dev->dev_private; crtc 688 drivers/gpu/drm/omapdrm/omap_crtc.c if (property == crtc->primary->rotation_property) crtc 698 drivers/gpu/drm/omapdrm/omap_crtc.c static void omap_crtc_reset(struct drm_crtc *crtc) crtc 700 drivers/gpu/drm/omapdrm/omap_crtc.c if (crtc->state) crtc 701 drivers/gpu/drm/omapdrm/omap_crtc.c __drm_atomic_helper_crtc_destroy_state(crtc->state); crtc 703 drivers/gpu/drm/omapdrm/omap_crtc.c kfree(crtc->state); crtc 704 drivers/gpu/drm/omapdrm/omap_crtc.c crtc->state = kzalloc(sizeof(struct omap_crtc_state), GFP_KERNEL); crtc 706 drivers/gpu/drm/omapdrm/omap_crtc.c if (crtc->state) crtc 707 drivers/gpu/drm/omapdrm/omap_crtc.c crtc->state->crtc = crtc; crtc 711 drivers/gpu/drm/omapdrm/omap_crtc.c omap_crtc_duplicate_state(struct drm_crtc *crtc) crtc 715 drivers/gpu/drm/omapdrm/omap_crtc.c if (WARN_ON(!crtc->state)) crtc 718 drivers/gpu/drm/omapdrm/omap_crtc.c current_state = to_omap_crtc_state(crtc->state); crtc 724 drivers/gpu/drm/omapdrm/omap_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); crtc 784 drivers/gpu/drm/omapdrm/omap_crtc.c struct drm_crtc *crtc = NULL; crtc 797 drivers/gpu/drm/omapdrm/omap_crtc.c crtc = &omap_crtc->base; crtc 818 drivers/gpu/drm/omapdrm/omap_crtc.c ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, crtc 827 drivers/gpu/drm/omapdrm/omap_crtc.c drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs); crtc 839 drivers/gpu/drm/omapdrm/omap_crtc.c drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); crtc 840 drivers/gpu/drm/omapdrm/omap_crtc.c drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); crtc 843 drivers/gpu/drm/omapdrm/omap_crtc.c omap_plane_install_properties(crtc->primary, &crtc->base); crtc 845 drivers/gpu/drm/omapdrm/omap_crtc.c return crtc; crtc 23 drivers/gpu/drm/omapdrm/omap_crtc.h struct videomode *omap_crtc_timings(struct drm_crtc *crtc); crtc 24 drivers/gpu/drm/omapdrm/omap_crtc.h enum omap_channel omap_crtc_channel(struct drm_crtc *crtc); crtc 30 drivers/gpu/drm/omapdrm/omap_crtc.h int omap_crtc_wait_pending(struct drm_crtc *crtc); crtc 31 drivers/gpu/drm/omapdrm/omap_crtc.h void omap_crtc_error_irq(struct drm_crtc *crtc, u32 irqstatus); crtc 32 drivers/gpu/drm/omapdrm/omap_crtc.h void omap_crtc_vblank_irq(struct drm_crtc *crtc); crtc 33 drivers/gpu/drm/omapdrm/omap_crtc.h void omap_crtc_framedone_irq(struct drm_crtc *crtc, uint32_t irqstatus); crtc 34 drivers/gpu/drm/omapdrm/omap_crtc.h void omap_crtc_flush(struct drm_crtc *crtc); crtc 49 drivers/gpu/drm/omapdrm/omap_drv.c struct drm_crtc *crtc; crtc 53 drivers/gpu/drm/omapdrm/omap_drv.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) { crtc 57 drivers/gpu/drm/omapdrm/omap_drv.c ret = omap_crtc_wait_pending(crtc); crtc 330 drivers/gpu/drm/omapdrm/omap_drv.c struct drm_crtc *crtc; crtc 348 drivers/gpu/drm/omapdrm/omap_drv.c crtc = omap_crtc_init(dev, pipe, priv->planes[i]); crtc 349 drivers/gpu/drm/omapdrm/omap_drv.c if (IS_ERR(crtc)) crtc 350 drivers/gpu/drm/omapdrm/omap_drv.c return PTR_ERR(crtc); crtc 353 drivers/gpu/drm/omapdrm/omap_drv.c pipe->crtc = crtc; crtc 608 drivers/gpu/drm/omapdrm/omap_drv.c drm_crtc_vblank_off(priv->pipes[i].crtc); crtc 36 drivers/gpu/drm/omapdrm/omap_drv.h struct drm_crtc *crtc; crtc 64 drivers/gpu/drm/omapdrm/omap_fb.c struct drm_crtc *crtc; crtc 68 drivers/gpu/drm/omapdrm/omap_fb.c drm_for_each_crtc(crtc, fb->dev) crtc 69 drivers/gpu/drm/omapdrm/omap_fb.c omap_crtc_flush(crtc); crtc 79 drivers/gpu/drm/omapdrm/omap_irq.c int omap_irq_enable_framedone(struct drm_crtc *crtc, bool enable) crtc 81 drivers/gpu/drm/omapdrm/omap_irq.c struct drm_device *dev = crtc->dev; crtc 84 drivers/gpu/drm/omapdrm/omap_irq.c enum omap_channel channel = omap_crtc_channel(crtc); crtc 114 drivers/gpu/drm/omapdrm/omap_irq.c int omap_irq_enable_vblank(struct drm_crtc *crtc) crtc 116 drivers/gpu/drm/omapdrm/omap_irq.c struct drm_device *dev = crtc->dev; crtc 119 drivers/gpu/drm/omapdrm/omap_irq.c enum omap_channel channel = omap_crtc_channel(crtc); crtc 141 drivers/gpu/drm/omapdrm/omap_irq.c void omap_irq_disable_vblank(struct drm_crtc *crtc) crtc 143 drivers/gpu/drm/omapdrm/omap_irq.c struct drm_device *dev = crtc->dev; crtc 146 drivers/gpu/drm/omapdrm/omap_irq.c enum omap_channel channel = omap_crtc_channel(crtc); crtc 223 drivers/gpu/drm/omapdrm/omap_irq.c struct drm_crtc *crtc = priv->pipes[id].crtc; crtc 224 drivers/gpu/drm/omapdrm/omap_irq.c enum omap_channel channel = omap_crtc_channel(crtc); crtc 228 drivers/gpu/drm/omapdrm/omap_irq.c omap_crtc_vblank_irq(crtc); crtc 232 drivers/gpu/drm/omapdrm/omap_irq.c omap_crtc_error_irq(crtc, irqstatus); crtc 235 drivers/gpu/drm/omapdrm/omap_irq.c omap_crtc_framedone_irq(crtc, irqstatus); crtc 18 drivers/gpu/drm/omapdrm/omap_irq.h int omap_irq_enable_vblank(struct drm_crtc *crtc); crtc 19 drivers/gpu/drm/omapdrm/omap_irq.h int omap_irq_enable_framedone(struct drm_crtc *crtc, bool enable); crtc 20 drivers/gpu/drm/omapdrm/omap_irq.h void omap_irq_disable_vblank(struct drm_crtc *crtc); crtc 51 drivers/gpu/drm/omapdrm/omap_plane.c DBG("%s, crtc=%p fb=%p", omap_plane->name, state->crtc, state->fb); crtc 74 drivers/gpu/drm/omapdrm/omap_plane.c omap_crtc_timings(state->crtc), false, crtc 75 drivers/gpu/drm/omapdrm/omap_plane.c omap_crtc_channel(state->crtc)); crtc 108 drivers/gpu/drm/omapdrm/omap_plane.c if (WARN_ON(!state->crtc)) crtc 111 drivers/gpu/drm/omapdrm/omap_plane.c crtc_state = drm_atomic_get_existing_crtc_state(state->state, state->crtc); crtc 39 drivers/gpu/drm/pl111/pl111_display.c drm_crtc_handle_vblank(&priv->pipe.crtc); crtc 51 drivers/gpu/drm/pl111/pl111_display.c pl111_mode_valid(struct drm_crtc *crtc, crtc 54 drivers/gpu/drm/pl111/pl111_display.c struct drm_device *drm = crtc->dev; crtc 123 drivers/gpu/drm/pl111/pl111_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 125 drivers/gpu/drm/pl111/pl111_display.c struct drm_device *drm = crtc->dev; crtc 354 drivers/gpu/drm/pl111/pl111_display.c drm_crtc_vblank_on(crtc); crtc 359 drivers/gpu/drm/pl111/pl111_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 360 drivers/gpu/drm/pl111/pl111_display.c struct drm_device *drm = crtc->dev; crtc 365 drivers/gpu/drm/pl111/pl111_display.c drm_crtc_vblank_off(crtc); crtc 392 drivers/gpu/drm/pl111/pl111_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 393 drivers/gpu/drm/pl111/pl111_display.c struct drm_device *drm = crtc->dev; crtc 395 drivers/gpu/drm/pl111/pl111_display.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 407 drivers/gpu/drm/pl111/pl111_display.c crtc->state->event = NULL; crtc 409 drivers/gpu/drm/pl111/pl111_display.c spin_lock_irq(&crtc->dev->event_lock); crtc 410 drivers/gpu/drm/pl111/pl111_display.c if (crtc->state->active && drm_crtc_vblank_get(crtc) == 0) crtc 411 drivers/gpu/drm/pl111/pl111_display.c drm_crtc_arm_vblank_event(crtc, event); crtc 413 drivers/gpu/drm/pl111/pl111_display.c drm_crtc_send_vblank_event(crtc, event); crtc 414 drivers/gpu/drm/pl111/pl111_display.c spin_unlock_irq(&crtc->dev->event_lock); crtc 420 drivers/gpu/drm/pl111/pl111_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 421 drivers/gpu/drm/pl111/pl111_display.c struct drm_device *drm = crtc->dev; crtc 431 drivers/gpu/drm/pl111/pl111_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 432 drivers/gpu/drm/pl111/pl111_display.c struct drm_device *drm = crtc->dev; crtc 309 drivers/gpu/drm/qxl/qxl_display.c static void qxl_crtc_update_monitors_config(struct drm_crtc *crtc, crtc 312 drivers/gpu/drm/qxl/qxl_display.c struct drm_device *dev = crtc->dev; crtc 314 drivers/gpu/drm/qxl/qxl_display.c struct qxl_crtc *qcrtc = to_qxl_crtc(crtc); crtc 329 drivers/gpu/drm/qxl/qxl_display.c if (crtc->state->active) { crtc 330 drivers/gpu/drm/qxl/qxl_display.c struct drm_display_mode *mode = &crtc->mode; crtc 334 drivers/gpu/drm/qxl/qxl_display.c head.x = crtc->x; crtc 335 drivers/gpu/drm/qxl/qxl_display.c head.y = crtc->y; crtc 361 drivers/gpu/drm/qxl/qxl_display.c crtc->state->active ? "on" : "off", reason); crtc 372 drivers/gpu/drm/qxl/qxl_display.c static void qxl_crtc_atomic_flush(struct drm_crtc *crtc, crtc 375 drivers/gpu/drm/qxl/qxl_display.c struct drm_device *dev = crtc->dev; crtc 379 drivers/gpu/drm/qxl/qxl_display.c if (crtc->state && crtc->state->event) { crtc 380 drivers/gpu/drm/qxl/qxl_display.c event = crtc->state->event; crtc 381 drivers/gpu/drm/qxl/qxl_display.c crtc->state->event = NULL; crtc 384 drivers/gpu/drm/qxl/qxl_display.c drm_crtc_send_vblank_event(crtc, event); crtc 388 drivers/gpu/drm/qxl/qxl_display.c qxl_crtc_update_monitors_config(crtc, "flush"); crtc 391 drivers/gpu/drm/qxl/qxl_display.c static void qxl_crtc_destroy(struct drm_crtc *crtc) crtc 393 drivers/gpu/drm/qxl/qxl_display.c struct qxl_crtc *qxl_crtc = to_qxl_crtc(crtc); crtc 396 drivers/gpu/drm/qxl/qxl_display.c drm_crtc_cleanup(crtc); crtc 457 drivers/gpu/drm/qxl/qxl_display.c static void qxl_crtc_atomic_enable(struct drm_crtc *crtc, crtc 460 drivers/gpu/drm/qxl/qxl_display.c qxl_crtc_update_monitors_config(crtc, "enable"); crtc 463 drivers/gpu/drm/qxl/qxl_display.c static void qxl_crtc_atomic_disable(struct drm_crtc *crtc, crtc 466 drivers/gpu/drm/qxl/qxl_display.c qxl_crtc_update_monitors_config(crtc, "disable"); crtc 481 drivers/gpu/drm/qxl/qxl_display.c if (!state->crtc || !state->fb) crtc 494 drivers/gpu/drm/qxl/qxl_display.c struct qxl_crtc *qcrtc = to_qxl_crtc(plane->state->crtc); crtc 561 drivers/gpu/drm/qxl/qxl_display.c qdev->dumb_heads[plane->state->crtc->index].x; crtc 588 drivers/gpu/drm/qxl/qxl_display.c struct qxl_crtc *qcrtc = to_qxl_crtc(plane->state->crtc); crtc 792 drivers/gpu/drm/qxl/qxl_display.c qxl_update_dumb_head(qdev, new_state->crtc->index, crtc 38 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_overscan_setup(struct drm_crtc *crtc, crtc 42 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 44 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 83 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_scaler_setup(struct drm_crtc *crtc) crtc 85 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 87 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 167 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_lock_crtc(struct drm_crtc *crtc, int lock) crtc 169 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 170 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 184 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_enable_crtc(struct drm_crtc *crtc, int state) crtc 186 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 187 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 200 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_enable_crtc_memreq(struct drm_crtc *crtc, int state) crtc 202 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 203 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 226 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_blank_crtc(struct drm_crtc *crtc, int state) crtc 228 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 229 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 252 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_powergate_crtc(struct drm_crtc *crtc, int state) crtc 254 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 255 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 268 drivers/gpu/drm/radeon/atombios_crtc.c void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 270 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 272 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 277 drivers/gpu/drm/radeon/atombios_crtc.c atombios_enable_crtc(crtc, ATOM_ENABLE); crtc 279 drivers/gpu/drm/radeon/atombios_crtc.c atombios_enable_crtc_memreq(crtc, ATOM_ENABLE); crtc 280 drivers/gpu/drm/radeon/atombios_crtc.c atombios_blank_crtc(crtc, ATOM_DISABLE); crtc 282 drivers/gpu/drm/radeon/atombios_crtc.c drm_crtc_vblank_on(crtc); crtc 283 drivers/gpu/drm/radeon/atombios_crtc.c radeon_crtc_load_lut(crtc); crtc 289 drivers/gpu/drm/radeon/atombios_crtc.c drm_crtc_vblank_off(crtc); crtc 291 drivers/gpu/drm/radeon/atombios_crtc.c atombios_blank_crtc(crtc, ATOM_ENABLE); crtc 293 drivers/gpu/drm/radeon/atombios_crtc.c atombios_enable_crtc_memreq(crtc, ATOM_DISABLE); crtc 294 drivers/gpu/drm/radeon/atombios_crtc.c atombios_enable_crtc(crtc, ATOM_DISABLE); crtc 303 drivers/gpu/drm/radeon/atombios_crtc.c atombios_set_crtc_dtd_timing(struct drm_crtc *crtc, crtc 306 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 307 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 350 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_crtc_set_timing(struct drm_crtc *crtc, crtc 353 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 354 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 558 drivers/gpu/drm/radeon/atombios_crtc.c static u32 atombios_adjust_pll(struct drm_crtc *crtc, crtc 561 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 562 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 823 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_crtc_program_pll(struct drm_crtc *crtc, crtc 837 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 963 drivers/gpu/drm/radeon/atombios_crtc.c static bool atombios_crtc_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) crtc 965 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 966 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 976 drivers/gpu/drm/radeon/atombios_crtc.c radeon_dp_mst_prepare_pll(crtc, mode); crtc 1058 drivers/gpu/drm/radeon/atombios_crtc.c radeon_crtc->adjusted_clock = atombios_adjust_pll(crtc, mode); crtc 1063 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) crtc 1065 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1066 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1115 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id, crtc 1144 drivers/gpu/drm/radeon/atombios_crtc.c static int dce4_crtc_do_set_base(struct drm_crtc *crtc, crtc 1148 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1149 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1164 drivers/gpu/drm/radeon/atombios_crtc.c if (!atomic && !crtc->primary->fb) { crtc 1172 drivers/gpu/drm/radeon/atombios_crtc.c target_fb = crtc->primary->fb; crtc 1440 drivers/gpu/drm/radeon/atombios_crtc.c viewport_w = crtc->mode.hdisplay; crtc 1441 drivers/gpu/drm/radeon/atombios_crtc.c viewport_h = (crtc->mode.vdisplay + 1) & ~1; crtc 1443 drivers/gpu/drm/radeon/atombios_crtc.c (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE)) crtc 1451 drivers/gpu/drm/radeon/atombios_crtc.c if (!atomic && fb && fb != crtc->primary->fb) { crtc 1466 drivers/gpu/drm/radeon/atombios_crtc.c static int avivo_crtc_do_set_base(struct drm_crtc *crtc, crtc 1470 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1471 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1485 drivers/gpu/drm/radeon/atombios_crtc.c if (!atomic && !crtc->primary->fb) { crtc 1493 drivers/gpu/drm/radeon/atombios_crtc.c target_fb = crtc->primary->fb; crtc 1652 drivers/gpu/drm/radeon/atombios_crtc.c viewport_w = crtc->mode.hdisplay; crtc 1653 drivers/gpu/drm/radeon/atombios_crtc.c viewport_h = (crtc->mode.vdisplay + 1) & ~1; crtc 1660 drivers/gpu/drm/radeon/atombios_crtc.c if (!atomic && fb && fb != crtc->primary->fb) { crtc 1675 drivers/gpu/drm/radeon/atombios_crtc.c int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, crtc 1678 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1682 drivers/gpu/drm/radeon/atombios_crtc.c return dce4_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 1684 drivers/gpu/drm/radeon/atombios_crtc.c return avivo_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 1686 drivers/gpu/drm/radeon/atombios_crtc.c return radeon_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 1689 drivers/gpu/drm/radeon/atombios_crtc.c int atombios_crtc_set_base_atomic(struct drm_crtc *crtc, crtc 1693 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1697 drivers/gpu/drm/radeon/atombios_crtc.c return dce4_crtc_do_set_base(crtc, fb, x, y, 1); crtc 1699 drivers/gpu/drm/radeon/atombios_crtc.c return avivo_crtc_do_set_base(crtc, fb, x, y, 1); crtc 1701 drivers/gpu/drm/radeon/atombios_crtc.c return radeon_crtc_do_set_base(crtc, fb, x, y, 1); crtc 1705 drivers/gpu/drm/radeon/atombios_crtc.c static void radeon_legacy_atom_fixup(struct drm_crtc *crtc) crtc 1707 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1709 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1735 drivers/gpu/drm/radeon/atombios_crtc.c static u32 radeon_get_pll_use_mask(struct drm_crtc *crtc) crtc 1737 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1743 drivers/gpu/drm/radeon/atombios_crtc.c if (crtc == test_crtc) crtc 1762 drivers/gpu/drm/radeon/atombios_crtc.c static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc) crtc 1764 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1770 drivers/gpu/drm/radeon/atombios_crtc.c if (crtc == test_crtc) crtc 1796 drivers/gpu/drm/radeon/atombios_crtc.c static int radeon_get_shared_nondp_ppll(struct drm_crtc *crtc) crtc 1798 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1799 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1811 drivers/gpu/drm/radeon/atombios_crtc.c if (crtc == test_crtc) crtc 1828 drivers/gpu/drm/radeon/atombios_crtc.c if ((crtc->mode.clock == test_crtc->mode.clock) && crtc 1875 drivers/gpu/drm/radeon/atombios_crtc.c static int radeon_atom_pick_pll(struct drm_crtc *crtc) crtc 1877 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1878 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 1892 drivers/gpu/drm/radeon/atombios_crtc.c pll = radeon_get_shared_dp_ppll(crtc); crtc 1898 drivers/gpu/drm/radeon/atombios_crtc.c pll = radeon_get_shared_nondp_ppll(crtc); crtc 1906 drivers/gpu/drm/radeon/atombios_crtc.c pll_in_use = radeon_get_pll_use_mask(crtc); crtc 1915 drivers/gpu/drm/radeon/atombios_crtc.c pll_in_use = radeon_get_pll_use_mask(crtc); crtc 1940 drivers/gpu/drm/radeon/atombios_crtc.c pll = radeon_get_shared_dp_ppll(crtc); crtc 1946 drivers/gpu/drm/radeon/atombios_crtc.c pll = radeon_get_shared_nondp_ppll(crtc); crtc 1951 drivers/gpu/drm/radeon/atombios_crtc.c pll_in_use = radeon_get_pll_use_mask(crtc); crtc 1965 drivers/gpu/drm/radeon/atombios_crtc.c pll_in_use = radeon_get_pll_use_mask(crtc); crtc 1995 drivers/gpu/drm/radeon/atombios_crtc.c pll = radeon_get_shared_dp_ppll(crtc); crtc 2001 drivers/gpu/drm/radeon/atombios_crtc.c pll = radeon_get_shared_nondp_ppll(crtc); crtc 2006 drivers/gpu/drm/radeon/atombios_crtc.c pll_in_use = radeon_get_pll_use_mask(crtc); crtc 2053 drivers/gpu/drm/radeon/atombios_crtc.c int atombios_crtc_mode_set(struct drm_crtc *crtc, crtc 2058 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 2059 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 2072 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_set_pll(crtc, adjusted_mode); crtc 2075 drivers/gpu/drm/radeon/atombios_crtc.c atombios_set_crtc_dtd_timing(crtc, adjusted_mode); crtc 2078 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_set_timing(crtc, adjusted_mode); crtc 2080 drivers/gpu/drm/radeon/atombios_crtc.c atombios_set_crtc_dtd_timing(crtc, adjusted_mode); crtc 2082 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_set_timing(crtc, adjusted_mode); crtc 2084 drivers/gpu/drm/radeon/atombios_crtc.c atombios_set_crtc_dtd_timing(crtc, adjusted_mode); crtc 2085 drivers/gpu/drm/radeon/atombios_crtc.c radeon_legacy_atom_fixup(crtc); crtc 2087 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_set_base(crtc, x, y, old_fb); crtc 2088 drivers/gpu/drm/radeon/atombios_crtc.c atombios_overscan_setup(crtc, mode, adjusted_mode); crtc 2089 drivers/gpu/drm/radeon/atombios_crtc.c atombios_scaler_setup(crtc); crtc 2090 drivers/gpu/drm/radeon/atombios_crtc.c radeon_cursor_reset(crtc); crtc 2097 drivers/gpu/drm/radeon/atombios_crtc.c static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc, crtc 2101 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 2102 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 2107 drivers/gpu/drm/radeon/atombios_crtc.c if (encoder->crtc == crtc) { crtc 2124 drivers/gpu/drm/radeon/atombios_crtc.c if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) crtc 2126 drivers/gpu/drm/radeon/atombios_crtc.c if (!atombios_crtc_prepare_pll(crtc, adjusted_mode)) crtc 2129 drivers/gpu/drm/radeon/atombios_crtc.c radeon_crtc->pll_id = radeon_atom_pick_pll(crtc); crtc 2138 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_crtc_prepare(struct drm_crtc *crtc) crtc 2140 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 2145 drivers/gpu/drm/radeon/atombios_crtc.c atombios_powergate_crtc(crtc, ATOM_DISABLE); crtc 2147 drivers/gpu/drm/radeon/atombios_crtc.c atombios_lock_crtc(crtc, ATOM_ENABLE); crtc 2148 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2151 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_crtc_commit(struct drm_crtc *crtc) crtc 2153 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_dpms(crtc, DRM_MODE_DPMS_ON); crtc 2154 drivers/gpu/drm/radeon/atombios_crtc.c atombios_lock_crtc(crtc, ATOM_DISABLE); crtc 2157 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_crtc_disable(struct drm_crtc *crtc) crtc 2159 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 2160 drivers/gpu/drm/radeon/atombios_crtc.c struct drm_device *dev = crtc->dev; crtc 2165 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 2166 drivers/gpu/drm/radeon/atombios_crtc.c if (crtc->primary->fb) { crtc 2170 drivers/gpu/drm/radeon/atombios_crtc.c rbo = gem_to_radeon_bo(crtc->primary->fb->obj[0]); crtc 2186 drivers/gpu/drm/radeon/atombios_crtc.c atombios_powergate_crtc(crtc, ATOM_ENABLE); crtc 2204 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id, crtc 2213 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id, crtc 463 drivers/gpu/drm/radeon/atombios_encoders.c if (encoder->crtc) { crtc 464 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 1057 drivers/gpu/drm/radeon/atombios_encoders.c if (encoder->crtc) { crtc 1058 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 1546 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 1869 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 2017 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 2066 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 2118 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 8749 drivers/gpu/drm/radeon/cik.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 117 drivers/gpu/drm/radeon/dce3_1_afmt.c struct radeon_crtc *crtc, unsigned int clock) crtc 126 drivers/gpu/drm/radeon/dce3_1_afmt.c if (!crtc) crtc 129 drivers/gpu/drm/radeon/dce3_1_afmt.c radeon_encoder = to_radeon_encoder(crtc->encoder); crtc 269 drivers/gpu/drm/radeon/dce6_afmt.c struct radeon_crtc *crtc, unsigned int clock) crtc 274 drivers/gpu/drm/radeon/dce6_afmt.c if (crtc) crtc 275 drivers/gpu/drm/radeon/dce6_afmt.c value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); crtc 288 drivers/gpu/drm/radeon/dce6_afmt.c struct radeon_crtc *crtc, unsigned int clock) crtc 294 drivers/gpu/drm/radeon/dce6_afmt.c if (crtc) crtc 295 drivers/gpu/drm/radeon/dce6_afmt.c value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); crtc 1300 drivers/gpu/drm/radeon/evergreen.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 1351 drivers/gpu/drm/radeon/evergreen.c static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc) crtc 1353 drivers/gpu/drm/radeon/evergreen.c if (RREG32(EVERGREEN_CRTC_STATUS + crtc_offsets[crtc]) & EVERGREEN_CRTC_V_BLANK) crtc 1359 drivers/gpu/drm/radeon/evergreen.c static bool dce4_is_counter_moving(struct radeon_device *rdev, int crtc) crtc 1363 drivers/gpu/drm/radeon/evergreen.c pos1 = RREG32(EVERGREEN_CRTC_STATUS_POSITION + crtc_offsets[crtc]); crtc 1364 drivers/gpu/drm/radeon/evergreen.c pos2 = RREG32(EVERGREEN_CRTC_STATUS_POSITION + crtc_offsets[crtc]); crtc 1380 drivers/gpu/drm/radeon/evergreen.c void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc) crtc 1384 drivers/gpu/drm/radeon/evergreen.c if (crtc >= rdev->num_crtc) crtc 1387 drivers/gpu/drm/radeon/evergreen.c if (!(RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[crtc]) & EVERGREEN_CRTC_MASTER_EN)) crtc 1393 drivers/gpu/drm/radeon/evergreen.c while (dce4_is_in_vblank(rdev, crtc)) { crtc 1395 drivers/gpu/drm/radeon/evergreen.c if (!dce4_is_counter_moving(rdev, crtc)) crtc 1400 drivers/gpu/drm/radeon/evergreen.c while (!dce4_is_in_vblank(rdev, crtc)) { crtc 1402 drivers/gpu/drm/radeon/evergreen.c if (!dce4_is_counter_moving(rdev, crtc)) crtc 1674 drivers/gpu/drm/radeon/evergreen.c struct drm_crtc *crtc; crtc 1679 drivers/gpu/drm/radeon/evergreen.c list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) { crtc 1680 drivers/gpu/drm/radeon/evergreen.c radeon_crtc = to_radeon_crtc(crtc); crtc 1699 drivers/gpu/drm/radeon/evergreen.c struct drm_crtc *crtc; crtc 1704 drivers/gpu/drm/radeon/evergreen.c list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) { crtc 1705 drivers/gpu/drm/radeon/evergreen.c radeon_crtc = to_radeon_crtc(crtc); crtc 4450 drivers/gpu/drm/radeon/evergreen.c u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc) crtc 4452 drivers/gpu/drm/radeon/evergreen.c if (crtc >= rdev->num_crtc) crtc 4455 drivers/gpu/drm/radeon/evergreen.c return RREG32(CRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); crtc 74 drivers/gpu/drm/radeon/evergreen_hdmi.c if (encoder->crtc) { crtc 75 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 228 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_crtc *crtc, unsigned int clock) crtc 257 drivers/gpu/drm/radeon/evergreen_hdmi.c if (crtc) crtc 258 drivers/gpu/drm/radeon/evergreen_hdmi.c value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); crtc 271 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_crtc *crtc, unsigned int clock) crtc 283 drivers/gpu/drm/radeon/evergreen_hdmi.c if (crtc) crtc 284 drivers/gpu/drm/radeon/evergreen_hdmi.c value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); crtc 77 drivers/gpu/drm/radeon/r100.c static bool r100_is_in_vblank(struct radeon_device *rdev, int crtc) crtc 79 drivers/gpu/drm/radeon/r100.c if (crtc == 0) { crtc 92 drivers/gpu/drm/radeon/r100.c static bool r100_is_counter_moving(struct radeon_device *rdev, int crtc) crtc 96 drivers/gpu/drm/radeon/r100.c if (crtc == 0) { crtc 117 drivers/gpu/drm/radeon/r100.c void r100_wait_for_vblank(struct radeon_device *rdev, int crtc) crtc 121 drivers/gpu/drm/radeon/r100.c if (crtc >= rdev->num_crtc) crtc 124 drivers/gpu/drm/radeon/r100.c if (crtc == 0) { crtc 135 drivers/gpu/drm/radeon/r100.c while (r100_is_in_vblank(rdev, crtc)) { crtc 137 drivers/gpu/drm/radeon/r100.c if (!r100_is_counter_moving(rdev, crtc)) crtc 142 drivers/gpu/drm/radeon/r100.c while (!r100_is_in_vblank(rdev, crtc)) { crtc 144 drivers/gpu/drm/radeon/r100.c if (!r100_is_counter_moving(rdev, crtc)) crtc 452 drivers/gpu/drm/radeon/r100.c struct drm_crtc *crtc; crtc 457 drivers/gpu/drm/radeon/r100.c list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) { crtc 458 drivers/gpu/drm/radeon/r100.c radeon_crtc = to_radeon_crtc(crtc); crtc 483 drivers/gpu/drm/radeon/r100.c struct drm_crtc *crtc; crtc 488 drivers/gpu/drm/radeon/r100.c list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) { crtc 489 drivers/gpu/drm/radeon/r100.c radeon_crtc = to_radeon_crtc(crtc); crtc 834 drivers/gpu/drm/radeon/r100.c u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc) crtc 836 drivers/gpu/drm/radeon/r100.c if (crtc == 0) crtc 1426 drivers/gpu/drm/radeon/r100.c struct drm_crtc *crtc; crtc 1465 drivers/gpu/drm/radeon/r100.c crtc = drm_crtc_find(p->rdev->ddev, p->filp, crtc_id); crtc 1466 drivers/gpu/drm/radeon/r100.c if (!crtc) { crtc 1470 drivers/gpu/drm/radeon/r100.c radeon_crtc = to_radeon_crtc(crtc); crtc 1473 drivers/gpu/drm/radeon/r100.c if (!crtc->enabled) { crtc 301 drivers/gpu/drm/radeon/r600.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 829 drivers/gpu/drm/radeon/r600_cs.c struct drm_crtc *crtc; crtc 890 drivers/gpu/drm/radeon/r600_cs.c crtc = drm_crtc_find(p->rdev->ddev, p->filp, crtc_id); crtc 891 drivers/gpu/drm/radeon/r600_cs.c if (!crtc) { crtc 895 drivers/gpu/drm/radeon/r600_cs.c radeon_crtc = to_radeon_crtc(crtc); crtc 898 drivers/gpu/drm/radeon/r600_cs.c if (!crtc->enabled) { crtc 159 drivers/gpu/drm/radeon/r600_dpm.c struct drm_crtc *crtc; crtc 165 drivers/gpu/drm/radeon/r600_dpm.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 166 drivers/gpu/drm/radeon/r600_dpm.c radeon_crtc = to_radeon_crtc(crtc); crtc 167 drivers/gpu/drm/radeon/r600_dpm.c if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { crtc 186 drivers/gpu/drm/radeon/r600_dpm.c struct drm_crtc *crtc; crtc 191 drivers/gpu/drm/radeon/r600_dpm.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 192 drivers/gpu/drm/radeon/r600_dpm.c radeon_crtc = to_radeon_crtc(crtc); crtc 193 drivers/gpu/drm/radeon/r600_dpm.c if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { crtc 315 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_crtc *crtc, unsigned int clock) crtc 320 drivers/gpu/drm/radeon/r600_hdmi.c if (!crtc) crtc 323 drivers/gpu/drm/radeon/r600_hdmi.c radeon_encoder = to_radeon_encoder(crtc->encoder); crtc 810 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc); crtc 811 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc); crtc 1898 drivers/gpu/drm/radeon/radeon.h u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc); crtc 1900 drivers/gpu/drm/radeon/radeon.h void (*wait_for_vblank)(struct radeon_device *rdev, int crtc); crtc 1993 drivers/gpu/drm/radeon/radeon.h void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base, bool async); crtc 1994 drivers/gpu/drm/radeon/radeon.h bool (*page_flip_pending)(struct radeon_device *rdev, int crtc); crtc 2727 drivers/gpu/drm/radeon/radeon.h #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->display.get_vblank_counter((rdev), (crtc)) crtc 2763 drivers/gpu/drm/radeon/radeon.h #define radeon_page_flip(rdev, crtc, base, async) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base), (async)) crtc 2764 drivers/gpu/drm/radeon/radeon.h #define radeon_page_flip_pending(rdev, crtc) (rdev)->asic->pflip.page_flip_pending((rdev), (crtc)) crtc 2765 drivers/gpu/drm/radeon/radeon.h #define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc)) crtc 68 drivers/gpu/drm/radeon/radeon_asic.h u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); crtc 140 drivers/gpu/drm/radeon/radeon_asic.h extern void r100_page_flip(struct radeon_device *rdev, int crtc, crtc 142 drivers/gpu/drm/radeon/radeon_asic.h extern bool r100_page_flip_pending(struct radeon_device *rdev, int crtc); crtc 143 drivers/gpu/drm/radeon/radeon_asic.h extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); crtc 236 drivers/gpu/drm/radeon/radeon_asic.h u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); crtc 252 drivers/gpu/drm/radeon/radeon_asic.h extern void rs600_page_flip(struct radeon_device *rdev, int crtc, crtc 254 drivers/gpu/drm/radeon/radeon_asic.h extern bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc); crtc 256 drivers/gpu/drm/radeon/radeon_asic.h extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc); crtc 467 drivers/gpu/drm/radeon/radeon_asic.h void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base, crtc 469 drivers/gpu/drm/radeon/radeon_asic.h bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); crtc 525 drivers/gpu/drm/radeon/radeon_asic.h u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc); crtc 537 drivers/gpu/drm/radeon/radeon_asic.h extern void evergreen_page_flip(struct radeon_device *rdev, int crtc, crtc 539 drivers/gpu/drm/radeon/radeon_asic.h extern bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc); crtc 540 drivers/gpu/drm/radeon/radeon_asic.h extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc); crtc 4350 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc) crtc 4367 drivers/gpu/drm/radeon/radeon_atombios.c bios_3_scratch |= (crtc << 18); crtc 4371 drivers/gpu/drm/radeon/radeon_atombios.c bios_3_scratch |= (crtc << 24); crtc 4375 drivers/gpu/drm/radeon/radeon_atombios.c bios_3_scratch |= (crtc << 16); crtc 4379 drivers/gpu/drm/radeon/radeon_atombios.c bios_3_scratch |= (crtc << 20); crtc 4383 drivers/gpu/drm/radeon/radeon_atombios.c bios_3_scratch |= (crtc << 17); crtc 4387 drivers/gpu/drm/radeon/radeon_atombios.c bios_3_scratch |= (crtc << 19); crtc 4391 drivers/gpu/drm/radeon/radeon_atombios.c bios_3_scratch |= (crtc << 23); crtc 4395 drivers/gpu/drm/radeon/radeon_atombios.c bios_3_scratch |= (crtc << 25); crtc 67 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); crtc 69 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); crtc 71 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); crtc 73 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); crtc 75 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); crtc 77 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); crtc 499 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); crtc 502 drivers/gpu/drm/radeon/radeon_audio.c radeon_encoder->audio->set_dto(rdev, crtc, clock); crtc 656 drivers/gpu/drm/radeon/radeon_audio.c if (encoder->crtc) { crtc 657 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 55 drivers/gpu/drm/radeon/radeon_audio.h struct radeon_crtc *crtc, unsigned int clock); crtc 3561 drivers/gpu/drm/radeon/radeon_combios.c radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc) crtc 3570 drivers/gpu/drm/radeon/radeon_combios.c bios_5_scratch |= (crtc << RADEON_TV1_CRTC_SHIFT); crtc 3574 drivers/gpu/drm/radeon/radeon_combios.c bios_5_scratch |= (crtc << RADEON_CRT1_CRTC_SHIFT); crtc 3578 drivers/gpu/drm/radeon/radeon_combios.c bios_5_scratch |= (crtc << RADEON_CRT2_CRTC_SHIFT); crtc 3582 drivers/gpu/drm/radeon/radeon_combios.c bios_5_scratch |= (crtc << RADEON_LCD1_CRTC_SHIFT); crtc 3586 drivers/gpu/drm/radeon/radeon_combios.c bios_5_scratch |= (crtc << RADEON_DFP1_CRTC_SHIFT); crtc 3590 drivers/gpu/drm/radeon/radeon_combios.c bios_5_scratch |= (crtc << RADEON_DFP2_CRTC_SHIFT); crtc 112 drivers/gpu/drm/radeon/radeon_connectors.c struct drm_crtc *crtc = encoder->crtc; crtc 114 drivers/gpu/drm/radeon/radeon_connectors.c if (crtc && crtc->enabled) { crtc 115 drivers/gpu/drm/radeon/radeon_connectors.c drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc 116 drivers/gpu/drm/radeon/radeon_connectors.c crtc->x, crtc->y, crtc->primary->fb); crtc 755 drivers/gpu/drm/radeon/radeon_connectors.c if (connector->encoder && connector->encoder->crtc) { crtc 756 drivers/gpu/drm/radeon/radeon_connectors.c struct drm_crtc *crtc = connector->encoder->crtc; crtc 757 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 765 drivers/gpu/drm/radeon/radeon_connectors.c crtc->funcs->gamma_set(crtc, NULL, NULL, NULL, 0, NULL); crtc 32 drivers/gpu/drm/radeon/radeon_cursor.c static void radeon_lock_cursor(struct drm_crtc *crtc, bool lock) crtc 34 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; crtc 35 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 62 drivers/gpu/drm/radeon/radeon_cursor.c static void radeon_hide_cursor(struct drm_crtc *crtc) crtc 64 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 65 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; crtc 90 drivers/gpu/drm/radeon/radeon_cursor.c static void radeon_show_cursor(struct drm_crtc *crtc) crtc 92 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 93 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; crtc 144 drivers/gpu/drm/radeon/radeon_cursor.c static int radeon_cursor_move_locked(struct drm_crtc *crtc, int x, int y) crtc 146 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 147 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; crtc 156 drivers/gpu/drm/radeon/radeon_cursor.c x += crtc->x; crtc 157 drivers/gpu/drm/radeon/radeon_cursor.c y += crtc->y; crtc 166 drivers/gpu/drm/radeon/radeon_cursor.c x += crtc->x; crtc 167 drivers/gpu/drm/radeon/radeon_cursor.c y += crtc->y; crtc 169 drivers/gpu/drm/radeon/radeon_cursor.c DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); crtc 185 drivers/gpu/drm/radeon/radeon_cursor.c list_for_each_entry(crtc_p, &crtc->dev->mode_config.crtc_list, head) { crtc 193 drivers/gpu/drm/radeon/radeon_cursor.c frame_end = crtc->x + crtc->mode.crtc_hdisplay; crtc 209 drivers/gpu/drm/radeon/radeon_cursor.c if (x <= (crtc->x - w) || y <= (crtc->y - radeon_crtc->cursor_height) || crtc 210 drivers/gpu/drm/radeon/radeon_cursor.c x >= (crtc->x + crtc->mode.hdisplay) || crtc 211 drivers/gpu/drm/radeon/radeon_cursor.c y >= (crtc->y + crtc->mode.vdisplay)) crtc 228 drivers/gpu/drm/radeon/radeon_cursor.c x -= crtc->x; crtc 229 drivers/gpu/drm/radeon/radeon_cursor.c y -= crtc->y; crtc 231 drivers/gpu/drm/radeon/radeon_cursor.c if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN) crtc 251 drivers/gpu/drm/radeon/radeon_cursor.c radeon_show_cursor(crtc); crtc 258 drivers/gpu/drm/radeon/radeon_cursor.c radeon_hide_cursor(crtc); crtc 264 drivers/gpu/drm/radeon/radeon_cursor.c int radeon_crtc_cursor_move(struct drm_crtc *crtc, crtc 269 drivers/gpu/drm/radeon/radeon_cursor.c radeon_lock_cursor(crtc, true); crtc 270 drivers/gpu/drm/radeon/radeon_cursor.c ret = radeon_cursor_move_locked(crtc, x, y); crtc 271 drivers/gpu/drm/radeon/radeon_cursor.c radeon_lock_cursor(crtc, false); crtc 276 drivers/gpu/drm/radeon/radeon_cursor.c int radeon_crtc_cursor_set2(struct drm_crtc *crtc, crtc 284 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 285 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; crtc 292 drivers/gpu/drm/radeon/radeon_cursor.c radeon_hide_cursor(crtc); crtc 326 drivers/gpu/drm/radeon/radeon_cursor.c radeon_lock_cursor(crtc, true); crtc 342 drivers/gpu/drm/radeon/radeon_cursor.c radeon_cursor_move_locked(crtc, x, y); crtc 345 drivers/gpu/drm/radeon/radeon_cursor.c radeon_show_cursor(crtc); crtc 347 drivers/gpu/drm/radeon/radeon_cursor.c radeon_lock_cursor(crtc, false); crtc 372 drivers/gpu/drm/radeon/radeon_cursor.c void radeon_cursor_reset(struct drm_crtc *crtc) crtc 374 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 377 drivers/gpu/drm/radeon/radeon_cursor.c radeon_lock_cursor(crtc, true); crtc 379 drivers/gpu/drm/radeon/radeon_cursor.c radeon_cursor_move_locked(crtc, radeon_crtc->cursor_x, crtc 382 drivers/gpu/drm/radeon/radeon_cursor.c radeon_show_cursor(crtc); crtc 384 drivers/gpu/drm/radeon/radeon_cursor.c radeon_lock_cursor(crtc, false); crtc 1567 drivers/gpu/drm/radeon/radeon_device.c struct drm_crtc *crtc; crtc 1590 drivers/gpu/drm/radeon/radeon_device.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 1591 drivers/gpu/drm/radeon/radeon_device.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1592 drivers/gpu/drm/radeon/radeon_device.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 1672 drivers/gpu/drm/radeon/radeon_device.c struct drm_crtc *crtc; crtc 1713 drivers/gpu/drm/radeon/radeon_device.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 1714 drivers/gpu/drm/radeon/radeon_device.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 48 drivers/gpu/drm/radeon/radeon_display.c static void avivo_crtc_load_lut(struct drm_crtc *crtc) crtc 50 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 51 drivers/gpu/drm/radeon/radeon_display.c struct drm_device *dev = crtc->dev; crtc 72 drivers/gpu/drm/radeon/radeon_display.c r = crtc->gamma_store; crtc 73 drivers/gpu/drm/radeon/radeon_display.c g = r + crtc->gamma_size; crtc 74 drivers/gpu/drm/radeon/radeon_display.c b = g + crtc->gamma_size; crtc 86 drivers/gpu/drm/radeon/radeon_display.c static void dce4_crtc_load_lut(struct drm_crtc *crtc) crtc 88 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 89 drivers/gpu/drm/radeon/radeon_display.c struct drm_device *dev = crtc->dev; crtc 109 drivers/gpu/drm/radeon/radeon_display.c r = crtc->gamma_store; crtc 110 drivers/gpu/drm/radeon/radeon_display.c g = r + crtc->gamma_size; crtc 111 drivers/gpu/drm/radeon/radeon_display.c b = g + crtc->gamma_size; crtc 120 drivers/gpu/drm/radeon/radeon_display.c static void dce5_crtc_load_lut(struct drm_crtc *crtc) crtc 122 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 123 drivers/gpu/drm/radeon/radeon_display.c struct drm_device *dev = crtc->dev; crtc 157 drivers/gpu/drm/radeon/radeon_display.c r = crtc->gamma_store; crtc 158 drivers/gpu/drm/radeon/radeon_display.c g = r + crtc->gamma_size; crtc 159 drivers/gpu/drm/radeon/radeon_display.c b = g + crtc->gamma_size; crtc 192 drivers/gpu/drm/radeon/radeon_display.c static void legacy_crtc_load_lut(struct drm_crtc *crtc) crtc 194 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 195 drivers/gpu/drm/radeon/radeon_display.c struct drm_device *dev = crtc->dev; crtc 209 drivers/gpu/drm/radeon/radeon_display.c r = crtc->gamma_store; crtc 210 drivers/gpu/drm/radeon/radeon_display.c g = r + crtc->gamma_size; crtc 211 drivers/gpu/drm/radeon/radeon_display.c b = g + crtc->gamma_size; crtc 220 drivers/gpu/drm/radeon/radeon_display.c void radeon_crtc_load_lut(struct drm_crtc *crtc) crtc 222 drivers/gpu/drm/radeon/radeon_display.c struct drm_device *dev = crtc->dev; crtc 225 drivers/gpu/drm/radeon/radeon_display.c if (!crtc->enabled) crtc 229 drivers/gpu/drm/radeon/radeon_display.c dce5_crtc_load_lut(crtc); crtc 231 drivers/gpu/drm/radeon/radeon_display.c dce4_crtc_load_lut(crtc); crtc 233 drivers/gpu/drm/radeon/radeon_display.c avivo_crtc_load_lut(crtc); crtc 235 drivers/gpu/drm/radeon/radeon_display.c legacy_crtc_load_lut(crtc); crtc 238 drivers/gpu/drm/radeon/radeon_display.c static int radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, crtc 242 drivers/gpu/drm/radeon/radeon_display.c radeon_crtc_load_lut(crtc); crtc 247 drivers/gpu/drm/radeon/radeon_display.c static void radeon_crtc_destroy(struct drm_crtc *crtc) crtc 249 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 251 drivers/gpu/drm/radeon/radeon_display.c drm_crtc_cleanup(crtc); crtc 416 drivers/gpu/drm/radeon/radeon_display.c struct drm_crtc *crtc = &radeon_crtc->base; crtc 458 drivers/gpu/drm/radeon/radeon_display.c &crtc->hwmode) crtc 467 drivers/gpu/drm/radeon/radeon_display.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 476 drivers/gpu/drm/radeon/radeon_display.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 480 drivers/gpu/drm/radeon/radeon_display.c static int radeon_crtc_page_flip_target(struct drm_crtc *crtc, crtc 487 drivers/gpu/drm/radeon/radeon_display.c struct drm_device *dev = crtc->dev; crtc 489 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 511 drivers/gpu/drm/radeon/radeon_display.c obj = crtc->primary->fb->obj[0]; crtc 552 drivers/gpu/drm/radeon/radeon_display.c int tile_addr = (((crtc->y >> 3) * pitch_pixels + crtc->x) >> (8 - byteshift)) << 11; crtc 553 drivers/gpu/drm/radeon/radeon_display.c base += tile_addr + ((crtc->x << byteshift) % 256) + ((crtc->y % 8) << 8); crtc 556 drivers/gpu/drm/radeon/radeon_display.c int offset = crtc->y * pitch_pixels + crtc->x; crtc 578 drivers/gpu/drm/radeon/radeon_display.c work->target_vblank = target - (uint32_t)drm_crtc_vblank_count(crtc) + crtc 582 drivers/gpu/drm/radeon/radeon_display.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 586 drivers/gpu/drm/radeon/radeon_display.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 594 drivers/gpu/drm/radeon/radeon_display.c crtc->primary->fb = fb; crtc 596 drivers/gpu/drm/radeon/radeon_display.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 624 drivers/gpu/drm/radeon/radeon_display.c struct drm_crtc *crtc; crtc 628 drivers/gpu/drm/radeon/radeon_display.c if (!set || !set->crtc) crtc 631 drivers/gpu/drm/radeon/radeon_display.c dev = set->crtc->dev; crtc 639 drivers/gpu/drm/radeon/radeon_display.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) crtc 640 drivers/gpu/drm/radeon/radeon_display.c if (crtc->enabled) crtc 701 drivers/gpu/drm/radeon/radeon_display.c radeon_crtc->mode_set.crtc = &radeon_crtc->base; crtc 1682 drivers/gpu/drm/radeon/radeon_display.c bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, crtc 1686 drivers/gpu/drm/radeon/radeon_display.c struct drm_device *dev = crtc->dev; crtc 1689 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1701 drivers/gpu/drm/radeon/radeon_display.c if (encoder->crtc != crtc) crtc 1720 drivers/gpu/drm/radeon/radeon_display.c src_v = crtc->mode.vdisplay; crtc 1722 drivers/gpu/drm/radeon/radeon_display.c src_h = crtc->mode.hdisplay; crtc 1741 drivers/gpu/drm/radeon/radeon_display.c src_v = crtc->mode.vdisplay; crtc 1742 drivers/gpu/drm/radeon/radeon_display.c dst_v = crtc->mode.vdisplay - (radeon_crtc->v_border * 2); crtc 1743 drivers/gpu/drm/radeon/radeon_display.c src_h = crtc->mode.hdisplay; crtc 1744 drivers/gpu/drm/radeon/radeon_display.c dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2); crtc 351 drivers/gpu/drm/radeon/radeon_dp_mst.c void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) crtc 353 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 354 drivers/gpu/drm/radeon/radeon_dp_mst.c struct drm_device *dev = crtc->dev; crtc 387 drivers/gpu/drm/radeon/radeon_dp_mst.c struct drm_crtc *crtc; crtc 408 drivers/gpu/drm/radeon/radeon_dp_mst.c crtc = encoder->crtc; crtc 415 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_crtc = to_radeon_crtc(crtc); crtc 137 drivers/gpu/drm/radeon/radeon_drv.c extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc, crtc 530 drivers/gpu/drm/radeon/radeon_drv.c struct drm_crtc *crtc; crtc 537 drivers/gpu/drm/radeon/radeon_drv.c list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { crtc 538 drivers/gpu/drm/radeon/radeon_drv.c if (crtc->enabled) { crtc 419 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc) crtc 423 drivers/gpu/drm/radeon/radeon_irq_kms.c if (crtc < 0 || crtc >= rdev->num_crtc) crtc 429 drivers/gpu/drm/radeon/radeon_irq_kms.c if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) { crtc 445 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc) crtc 449 drivers/gpu/drm/radeon/radeon_irq_kms.c if (crtc < 0 || crtc >= rdev->num_crtc) crtc 455 drivers/gpu/drm/radeon/radeon_irq_kms.c if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) { crtc 231 drivers/gpu/drm/radeon/radeon_kms.c struct drm_crtc *crtc; crtc 261 drivers/gpu/drm/radeon/radeon_kms.c crtc = (struct drm_crtc *)minfo->crtcs[i]; crtc 262 drivers/gpu/drm/radeon/radeon_kms.c if (crtc && crtc->base.id == *value) { crtc 263 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 823 drivers/gpu/drm/radeon/radeon_kms.c int radeon_enable_vblank_kms(struct drm_device *dev, int crtc) crtc 829 drivers/gpu/drm/radeon/radeon_kms.c if (crtc < 0 || crtc >= rdev->num_crtc) { crtc 830 drivers/gpu/drm/radeon/radeon_kms.c DRM_ERROR("Invalid crtc %d\n", crtc); crtc 835 drivers/gpu/drm/radeon/radeon_kms.c rdev->irq.crtc_vblank_int[crtc] = true; crtc 849 drivers/gpu/drm/radeon/radeon_kms.c void radeon_disable_vblank_kms(struct drm_device *dev, int crtc) crtc 854 drivers/gpu/drm/radeon/radeon_kms.c if (crtc < 0 || crtc >= rdev->num_crtc) { crtc 855 drivers/gpu/drm/radeon/radeon_kms.c DRM_ERROR("Invalid crtc %d\n", crtc); crtc 860 drivers/gpu/drm/radeon/radeon_kms.c rdev->irq.crtc_vblank_int[crtc] = false; crtc 37 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static void radeon_overscan_setup(struct drm_crtc *crtc, crtc 40 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct drm_device *dev = crtc->dev; crtc 42 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 49 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, crtc 52 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct drm_device *dev = crtc->dev; crtc 54 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 297 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 299 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 300 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct drm_device *dev = crtc->dev; crtc 338 drivers/gpu/drm/radeon/radeon_legacy_crtc.c drm_crtc_vblank_on(crtc); crtc 339 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_crtc_load_lut(crtc); crtc 345 drivers/gpu/drm/radeon/radeon_legacy_crtc.c drm_crtc_vblank_off(crtc); crtc 360 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, crtc 363 drivers/gpu/drm/radeon/radeon_legacy_crtc.c return radeon_crtc_do_set_base(crtc, old_fb, x, y, 0); crtc 366 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int radeon_crtc_set_base_atomic(struct drm_crtc *crtc, crtc 370 drivers/gpu/drm/radeon/radeon_legacy_crtc.c return radeon_crtc_do_set_base(crtc, fb, x, y, 1); crtc 373 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int radeon_crtc_do_set_base(struct drm_crtc *crtc, crtc 377 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct drm_device *dev = crtc->dev; crtc 379 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 393 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (!atomic && !crtc->primary->fb) { crtc 401 drivers/gpu/drm/radeon/radeon_legacy_crtc.c target_fb = crtc->primary->fb; crtc 448 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (!atomic && fb && fb != crtc->primary->fb) { crtc 558 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (!atomic && fb && fb != crtc->primary->fb) { crtc 573 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mode *mode) crtc 575 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct drm_device *dev = crtc->dev; crtc 577 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 578 drivers/gpu/drm/radeon/radeon_legacy_crtc.c const struct drm_framebuffer *fb = crtc->primary->fb; crtc 592 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (encoder->crtc == crtc) { crtc 733 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) crtc 735 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct drm_device *dev = crtc->dev; crtc 737 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 786 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (encoder->crtc == crtc) { crtc 1026 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static bool radeon_crtc_mode_fixup(struct drm_crtc *crtc, crtc 1030 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) crtc 1035 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static int radeon_crtc_mode_set(struct drm_crtc *crtc, crtc 1040 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1043 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_crtc_set_base(crtc, x, y, old_fb); crtc 1044 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_set_crtc_timing(crtc, adjusted_mode); crtc 1045 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_set_pll(crtc, adjusted_mode); crtc 1046 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_overscan_setup(crtc, adjusted_mode); crtc 1048 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_legacy_rmx_mode_set(crtc, adjusted_mode); crtc 1057 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_cursor_reset(crtc); crtc 1061 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static void radeon_crtc_prepare(struct drm_crtc *crtc) crtc 1063 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct drm_device *dev = crtc->dev; crtc 1074 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static void radeon_crtc_commit(struct drm_crtc *crtc) crtc 1076 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct drm_device *dev = crtc->dev; crtc 1088 drivers/gpu/drm/radeon/radeon_legacy_crtc.c static void radeon_crtc_disable(struct drm_crtc *crtc) crtc 1090 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 1091 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (crtc->primary->fb) { crtc 1095 drivers/gpu/drm/radeon/radeon_legacy_crtc.c rbo = gem_to_radeon_bo(crtc->primary->fb->obj[0]); crtc 189 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 590 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 787 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 952 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 1158 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 1543 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct drm_crtc *crtc; crtc 1546 drivers/gpu/drm/radeon/radeon_legacy_encoders.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 1547 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); crtc 1548 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if ((radeon_crtc->crtc_id == 1) && crtc->enabled) { crtc 1549 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (encoder->crtc != crtc) { crtc 247 drivers/gpu/drm/radeon/radeon_legacy_tv.c radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc); crtc 550 drivers/gpu/drm/radeon/radeon_legacy_tv.c radeon_crtc = to_radeon_crtc(encoder->crtc); crtc 452 drivers/gpu/drm/radeon/radeon_mode.h int crtc; crtc 845 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_crtc_load_lut(struct drm_crtc *crtc); crtc 846 drivers/gpu/drm/radeon/radeon_mode.h extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, crtc 848 drivers/gpu/drm/radeon/radeon_mode.h extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc, crtc 852 drivers/gpu/drm/radeon/radeon_mode.h extern int atombios_crtc_mode_set(struct drm_crtc *crtc, crtc 857 drivers/gpu/drm/radeon/radeon_mode.h extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); crtc 859 drivers/gpu/drm/radeon/radeon_mode.h extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, crtc 861 drivers/gpu/drm/radeon/radeon_mode.h extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc, crtc 865 drivers/gpu/drm/radeon/radeon_mode.h extern int radeon_crtc_do_set_base(struct drm_crtc *crtc, crtc 868 drivers/gpu/drm/radeon/radeon_mode.h extern int radeon_crtc_cursor_set2(struct drm_crtc *crtc, crtc 875 drivers/gpu/drm/radeon/radeon_mode.h extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, crtc 877 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_cursor_reset(struct drm_crtc *crtc); crtc 921 drivers/gpu/drm/radeon/radeon_mode.h radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); crtc 925 drivers/gpu/drm/radeon/radeon_mode.h radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); crtc 949 drivers/gpu/drm/radeon/radeon_mode.h bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, crtc 996 drivers/gpu/drm/radeon/radeon_mode.h void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode); crtc 254 drivers/gpu/drm/radeon/radeon_pm.c struct drm_crtc *crtc; crtc 284 drivers/gpu/drm/radeon/radeon_pm.c drm_for_each_crtc(crtc, rdev->ddev) { crtc 287 drivers/gpu/drm/radeon/radeon_pm.c if (drm_crtc_vblank_get(crtc) == 0) crtc 301 drivers/gpu/drm/radeon/radeon_pm.c drm_for_each_crtc(crtc, rdev->ddev) { crtc 304 drivers/gpu/drm/radeon/radeon_pm.c drm_crtc_vblank_put(crtc); crtc 1648 drivers/gpu/drm/radeon/radeon_pm.c struct drm_crtc *crtc; crtc 1659 drivers/gpu/drm/radeon/radeon_pm.c list_for_each_entry(crtc, crtc 1661 drivers/gpu/drm/radeon/radeon_pm.c radeon_crtc = to_radeon_crtc(crtc); crtc 1721 drivers/gpu/drm/radeon/radeon_pm.c struct drm_crtc *crtc; crtc 1733 drivers/gpu/drm/radeon/radeon_pm.c list_for_each_entry(crtc, crtc 1735 drivers/gpu/drm/radeon/radeon_pm.c radeon_crtc = to_radeon_crtc(crtc); crtc 1736 drivers/gpu/drm/radeon/radeon_pm.c if (crtc->enabled) { crtc 1765 drivers/gpu/drm/radeon/radeon_pm.c int crtc, vpos, hpos, vbl_status; crtc 1771 drivers/gpu/drm/radeon/radeon_pm.c for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) { crtc 1772 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtcs & (1 << crtc)) { crtc 1774 drivers/gpu/drm/radeon/radeon_pm.c crtc, crtc 1777 drivers/gpu/drm/radeon/radeon_pm.c &rdev->mode_info.crtcs[crtc]->base.hwmode); crtc 61 drivers/gpu/drm/radeon/rs600.c static bool avivo_is_in_vblank(struct radeon_device *rdev, int crtc) crtc 63 drivers/gpu/drm/radeon/rs600.c if (RREG32(AVIVO_D1CRTC_STATUS + crtc_offsets[crtc]) & AVIVO_D1CRTC_V_BLANK) crtc 69 drivers/gpu/drm/radeon/rs600.c static bool avivo_is_counter_moving(struct radeon_device *rdev, int crtc) crtc 73 drivers/gpu/drm/radeon/rs600.c pos1 = RREG32(AVIVO_D1CRTC_STATUS_POSITION + crtc_offsets[crtc]); crtc 74 drivers/gpu/drm/radeon/rs600.c pos2 = RREG32(AVIVO_D1CRTC_STATUS_POSITION + crtc_offsets[crtc]); crtc 90 drivers/gpu/drm/radeon/rs600.c void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc) crtc 94 drivers/gpu/drm/radeon/rs600.c if (crtc >= rdev->num_crtc) crtc 97 drivers/gpu/drm/radeon/rs600.c if (!(RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[crtc]) & AVIVO_CRTC_EN)) crtc 103 drivers/gpu/drm/radeon/rs600.c while (avivo_is_in_vblank(rdev, crtc)) { crtc 105 drivers/gpu/drm/radeon/rs600.c if (!avivo_is_counter_moving(rdev, crtc)) crtc 110 drivers/gpu/drm/radeon/rs600.c while (!avivo_is_in_vblank(rdev, crtc)) { crtc 112 drivers/gpu/drm/radeon/rs600.c if (!avivo_is_counter_moving(rdev, crtc)) crtc 319 drivers/gpu/drm/radeon/rs600.c struct drm_crtc *crtc; crtc 324 drivers/gpu/drm/radeon/rs600.c list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) { crtc 325 drivers/gpu/drm/radeon/rs600.c radeon_crtc = to_radeon_crtc(crtc); crtc 337 drivers/gpu/drm/radeon/rs600.c struct drm_crtc *crtc; crtc 342 drivers/gpu/drm/radeon/rs600.c list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) { crtc 343 drivers/gpu/drm/radeon/rs600.c radeon_crtc = to_radeon_crtc(crtc); crtc 845 drivers/gpu/drm/radeon/rs600.c u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc) crtc 847 drivers/gpu/drm/radeon/rs600.c if (crtc == 0) crtc 273 drivers/gpu/drm/radeon/rs690.c struct radeon_crtc *crtc, crtc 277 drivers/gpu/drm/radeon/rs690.c struct drm_display_mode *mode = &crtc->base.mode; crtc 284 drivers/gpu/drm/radeon/rs690.c if (!crtc->base.enabled) { crtc 305 drivers/gpu/drm/radeon/rs690.c if (crtc->vsc.full > dfixed_const(2)) crtc 331 drivers/gpu/drm/radeon/rs690.c if (crtc->rmx_type != RMX_OFF) { crtc 333 drivers/gpu/drm/radeon/rs690.c if (crtc->vsc.full > b.full) crtc 334 drivers/gpu/drm/radeon/rs690.c b.full = crtc->vsc.full; crtc 335 drivers/gpu/drm/radeon/rs690.c b.full = dfixed_mul(b, crtc->hsc); crtc 351 drivers/gpu/drm/radeon/rs690.c a.full = dfixed_const(crtc->base.mode.crtc_htotal); crtc 359 drivers/gpu/drm/radeon/rs690.c a.full = dfixed_const(crtc->base.mode.crtc_htotal); crtc 360 drivers/gpu/drm/radeon/rs690.c b.full = dfixed_const(crtc->base.mode.crtc_hdisplay); crtc 443 drivers/gpu/drm/radeon/rs690.c wm->priority_mark_max.full = dfixed_const(crtc->base.mode.crtc_hdisplay); crtc 450 drivers/gpu/drm/radeon/rs690.c if (dfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) { crtc 54 drivers/gpu/drm/radeon/rs780_dpm.c struct drm_crtc *crtc; crtc 63 drivers/gpu/drm/radeon/rs780_dpm.c crtc = (struct drm_crtc *)minfo->crtcs[i]; crtc 64 drivers/gpu/drm/radeon/rs780_dpm.c if (crtc && crtc->enabled) { crtc 65 drivers/gpu/drm/radeon/rs780_dpm.c radeon_crtc = to_radeon_crtc(crtc); crtc 67 drivers/gpu/drm/radeon/rs780_dpm.c if (crtc->mode.htotal && crtc->mode.vtotal) crtc 68 drivers/gpu/drm/radeon/rs780_dpm.c pi->refresh_rate = drm_mode_vrefresh(&crtc->mode); crtc 712 drivers/gpu/drm/radeon/rv515.c void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *crtc) crtc 714 drivers/gpu/drm/radeon/rv515.c int index_reg = 0x6578 + crtc->crtc_offset; crtc 715 drivers/gpu/drm/radeon/rv515.c int data_reg = 0x657c + crtc->crtc_offset; crtc 717 drivers/gpu/drm/radeon/rv515.c WREG32(0x659C + crtc->crtc_offset, 0x0); crtc 718 drivers/gpu/drm/radeon/rv515.c WREG32(0x6594 + crtc->crtc_offset, 0x705); crtc 719 drivers/gpu/drm/radeon/rv515.c WREG32(0x65A4 + crtc->crtc_offset, 0x10001); crtc 720 drivers/gpu/drm/radeon/rv515.c WREG32(0x65D8 + crtc->crtc_offset, 0x0); crtc 721 drivers/gpu/drm/radeon/rv515.c WREG32(0x65B0 + crtc->crtc_offset, 0x0); crtc 722 drivers/gpu/drm/radeon/rv515.c WREG32(0x65C0 + crtc->crtc_offset, 0x0); crtc 723 drivers/gpu/drm/radeon/rv515.c WREG32(0x65D4 + crtc->crtc_offset, 0x0); crtc 956 drivers/gpu/drm/radeon/rv515.c struct radeon_crtc *crtc, crtc 960 drivers/gpu/drm/radeon/rv515.c struct drm_display_mode *mode = &crtc->base.mode; crtc 967 drivers/gpu/drm/radeon/rv515.c if (!crtc->base.enabled) { crtc 985 drivers/gpu/drm/radeon/rv515.c if (crtc->vsc.full > dfixed_const(2)) crtc 1011 drivers/gpu/drm/radeon/rv515.c if (crtc->rmx_type != RMX_OFF) { crtc 1013 drivers/gpu/drm/radeon/rv515.c if (crtc->vsc.full > b.full) crtc 1014 drivers/gpu/drm/radeon/rv515.c b.full = crtc->vsc.full; crtc 1015 drivers/gpu/drm/radeon/rv515.c b.full = dfixed_mul(b, crtc->hsc); crtc 1031 drivers/gpu/drm/radeon/rv515.c a.full = dfixed_const(crtc->base.mode.crtc_htotal); crtc 1039 drivers/gpu/drm/radeon/rv515.c a.full = dfixed_const(crtc->base.mode.crtc_htotal); crtc 1040 drivers/gpu/drm/radeon/rv515.c b.full = dfixed_const(crtc->base.mode.crtc_hdisplay); crtc 1094 drivers/gpu/drm/radeon/rv515.c wm->priority_mark_max.full = dfixed_const(crtc->base.mode.crtc_hdisplay); crtc 1101 drivers/gpu/drm/radeon/rv515.c if (dfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) { crtc 213 drivers/gpu/drm/rcar-du/rcar_du_crtc.c const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode; crtc 347 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (plane->plane.state->crtc != &rcrtc->crtc || crtc 431 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_device *dev = rcrtc->crtc.dev; crtc 443 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_send_vblank_event(&rcrtc->crtc, event); crtc 447 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_vblank_put(&rcrtc->crtc); crtc 452 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_device *dev = rcrtc->crtc.dev; crtc 499 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_vblank_on(&rcrtc->crtc); crtc 556 drivers/gpu/drm/rcar-du/rcar_du_crtc.c interlaced = rcrtc->crtc.mode.flags & DRM_MODE_FLAG_INTERLACE; crtc 567 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_crtc *crtc = &rcrtc->crtc; crtc 571 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_vblank_get(crtc); crtc 590 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_vblank_put(crtc); crtc 595 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_crtc *crtc = &rcrtc->crtc; crtc 616 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_vblank_off(crtc); crtc 640 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static int rcar_du_crtc_atomic_check(struct drm_crtc *crtc, crtc 649 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_for_each_encoder_mask(encoder, crtc->dev, state->encoder_mask) { crtc 663 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, crtc 666 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 667 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc_state *rstate = to_rcar_crtc_state(crtc->state); crtc 682 drivers/gpu/drm/rcar-du/rcar_du_crtc.c &crtc->state->adjusted_mode; crtc 691 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, crtc 694 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 713 drivers/gpu/drm/rcar-du/rcar_du_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 714 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (crtc->state->event) { crtc 715 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 716 drivers/gpu/drm/rcar-du/rcar_du_crtc.c crtc->state->event = NULL; crtc 718 drivers/gpu/drm/rcar-du/rcar_du_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 721 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc, crtc 724 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 726 drivers/gpu/drm/rcar-du/rcar_du_crtc.c WARN_ON(!crtc->state->enable); crtc 746 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_atomic_flush(struct drm_crtc *crtc, crtc 749 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 750 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_device *dev = rcrtc->crtc.dev; crtc 755 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (crtc->state->event) { crtc 756 drivers/gpu/drm/rcar-du/rcar_du_crtc.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 759 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->event = crtc->state->event; crtc 760 drivers/gpu/drm/rcar-du/rcar_du_crtc.c crtc->state->event = NULL; crtc 769 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_mode_valid(struct drm_crtc *crtc, crtc 772 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 863 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_atomic_duplicate_state(struct drm_crtc *crtc) crtc 868 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (WARN_ON(!crtc->state)) crtc 871 drivers/gpu/drm/rcar-du/rcar_du_crtc.c state = to_rcar_crtc_state(crtc->state); crtc 876 drivers/gpu/drm/rcar-du/rcar_du_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, ©->state); crtc 881 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_atomic_destroy_state(struct drm_crtc *crtc, crtc 888 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_cleanup(struct drm_crtc *crtc) crtc 890 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 894 drivers/gpu/drm/rcar-du/rcar_du_crtc.c return drm_crtc_cleanup(crtc); crtc 897 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_reset(struct drm_crtc *crtc) crtc 901 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (crtc->state) { crtc 902 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_atomic_destroy_state(crtc, crtc->state); crtc 903 drivers/gpu/drm/rcar-du/rcar_du_crtc.c crtc->state = NULL; crtc 913 drivers/gpu/drm/rcar-du/rcar_du_crtc.c crtc->state = &state->state; crtc 914 drivers/gpu/drm/rcar-du/rcar_du_crtc.c crtc->state->crtc = crtc; crtc 917 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static int rcar_du_crtc_enable_vblank(struct drm_crtc *crtc) crtc 919 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 928 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_disable_vblank(struct drm_crtc *crtc) crtc 930 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 973 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static int rcar_du_crtc_verify_crc_source(struct drm_crtc *crtc, crtc 977 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 990 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_get_crc_sources(struct drm_crtc *crtc, size_t *count) crtc 992 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 998 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static int rcar_du_crtc_set_crc_source(struct drm_crtc *crtc, crtc 1001 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 1018 drivers/gpu/drm/rcar-du/rcar_du_crtc.c state = drm_atomic_state_alloc(crtc->dev); crtc 1027 drivers/gpu/drm/rcar-du/rcar_du_crtc.c crtc_state = drm_atomic_get_crtc_state(state, crtc); crtc 1112 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_handle_vblank(&rcrtc->crtc); crtc 1136 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_crtc *crtc = &rcrtc->crtc; crtc 1190 drivers/gpu/drm/rcar-du/rcar_du_crtc.c ret = drm_crtc_init_with_planes(rcdu->ddev, crtc, primary, NULL, crtc 1197 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_helper_add(crtc, &crtc_helper_funcs); crtc 1200 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_vblank_off(crtc); crtc 47 drivers/gpu/drm/rcar-du/rcar_du_crtc.h struct drm_crtc crtc; crtc 76 drivers/gpu/drm/rcar-du/rcar_du_crtc.h #define to_rcar_crtc(c) container_of(c, struct rcar_du_crtc, crtc) crtc 261 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_crtc *crtc; crtc 277 drivers/gpu/drm/rcar-du/rcar_du_group.c crtc = &rcdu->crtcs[index * 2]; crtc 279 drivers/gpu/drm/rcar-du/rcar_du_group.c ret = clk_prepare_enable(crtc->clock); crtc 285 drivers/gpu/drm/rcar-du/rcar_du_group.c clk_disable_unprepare(crtc->clock); crtc 322 drivers/gpu/drm/rcar-du/rcar_du_group.c rstate = to_rcar_crtc_state(rcrtc->crtc.state); crtc 390 drivers/gpu/drm/rcar-du/rcar_du_kms.c struct drm_crtc *crtc; crtc 399 drivers/gpu/drm/rcar-du/rcar_du_kms.c for_each_new_crtc_in_state(old_state, crtc, crtc_state, i) { crtc 402 drivers/gpu/drm/rcar-du/rcar_du_kms.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); crtc 281 drivers/gpu/drm/rcar-du/rcar_du_plane.c crtc_planes = to_rcar_crtc(new_plane_state->state.crtc)->index % 2 crtc 338 drivers/gpu/drm/rcar-du/rcar_du_plane.c interlaced = state->state.crtc->state->adjusted_mode.flags crtc 573 drivers/gpu/drm/rcar-du/rcar_du_plane.c if (!state->crtc) { crtc 583 drivers/gpu/drm/rcar-du/rcar_du_plane.c crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); crtc 34 drivers/gpu/drm/rcar-du/rcar_du_vsp.c struct rcar_du_crtc *crtc = private; crtc 36 drivers/gpu/drm/rcar-du/rcar_du_vsp.c if (crtc->vblank_enable) crtc 37 drivers/gpu/drm/rcar-du/rcar_du_vsp.c drm_crtc_handle_vblank(&crtc->crtc); crtc 40 drivers/gpu/drm/rcar-du/rcar_du_vsp.c rcar_du_crtc_finish_page_flip(crtc); crtc 42 drivers/gpu/drm/rcar-du/rcar_du_vsp.c rcar_du_writeback_complete(crtc); crtc 44 drivers/gpu/drm/rcar-du/rcar_du_vsp.c drm_crtc_add_crc_entry(&crtc->crtc, false, 0, &crc); crtc 47 drivers/gpu/drm/rcar-du/rcar_du_vsp.c void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) crtc 49 drivers/gpu/drm/rcar-du/rcar_du_vsp.c const struct drm_display_mode *mode = &crtc->crtc.state->adjusted_mode; crtc 50 drivers/gpu/drm/rcar-du/rcar_du_vsp.c struct rcar_du_device *rcdu = crtc->dev; crtc 56 drivers/gpu/drm/rcar-du/rcar_du_vsp.c .callback_data = crtc, crtc 61 drivers/gpu/drm/rcar-du/rcar_du_vsp.c .crtc = &crtc->crtc, crtc 78 drivers/gpu/drm/rcar-du/rcar_du_vsp.c state.hwindex = (crtc->index % 2) ? 2 : 0; crtc 80 drivers/gpu/drm/rcar-du/rcar_du_vsp.c state.hwindex = crtc->index % 2; crtc 82 drivers/gpu/drm/rcar-du/rcar_du_vsp.c __rcar_du_plane_setup(crtc->group, &state); crtc 91 drivers/gpu/drm/rcar-du/rcar_du_vsp.c crtc->group->need_restart = true; crtc 93 drivers/gpu/drm/rcar-du/rcar_du_vsp.c vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg); crtc 96 drivers/gpu/drm/rcar-du/rcar_du_vsp.c void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) crtc 98 drivers/gpu/drm/rcar-du/rcar_du_vsp.c vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL); crtc 101 drivers/gpu/drm/rcar-du/rcar_du_vsp.c void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) crtc 103 drivers/gpu/drm/rcar-du/rcar_du_vsp.c vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe); crtc 106 drivers/gpu/drm/rcar-du/rcar_du_vsp.c void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) crtc 111 drivers/gpu/drm/rcar-du/rcar_du_vsp.c state = to_rcar_crtc_state(crtc->crtc.state); crtc 114 drivers/gpu/drm/rcar-du/rcar_du_vsp.c rcar_du_writeback_setup(crtc, &cfg.writeback); crtc 116 drivers/gpu/drm/rcar-du/rcar_du_vsp.c vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg); crtc 151 drivers/gpu/drm/rcar-du/rcar_du_vsp.c struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc); crtc 179 drivers/gpu/drm/rcar-du/rcar_du_vsp.c vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe, crtc 278 drivers/gpu/drm/rcar-du/rcar_du_vsp.c struct rcar_du_crtc *crtc = to_rcar_crtc(old_state->crtc); crtc 283 drivers/gpu/drm/rcar-du/rcar_du_vsp.c vsp1_du_atomic_update(rplane->vsp->vsp, crtc->vsp_pipe, crtc 61 drivers/gpu/drm/rcar-du/rcar_du_vsp.h void rcar_du_vsp_enable(struct rcar_du_crtc *crtc); crtc 62 drivers/gpu/drm/rcar-du/rcar_du_vsp.h void rcar_du_vsp_disable(struct rcar_du_crtc *crtc); crtc 63 drivers/gpu/drm/rcar-du/rcar_du_vsp.h void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc); crtc 64 drivers/gpu/drm/rcar-du/rcar_du_vsp.h void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc); crtc 76 drivers/gpu/drm/rcar-du/rcar_du_vsp.h static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { }; crtc 77 drivers/gpu/drm/rcar-du/rcar_du_vsp.h static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { }; crtc 78 drivers/gpu/drm/rcar-du/rcar_du_vsp.h static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { }; crtc 79 drivers/gpu/drm/rcar-du/rcar_du_vsp.h static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { }; crtc 203 drivers/gpu/drm/rcar-du/rcar_du_writeback.c wb_conn->encoder.possible_crtcs = 1 << drm_crtc_index(&rcrtc->crtc); crtc 106 drivers/gpu/drm/rcar-du/rcar_lvds.c if (!conn_state->crtc) crtc 118 drivers/gpu/drm/rcar-du/rcar_lvds.c crtc_state = drm_atomic_get_crtc_state(state, conn_state->crtc); crtc 466 drivers/gpu/drm/rcar-du/rcar_lvds.c if (drm_crtc_index(lvds->bridge.encoder->crtc) == 2) crtc 162 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c return conn_state->crtc; crtc 169 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c struct drm_crtc *crtc; crtc 174 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c crtc = rockchip_dp_drm_get_new_crtc(encoder, state); crtc 175 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c if (!crtc) crtc 178 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); crtc 211 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c struct drm_crtc *crtc; crtc 215 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c crtc = rockchip_dp_drm_get_new_crtc(encoder, state); crtc 217 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c if (!crtc) crtc 220 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 225 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c ret = rockchip_drm_wait_vact_end(crtc, PSR_WAIT_LINE_FLAG_TIMEOUT_MS); crtc 58 drivers/gpu/drm/rockchip/rockchip_drm_drv.h int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout); crtc 94 drivers/gpu/drm/rockchip/rockchip_drm_vop.c #define to_vop(x) container_of(x, struct vop, crtc) crtc 122 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_crtc crtc; crtc 548 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static int vop_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) crtc 550 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 615 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_vblank_on(crtc); crtc 628 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void rockchip_drm_set_win_enabled(struct drm_crtc *crtc, bool enabled) crtc 630 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 647 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_crtc_atomic_disable(struct drm_crtc *crtc, crtc 650 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 654 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (crtc->state->self_refresh_active) crtc 655 drivers/gpu/drm/rockchip/rockchip_drm_vop.c rockchip_drm_set_win_enabled(crtc, false); crtc 659 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_vblank_off(crtc); crtc 661 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (crtc->state->self_refresh_active) crtc 698 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (crtc->state->event && !crtc->state->active) { crtc 699 drivers/gpu/drm/rockchip/rockchip_drm_vop.c spin_lock_irq(&crtc->dev->event_lock); crtc 700 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 701 drivers/gpu/drm/rockchip/rockchip_drm_vop.c spin_unlock_irq(&crtc->dev->event_lock); crtc 703 drivers/gpu/drm/rockchip/rockchip_drm_vop.c crtc->state->event = NULL; crtc 715 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_crtc *crtc = state->crtc; crtc 726 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (!crtc || !fb) crtc 729 drivers/gpu/drm/rockchip/rockchip_drm_vop.c crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); crtc 767 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(old_state->crtc); crtc 769 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (!old_state->crtc) crtc 783 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_crtc *crtc = state->crtc; crtc 787 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(state->crtc); crtc 808 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (WARN_ON(!crtc)) crtc 829 drivers/gpu/drm/rockchip/rockchip_drm_vop.c dsp_stx = dest->x1 + crtc->mode.htotal - crtc->mode.hsync_start; crtc 830 drivers/gpu/drm/rockchip/rockchip_drm_vop.c dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start; crtc 928 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (plane != state->crtc->cursor) crtc 939 drivers/gpu/drm/rockchip/rockchip_drm_vop.c state->crtc); crtc 941 drivers/gpu/drm/rockchip/rockchip_drm_vop.c crtc_state = plane->crtc->state; crtc 951 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(plane->state->crtc); crtc 980 drivers/gpu/drm/rockchip/rockchip_drm_vop.c WARN_ON(drm_crtc_vblank_get(plane->state->crtc) != 0); crtc 1005 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static int vop_crtc_enable_vblank(struct drm_crtc *crtc) crtc 1007 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 1023 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_crtc_disable_vblank(struct drm_crtc *crtc) crtc 1025 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 1038 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, crtc 1042 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 1082 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_crtc_atomic_enable(struct drm_crtc *crtc, crtc 1085 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 1087 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state); crtc 1088 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode; crtc 1104 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_vblank_on(crtc); crtc 1105 drivers/gpu/drm/rockchip/rockchip_drm_vop.c rockchip_drm_set_win_enabled(crtc, true); crtc 1113 drivers/gpu/drm/rockchip/rockchip_drm_vop.c ret = vop_enable(crtc, old_state); crtc 1225 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_crtc_atomic_flush(struct drm_crtc *crtc, crtc 1230 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 1250 drivers/gpu/drm/rockchip/rockchip_drm_vop.c spin_lock_irq(&crtc->dev->event_lock); crtc 1251 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (crtc->state->event) { crtc 1252 drivers/gpu/drm/rockchip/rockchip_drm_vop.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 1255 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop->event = crtc->state->event; crtc 1256 drivers/gpu/drm/rockchip/rockchip_drm_vop.c crtc->state->event = NULL; crtc 1258 drivers/gpu/drm/rockchip/rockchip_drm_vop.c spin_unlock_irq(&crtc->dev->event_lock); crtc 1269 drivers/gpu/drm/rockchip/rockchip_drm_vop.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 1282 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_crtc_destroy(struct drm_crtc *crtc) crtc 1284 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_cleanup(crtc); crtc 1287 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc) crtc 1295 drivers/gpu/drm/rockchip/rockchip_drm_vop.c __drm_atomic_helper_crtc_duplicate_state(crtc, &rockchip_state->base); crtc 1299 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_crtc_destroy_state(struct drm_crtc *crtc, crtc 1308 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static void vop_crtc_reset(struct drm_crtc *crtc) crtc 1313 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (crtc->state) crtc 1314 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_crtc_destroy_state(crtc, crtc->state); crtc 1316 drivers/gpu/drm/rockchip/rockchip_drm_vop.c __drm_atomic_helper_crtc_reset(crtc, &crtc_state->base); crtc 1337 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static int vop_crtc_set_crc_source(struct drm_crtc *crtc, crtc 1340 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 1359 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name, crtc 1370 drivers/gpu/drm/rockchip/rockchip_drm_vop.c static int vop_crtc_set_crc_source(struct drm_crtc *crtc, crtc 1377 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name, crtc 1402 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_vblank_put(&vop->crtc); crtc 1409 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_crtc *crtc = &vop->crtc; crtc 1413 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_send_vblank_event(crtc, vop->event); crtc 1414 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_vblank_put(crtc); crtc 1426 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_crtc *crtc = &vop->crtc; crtc 1472 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_handle_vblank(crtc); crtc 1508 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_crtc *crtc = &vop->crtc; crtc 1546 drivers/gpu/drm/rockchip/rockchip_drm_vop.c ret = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor, crtc 1551 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_helper_add(crtc, &vop_crtc_helper_funcs); crtc 1560 drivers/gpu/drm/rockchip/rockchip_drm_vop.c unsigned long possible_crtcs = drm_crtc_mask(crtc); crtc 1593 drivers/gpu/drm/rockchip/rockchip_drm_vop.c crtc->port = port; crtc 1595 drivers/gpu/drm/rockchip/rockchip_drm_vop.c ret = drm_self_refresh_helper_init(crtc); crtc 1599 drivers/gpu/drm/rockchip/rockchip_drm_vop.c crtc->name, ret); crtc 1604 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_cleanup(crtc); crtc 1614 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct drm_crtc *crtc = &vop->crtc; crtc 1618 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_self_refresh_helper_cleanup(crtc); crtc 1620 drivers/gpu/drm/rockchip/rockchip_drm_vop.c of_node_put(crtc->port); crtc 1638 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_crtc_cleanup(crtc); crtc 1785 drivers/gpu/drm/rockchip/rockchip_drm_vop.c int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout) crtc 1787 drivers/gpu/drm/rockchip/rockchip_drm_vop.c struct vop *vop = to_vop(crtc); crtc 1791 drivers/gpu/drm/rockchip/rockchip_drm_vop.c if (!crtc || !vop->is_enabled) crtc 1890 drivers/gpu/drm/rockchip/rockchip_drm_vop.c vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev); crtc 283 drivers/gpu/drm/rockchip/rockchip_lvds.c struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; crtc 74 drivers/gpu/drm/rockchip/rockchip_rgb.c struct drm_crtc *crtc, crtc 125 drivers/gpu/drm/rockchip/rockchip_rgb.c encoder->possible_crtcs = drm_crtc_mask(crtc); crtc 10 drivers/gpu/drm/rockchip/rockchip_rgb.h struct drm_crtc *crtc, crtc 15 drivers/gpu/drm/rockchip/rockchip_rgb.h struct drm_crtc *crtc, crtc 86 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 117 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 150 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 182 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 215 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 244 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = 0, crtc 267 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 297 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 333 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 368 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 404 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 439 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 477 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 516 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 554 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 591 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 630 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 671 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 714 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 751 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 790 drivers/gpu/drm/selftests/test-drm_damage_helper.c .crtc = ZERO_SIZE_PTR, crtc 81 drivers/gpu/drm/selftests/test-drm_plane_helper.c .crtc = ZERO_SIZE_PTR, crtc 95 drivers/gpu/drm/selftests/test-drm_plane_helper.c .crtc = ZERO_SIZE_PTR, crtc 62 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_crtc *crtc = &scrtc->crtc; crtc 63 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_device *sdev = crtc->dev->dev_private; crtc 65 drivers/gpu/drm/shmobile/shmob_drm_crtc.c const struct drm_display_mode *mode = &crtc->mode; crtc 120 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_device *sdev = scrtc->crtc.dev->dev_private; crtc 153 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_crtc *crtc = &scrtc->crtc; crtc 154 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_device *sdev = crtc->dev->dev_private; crtc 165 drivers/gpu/drm/shmobile/shmob_drm_crtc.c format = shmob_drm_format_info(crtc->primary->fb->format->format); crtc 240 drivers/gpu/drm/shmobile/shmob_drm_crtc.c if (plane->crtc == crtc) crtc 254 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_crtc *crtc = &scrtc->crtc; crtc 255 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_device *sdev = crtc->dev->dev_private; crtc 288 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_crtc *crtc = &scrtc->crtc; crtc 289 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_framebuffer *fb = crtc->primary->fb; crtc 309 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_crtc *crtc = &scrtc->crtc; crtc 310 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_device *sdev = crtc->dev->dev_private; crtc 312 drivers/gpu/drm/shmobile/shmob_drm_crtc.c shmob_drm_crtc_compute_base(scrtc, crtc->x, crtc->y); crtc 321 drivers/gpu/drm/shmobile/shmob_drm_crtc.c #define to_shmob_crtc(c) container_of(c, struct shmob_drm_crtc, crtc) crtc 323 drivers/gpu/drm/shmobile/shmob_drm_crtc.c static void shmob_drm_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 325 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc); crtc 338 drivers/gpu/drm/shmobile/shmob_drm_crtc.c static void shmob_drm_crtc_mode_prepare(struct drm_crtc *crtc) crtc 340 drivers/gpu/drm/shmobile/shmob_drm_crtc.c shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 343 drivers/gpu/drm/shmobile/shmob_drm_crtc.c static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc, crtc 349 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc); crtc 350 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_device *sdev = crtc->dev->dev_private; crtc 353 drivers/gpu/drm/shmobile/shmob_drm_crtc.c format = shmob_drm_format_info(crtc->primary->fb->format->format); crtc 356 drivers/gpu/drm/shmobile/shmob_drm_crtc.c crtc->primary->fb->format->format); crtc 361 drivers/gpu/drm/shmobile/shmob_drm_crtc.c scrtc->line_size = crtc->primary->fb->pitches[0]; crtc 368 drivers/gpu/drm/shmobile/shmob_drm_crtc.c static void shmob_drm_crtc_mode_commit(struct drm_crtc *crtc) crtc 370 drivers/gpu/drm/shmobile/shmob_drm_crtc.c shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON); crtc 373 drivers/gpu/drm/shmobile/shmob_drm_crtc.c static int shmob_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, crtc 376 drivers/gpu/drm/shmobile/shmob_drm_crtc.c shmob_drm_crtc_update_base(to_shmob_crtc(crtc)); crtc 392 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_device *dev = scrtc->crtc.dev; crtc 399 drivers/gpu/drm/shmobile/shmob_drm_crtc.c drm_crtc_send_vblank_event(&scrtc->crtc, event); crtc 400 drivers/gpu/drm/shmobile/shmob_drm_crtc.c drm_crtc_vblank_put(&scrtc->crtc); crtc 405 drivers/gpu/drm/shmobile/shmob_drm_crtc.c static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc, crtc 411 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc); crtc 412 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_device *dev = scrtc->crtc.dev; crtc 422 drivers/gpu/drm/shmobile/shmob_drm_crtc.c crtc->primary->fb = fb; crtc 427 drivers/gpu/drm/shmobile/shmob_drm_crtc.c drm_crtc_vblank_get(&scrtc->crtc); crtc 453 drivers/gpu/drm/shmobile/shmob_drm_crtc.c static int shmob_drm_enable_vblank(struct drm_crtc *crtc) crtc 455 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_device *sdev = crtc->dev->dev_private; crtc 462 drivers/gpu/drm/shmobile/shmob_drm_crtc.c static void shmob_drm_disable_vblank(struct drm_crtc *crtc) crtc 464 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct shmob_drm_device *sdev = crtc->dev->dev_private; crtc 479 drivers/gpu/drm/shmobile/shmob_drm_crtc.c struct drm_crtc *crtc = &sdev->crtc.crtc; crtc 482 drivers/gpu/drm/shmobile/shmob_drm_crtc.c sdev->crtc.dpms = DRM_MODE_DPMS_OFF; crtc 484 drivers/gpu/drm/shmobile/shmob_drm_crtc.c ret = drm_crtc_init(sdev->ddev, crtc, &crtc_funcs); crtc 488 drivers/gpu/drm/shmobile/shmob_drm_crtc.c drm_crtc_helper_add(crtc, &crtc_helper_funcs); crtc 23 drivers/gpu/drm/shmobile/shmob_drm_crtc.h struct drm_crtc crtc; crtc 123 drivers/gpu/drm/shmobile/shmob_drm_drv.c shmob_drm_crtc_finish_page_flip(&sdev->crtc); crtc 162 drivers/gpu/drm/shmobile/shmob_drm_drv.c shmob_drm_crtc_suspend(&sdev->crtc); crtc 172 drivers/gpu/drm/shmobile/shmob_drm_drv.c shmob_drm_crtc_resume(&sdev->crtc); crtc 36 drivers/gpu/drm/shmobile/shmob_drm_drv.h struct shmob_drm_crtc crtc; crtc 170 drivers/gpu/drm/shmobile/shmob_drm_plane.c shmob_drm_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, crtc 25 drivers/gpu/drm/sti/sti_crtc.c static void sti_crtc_atomic_enable(struct drm_crtc *crtc, crtc 28 drivers/gpu/drm/sti/sti_crtc.c struct sti_mixer *mixer = to_sti_mixer(crtc); crtc 34 drivers/gpu/drm/sti/sti_crtc.c drm_crtc_vblank_on(crtc); crtc 37 drivers/gpu/drm/sti/sti_crtc.c static void sti_crtc_atomic_disable(struct drm_crtc *crtc, crtc 40 drivers/gpu/drm/sti/sti_crtc.c struct sti_mixer *mixer = to_sti_mixer(crtc); crtc 46 drivers/gpu/drm/sti/sti_crtc.c drm_crtc_wait_one_vblank(crtc); crtc 50 drivers/gpu/drm/sti/sti_crtc.c sti_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode) crtc 52 drivers/gpu/drm/sti/sti_crtc.c struct sti_mixer *mixer = to_sti_mixer(crtc); crtc 59 drivers/gpu/drm/sti/sti_crtc.c crtc->base.id, sti_mixer_to_str(mixer), mode->name); crtc 87 drivers/gpu/drm/sti/sti_crtc.c sti_vtg_set_config(compo->vtg[mixer->id], &crtc->mode); crtc 89 drivers/gpu/drm/sti/sti_crtc.c if (sti_mixer_active_video_area(mixer, &crtc->mode)) { crtc 104 drivers/gpu/drm/sti/sti_crtc.c static void sti_crtc_disable(struct drm_crtc *crtc) crtc 106 drivers/gpu/drm/sti/sti_crtc.c struct sti_mixer *mixer = to_sti_mixer(crtc); crtc 110 drivers/gpu/drm/sti/sti_crtc.c DRM_DEBUG_KMS("CRTC:%d (%s)\n", crtc->base.id, sti_mixer_to_str(mixer)); crtc 115 drivers/gpu/drm/sti/sti_crtc.c drm_crtc_vblank_off(crtc); crtc 130 drivers/gpu/drm/sti/sti_crtc.c sti_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 132 drivers/gpu/drm/sti/sti_crtc.c sti_crtc_mode_set(crtc, &crtc->state->adjusted_mode); crtc 135 drivers/gpu/drm/sti/sti_crtc.c static void sti_crtc_atomic_flush(struct drm_crtc *crtc, crtc 138 drivers/gpu/drm/sti/sti_crtc.c struct drm_device *drm_dev = crtc->dev; crtc 139 drivers/gpu/drm/sti/sti_crtc.c struct sti_mixer *mixer = to_sti_mixer(crtc); crtc 154 drivers/gpu/drm/sti/sti_crtc.c if (p->state->crtc != crtc) crtc 209 drivers/gpu/drm/sti/sti_crtc.c event = crtc->state->event; crtc 211 drivers/gpu/drm/sti/sti_crtc.c crtc->state->event = NULL; crtc 213 drivers/gpu/drm/sti/sti_crtc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 214 drivers/gpu/drm/sti/sti_crtc.c if (drm_crtc_vblank_get(crtc) == 0) crtc 215 drivers/gpu/drm/sti/sti_crtc.c drm_crtc_arm_vblank_event(crtc, event); crtc 217 drivers/gpu/drm/sti/sti_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 218 drivers/gpu/drm/sti/sti_crtc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 229 drivers/gpu/drm/sti/sti_crtc.c static void sti_crtc_destroy(struct drm_crtc *crtc) crtc 232 drivers/gpu/drm/sti/sti_crtc.c drm_crtc_cleanup(crtc); crtc 235 drivers/gpu/drm/sti/sti_crtc.c static int sti_crtc_set_property(struct drm_crtc *crtc, crtc 247 drivers/gpu/drm/sti/sti_crtc.c struct drm_crtc *crtc = data; crtc 251 drivers/gpu/drm/sti/sti_crtc.c pipe = drm_crtc_index(crtc); crtc 261 drivers/gpu/drm/sti/sti_crtc.c drm_crtc_handle_vblank(crtc); crtc 268 drivers/gpu/drm/sti/sti_crtc.c list_for_each_entry(p, &crtc->dev->mode_config.plane_list, crtc 276 drivers/gpu/drm/sti/sti_crtc.c sti_crtc_disable(crtc); crtc 287 drivers/gpu/drm/sti/sti_crtc.c struct drm_crtc *crtc = &compo->mixer[pipe]->drm_crtc; crtc 292 drivers/gpu/drm/sti/sti_crtc.c if (sti_vtg_register_client(vtg, vtg_vblank_nb, crtc)) { crtc 313 drivers/gpu/drm/sti/sti_crtc.c static int sti_crtc_late_register(struct drm_crtc *crtc) crtc 315 drivers/gpu/drm/sti/sti_crtc.c struct sti_mixer *mixer = to_sti_mixer(crtc); crtc 318 drivers/gpu/drm/sti/sti_crtc.c if (drm_crtc_index(crtc) == 0) crtc 319 drivers/gpu/drm/sti/sti_crtc.c return sti_compositor_debugfs_init(compo, crtc->dev->primary); crtc 335 drivers/gpu/drm/sti/sti_crtc.c bool sti_crtc_is_main(struct drm_crtc *crtc) crtc 337 drivers/gpu/drm/sti/sti_crtc.c struct sti_mixer *mixer = to_sti_mixer(crtc); crtc 348 drivers/gpu/drm/sti/sti_crtc.c struct drm_crtc *crtc = &mixer->drm_crtc; crtc 351 drivers/gpu/drm/sti/sti_crtc.c res = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor, crtc 358 drivers/gpu/drm/sti/sti_crtc.c drm_crtc_helper_add(crtc, &sti_crtc_helper_funcs); crtc 361 drivers/gpu/drm/sti/sti_crtc.c crtc->base.id, sti_mixer_to_str(mixer)); crtc 188 drivers/gpu/drm/sti/sti_cursor.c struct drm_crtc *crtc = state->crtc; crtc 196 drivers/gpu/drm/sti/sti_cursor.c if (!crtc || !fb) crtc 199 drivers/gpu/drm/sti/sti_cursor.c crtc_state = drm_atomic_get_crtc_state(state->state, crtc); crtc 247 drivers/gpu/drm/sti/sti_cursor.c crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)), crtc 260 drivers/gpu/drm/sti/sti_cursor.c struct drm_crtc *crtc = state->crtc; crtc 268 drivers/gpu/drm/sti/sti_cursor.c if (!crtc || !fb) crtc 271 drivers/gpu/drm/sti/sti_cursor.c mode = &crtc->mode; crtc 313 drivers/gpu/drm/sti/sti_cursor.c if (!oldstate->crtc) { crtc 320 drivers/gpu/drm/sti/sti_cursor.c oldstate->crtc->base.id, crtc 321 drivers/gpu/drm/sti/sti_cursor.c sti_mixer_to_str(to_sti_mixer(oldstate->crtc)), crtc 283 drivers/gpu/drm/sti/sti_dvo.c struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc); crtc 218 drivers/gpu/drm/sti/sti_gdp.c struct drm_crtc *crtc; crtc 221 drivers/gpu/drm/sti/sti_gdp.c crtc = drm_plane->state->crtc; crtc 249 drivers/gpu/drm/sti/sti_gdp.c if (!crtc) crtc 253 drivers/gpu/drm/sti/sti_gdp.c crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc))); crtc 621 drivers/gpu/drm/sti/sti_gdp.c struct drm_crtc *crtc = state->crtc; crtc 631 drivers/gpu/drm/sti/sti_gdp.c if (!crtc || !fb) crtc 634 drivers/gpu/drm/sti/sti_gdp.c mixer = to_sti_mixer(crtc); crtc 635 drivers/gpu/drm/sti/sti_gdp.c crtc_state = drm_atomic_get_crtc_state(state->state, crtc); crtc 686 drivers/gpu/drm/sti/sti_gdp.c crtc->base.id, sti_mixer_to_str(mixer), crtc 702 drivers/gpu/drm/sti/sti_gdp.c struct drm_crtc *crtc = state->crtc; crtc 717 drivers/gpu/drm/sti/sti_gdp.c if (!crtc || !fb) crtc 737 drivers/gpu/drm/sti/sti_gdp.c struct sti_mixer *mixer = to_sti_mixer(crtc); crtc 741 drivers/gpu/drm/sti/sti_gdp.c sti_vtg_register_client(gdp->vtg, &gdp->vtg_field_nb, crtc); crtc 745 drivers/gpu/drm/sti/sti_gdp.c mode = &crtc->mode; crtc 866 drivers/gpu/drm/sti/sti_gdp.c if (!oldstate->crtc) { crtc 873 drivers/gpu/drm/sti/sti_gdp.c oldstate->crtc->base.id, crtc 874 drivers/gpu/drm/sti/sti_gdp.c sti_mixer_to_str(to_sti_mixer(oldstate->crtc)), crtc 1024 drivers/gpu/drm/sti/sti_hqvdp.c struct drm_crtc *crtc = state->crtc; crtc 1032 drivers/gpu/drm/sti/sti_hqvdp.c if (!crtc || !fb) crtc 1035 drivers/gpu/drm/sti/sti_hqvdp.c crtc_state = drm_atomic_get_crtc_state(state->state, crtc); crtc 1090 drivers/gpu/drm/sti/sti_hqvdp.c crtc)) { crtc 1099 drivers/gpu/drm/sti/sti_hqvdp.c crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)), crtc 1115 drivers/gpu/drm/sti/sti_hqvdp.c struct drm_crtc *crtc = state->crtc; crtc 1125 drivers/gpu/drm/sti/sti_hqvdp.c if (!crtc || !fb) crtc 1143 drivers/gpu/drm/sti/sti_hqvdp.c mode = &crtc->mode; crtc 1245 drivers/gpu/drm/sti/sti_hqvdp.c if (!oldstate->crtc) { crtc 1252 drivers/gpu/drm/sti/sti_hqvdp.c oldstate->crtc->base.id, crtc 1253 drivers/gpu/drm/sti/sti_hqvdp.c sti_mixer_to_str(to_sti_mixer(oldstate->crtc)), crtc 501 drivers/gpu/drm/sti/sti_tvout.c struct drm_crtc *crtc; crtc 506 drivers/gpu/drm/sti/sti_tvout.c crtc = tvout->hdmi->crtc; crtc 507 drivers/gpu/drm/sti/sti_tvout.c if (crtc) { crtc 509 drivers/gpu/drm/sti/sti_tvout.c sti_crtc_is_main(crtc) ? "main" : "aux"); crtc 518 drivers/gpu/drm/sti/sti_tvout.c crtc = tvout->dvo->crtc; crtc 519 drivers/gpu/drm/sti/sti_tvout.c if (crtc) { crtc 521 drivers/gpu/drm/sti/sti_tvout.c sti_crtc_is_main(crtc) ? "main" : "aux"); crtc 531 drivers/gpu/drm/sti/sti_tvout.c crtc = tvout->hda->crtc; crtc 532 drivers/gpu/drm/sti/sti_tvout.c if (crtc) { crtc 534 drivers/gpu/drm/sti/sti_tvout.c sti_crtc_is_main(crtc) ? "main" : "aux"); crtc 639 drivers/gpu/drm/sti/sti_tvout.c tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode); crtc 641 drivers/gpu/drm/sti/sti_tvout.c tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc)); crtc 689 drivers/gpu/drm/sti/sti_tvout.c tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode); crtc 691 drivers/gpu/drm/sti/sti_tvout.c tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc)); crtc 740 drivers/gpu/drm/sti/sti_tvout.c tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode); crtc 742 drivers/gpu/drm/sti/sti_tvout.c tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc)); crtc 142 drivers/gpu/drm/sti/sti_vid.c struct drm_crtc *crtc = state->crtc; crtc 143 drivers/gpu/drm/sti/sti_vid.c struct drm_display_mode *mode = &crtc->mode; crtc 140 drivers/gpu/drm/sti/sti_vtg.c struct drm_crtc *crtc; crtc 341 drivers/gpu/drm/sti/sti_vtg.c struct drm_crtc *crtc) crtc 343 drivers/gpu/drm/sti/sti_vtg.c vtg->crtc = crtc; crtc 360 drivers/gpu/drm/sti/sti_vtg.c raw_notifier_call_chain(&vtg->notifier_list, event, vtg->crtc); crtc 27 drivers/gpu/drm/sti/sti_vtg.h struct drm_crtc *crtc); crtc 268 drivers/gpu/drm/stm/ltdc.c static inline struct ltdc_device *crtc_to_ltdc(struct drm_crtc *crtc) crtc 270 drivers/gpu/drm/stm/ltdc.c return (struct ltdc_device *)crtc->dev->dev_private; crtc 371 drivers/gpu/drm/stm/ltdc.c struct drm_crtc *crtc = drm_crtc_from_index(ddev, 0); crtc 375 drivers/gpu/drm/stm/ltdc.c drm_crtc_handle_vblank(crtc); crtc 404 drivers/gpu/drm/stm/ltdc.c static void ltdc_crtc_update_clut(struct drm_crtc *crtc) crtc 406 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = crtc_to_ltdc(crtc); crtc 411 drivers/gpu/drm/stm/ltdc.c if (!crtc->state->color_mgmt_changed || !crtc->state->gamma_lut) crtc 414 drivers/gpu/drm/stm/ltdc.c lut = (struct drm_color_lut *)crtc->state->gamma_lut->data; crtc 423 drivers/gpu/drm/stm/ltdc.c static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc, crtc 426 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = crtc_to_ltdc(crtc); crtc 442 drivers/gpu/drm/stm/ltdc.c drm_crtc_vblank_on(crtc); crtc 445 drivers/gpu/drm/stm/ltdc.c static void ltdc_crtc_atomic_disable(struct drm_crtc *crtc, crtc 448 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = crtc_to_ltdc(crtc); crtc 449 drivers/gpu/drm/stm/ltdc.c struct drm_device *ddev = crtc->dev; crtc 453 drivers/gpu/drm/stm/ltdc.c drm_crtc_vblank_off(crtc); crtc 470 drivers/gpu/drm/stm/ltdc.c ltdc_crtc_mode_valid(struct drm_crtc *crtc, crtc 473 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = crtc_to_ltdc(crtc); crtc 508 drivers/gpu/drm/stm/ltdc.c static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc, crtc 512 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = crtc_to_ltdc(crtc); crtc 513 drivers/gpu/drm/stm/ltdc.c struct drm_device *ddev = crtc->dev; crtc 544 drivers/gpu/drm/stm/ltdc.c static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 546 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = crtc_to_ltdc(crtc); crtc 547 drivers/gpu/drm/stm/ltdc.c struct drm_device *ddev = crtc->dev; crtc 548 drivers/gpu/drm/stm/ltdc.c struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 565 drivers/gpu/drm/stm/ltdc.c DRM_DEBUG_DRIVER("CRTC:%d mode:%s\n", crtc->base.id, mode->name); crtc 618 drivers/gpu/drm/stm/ltdc.c static void ltdc_crtc_atomic_flush(struct drm_crtc *crtc, crtc 621 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = crtc_to_ltdc(crtc); crtc 622 drivers/gpu/drm/stm/ltdc.c struct drm_device *ddev = crtc->dev; crtc 623 drivers/gpu/drm/stm/ltdc.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 627 drivers/gpu/drm/stm/ltdc.c ltdc_crtc_update_clut(crtc); crtc 633 drivers/gpu/drm/stm/ltdc.c crtc->state->event = NULL; crtc 636 drivers/gpu/drm/stm/ltdc.c if (drm_crtc_vblank_get(crtc) == 0) crtc 637 drivers/gpu/drm/stm/ltdc.c drm_crtc_arm_vblank_event(crtc, event); crtc 639 drivers/gpu/drm/stm/ltdc.c drm_crtc_send_vblank_event(crtc, event); crtc 653 drivers/gpu/drm/stm/ltdc.c static int ltdc_crtc_enable_vblank(struct drm_crtc *crtc) crtc 655 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = crtc_to_ltdc(crtc); crtc 663 drivers/gpu/drm/stm/ltdc.c static void ltdc_crtc_disable_vblank(struct drm_crtc *crtc) crtc 665 drivers/gpu/drm/stm/ltdc.c struct ltdc_device *ldev = crtc_to_ltdc(crtc); crtc 773 drivers/gpu/drm/stm/ltdc.c if (!state->crtc || !fb) { crtc 882 drivers/gpu/drm/stm/ltdc.c oldstate->crtc->base.id, plane->base.id); crtc 991 drivers/gpu/drm/stm/ltdc.c static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc) crtc 1004 drivers/gpu/drm/stm/ltdc.c ret = drm_crtc_init_with_planes(ddev, crtc, primary, NULL, crtc 1011 drivers/gpu/drm/stm/ltdc.c drm_crtc_helper_add(crtc, <dc_crtc_helper_funcs); crtc 1013 drivers/gpu/drm/stm/ltdc.c drm_mode_crtc_set_gamma_size(crtc, CLUT_SIZE); crtc 1014 drivers/gpu/drm/stm/ltdc.c drm_crtc_enable_color_mgmt(crtc, 0, false, CLUT_SIZE); crtc 1016 drivers/gpu/drm/stm/ltdc.c DRM_DEBUG_DRIVER("CRTC:%d created\n", crtc->base.id); crtc 1150 drivers/gpu/drm/stm/ltdc.c struct drm_crtc *crtc; crtc 1257 drivers/gpu/drm/stm/ltdc.c crtc = devm_kzalloc(dev, sizeof(*crtc), GFP_KERNEL); crtc 1258 drivers/gpu/drm/stm/ltdc.c if (!crtc) { crtc 1266 drivers/gpu/drm/stm/ltdc.c ret = ltdc_crtc_init(ddev, crtc); crtc 269 drivers/gpu/drm/sun4i/sun4i_backend.c if (plane->state->crtc) crtc 270 drivers/gpu/drm/sun4i/sun4i_backend.c interlaced = plane->state->crtc->state->adjusted_mode.flags crtc 36 drivers/gpu/drm/sun4i/sun4i_crtc.c static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc) crtc 40 drivers/gpu/drm/sun4i/sun4i_crtc.c drm_for_each_encoder(encoder, crtc->dev) crtc 41 drivers/gpu/drm/sun4i/sun4i_crtc.c if (encoder->crtc == crtc) crtc 47 drivers/gpu/drm/sun4i/sun4i_crtc.c static int sun4i_crtc_atomic_check(struct drm_crtc *crtc, crtc 50 drivers/gpu/drm/sun4i/sun4i_crtc.c struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); crtc 60 drivers/gpu/drm/sun4i/sun4i_crtc.c static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc, crtc 63 drivers/gpu/drm/sun4i/sun4i_crtc.c struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); crtc 64 drivers/gpu/drm/sun4i/sun4i_crtc.c struct drm_device *dev = crtc->dev; crtc 68 drivers/gpu/drm/sun4i/sun4i_crtc.c if (crtc->state->event) { crtc 69 drivers/gpu/drm/sun4i/sun4i_crtc.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 72 drivers/gpu/drm/sun4i/sun4i_crtc.c scrtc->event = crtc->state->event; crtc 74 drivers/gpu/drm/sun4i/sun4i_crtc.c crtc->state->event = NULL; crtc 81 drivers/gpu/drm/sun4i/sun4i_crtc.c static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc, crtc 84 drivers/gpu/drm/sun4i/sun4i_crtc.c struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); crtc 85 drivers/gpu/drm/sun4i/sun4i_crtc.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 92 drivers/gpu/drm/sun4i/sun4i_crtc.c crtc->state->event = NULL; crtc 94 drivers/gpu/drm/sun4i/sun4i_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 95 drivers/gpu/drm/sun4i/sun4i_crtc.c if (drm_crtc_vblank_get(crtc) == 0) crtc 96 drivers/gpu/drm/sun4i/sun4i_crtc.c drm_crtc_arm_vblank_event(crtc, event); crtc 98 drivers/gpu/drm/sun4i/sun4i_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 99 drivers/gpu/drm/sun4i/sun4i_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 103 drivers/gpu/drm/sun4i/sun4i_crtc.c static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc, crtc 106 drivers/gpu/drm/sun4i/sun4i_crtc.c struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); crtc 107 drivers/gpu/drm/sun4i/sun4i_crtc.c struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); crtc 111 drivers/gpu/drm/sun4i/sun4i_crtc.c drm_crtc_vblank_off(crtc); crtc 115 drivers/gpu/drm/sun4i/sun4i_crtc.c if (crtc->state->event && !crtc->state->active) { crtc 116 drivers/gpu/drm/sun4i/sun4i_crtc.c spin_lock_irq(&crtc->dev->event_lock); crtc 117 drivers/gpu/drm/sun4i/sun4i_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 118 drivers/gpu/drm/sun4i/sun4i_crtc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 120 drivers/gpu/drm/sun4i/sun4i_crtc.c crtc->state->event = NULL; crtc 124 drivers/gpu/drm/sun4i/sun4i_crtc.c static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc, crtc 127 drivers/gpu/drm/sun4i/sun4i_crtc.c struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); crtc 128 drivers/gpu/drm/sun4i/sun4i_crtc.c struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); crtc 134 drivers/gpu/drm/sun4i/sun4i_crtc.c drm_crtc_vblank_on(crtc); crtc 137 drivers/gpu/drm/sun4i/sun4i_crtc.c static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 139 drivers/gpu/drm/sun4i/sun4i_crtc.c struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 140 drivers/gpu/drm/sun4i/sun4i_crtc.c struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc); crtc 141 drivers/gpu/drm/sun4i/sun4i_crtc.c struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); crtc 155 drivers/gpu/drm/sun4i/sun4i_crtc.c static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc) crtc 157 drivers/gpu/drm/sun4i/sun4i_crtc.c struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); crtc 159 drivers/gpu/drm/sun4i/sun4i_crtc.c DRM_DEBUG_DRIVER("Enabling VBLANK on crtc %p\n", crtc); crtc 166 drivers/gpu/drm/sun4i/sun4i_crtc.c static void sun4i_crtc_disable_vblank(struct drm_crtc *crtc) crtc 168 drivers/gpu/drm/sun4i/sun4i_crtc.c struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); crtc 170 drivers/gpu/drm/sun4i/sun4i_crtc.c DRM_DEBUG_DRIVER("Disabling VBLANK on crtc %p\n", crtc); crtc 224 drivers/gpu/drm/sun4i/sun4i_crtc.c ret = drm_crtc_init_with_planes(drm, &scrtc->crtc, crtc 234 drivers/gpu/drm/sun4i/sun4i_crtc.c drm_crtc_helper_add(&scrtc->crtc, &sun4i_crtc_helper_funcs); crtc 237 drivers/gpu/drm/sun4i/sun4i_crtc.c scrtc->crtc.port = of_graph_get_port_by_id(scrtc->tcon->dev->of_node, crtc 242 drivers/gpu/drm/sun4i/sun4i_crtc.c uint32_t possible_crtcs = drm_crtc_mask(&scrtc->crtc); crtc 13 drivers/gpu/drm/sun4i/sun4i_crtc.h struct drm_crtc crtc; crtc 20 drivers/gpu/drm/sun4i/sun4i_crtc.h static inline struct sun4i_crtc *drm_crtc_to_sun4i_crtc(struct drm_crtc *crtc) crtc 22 drivers/gpu/drm/sun4i/sun4i_crtc.h return container_of(crtc, struct sun4i_crtc, crtc); crtc 99 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; crtc 134 drivers/gpu/drm/sun4i/sun4i_lvds.c lvds->encoder.possible_crtcs = drm_crtc_mask(&tcon->crtc->crtc); crtc 60 drivers/gpu/drm/sun4i/sun4i_rgb.c static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, crtc 63 drivers/gpu/drm/sun4i/sun4i_rgb.c struct sun4i_rgb *rgb = drm_encoder_to_sun4i_rgb(crtc); crtc 231 drivers/gpu/drm/sun4i/sun4i_rgb.c rgb->encoder.possible_crtcs = drm_crtc_mask(&tcon->crtc->crtc); crtc 246 drivers/gpu/drm/sun4i/sun4i_tcon.c encoder->name, encoder->crtc->name, ret); crtc 708 drivers/gpu/drm/sun4i/sun4i_tcon.c drm_crtc_send_vblank_event(&scrtc->crtc, scrtc->event); crtc 709 drivers/gpu/drm/sun4i/sun4i_tcon.c drm_crtc_vblank_put(&scrtc->crtc); crtc 719 drivers/gpu/drm/sun4i/sun4i_tcon.c struct sun4i_crtc *scrtc = tcon->crtc; crtc 730 drivers/gpu/drm/sun4i/sun4i_tcon.c drm_crtc_handle_vblank(&scrtc->crtc); crtc 1215 drivers/gpu/drm/sun4i/sun4i_tcon.c tcon->crtc = sun4i_crtc_init(drm, engine, tcon); crtc 1216 drivers/gpu/drm/sun4i/sun4i_tcon.c if (IS_ERR(tcon->crtc)) { crtc 1218 drivers/gpu/drm/sun4i/sun4i_tcon.c ret = PTR_ERR(tcon->crtc); crtc 261 drivers/gpu/drm/sun4i/sun4i_tcon.h struct sun4i_crtc *crtc; crtc 276 drivers/gpu/drm/sun4i/sun4i_tcon.h void sun4i_tcon_set_status(struct sun4i_tcon *crtc, crtc 344 drivers/gpu/drm/sun4i/sun4i_tv.c struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); crtc 352 drivers/gpu/drm/sun4i/sun4i_tv.c sunxi_engine_disable_color_correction(crtc->engine); crtc 358 drivers/gpu/drm/sun4i/sun4i_tv.c struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); crtc 362 drivers/gpu/drm/sun4i/sun4i_tv.c sunxi_engine_apply_color_correction(crtc->engine); crtc 718 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; crtc 114 drivers/gpu/drm/sun4i/sun8i_ui_layer.c if (state->crtc) crtc 115 drivers/gpu/drm/sun4i/sun8i_ui_layer.c interlaced = state->crtc->state->adjusted_mode.flags crtc 240 drivers/gpu/drm/sun4i/sun8i_ui_layer.c struct drm_crtc *crtc = state->crtc; crtc 244 drivers/gpu/drm/sun4i/sun8i_ui_layer.c if (!crtc) crtc 247 drivers/gpu/drm/sun4i/sun8i_ui_layer.c crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); crtc 144 drivers/gpu/drm/sun4i/sun8i_vi_layer.c mode = &plane->state->crtc->state->mode; crtc 325 drivers/gpu/drm/sun4i/sun8i_vi_layer.c struct drm_crtc *crtc = state->crtc; crtc 329 drivers/gpu/drm/sun4i/sun8i_vi_layer.c if (!crtc) crtc 332 drivers/gpu/drm/sun4i/sun8i_vi_layer.c crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); crtc 31 drivers/gpu/drm/tegra/dc.c static void tegra_crtc_atomic_destroy_state(struct drm_crtc *crtc, crtc 607 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(state->crtc); crtc 611 drivers/gpu/drm/tegra/dc.c if (!state->crtc) crtc 675 drivers/gpu/drm/tegra/dc.c if (!old_state || !old_state->crtc) crtc 693 drivers/gpu/drm/tegra/dc.c if (!plane->state->crtc || !plane->state->fb) crtc 814 drivers/gpu/drm/tegra/dc.c if (!state->crtc) crtc 841 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(plane->state->crtc); crtc 846 drivers/gpu/drm/tegra/dc.c if (!plane->state->crtc || !plane->state->fb) crtc 906 drivers/gpu/drm/tegra/dc.c if (!old_state || !old_state->crtc) crtc 909 drivers/gpu/drm/tegra/dc.c dc = to_tegra_dc(old_state->crtc); crtc 1156 drivers/gpu/drm/tegra/dc.c static void tegra_dc_destroy(struct drm_crtc *crtc) crtc 1158 drivers/gpu/drm/tegra/dc.c drm_crtc_cleanup(crtc); crtc 1161 drivers/gpu/drm/tegra/dc.c static void tegra_crtc_reset(struct drm_crtc *crtc) crtc 1165 drivers/gpu/drm/tegra/dc.c if (crtc->state) crtc 1166 drivers/gpu/drm/tegra/dc.c tegra_crtc_atomic_destroy_state(crtc, crtc->state); crtc 1168 drivers/gpu/drm/tegra/dc.c __drm_atomic_helper_crtc_reset(crtc, &state->base); crtc 1169 drivers/gpu/drm/tegra/dc.c drm_crtc_vblank_reset(crtc); crtc 1173 drivers/gpu/drm/tegra/dc.c tegra_crtc_atomic_duplicate_state(struct drm_crtc *crtc) crtc 1175 drivers/gpu/drm/tegra/dc.c struct tegra_dc_state *state = to_dc_state(crtc->state); crtc 1182 drivers/gpu/drm/tegra/dc.c __drm_atomic_helper_crtc_duplicate_state(crtc, ©->base); crtc 1191 drivers/gpu/drm/tegra/dc.c static void tegra_crtc_atomic_destroy_state(struct drm_crtc *crtc, crtc 1491 drivers/gpu/drm/tegra/dc.c static int tegra_dc_late_register(struct drm_crtc *crtc) crtc 1494 drivers/gpu/drm/tegra/dc.c struct drm_minor *minor = crtc->dev->primary; crtc 1496 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(crtc); crtc 1500 drivers/gpu/drm/tegra/dc.c root = crtc->debugfs_entry; crtc 1526 drivers/gpu/drm/tegra/dc.c static void tegra_dc_early_unregister(struct drm_crtc *crtc) crtc 1529 drivers/gpu/drm/tegra/dc.c struct drm_minor *minor = crtc->dev->primary; crtc 1530 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(crtc); crtc 1537 drivers/gpu/drm/tegra/dc.c static u32 tegra_dc_get_vblank_counter(struct drm_crtc *crtc) crtc 1539 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(crtc); crtc 1549 drivers/gpu/drm/tegra/dc.c static int tegra_dc_enable_vblank(struct drm_crtc *crtc) crtc 1551 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(crtc); crtc 1561 drivers/gpu/drm/tegra/dc.c static void tegra_dc_disable_vblank(struct drm_crtc *crtc) crtc 1563 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(crtc); crtc 1723 drivers/gpu/drm/tegra/dc.c static void tegra_crtc_atomic_disable(struct drm_crtc *crtc, crtc 1726 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(crtc); crtc 1763 drivers/gpu/drm/tegra/dc.c drm_crtc_vblank_off(crtc); crtc 1765 drivers/gpu/drm/tegra/dc.c spin_lock_irq(&crtc->dev->event_lock); crtc 1767 drivers/gpu/drm/tegra/dc.c if (crtc->state->event) { crtc 1768 drivers/gpu/drm/tegra/dc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 1769 drivers/gpu/drm/tegra/dc.c crtc->state->event = NULL; crtc 1772 drivers/gpu/drm/tegra/dc.c spin_unlock_irq(&crtc->dev->event_lock); crtc 1777 drivers/gpu/drm/tegra/dc.c static void tegra_crtc_atomic_enable(struct drm_crtc *crtc, crtc 1780 drivers/gpu/drm/tegra/dc.c struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 1781 drivers/gpu/drm/tegra/dc.c struct tegra_dc_state *state = to_dc_state(crtc->state); crtc 1782 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(crtc); crtc 1888 drivers/gpu/drm/tegra/dc.c drm_crtc_vblank_on(crtc); crtc 1891 drivers/gpu/drm/tegra/dc.c static void tegra_crtc_atomic_begin(struct drm_crtc *crtc, crtc 1896 drivers/gpu/drm/tegra/dc.c if (crtc->state->event) { crtc 1897 drivers/gpu/drm/tegra/dc.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 1899 drivers/gpu/drm/tegra/dc.c if (drm_crtc_vblank_get(crtc) != 0) crtc 1900 drivers/gpu/drm/tegra/dc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 1902 drivers/gpu/drm/tegra/dc.c drm_crtc_arm_vblank_event(crtc, crtc->state->event); crtc 1904 drivers/gpu/drm/tegra/dc.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 1906 drivers/gpu/drm/tegra/dc.c crtc->state->event = NULL; crtc 1910 drivers/gpu/drm/tegra/dc.c static void tegra_crtc_atomic_flush(struct drm_crtc *crtc, crtc 1913 drivers/gpu/drm/tegra/dc.c struct tegra_dc_state *state = to_dc_state(crtc->state); crtc 1914 drivers/gpu/drm/tegra/dc.c struct tegra_dc *dc = to_tegra_dc(crtc); crtc 103 drivers/gpu/drm/tegra/dc.h static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc) crtc 105 drivers/gpu/drm/tegra/dc.h return crtc ? container_of(crtc, struct tegra_dc, base) : NULL; crtc 202 drivers/gpu/drm/tegra/dsi.c struct drm_crtc *crtc = dsi->output.encoder.crtc; crtc 209 drivers/gpu/drm/tegra/dsi.c if (!crtc || !crtc->state->active) { crtc 849 drivers/gpu/drm/tegra/dsi.c struct tegra_dc *dc = to_tegra_dc(encoder->crtc); crtc 906 drivers/gpu/drm/tegra/dsi.c struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; crtc 908 drivers/gpu/drm/tegra/dsi.c struct tegra_dc *dc = to_tegra_dc(encoder->crtc); crtc 951 drivers/gpu/drm/tegra/dsi.c struct tegra_dc *dc = to_tegra_dc(conn_state->crtc); crtc 1032 drivers/gpu/drm/tegra/hdmi.c struct drm_crtc *crtc = hdmi->output.encoder.crtc; crtc 1039 drivers/gpu/drm/tegra/hdmi.c if (!crtc || !crtc->state->active) { crtc 1146 drivers/gpu/drm/tegra/hdmi.c struct tegra_dc *dc = to_tegra_dc(encoder->crtc); crtc 1179 drivers/gpu/drm/tegra/hdmi.c struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; crtc 1182 drivers/gpu/drm/tegra/hdmi.c struct tegra_dc *dc = to_tegra_dc(encoder->crtc); crtc 1404 drivers/gpu/drm/tegra/hdmi.c struct tegra_dc *dc = to_tegra_dc(conn_state->crtc); crtc 332 drivers/gpu/drm/tegra/hub.c struct tegra_dc *dc = to_tegra_dc(state->crtc); crtc 336 drivers/gpu/drm/tegra/hub.c if (!state->crtc || !state->fb) crtc 384 drivers/gpu/drm/tegra/hub.c if (!old_state || !old_state->crtc) crtc 387 drivers/gpu/drm/tegra/hub.c dc = to_tegra_dc(old_state->crtc); crtc 412 drivers/gpu/drm/tegra/hub.c struct tegra_dc *dc = to_tegra_dc(plane->state->crtc); crtc 421 drivers/gpu/drm/tegra/hub.c if (!plane->state->crtc || !plane->state->fb) crtc 626 drivers/gpu/drm/tegra/hub.c struct drm_crtc *crtc; crtc 644 drivers/gpu/drm/tegra/hub.c for_each_oldnew_crtc_in_state(state, crtc, old, new, i) { crtc 649 drivers/gpu/drm/tegra/hub.c hub_state->dc = to_tegra_dc(dc->base.crtc); crtc 222 drivers/gpu/drm/tegra/output.c struct drm_crtc *crtc; crtc 225 drivers/gpu/drm/tegra/output.c drm_for_each_crtc(crtc, drm) { crtc 226 drivers/gpu/drm/tegra/output.c struct tegra_dc *dc = to_tegra_dc(crtc); crtc 229 drivers/gpu/drm/tegra/output.c mask |= drm_crtc_mask(crtc); crtc 106 drivers/gpu/drm/tegra/plane.c crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); crtc 173 drivers/gpu/drm/tegra/rgb.c struct tegra_dc *dc = to_tegra_dc(conn_state->crtc); crtc 1039 drivers/gpu/drm/tegra/sor.c struct tegra_dc *dc = to_tegra_dc(sor->output.encoder.crtc); crtc 1267 drivers/gpu/drm/tegra/sor.c struct drm_crtc *crtc = sor->output.encoder.crtc; crtc 1274 drivers/gpu/drm/tegra/sor.c if (!crtc || !crtc->state->active) { crtc 1429 drivers/gpu/drm/tegra/sor.c struct drm_crtc *crtc = sor->output.encoder.crtc; crtc 1436 drivers/gpu/drm/tegra/sor.c if (!crtc || !crtc->state->active) { crtc 1590 drivers/gpu/drm/tegra/sor.c struct tegra_dc *dc = to_tegra_dc(encoder->crtc); crtc 1681 drivers/gpu/drm/tegra/sor.c struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; crtc 1683 drivers/gpu/drm/tegra/sor.c struct tegra_dc *dc = to_tegra_dc(encoder->crtc); crtc 1991 drivers/gpu/drm/tegra/sor.c struct tegra_dc *dc = to_tegra_dc(conn_state->crtc); crtc 2371 drivers/gpu/drm/tegra/sor.c mode = &sor->output.encoder.crtc->state->adjusted_mode; crtc 2383 drivers/gpu/drm/tegra/sor.c struct tegra_dc *dc = to_tegra_dc(encoder->crtc); crtc 2425 drivers/gpu/drm/tegra/sor.c struct tegra_dc *dc = to_tegra_dc(encoder->crtc); crtc 2436 drivers/gpu/drm/tegra/sor.c mode = &encoder->crtc->state->adjusted_mode; crtc 62 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) crtc 64 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 73 drivers/gpu/drm/tilcdc/tilcdc_crtc.c crtc->y * fb->pitches[0] + crtc 74 drivers/gpu/drm/tilcdc/tilcdc_crtc.c crtc->x * fb->format->cpp[0]; crtc 76 drivers/gpu/drm/tilcdc/tilcdc_crtc.c end = start + (crtc->mode.vdisplay * fb->pitches[0]); crtc 96 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_load_palette(struct drm_crtc *crtc) crtc 98 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 99 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 179 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void reset(struct drm_crtc *crtc) crtc 181 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 204 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) crtc 206 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 208 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 216 drivers/gpu/drm/tilcdc/tilcdc_crtc.c req_rate = crtc->mode.clock * 1000; crtc 256 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv); crtc 274 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) crtc 276 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 277 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 281 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 282 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_framebuffer *fb = crtc->primary->state->fb; crtc 432 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_set_clk(crtc); crtc 434 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_load_palette(crtc); crtc 436 drivers/gpu/drm/tilcdc/tilcdc_crtc.c set_scanout(crtc, fb); crtc 438 drivers/gpu/drm/tilcdc/tilcdc_crtc.c crtc->hwmode = crtc->state->adjusted_mode; crtc 441 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_mode_hvtotal(&crtc->hwmode); crtc 444 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_enable(struct drm_crtc *crtc) crtc 446 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 447 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 458 drivers/gpu/drm/tilcdc/tilcdc_crtc.c reset(crtc); crtc 460 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_set_mode(crtc); crtc 480 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_crtc_vblank_on(crtc); crtc 486 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_atomic_enable(struct drm_crtc *crtc, crtc 489 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_enable(crtc); crtc 492 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown) crtc 494 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 495 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 519 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_crtc_vblank_off(crtc); crtc 529 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_disable(struct drm_crtc *crtc) crtc 531 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_off(crtc, false); crtc 534 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_atomic_disable(struct drm_crtc *crtc, crtc 537 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_disable(crtc); crtc 540 drivers/gpu/drm/tilcdc/tilcdc_crtc.c void tilcdc_crtc_shutdown(struct drm_crtc *crtc) crtc 542 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_off(crtc, true); crtc 545 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static bool tilcdc_crtc_is_on(struct drm_crtc *crtc) crtc 547 drivers/gpu/drm/tilcdc/tilcdc_crtc.c return crtc->state && crtc->state->enable && crtc->state->active; crtc 554 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_crtc *crtc = &tilcdc_crtc->base; crtc 556 drivers/gpu/drm/tilcdc/tilcdc_crtc.c dev_info(crtc->dev->dev, "%s: Reset CRTC", __func__); crtc 558 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_modeset_lock(&crtc->mutex, NULL); crtc 560 drivers/gpu/drm/tilcdc/tilcdc_crtc.c if (!tilcdc_crtc_is_on(crtc)) crtc 563 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_disable(crtc); crtc 564 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_enable(crtc); crtc 566 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_modeset_unlock(&crtc->mutex); crtc 569 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_destroy(struct drm_crtc *crtc) crtc 571 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_drm_private *priv = crtc->dev->dev_private; crtc 573 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_shutdown(crtc); crtc 577 drivers/gpu/drm/tilcdc/tilcdc_crtc.c of_node_put(crtc->port); crtc 578 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_crtc_cleanup(crtc); crtc 581 drivers/gpu/drm/tilcdc/tilcdc_crtc.c int tilcdc_crtc_update_fb(struct drm_crtc *crtc, crtc 585 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 586 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 611 drivers/gpu/drm/tilcdc/tilcdc_crtc.c set_scanout(crtc, fb); crtc 621 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc, crtc 625 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 650 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static int tilcdc_crtc_atomic_check(struct drm_crtc *crtc, crtc 657 drivers/gpu/drm/tilcdc/tilcdc_crtc.c if (state->state->planes[0].ptr != crtc->primary || crtc 659 drivers/gpu/drm/tilcdc/tilcdc_crtc.c state->state->planes[0].state->crtc != crtc) { crtc 660 drivers/gpu/drm/tilcdc/tilcdc_crtc.c dev_dbg(crtc->dev->dev, "CRTC primary plane must be present"); crtc 667 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static int tilcdc_crtc_enable_vblank(struct drm_crtc *crtc) crtc 672 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_disable_vblank(struct drm_crtc *crtc) crtc 676 drivers/gpu/drm/tilcdc/tilcdc_crtc.c static void tilcdc_crtc_reset(struct drm_crtc *crtc) crtc 678 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 679 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 682 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_atomic_helper_crtc_reset(crtc); crtc 715 drivers/gpu/drm/tilcdc/tilcdc_crtc.c int tilcdc_crtc_max_width(struct drm_crtc *crtc) crtc 717 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 730 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_mode_valid(struct drm_crtc *crtc, crtc 733 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_drm_private *priv = crtc->dev->dev_private; crtc 741 drivers/gpu/drm/tilcdc/tilcdc_crtc.c if (mode->hdisplay > tilcdc_crtc_max_width(crtc)) crtc 827 drivers/gpu/drm/tilcdc/tilcdc_crtc.c void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc, crtc 830 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 834 drivers/gpu/drm/tilcdc/tilcdc_crtc.c void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc, crtc 837 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 842 drivers/gpu/drm/tilcdc/tilcdc_crtc.c void tilcdc_crtc_update_clk(struct drm_crtc *crtc) crtc 844 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 846 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 848 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_modeset_lock(&crtc->mutex, NULL); crtc 850 drivers/gpu/drm/tilcdc/tilcdc_crtc.c if (tilcdc_crtc_is_on(crtc)) { crtc 852 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_disable(crtc); crtc 854 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_set_clk(crtc); crtc 856 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_enable(crtc); crtc 860 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_modeset_unlock(&crtc->mutex); crtc 865 drivers/gpu/drm/tilcdc/tilcdc_crtc.c irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) crtc 867 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); crtc 868 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_device *dev = crtc->dev; crtc 887 drivers/gpu/drm/tilcdc/tilcdc_crtc.c set_scanout(crtc, tilcdc_crtc->next_fb); crtc 894 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_crtc_handle_vblank(crtc); crtc 904 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_crtc_send_vblank_event(crtc, event); crtc 980 drivers/gpu/drm/tilcdc/tilcdc_crtc.c struct drm_crtc *crtc; crtc 996 drivers/gpu/drm/tilcdc/tilcdc_crtc.c crtc = &tilcdc_crtc->base; crtc 1009 drivers/gpu/drm/tilcdc/tilcdc_crtc.c ret = drm_crtc_init_with_planes(dev, crtc, crtc 1017 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_crtc_helper_add(crtc, &tilcdc_crtc_helper_funcs); crtc 1020 drivers/gpu/drm/tilcdc/tilcdc_crtc.c crtc->port = of_graph_get_port_by_id(dev->dev->of_node, 0); crtc 1021 drivers/gpu/drm/tilcdc/tilcdc_crtc.c if (!crtc->port) { /* This should never happen */ crtc 1029 drivers/gpu/drm/tilcdc/tilcdc_crtc.c priv->crtc = crtc; crtc 1033 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc_destroy(crtc); crtc 160 drivers/gpu/drm/tilcdc/tilcdc_drv.c dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc); crtc 173 drivers/gpu/drm/tilcdc/tilcdc_drv.c tilcdc_crtc_update_clk(priv->crtc); crtc 193 drivers/gpu/drm/tilcdc/tilcdc_drv.c if (priv->crtc) crtc 194 drivers/gpu/drm/tilcdc/tilcdc_drv.c tilcdc_crtc_shutdown(priv->crtc); crtc 416 drivers/gpu/drm/tilcdc/tilcdc_drv.c return tilcdc_crtc_irq(priv->crtc); crtc 70 drivers/gpu/drm/tilcdc/tilcdc_drv.h struct drm_crtc *crtc; crtc 155 drivers/gpu/drm/tilcdc/tilcdc_drv.h irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc); crtc 156 drivers/gpu/drm/tilcdc/tilcdc_drv.h void tilcdc_crtc_update_clk(struct drm_crtc *crtc); crtc 157 drivers/gpu/drm/tilcdc/tilcdc_drv.h void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc, crtc 159 drivers/gpu/drm/tilcdc/tilcdc_drv.h void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc, crtc 161 drivers/gpu/drm/tilcdc/tilcdc_drv.h int tilcdc_crtc_max_width(struct drm_crtc *crtc); crtc 162 drivers/gpu/drm/tilcdc/tilcdc_drv.h void tilcdc_crtc_shutdown(struct drm_crtc *crtc); crtc 163 drivers/gpu/drm/tilcdc/tilcdc_drv.h int tilcdc_crtc_update_fb(struct drm_crtc *crtc, crtc 64 drivers/gpu/drm/tilcdc/tilcdc_external.c if (encoder->possible_crtcs & (1 << priv->crtc->index)) crtc 79 drivers/gpu/drm/tilcdc/tilcdc_external.c tilcdc_crtc_set_simulate_vesa_sync(priv->crtc, true); crtc 80 drivers/gpu/drm/tilcdc/tilcdc_external.c tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_tda998x); crtc 103 drivers/gpu/drm/tilcdc/tilcdc_external.c tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_default); crtc 243 drivers/gpu/drm/tilcdc/tilcdc_panel.c tilcdc_crtc_set_panel_info(priv->crtc, crtc 30 drivers/gpu/drm/tilcdc/tilcdc_plane.c if (!state->crtc) crtc 43 drivers/gpu/drm/tilcdc/tilcdc_plane.c state->crtc); crtc 81 drivers/gpu/drm/tilcdc/tilcdc_plane.c if (!state->crtc) crtc 84 drivers/gpu/drm/tilcdc/tilcdc_plane.c if (WARN_ON(!state->fb || !state->crtc->state)) crtc 87 drivers/gpu/drm/tilcdc/tilcdc_plane.c tilcdc_crtc_update_fb(state->crtc, crtc 89 drivers/gpu/drm/tilcdc/tilcdc_plane.c state->crtc->state->event); crtc 260 drivers/gpu/drm/tilcdc/tilcdc_tfp410.c tilcdc_crtc_set_panel_info(priv->crtc, &dvi_info); crtc 593 drivers/gpu/drm/tiny/gm12u320.c struct gm12u320_device *gm12u320 = pipe->crtc.dev->dev_private; crtc 603 drivers/gpu/drm/tiny/gm12u320.c struct gm12u320_device *gm12u320 = pipe->crtc.dev->dev_private; crtc 613 drivers/gpu/drm/tiny/gm12u320.c struct drm_crtc *crtc = &pipe->crtc; crtc 619 drivers/gpu/drm/tiny/gm12u320.c if (crtc->state->event) { crtc 620 drivers/gpu/drm/tiny/gm12u320.c spin_lock_irq(&crtc->dev->event_lock); crtc 621 drivers/gpu/drm/tiny/gm12u320.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 622 drivers/gpu/drm/tiny/gm12u320.c crtc->state->event = NULL; crtc 623 drivers/gpu/drm/tiny/gm12u320.c spin_unlock_irq(&crtc->dev->event_lock); crtc 50 drivers/gpu/drm/tiny/hx8357d.c struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); crtc 55 drivers/gpu/drm/tiny/hx8357d.c if (!drm_dev_enter(pipe->crtc.dev, &idx)) crtc 168 drivers/gpu/drm/tiny/ili9225.c struct drm_crtc *crtc = &pipe->crtc; crtc 174 drivers/gpu/drm/tiny/ili9225.c if (crtc->state->event) { crtc 175 drivers/gpu/drm/tiny/ili9225.c spin_lock_irq(&crtc->dev->event_lock); crtc 176 drivers/gpu/drm/tiny/ili9225.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 177 drivers/gpu/drm/tiny/ili9225.c spin_unlock_irq(&crtc->dev->event_lock); crtc 178 drivers/gpu/drm/tiny/ili9225.c crtc->state->event = NULL; crtc 186 drivers/gpu/drm/tiny/ili9225.c struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); crtc 188 drivers/gpu/drm/tiny/ili9225.c struct device *dev = pipe->crtc.dev->dev; crtc 199 drivers/gpu/drm/tiny/ili9225.c if (!drm_dev_enter(pipe->crtc.dev, &idx)) crtc 294 drivers/gpu/drm/tiny/ili9225.c struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); crtc 56 drivers/gpu/drm/tiny/ili9341.c struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); crtc 61 drivers/gpu/drm/tiny/ili9341.c if (!drm_dev_enter(pipe->crtc.dev, &idx)) crtc 54 drivers/gpu/drm/tiny/mi0283qt.c struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); crtc 59 drivers/gpu/drm/tiny/mi0283qt.c if (!drm_dev_enter(pipe->crtc.dev, &idx)) crtc 657 drivers/gpu/drm/tiny/repaper.c struct repaper_epd *epd = drm_to_epd(pipe->crtc.dev); crtc 663 drivers/gpu/drm/tiny/repaper.c if (!drm_dev_enter(pipe->crtc.dev, &idx)) crtc 796 drivers/gpu/drm/tiny/repaper.c struct repaper_epd *epd = drm_to_epd(pipe->crtc.dev); crtc 859 drivers/gpu/drm/tiny/repaper.c struct drm_crtc *crtc = &pipe->crtc; crtc 865 drivers/gpu/drm/tiny/repaper.c if (crtc->state->event) { crtc 866 drivers/gpu/drm/tiny/repaper.c spin_lock_irq(&crtc->dev->event_lock); crtc 867 drivers/gpu/drm/tiny/repaper.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 868 drivers/gpu/drm/tiny/repaper.c spin_unlock_irq(&crtc->dev->event_lock); crtc 869 drivers/gpu/drm/tiny/repaper.c crtc->state->event = NULL; crtc 162 drivers/gpu/drm/tiny/st7586.c struct drm_crtc *crtc = &pipe->crtc; crtc 168 drivers/gpu/drm/tiny/st7586.c if (crtc->state->event) { crtc 169 drivers/gpu/drm/tiny/st7586.c spin_lock_irq(&crtc->dev->event_lock); crtc 170 drivers/gpu/drm/tiny/st7586.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 171 drivers/gpu/drm/tiny/st7586.c spin_unlock_irq(&crtc->dev->event_lock); crtc 172 drivers/gpu/drm/tiny/st7586.c crtc->state->event = NULL; crtc 180 drivers/gpu/drm/tiny/st7586.c struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); crtc 192 drivers/gpu/drm/tiny/st7586.c if (!drm_dev_enter(pipe->crtc.dev, &idx)) crtc 258 drivers/gpu/drm/tiny/st7586.c struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); crtc 45 drivers/gpu/drm/tiny/st7735r.c struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); crtc 50 drivers/gpu/drm/tiny/st7735r.c if (!drm_dev_enter(pipe->crtc.dev, &idx)) crtc 53 drivers/gpu/drm/tve200/tve200_display.c drm_crtc_handle_vblank(&priv->pipe.crtc); crtc 124 drivers/gpu/drm/tve200/tve200_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 126 drivers/gpu/drm/tve200/tve200_display.c struct drm_device *drm = crtc->dev; crtc 222 drivers/gpu/drm/tve200/tve200_display.c drm_crtc_vblank_on(crtc); crtc 227 drivers/gpu/drm/tve200/tve200_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 228 drivers/gpu/drm/tve200/tve200_display.c struct drm_device *drm = crtc->dev; crtc 231 drivers/gpu/drm/tve200/tve200_display.c drm_crtc_vblank_off(crtc); crtc 242 drivers/gpu/drm/tve200/tve200_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 243 drivers/gpu/drm/tve200/tve200_display.c struct drm_device *drm = crtc->dev; crtc 245 drivers/gpu/drm/tve200/tve200_display.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 265 drivers/gpu/drm/tve200/tve200_display.c crtc->state->event = NULL; crtc 267 drivers/gpu/drm/tve200/tve200_display.c spin_lock_irq(&crtc->dev->event_lock); crtc 268 drivers/gpu/drm/tve200/tve200_display.c if (crtc->state->active && drm_crtc_vblank_get(crtc) == 0) crtc 269 drivers/gpu/drm/tve200/tve200_display.c drm_crtc_arm_vblank_event(crtc, event); crtc 271 drivers/gpu/drm/tve200/tve200_display.c drm_crtc_send_vblank_event(crtc, event); crtc 272 drivers/gpu/drm/tve200/tve200_display.c spin_unlock_irq(&crtc->dev->event_lock); crtc 278 drivers/gpu/drm/tve200/tve200_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 279 drivers/gpu/drm/tve200/tve200_display.c struct drm_device *drm = crtc->dev; crtc 288 drivers/gpu/drm/tve200/tve200_display.c struct drm_crtc *crtc = &pipe->crtc; crtc 289 drivers/gpu/drm/tve200/tve200_display.c struct drm_device *drm = crtc->dev; crtc 59 drivers/gpu/drm/udl/udl_drv.h struct drm_crtc *crtc; crtc 228 drivers/gpu/drm/udl/udl_modeset.c static int udl_crtc_write_mode_to_hw(struct drm_crtc *crtc) crtc 230 drivers/gpu/drm/udl/udl_modeset.c struct drm_device *dev = crtc->dev; crtc 249 drivers/gpu/drm/udl/udl_modeset.c static void udl_crtc_dpms(struct drm_crtc *crtc, int mode) crtc 251 drivers/gpu/drm/udl/udl_modeset.c struct drm_device *dev = crtc->dev; crtc 275 drivers/gpu/drm/udl/udl_modeset.c udl_crtc_write_mode_to_hw(crtc); crtc 282 drivers/gpu/drm/udl/udl_modeset.c udl_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, crtc 289 drivers/gpu/drm/udl/udl_modeset.c udl_pipe_set_base(struct drm_crtc *crtc, int x, int y, crtc 296 drivers/gpu/drm/udl/udl_modeset.c static int udl_crtc_mode_set(struct drm_crtc *crtc, crtc 303 drivers/gpu/drm/udl/udl_modeset.c struct drm_device *dev = crtc->dev; crtc 304 drivers/gpu/drm/udl/udl_modeset.c struct udl_framebuffer *ufb = to_udl_fb(crtc->primary->fb); crtc 310 drivers/gpu/drm/udl/udl_modeset.c udl->crtc = crtc; crtc 348 drivers/gpu/drm/udl/udl_modeset.c static void udl_crtc_disable(struct drm_crtc *crtc) crtc 350 drivers/gpu/drm/udl/udl_modeset.c udl_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); crtc 353 drivers/gpu/drm/udl/udl_modeset.c static void udl_crtc_destroy(struct drm_crtc *crtc) crtc 355 drivers/gpu/drm/udl/udl_modeset.c drm_crtc_cleanup(crtc); crtc 356 drivers/gpu/drm/udl/udl_modeset.c kfree(crtc); crtc 359 drivers/gpu/drm/udl/udl_modeset.c static int udl_crtc_page_flip(struct drm_crtc *crtc, crtc 366 drivers/gpu/drm/udl/udl_modeset.c struct drm_device *dev = crtc->dev; crtc 368 drivers/gpu/drm/udl/udl_modeset.c struct drm_framebuffer *old_fb = crtc->primary->fb; crtc 379 drivers/gpu/drm/udl/udl_modeset.c drm_crtc_send_vblank_event(crtc, event); crtc 381 drivers/gpu/drm/udl/udl_modeset.c crtc->primary->fb = fb; crtc 386 drivers/gpu/drm/udl/udl_modeset.c static void udl_crtc_prepare(struct drm_crtc *crtc) crtc 390 drivers/gpu/drm/udl/udl_modeset.c static void udl_crtc_commit(struct drm_crtc *crtc) crtc 392 drivers/gpu/drm/udl/udl_modeset.c udl_crtc_dpms(crtc, DRM_MODE_DPMS_ON); crtc 411 drivers/gpu/drm/udl/udl_modeset.c struct drm_crtc *crtc; crtc 413 drivers/gpu/drm/udl/udl_modeset.c crtc = kzalloc(sizeof(struct drm_crtc) + sizeof(struct drm_connector *), GFP_KERNEL); crtc 414 drivers/gpu/drm/udl/udl_modeset.c if (crtc == NULL) crtc 417 drivers/gpu/drm/udl/udl_modeset.c drm_crtc_init(dev, crtc, &udl_crtc_funcs); crtc 418 drivers/gpu/drm/udl/udl_modeset.c drm_crtc_helper_add(crtc, &udl_helper_funcs); crtc 458 drivers/gpu/drm/udl/udl_modeset.c if (!udl->crtc || !udl->crtc->primary->fb) crtc 460 drivers/gpu/drm/udl/udl_modeset.c udl_crtc_commit(udl->crtc); crtc 461 drivers/gpu/drm/udl/udl_modeset.c ufb = to_udl_fb(udl->crtc->primary->fb); crtc 48 drivers/gpu/drm/vboxvideo/vbox_main.c struct drm_crtc *crtc; crtc 53 drivers/gpu/drm/vboxvideo/vbox_main.c list_for_each_entry(crtc, &fb->dev->mode_config.crtc_list, head) { crtc 54 drivers/gpu/drm/vboxvideo/vbox_main.c if (crtc->primary->state->fb != fb) crtc 57 drivers/gpu/drm/vboxvideo/vbox_main.c mode = &crtc->state->mode; crtc 58 drivers/gpu/drm/vboxvideo/vbox_main.c crtc_x = crtc->primary->state->src_x >> 16; crtc 59 drivers/gpu/drm/vboxvideo/vbox_main.c crtc_y = crtc->primary->state->src_y >> 16; crtc 63 drivers/gpu/drm/vboxvideo/vbox_main.c unsigned int crtc_id = to_vbox_crtc(crtc)->crtc_id; crtc 29 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_do_modeset(struct drm_crtc *crtc) crtc 31 drivers/gpu/drm/vboxvideo/vbox_mode.c struct drm_framebuffer *fb = crtc->primary->state->fb; crtc 32 drivers/gpu/drm/vboxvideo/vbox_mode.c struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); crtc 38 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox = crtc->dev->dev_private; crtc 53 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_crtc->fb_offset / pitch < 0xffff - crtc->y && crtc 67 drivers/gpu/drm/vboxvideo/vbox_mode.c flags |= (fb && crtc->state->enable) ? 0 : VBVA_SCREEN_F_BLANK; crtc 76 drivers/gpu/drm/vboxvideo/vbox_mode.c static int vbox_set_view(struct drm_crtc *crtc) crtc 78 drivers/gpu/drm/vboxvideo/vbox_mode.c struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); crtc 79 drivers/gpu/drm/vboxvideo/vbox_mode.c struct vbox_private *vbox = crtc->dev->dev_private; crtc 171 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_crtc_set_base_and_mode(struct drm_crtc *crtc, crtc 177 drivers/gpu/drm/vboxvideo/vbox_mode.c struct vbox_private *vbox = crtc->dev->dev_private; crtc 178 drivers/gpu/drm/vboxvideo/vbox_mode.c struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); crtc 179 drivers/gpu/drm/vboxvideo/vbox_mode.c bool needs_modeset = drm_atomic_crtc_needs_modeset(crtc->state); crtc 183 drivers/gpu/drm/vboxvideo/vbox_mode.c if (crtc->state->enable) { crtc 184 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_crtc->width = crtc->state->mode.hdisplay; crtc 185 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_crtc->height = crtc->state->mode.vdisplay; crtc 198 drivers/gpu/drm/vboxvideo/vbox_mode.c if (crtci == crtc) crtc 204 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_set_view(crtc); crtc 205 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_do_modeset(crtc); crtc 215 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_crtc_atomic_enable(struct drm_crtc *crtc, crtc 220 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_crtc_atomic_disable(struct drm_crtc *crtc, crtc 225 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_crtc_atomic_flush(struct drm_crtc *crtc, crtc 231 drivers/gpu/drm/vboxvideo/vbox_mode.c if (crtc->state && crtc->state->event) { crtc 232 drivers/gpu/drm/vboxvideo/vbox_mode.c event = crtc->state->event; crtc 233 drivers/gpu/drm/vboxvideo/vbox_mode.c crtc->state->event = NULL; crtc 235 drivers/gpu/drm/vboxvideo/vbox_mode.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 236 drivers/gpu/drm/vboxvideo/vbox_mode.c drm_crtc_send_vblank_event(crtc, event); crtc 237 drivers/gpu/drm/vboxvideo/vbox_mode.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 247 drivers/gpu/drm/vboxvideo/vbox_mode.c static void vbox_crtc_destroy(struct drm_crtc *crtc) crtc 249 drivers/gpu/drm/vboxvideo/vbox_mode.c drm_crtc_cleanup(crtc); crtc 250 drivers/gpu/drm/vboxvideo/vbox_mode.c kfree(crtc); crtc 268 drivers/gpu/drm/vboxvideo/vbox_mode.c if (new_state->crtc) { crtc 270 drivers/gpu/drm/vboxvideo/vbox_mode.c new_state->state, new_state->crtc); crtc 284 drivers/gpu/drm/vboxvideo/vbox_mode.c struct drm_crtc *crtc = plane->state->crtc; crtc 287 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_crtc_set_base_and_mode(crtc, fb, crtc 295 drivers/gpu/drm/vboxvideo/vbox_mode.c struct drm_crtc *crtc = old_state->crtc; crtc 298 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_crtc_set_base_and_mode(crtc, old_state->fb, crtc 340 drivers/gpu/drm/vboxvideo/vbox_mode.c if (new_state->crtc) { crtc 342 drivers/gpu/drm/vboxvideo/vbox_mode.c new_state->state, new_state->crtc); crtc 387 drivers/gpu/drm/vboxvideo/vbox_mode.c struct vbox_crtc *vbox_crtc = to_vbox_crtc(plane->state->crtc); crtc 442 drivers/gpu/drm/vboxvideo/vbox_mode.c struct vbox_crtc *vbox_crtc = to_vbox_crtc(old_state->crtc); crtc 93 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_crtc *crtc = drm_crtc_from_index(dev, crtc_id); crtc 94 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 205 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_crtc_destroy(struct drm_crtc *crtc) crtc 207 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_cleanup(crtc); crtc 211 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_lut_load(struct drm_crtc *crtc) crtc 213 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 215 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 224 drivers/gpu/drm/vc4/vc4_crtc.c (vc4_crtc->channel * 3 * crtc->gamma_size)); crtc 226 drivers/gpu/drm/vc4/vc4_crtc.c for (i = 0; i < crtc->gamma_size; i++) crtc 228 drivers/gpu/drm/vc4/vc4_crtc.c for (i = 0; i < crtc->gamma_size; i++) crtc 230 drivers/gpu/drm/vc4/vc4_crtc.c for (i = 0; i < crtc->gamma_size; i++) crtc 235 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_update_gamma_lut(struct drm_crtc *crtc) crtc 237 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 238 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_color_lut *lut = crtc->state->gamma_lut->data; crtc 239 drivers/gpu/drm/vc4/vc4_crtc.c u32 length = drm_color_lut_size(crtc->state->gamma_lut); crtc 248 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_lut_load(crtc); crtc 276 drivers/gpu/drm/vc4/vc4_crtc.c static struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc) crtc 281 drivers/gpu/drm/vc4/vc4_crtc.c drm_connector_list_iter_begin(crtc->dev, &conn_iter); crtc 283 drivers/gpu/drm/vc4/vc4_crtc.c if (connector->state->crtc == crtc) { crtc 293 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_crtc_config_pv(struct drm_crtc *crtc) crtc 295 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc); crtc 297 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 298 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_crtc_state *state = crtc->state; crtc 382 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 384 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 386 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 387 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); crtc 388 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 395 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_index(crtc)); crtc 424 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_config_pv(crtc); crtc 434 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_lut_load(crtc); crtc 439 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_index(crtc)); crtc 452 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, crtc 455 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 457 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 463 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_vblank_off(crtc); crtc 497 drivers/gpu/drm/vc4/vc4_crtc.c if (crtc->state->event) { crtc 501 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 502 drivers/gpu/drm/vc4/vc4_crtc.c crtc->state->event = NULL; crtc 514 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_crtc_update_dlist(struct drm_crtc *crtc) crtc 516 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 518 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 519 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); crtc 521 drivers/gpu/drm/vc4/vc4_crtc.c if (crtc->state->event) { crtc 524 drivers/gpu/drm/vc4/vc4_crtc.c crtc->state->event->pipe = drm_crtc_index(crtc); crtc 526 drivers/gpu/drm/vc4/vc4_crtc.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 531 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc->event = crtc->state->event; crtc 532 drivers/gpu/drm/vc4/vc4_crtc.c crtc->state->event = NULL; crtc 545 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, crtc 548 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 550 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 551 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); crtc 552 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 559 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_vblank_on(crtc); crtc 560 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_update_dlist(crtc); crtc 581 drivers/gpu/drm/vc4/vc4_crtc.c static enum drm_mode_status vc4_crtc_mode_valid(struct drm_crtc *crtc, crtc 587 drivers/gpu/drm/vc4/vc4_crtc.c crtc->base.id); crtc 614 drivers/gpu/drm/vc4/vc4_crtc.c if (conn_state->crtc != state->crtc) crtc 625 drivers/gpu/drm/vc4/vc4_crtc.c static int vc4_crtc_atomic_check(struct drm_crtc *crtc, crtc 629 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 658 drivers/gpu/drm/vc4/vc4_crtc.c if (conn_state->crtc != crtc) crtc 682 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, crtc 685 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 687 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 688 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); crtc 697 drivers/gpu/drm/vc4/vc4_crtc.c DRM_INFO("CRTC %d HVS before:\n", drm_crtc_index(crtc)); crtc 702 drivers/gpu/drm/vc4/vc4_crtc.c drm_atomic_crtc_for_each_plane(plane, crtc) { crtc 740 drivers/gpu/drm/vc4/vc4_crtc.c if (crtc->state->active && old_state->active) crtc 741 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_update_dlist(crtc); crtc 743 drivers/gpu/drm/vc4/vc4_crtc.c if (crtc->state->color_mgmt_changed) { crtc 746 drivers/gpu/drm/vc4/vc4_crtc.c if (crtc->state->gamma_lut) { crtc 747 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_update_gamma_lut(crtc); crtc 760 drivers/gpu/drm/vc4/vc4_crtc.c DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc)); crtc 765 drivers/gpu/drm/vc4/vc4_crtc.c static int vc4_enable_vblank(struct drm_crtc *crtc) crtc 767 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 774 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_disable_vblank(struct drm_crtc *crtc) crtc 776 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 783 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_crtc *crtc = &vc4_crtc->base; crtc 784 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 786 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); crtc 794 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_send_vblank_event(crtc, vc4_crtc->event); crtc 796 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_vblank_put(crtc); crtc 809 drivers/gpu/drm/vc4/vc4_crtc.c void vc4_crtc_handle_vblank(struct vc4_crtc *crtc) crtc 811 drivers/gpu/drm/vc4/vc4_crtc.c crtc->t_vblank = ktime_get(); crtc 812 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_handle_vblank(&crtc->base); crtc 813 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_handle_page_flip(crtc); crtc 832 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_crtc *crtc; crtc 848 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_crtc *crtc = flip_state->crtc; crtc 849 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 851 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_plane *plane = crtc->primary; crtc 858 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_send_vblank_event(crtc, flip_state->event); crtc 862 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_vblank_put(crtc); crtc 892 drivers/gpu/drm/vc4/vc4_crtc.c static int vc4_async_page_flip(struct drm_crtc *crtc, crtc 897 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_device *dev = crtc->dev; crtc 899 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_plane *plane = crtc->primary; crtc 924 drivers/gpu/drm/vc4/vc4_crtc.c flip_state->crtc = crtc; crtc 948 drivers/gpu/drm/vc4/vc4_crtc.c WARN_ON(drm_crtc_vblank_get(crtc) != 0); crtc 963 drivers/gpu/drm/vc4/vc4_crtc.c static int vc4_page_flip(struct drm_crtc *crtc, crtc 970 drivers/gpu/drm/vc4/vc4_crtc.c return vc4_async_page_flip(crtc, fb, event, flags); crtc 972 drivers/gpu/drm/vc4/vc4_crtc.c return drm_atomic_helper_page_flip(crtc, fb, event, flags, ctx); crtc 975 drivers/gpu/drm/vc4/vc4_crtc.c static struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc) crtc 983 drivers/gpu/drm/vc4/vc4_crtc.c old_vc4_state = to_vc4_crtc_state(crtc->state); crtc 987 drivers/gpu/drm/vc4/vc4_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &vc4_state->base); crtc 991 drivers/gpu/drm/vc4/vc4_crtc.c static void vc4_crtc_destroy_state(struct drm_crtc *crtc, crtc 994 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_dev *vc4 = to_vc4_dev(crtc->dev); crtc 1006 drivers/gpu/drm/vc4/vc4_crtc.c drm_atomic_helper_crtc_destroy_state(crtc, state); crtc 1010 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_reset(struct drm_crtc *crtc) crtc 1012 drivers/gpu/drm/vc4/vc4_crtc.c if (crtc->state) crtc 1013 drivers/gpu/drm/vc4/vc4_crtc.c vc4_crtc_destroy_state(crtc, crtc->state); crtc 1015 drivers/gpu/drm/vc4/vc4_crtc.c crtc->state = kzalloc(sizeof(struct vc4_crtc_state), GFP_KERNEL); crtc 1016 drivers/gpu/drm/vc4/vc4_crtc.c if (crtc->state) crtc 1017 drivers/gpu/drm/vc4/vc4_crtc.c crtc->state->crtc = crtc; crtc 1079 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_crtc *crtc) crtc 1081 drivers/gpu/drm/vc4/vc4_crtc.c struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); crtc 1093 drivers/gpu/drm/vc4/vc4_crtc.c encoder->possible_crtcs |= drm_crtc_mask(crtc); crtc 1101 drivers/gpu/drm/vc4/vc4_crtc.c encoder->possible_crtcs |= drm_crtc_mask(crtc); crtc 1129 drivers/gpu/drm/vc4/vc4_crtc.c struct drm_crtc *crtc; crtc 1137 drivers/gpu/drm/vc4/vc4_crtc.c crtc = &vc4_crtc->base; crtc 1166 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL, crtc 1168 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs); crtc 1170 drivers/gpu/drm/vc4/vc4_crtc.c drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r)); crtc 1171 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_enable_color_mgmt(crtc, 0, false, crtc->gamma_size); crtc 1176 drivers/gpu/drm/vc4/vc4_crtc.c drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size); crtc 1194 drivers/gpu/drm/vc4/vc4_crtc.c plane->possible_crtcs = drm_crtc_mask(crtc); crtc 1203 drivers/gpu/drm/vc4/vc4_crtc.c cursor_plane->possible_crtcs = drm_crtc_mask(crtc); crtc 1204 drivers/gpu/drm/vc4/vc4_crtc.c crtc->cursor = cursor_plane; crtc 1216 drivers/gpu/drm/vc4/vc4_crtc.c vc4_set_crtc_possible_masks(drm, crtc); crtc 1218 drivers/gpu/drm/vc4/vc4_crtc.c for (i = 0; i < crtc->gamma_size; i++) { crtc 1234 drivers/gpu/drm/vc4/vc4_crtc.c if (destroy_plane->possible_crtcs == drm_crtc_mask(crtc)) crtc 132 drivers/gpu/drm/vc4/vc4_dpi.c struct drm_display_mode *mode = &encoder->crtc->mode; crtc 473 drivers/gpu/drm/vc4/vc4_drv.h to_vc4_crtc(struct drm_crtc *crtc) crtc 475 drivers/gpu/drm/vc4/vc4_drv.h return (struct vc4_crtc *)crtc; crtc 750 drivers/gpu/drm/vc4/vc4_drv.h void vc4_crtc_handle_vblank(struct vc4_crtc *crtc); crtc 820 drivers/gpu/drm/vc4/vc4_dsi.c struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; crtc 383 drivers/gpu/drm/vc4/vc4_hdmi.c struct drm_crtc *crtc = encoder->crtc; crtc 384 drivers/gpu/drm/vc4/vc4_hdmi.c const struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 471 drivers/gpu/drm/vc4/vc4_hdmi.c struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; crtc 681 drivers/gpu/drm/vc4/vc4_hdmi.c vc4_hdmi_encoder_mode_valid(struct drm_encoder *crtc, crtc 735 drivers/gpu/drm/vc4/vc4_hdmi.c struct drm_crtc *crtc = encoder->crtc; crtc 738 drivers/gpu/drm/vc4/vc4_hdmi.c const struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 785 drivers/gpu/drm/vc4/vc4_hdmi.c if (!encoder->crtc || !(HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & crtc 350 drivers/gpu/drm/vc4/vc4_kms.c struct drm_crtc *crtc; crtc 355 drivers/gpu/drm/vc4/vc4_kms.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 365 drivers/gpu/drm/vc4/vc4_kms.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { crtc 378 drivers/gpu/drm/vc4/vc4_kms.c int fifo = to_vc4_crtc(crtc)->channel + 1; crtc 428 drivers/gpu/drm/vc4/vc4_kms.c if (old_plane_state->fb && old_plane_state->crtc) { crtc 434 drivers/gpu/drm/vc4/vc4_kms.c if (new_plane_state->fb && new_plane_state->crtc) { crtc 142 drivers/gpu/drm/vc4/vc4_plane.c return state->fb && state->crtc; crtc 268 drivers/gpu/drm/vc4/vc4_plane.c pstate->crtc); crtc 320 drivers/gpu/drm/vc4/vc4_plane.c state->crtc); crtc 498 drivers/gpu/drm/vc4/vc4_plane.c state->crtc); crtc 912 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->crtc_w == state->crtc->mode.hdisplay && crtc 913 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->crtc_h == state->crtc->mode.vdisplay; crtc 237 drivers/gpu/drm/vc4/vc4_txp.c crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); crtc 277 drivers/gpu/drm/vc4/vc4_txp.c mode = &conn_state->crtc->state->adjusted_mode; crtc 363 drivers/gpu/drm/vc4/vc4_txp.c vc4_crtc_handle_vblank(to_vc4_crtc(txp->connector.base.state->crtc)); crtc 498 drivers/gpu/drm/vc4/vc4_vec.c if (conn_state->crtc && crtc 82 drivers/gpu/drm/virtio/virtgpu_display.c static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 84 drivers/gpu/drm/virtio/virtgpu_display.c struct drm_device *dev = crtc->dev; crtc 86 drivers/gpu/drm/virtio/virtgpu_display.c struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); crtc 89 drivers/gpu/drm/virtio/virtgpu_display.c crtc->mode.hdisplay, crtc 90 drivers/gpu/drm/virtio/virtgpu_display.c crtc->mode.vdisplay, 0, 0); crtc 93 drivers/gpu/drm/virtio/virtgpu_display.c static void virtio_gpu_crtc_atomic_enable(struct drm_crtc *crtc, crtc 96 drivers/gpu/drm/virtio/virtgpu_display.c struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); crtc 101 drivers/gpu/drm/virtio/virtgpu_display.c static void virtio_gpu_crtc_atomic_disable(struct drm_crtc *crtc, crtc 104 drivers/gpu/drm/virtio/virtgpu_display.c struct drm_device *dev = crtc->dev; crtc 106 drivers/gpu/drm/virtio/virtgpu_display.c struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); crtc 112 drivers/gpu/drm/virtio/virtgpu_display.c static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc, crtc 118 drivers/gpu/drm/virtio/virtgpu_display.c static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc, crtc 123 drivers/gpu/drm/virtio/virtgpu_display.c spin_lock_irqsave(&crtc->dev->event_lock, flags); crtc 124 drivers/gpu/drm/virtio/virtgpu_display.c if (crtc->state->event) crtc 125 drivers/gpu/drm/virtio/virtgpu_display.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 126 drivers/gpu/drm/virtio/virtgpu_display.c crtc->state->event = NULL; crtc 127 drivers/gpu/drm/virtio/virtgpu_display.c spin_unlock_irqrestore(&crtc->dev->event_lock, flags); crtc 256 drivers/gpu/drm/virtio/virtgpu_display.c struct drm_crtc *crtc = &output->crtc; crtc 272 drivers/gpu/drm/virtio/virtgpu_display.c drm_crtc_init_with_planes(dev, crtc, primary, cursor, crtc 274 drivers/gpu/drm/virtio/virtgpu_display.c drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs); crtc 126 drivers/gpu/drm/virtio/virtgpu_drv.h struct drm_crtc crtc; crtc 137 drivers/gpu/drm/virtio/virtgpu_drv.h container_of(x, struct virtio_gpu_output, crtc) crtc 100 drivers/gpu/drm/virtio/virtgpu_plane.c if (plane->state->crtc) crtc 101 drivers/gpu/drm/virtio/virtgpu_plane.c output = drm_crtc_to_virtio_gpu_output(plane->state->crtc); crtc 102 drivers/gpu/drm/virtio/virtgpu_plane.c if (old_state->crtc) crtc 103 drivers/gpu/drm/virtio/virtgpu_plane.c output = drm_crtc_to_virtio_gpu_output(old_state->crtc); crtc 191 drivers/gpu/drm/virtio/virtgpu_plane.c if (plane->state->crtc) crtc 192 drivers/gpu/drm/virtio/virtgpu_plane.c output = drm_crtc_to_virtio_gpu_output(plane->state->crtc); crtc 193 drivers/gpu/drm/virtio/virtgpu_plane.c if (old_state->crtc) crtc 194 drivers/gpu/drm/virtio/virtgpu_plane.c output = drm_crtc_to_virtio_gpu_output(old_state->crtc); crtc 156 drivers/gpu/drm/vkms/vkms_composer.c struct drm_crtc *crtc = crtc_state->base.crtc; crtc 157 drivers/gpu/drm/vkms/vkms_composer.c struct vkms_output *out = drm_crtc_to_vkms_output(crtc); crtc 193 drivers/gpu/drm/vkms/vkms_composer.c drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32); crtc 198 drivers/gpu/drm/vkms/vkms_composer.c const char *const *vkms_get_crc_sources(struct drm_crtc *crtc, crtc 221 drivers/gpu/drm/vkms/vkms_composer.c int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name, crtc 236 drivers/gpu/drm/vkms/vkms_composer.c int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name) crtc 238 drivers/gpu/drm/vkms/vkms_composer.c struct vkms_output *out = drm_crtc_to_vkms_output(crtc); crtc 14 drivers/gpu/drm/vkms/vkms_crtc.c struct drm_crtc *crtc = &output->crtc; crtc 25 drivers/gpu/drm/vkms/vkms_crtc.c ret = drm_crtc_handle_vblank(crtc); crtc 31 drivers/gpu/drm/vkms/vkms_crtc.c u64 frame = drm_crtc_accurate_vblank_count(crtc); crtc 56 drivers/gpu/drm/vkms/vkms_crtc.c static int vkms_enable_vblank(struct drm_crtc *crtc) crtc 58 drivers/gpu/drm/vkms/vkms_crtc.c struct drm_device *dev = crtc->dev; crtc 59 drivers/gpu/drm/vkms/vkms_crtc.c unsigned int pipe = drm_crtc_index(crtc); crtc 61 drivers/gpu/drm/vkms/vkms_crtc.c struct vkms_output *out = drm_crtc_to_vkms_output(crtc); crtc 63 drivers/gpu/drm/vkms/vkms_crtc.c drm_calc_timestamping_constants(crtc, &crtc->mode); crtc 73 drivers/gpu/drm/vkms/vkms_crtc.c static void vkms_disable_vblank(struct drm_crtc *crtc) crtc 75 drivers/gpu/drm/vkms/vkms_crtc.c struct vkms_output *out = drm_crtc_to_vkms_output(crtc); crtc 106 drivers/gpu/drm/vkms/vkms_crtc.c vkms_atomic_crtc_duplicate_state(struct drm_crtc *crtc) crtc 110 drivers/gpu/drm/vkms/vkms_crtc.c if (WARN_ON(!crtc->state)) crtc 117 drivers/gpu/drm/vkms/vkms_crtc.c __drm_atomic_helper_crtc_duplicate_state(crtc, &vkms_state->base); crtc 124 drivers/gpu/drm/vkms/vkms_crtc.c static void vkms_atomic_crtc_destroy_state(struct drm_crtc *crtc, crtc 136 drivers/gpu/drm/vkms/vkms_crtc.c static void vkms_atomic_crtc_reset(struct drm_crtc *crtc) crtc 141 drivers/gpu/drm/vkms/vkms_crtc.c if (crtc->state) crtc 142 drivers/gpu/drm/vkms/vkms_crtc.c vkms_atomic_crtc_destroy_state(crtc, crtc->state); crtc 144 drivers/gpu/drm/vkms/vkms_crtc.c __drm_atomic_helper_crtc_reset(crtc, &vkms_state->base); crtc 163 drivers/gpu/drm/vkms/vkms_crtc.c static int vkms_crtc_atomic_check(struct drm_crtc *crtc, crtc 174 drivers/gpu/drm/vkms/vkms_crtc.c ret = drm_atomic_add_affected_planes(state->state, crtc); crtc 178 drivers/gpu/drm/vkms/vkms_crtc.c drm_for_each_plane_mask(plane, crtc->dev, state->plane_mask) { crtc 195 drivers/gpu/drm/vkms/vkms_crtc.c drm_for_each_plane_mask(plane, crtc->dev, state->plane_mask) { crtc 209 drivers/gpu/drm/vkms/vkms_crtc.c static void vkms_crtc_atomic_enable(struct drm_crtc *crtc, crtc 212 drivers/gpu/drm/vkms/vkms_crtc.c drm_crtc_vblank_on(crtc); crtc 215 drivers/gpu/drm/vkms/vkms_crtc.c static void vkms_crtc_atomic_disable(struct drm_crtc *crtc, crtc 218 drivers/gpu/drm/vkms/vkms_crtc.c drm_crtc_vblank_off(crtc); crtc 221 drivers/gpu/drm/vkms/vkms_crtc.c static void vkms_crtc_atomic_begin(struct drm_crtc *crtc, crtc 224 drivers/gpu/drm/vkms/vkms_crtc.c struct vkms_output *vkms_output = drm_crtc_to_vkms_output(crtc); crtc 232 drivers/gpu/drm/vkms/vkms_crtc.c static void vkms_crtc_atomic_flush(struct drm_crtc *crtc, crtc 235 drivers/gpu/drm/vkms/vkms_crtc.c struct vkms_output *vkms_output = drm_crtc_to_vkms_output(crtc); crtc 237 drivers/gpu/drm/vkms/vkms_crtc.c if (crtc->state->event) { crtc 238 drivers/gpu/drm/vkms/vkms_crtc.c spin_lock(&crtc->dev->event_lock); crtc 240 drivers/gpu/drm/vkms/vkms_crtc.c if (drm_crtc_vblank_get(crtc) != 0) crtc 241 drivers/gpu/drm/vkms/vkms_crtc.c drm_crtc_send_vblank_event(crtc, crtc->state->event); crtc 243 drivers/gpu/drm/vkms/vkms_crtc.c drm_crtc_arm_vblank_event(crtc, crtc->state->event); crtc 245 drivers/gpu/drm/vkms/vkms_crtc.c spin_unlock(&crtc->dev->event_lock); crtc 247 drivers/gpu/drm/vkms/vkms_crtc.c crtc->state->event = NULL; crtc 250 drivers/gpu/drm/vkms/vkms_crtc.c vkms_output->composer_state = to_vkms_crtc_state(crtc->state); crtc 263 drivers/gpu/drm/vkms/vkms_crtc.c int vkms_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, crtc 266 drivers/gpu/drm/vkms/vkms_crtc.c struct vkms_output *vkms_out = drm_crtc_to_vkms_output(crtc); crtc 269 drivers/gpu/drm/vkms/vkms_crtc.c ret = drm_crtc_init_with_planes(dev, crtc, primary, cursor, crtc 276 drivers/gpu/drm/vkms/vkms_crtc.c drm_crtc_helper_add(crtc, &vkms_crtc_helper_funcs); crtc 72 drivers/gpu/drm/vkms/vkms_drv.c struct drm_crtc *crtc; crtc 88 drivers/gpu/drm/vkms/vkms_drv.c for_each_old_crtc_in_state(old_state, crtc, old_crtc_state, i) { crtc 63 drivers/gpu/drm/vkms/vkms_drv.h struct drm_crtc crtc; crtc 96 drivers/gpu/drm/vkms/vkms_drv.h container_of(target, struct vkms_output, crtc) crtc 111 drivers/gpu/drm/vkms/vkms_drv.h int vkms_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, crtc 136 drivers/gpu/drm/vkms/vkms_drv.h const char *const *vkms_get_crc_sources(struct drm_crtc *crtc, crtc 138 drivers/gpu/drm/vkms/vkms_drv.h int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name); crtc 139 drivers/gpu/drm/vkms/vkms_drv.h int vkms_verify_crc_source(struct drm_crtc *crtc, const char *source_name, crtc 44 drivers/gpu/drm/vkms/vkms_output.c struct drm_crtc *crtc = &output->crtc; crtc 60 drivers/gpu/drm/vkms/vkms_output.c ret = vkms_crtc_init(dev, crtc, primary, cursor); crtc 98 drivers/gpu/drm/vkms/vkms_output.c drm_crtc_cleanup(crtc); crtc 48 drivers/gpu/drm/vkms/vkms_plane.c struct drm_crtc *crtc = vkms_state->base.crtc; crtc 50 drivers/gpu/drm/vkms/vkms_plane.c if (crtc) { crtc 98 drivers/gpu/drm/vkms/vkms_plane.c if (!plane->state->crtc || !fb) crtc 120 drivers/gpu/drm/vkms/vkms_plane.c if (!state->fb | !state->crtc) crtc 123 drivers/gpu/drm/vkms/vkms_plane.c crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); crtc 67 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c struct drm_crtc *crtc; crtc 441 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c struct drm_crtc *crtc = set->crtc; crtc 448 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c ret = crtc->funcs->set_config(set, &ctx); crtc 472 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c set.crtc = par->crtc; crtc 596 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c set.crtc = par->crtc; crtc 676 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c &par->crtc, &init_mode); crtc 48 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_crtc_cleanup(&du->crtc); crtc 241 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc; crtc 244 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_for_each_crtc(crtc, dev) { crtc 245 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c du = vmw_crtc_to_du(crtc); crtc 257 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc; crtc 261 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 262 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c du = vmw_crtc_to_du(crtc); crtc 379 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc; crtc 380 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct vmw_private *dev_priv = vmw_priv(crtc->dev); crtc 381 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct vmw_display_unit *du = vmw_crtc_to_du(crtc); crtc 450 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (state->crtc) crtc 451 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc); crtc 459 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc = state->crtc; crtc 461 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct vmw_display_unit *du = vmw_crtc_to_du(crtc); crtc 490 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (new_state->crtc) crtc 492 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c new_state->crtc); crtc 524 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c int vmw_du_crtc_atomic_check(struct drm_crtc *crtc, crtc 527 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct vmw_display_unit *du = vmw_crtc_to_du(new_state->crtc); crtc 530 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_plane_mask(crtc->primary); crtc 554 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc, crtc 560 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc, crtc 563 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 566 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c crtc->state->event = NULL; crtc 568 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c spin_lock_irq(&crtc->dev->event_lock); crtc 569 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_crtc_send_vblank_event(crtc, event); crtc 570 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c spin_unlock_irq(&crtc->dev->event_lock); crtc 585 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_du_crtc_duplicate_state(struct drm_crtc *crtc) crtc 590 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (WARN_ON(!crtc->state)) crtc 593 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vcs = kmemdup(crtc->state, sizeof(*vcs), GFP_KERNEL); crtc 600 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c __drm_atomic_helper_crtc_duplicate_state(crtc, state); crtc 614 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c void vmw_du_crtc_reset(struct drm_crtc *crtc) crtc 619 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (crtc->state) { crtc 620 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c __drm_atomic_helper_crtc_destroy_state(crtc->state); crtc 622 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c kfree(vmw_crtc_state_to_vcs(crtc->state)); crtc 632 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c crtc->state = &vcs->base; crtc 633 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c crtc->state->crtc = crtc; crtc 646 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_du_crtc_destroy_state(struct drm_crtc *crtc, crtc 649 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_atomic_helper_crtc_destroy_state(crtc, state); crtc 1525 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c vmw_crtc_state_and_lock(struct drm_atomic_state *state, struct drm_crtc *crtc) crtc 1529 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c crtc_state = drm_atomic_get_new_crtc_state(state, crtc); crtc 1531 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c lockdep_assert_held(&crtc->mutex.mutex.base); crtc 1533 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c int ret = drm_modeset_lock(&crtc->mutex, state->acquire_ctx); crtc 1538 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c crtc_state = crtc->state; crtc 1559 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc; crtc 1563 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_for_each_crtc(crtc, dev) { crtc 1564 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct vmw_display_unit *du = vmw_crtc_to_du(crtc); crtc 1569 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c crtc_state = vmw_crtc_state_and_lock(state, crtc); crtc 1581 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (plane_state->crtc != crtc) crtc 1606 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc; crtc 1615 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_for_each_crtc(crtc, dev) { crtc 1616 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct vmw_display_unit *du = vmw_crtc_to_du(crtc); crtc 1619 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c i = drm_crtc_index(crtc); crtc 1621 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c crtc_state = vmw_crtc_state_and_lock(state, crtc); crtc 1644 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc 1646 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct vmw_display_unit *du = vmw_crtc_to_du(crtc); crtc 1699 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc; crtc 1714 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c for_each_new_crtc_in_state(state, crtc, crtc_state, i) { crtc 1844 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc; crtc 1851 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { crtc 1852 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c du = vmw_crtc_to_du(crtc); crtc 1861 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c crtc = drm_crtc_find(dev, file_priv, arg->crtc_id); crtc 1862 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (!crtc) { crtc 1867 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c du = vmw_crtc_to_du(crtc); crtc 2029 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc; crtc 2036 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c drm_for_each_crtc(crtc, dev) { crtc 2037 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c ret = drm_modeset_lock(&crtc->mutex, &ctx); crtc 2095 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c int vmw_du_crtc_gamma_set(struct drm_crtc *crtc, crtc 2100 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct vmw_private *dev_priv = vmw_priv(crtc->dev); crtc 2448 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc *crtc; crtc 2455 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (dirty->crtc) { crtc 2456 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c units[num_units++] = vmw_crtc_to_du(dirty->crtc); crtc 2458 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, crtc 2460 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_plane *plane = crtc->primary; crtc 2463 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c units[num_units++] = vmw_crtc_to_du(crtc); crtc 2469 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c s32 crtc_x = unit->crtc.x; crtc 2470 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c s32 crtc_y = unit->crtc.y; crtc 2471 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c s32 crtc_width = unit->crtc.mode.hdisplay; crtc 2472 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c s32 crtc_height = unit->crtc.mode.vdisplay; crtc 2686 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c *p_crtc = &du->crtc; crtc 191 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_crtc *crtc; crtc 337 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_crtc crtc; crtc 381 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h container_of(x, struct vmw_display_unit, crtc) crtc 390 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_crtc_save(struct drm_crtc *crtc); crtc 391 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_crtc_restore(struct drm_crtc *crtc); crtc 392 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h int vmw_du_crtc_gamma_set(struct drm_crtc *crtc, crtc 475 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h int vmw_du_crtc_atomic_check(struct drm_crtc *crtc, crtc 477 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_crtc_atomic_begin(struct drm_crtc *crtc, crtc 479 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_crtc_atomic_flush(struct drm_crtc *crtc, crtc 481 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_crtc_reset(struct drm_crtc *crtc); crtc 482 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_crtc_state *vmw_du_crtc_duplicate_state(struct drm_crtc *crtc); crtc 483 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h void vmw_du_crtc_destroy_state(struct drm_crtc *crtc, crtc 520 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_crtc *crtc); crtc 528 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_crtc *crtc); crtc 535 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_crtc *crtc); crtc 550 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_crtc *crtc); crtc 561 drivers/gpu/drm/vmwgfx/vmwgfx_kms.h struct drm_crtc *crtc); crtc 37 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c container_of(x, struct vmw_legacy_display_unit, base.crtc) crtc 73 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c static void vmw_ldu_crtc_destroy(struct drm_crtc *crtc) crtc 75 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c vmw_ldu_destroy(vmw_crtc_to_ldu(crtc)); crtc 83 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c struct drm_crtc *crtc = NULL; crtc 92 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c crtc = &entry->base.crtc; crtc 93 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c w = max(w, crtc->x + crtc->mode.hdisplay); crtc 94 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c h = max(h, crtc->y + crtc->mode.vdisplay); crtc 98 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c if (crtc == NULL) crtc 100 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c fb = entry->base.crtc.primary->state->fb; crtc 109 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c fb = entry->base.crtc.primary->state->fb; crtc 121 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c crtc = &entry->base.crtc; crtc 125 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x); crtc 126 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y); crtc 127 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay); crtc 128 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, crtc->mode.vdisplay); crtc 203 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c static void vmw_ldu_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 217 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c static void vmw_ldu_crtc_atomic_enable(struct drm_crtc *crtc, crtc 227 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c static void vmw_ldu_crtc_atomic_disable(struct drm_crtc *crtc, crtc 290 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc; crtc 293 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c ldu = vmw_crtc_to_ldu(crtc); crtc 360 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c struct drm_crtc *crtc; crtc 368 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c crtc = &ldu->base.crtc; crtc 446 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c vmw_du_crtc_reset(crtc); crtc 447 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c ret = drm_crtc_init_with_planes(dev, crtc, &ldu->base.primary, crtc 455 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c drm_crtc_helper_add(crtc, &vmw_ldu_crtc_helper_funcs); crtc 457 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c drm_mode_crtc_set_gamma_size(crtc, 256); crtc 38 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c container_of(x, struct vmw_screen_object_unit, base.crtc) crtc 110 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c static void vmw_sou_crtc_destroy(struct drm_crtc *crtc) crtc 112 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c vmw_sou_destroy(vmw_crtc_to_sou(crtc)); crtc 212 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c static void vmw_sou_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 222 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c sou = vmw_crtc_to_sou(crtc); crtc 223 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c dev_priv = vmw_priv(crtc->dev); crtc 224 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c ps = crtc->primary->state; crtc 252 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c ret = vmw_sou_fifo_create(dev_priv, sou, x, y, &crtc->mode); crtc 255 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c crtc->x, crtc->y); crtc 270 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c static void vmw_sou_crtc_helper_prepare(struct drm_crtc *crtc) crtc 281 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c static void vmw_sou_crtc_atomic_enable(struct drm_crtc *crtc, crtc 291 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c static void vmw_sou_crtc_atomic_disable(struct drm_crtc *crtc, crtc 299 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c if (!crtc) { crtc 304 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c sou = vmw_crtc_to_sou(crtc); crtc 305 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c dev_priv = vmw_priv(crtc->dev); crtc 382 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc = plane->state->crtc ? crtc 383 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c plane->state->crtc : old_state->crtc; crtc 386 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c vmw_bo_unpin(vmw_priv(crtc->dev), vps->bo, false); crtc 409 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc = plane->state->crtc ?: new_state->crtc; crtc 424 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c dev_priv = vmw_priv(crtc->dev); crtc 549 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c bo_update.base.du = vmw_crtc_to_du(plane->state->crtc); crtc 710 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c srf_update.base.du = vmw_crtc_to_du(plane->state->crtc); crtc 730 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc = plane->state->crtc; crtc 736 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c if (crtc && plane->state->fb) { crtc 737 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct vmw_private *dev_priv = vmw_priv(crtc->dev); crtc 756 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c event = crtc->state->event; crtc 770 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c crtc->state->event = NULL; crtc 833 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc; crtc 841 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c crtc = &sou->base.crtc; crtc 919 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c vmw_du_crtc_reset(crtc); crtc 920 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c ret = drm_crtc_init_with_planes(dev, crtc, &sou->base.primary, crtc 928 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c drm_crtc_helper_add(crtc, &vmw_sou_crtc_helper_funcs); crtc 930 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c drm_mode_crtc_set_gamma_size(crtc, 256); crtc 1027 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x; crtc 1028 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c s32 trans_y = dirty->unit->crtc.y - sdirty->dst_y; crtc 1134 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc) crtc 1159 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c sdirty.base.crtc = crtc; crtc 1248 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc) crtc 1269 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c dirty.crtc = crtc; crtc 1355 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c struct drm_crtc *crtc) crtc 1375 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c dirty.crtc = crtc; crtc 39 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c container_of(x, struct vmw_screen_target_display_unit, base.crtc) crtc 143 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc) crtc 145 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c vmw_stdu_destroy(vmw_crtc_to_stdu(crtc)); crtc 364 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc) crtc 372 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c stdu = vmw_crtc_to_stdu(crtc); crtc 373 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c dev_priv = vmw_priv(crtc->dev); crtc 391 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c if (!crtc->state->enable) crtc 398 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y); crtc 402 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c crtc->x, crtc->y); crtc 406 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc) crtc 410 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc, crtc 415 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc, crtc 423 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c if (!crtc) { crtc 428 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c stdu = vmw_crtc_to_stdu(crtc); crtc 429 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c dev_priv = vmw_priv(crtc->dev); crtc 630 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c dev_priv = vmw_priv(stdu->base.crtc.dev); crtc 681 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct drm_crtc *crtc) crtc 725 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c ddirty.base.crtc = crtc; crtc 857 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct drm_crtc *crtc) crtc 888 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c sdirty.base.crtc = crtc; crtc 1041 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct drm_crtc *crtc = new_state->crtc; crtc 1122 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c (crtc->dev, crtc 1374 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c bo_update.base.du = vmw_crtc_to_du(plane->state->crtc); crtc 1547 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c stdu = vmw_crtc_to_stdu(plane->state->crtc); crtc 1554 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c srf_update.du = vmw_crtc_to_du(plane->state->crtc); crtc 1593 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct drm_crtc *crtc = plane->state->crtc; crtc 1601 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c if (crtc && plane->state->fb) { crtc 1604 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c stdu = vmw_crtc_to_stdu(crtc); crtc 1605 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c dev_priv = vmw_priv(crtc->dev); crtc 1625 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c crtc = old_state->crtc; crtc 1626 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c stdu = vmw_crtc_to_stdu(crtc); crtc 1627 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c dev_priv = vmw_priv(crtc->dev); crtc 1645 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c event = crtc->state->event; crtc 1658 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c crtc->state->event = NULL; crtc 1732 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c struct drm_crtc *crtc; crtc 1741 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c crtc = &stdu->base.crtc; crtc 1813 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c vmw_du_crtc_reset(crtc); crtc 1814 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary, crtc 1822 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs); crtc 1824 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c drm_mode_crtc_set_gamma_size(crtc, 256); crtc 100 drivers/gpu/drm/xen/xen_drm_front_kms.c struct drm_crtc *crtc = &pipeline->pipe.crtc; crtc 101 drivers/gpu/drm/xen/xen_drm_front_kms.c struct drm_device *dev = crtc->dev; crtc 106 drivers/gpu/drm/xen/xen_drm_front_kms.c drm_crtc_send_vblank_event(crtc, pipeline->pending_event); crtc 117 drivers/gpu/drm/xen/xen_drm_front_kms.c struct drm_crtc *crtc = &pipe->crtc; crtc 121 drivers/gpu/drm/xen/xen_drm_front_kms.c if (!drm_dev_enter(pipe->crtc.dev, &idx)) crtc 124 drivers/gpu/drm/xen/xen_drm_front_kms.c ret = xen_drm_front_mode_set(pipeline, crtc->x, crtc->y, crtc 143 drivers/gpu/drm/xen/xen_drm_front_kms.c if (drm_dev_enter(pipe->crtc.dev, &idx)) { crtc 235 drivers/gpu/drm/xen/xen_drm_front_kms.c struct drm_crtc *crtc = &pipe->crtc; crtc 239 drivers/gpu/drm/xen/xen_drm_front_kms.c event = crtc->state->event; crtc 241 drivers/gpu/drm/xen/xen_drm_front_kms.c struct drm_device *dev = crtc->dev; crtc 247 drivers/gpu/drm/xen/xen_drm_front_kms.c crtc->state->event = NULL; crtc 253 drivers/gpu/drm/xen/xen_drm_front_kms.c if (!drm_dev_enter(pipe->crtc.dev, &idx)) { crtc 273 drivers/gpu/drm/xen/xen_drm_front_kms.c display_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) crtc 276 drivers/gpu/drm/xen/xen_drm_front_kms.c container_of(crtc, struct xen_drm_front_drm_pipeline, crtc 277 drivers/gpu/drm/xen/xen_drm_front_kms.c pipe.crtc); crtc 235 drivers/gpu/drm/zte/zx_hdmi.c vou_inf_enable(VOU_HDMI, encoder->crtc); crtc 242 drivers/gpu/drm/zte/zx_hdmi.c vou_inf_disable(VOU_HDMI, encoder->crtc); crtc 367 drivers/gpu/drm/zte/zx_hdmi.c vou_inf_hdmi_audio_sel(encoder->crtc, VOU_HDMI_AUD_SPDIF); crtc 52 drivers/gpu/drm/zte/zx_plane.c struct drm_crtc *crtc = plane_state->crtc; crtc 57 drivers/gpu/drm/zte/zx_plane.c if (!crtc || !fb) crtc 61 drivers/gpu/drm/zte/zx_plane.c crtc); crtc 70 drivers/gpu/drm/zte/zx_plane.c if (!plane_state->crtc) crtc 281 drivers/gpu/drm/zte/zx_plane.c struct drm_crtc *crtc = plane_state->crtc; crtc 284 drivers/gpu/drm/zte/zx_plane.c if (!crtc || !fb) crtc 288 drivers/gpu/drm/zte/zx_plane.c crtc); crtc 297 drivers/gpu/drm/zte/zx_plane.c if (!plane_state->crtc) crtc 460 drivers/gpu/drm/zte/zx_plane.c if (!plane->state->crtc) crtc 159 drivers/gpu/drm/zte/zx_tvenc.c zx_vou_config_dividers(encoder->crtc, configs, ARRAY_SIZE(configs)); crtc 197 drivers/gpu/drm/zte/zx_tvenc.c vou_inf_enable(VOU_TV_ENC, encoder->crtc); crtc 209 drivers/gpu/drm/zte/zx_tvenc.c vou_inf_disable(VOU_TV_ENC, encoder->crtc); crtc 56 drivers/gpu/drm/zte/zx_vga.c vou_inf_enable(VOU_VGA, encoder->crtc); crtc 64 drivers/gpu/drm/zte/zx_vga.c vou_inf_disable(VOU_VGA, encoder->crtc); crtc 121 drivers/gpu/drm/zte/zx_vou.c struct drm_crtc crtc; crtc 133 drivers/gpu/drm/zte/zx_vou.c #define to_zx_crtc(x) container_of(x, struct zx_crtc, crtc) crtc 216 drivers/gpu/drm/zte/zx_vou.c static inline struct zx_vou_hw *crtc_to_vou(struct drm_crtc *crtc) crtc 218 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(crtc); crtc 223 drivers/gpu/drm/zte/zx_vou.c void vou_inf_hdmi_audio_sel(struct drm_crtc *crtc, crtc 226 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(crtc); crtc 232 drivers/gpu/drm/zte/zx_vou.c void vou_inf_enable(enum vou_inf_id id, struct drm_crtc *crtc) crtc 234 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(crtc); crtc 277 drivers/gpu/drm/zte/zx_vou.c void vou_inf_disable(enum vou_inf_id id, struct drm_crtc *crtc) crtc 279 drivers/gpu/drm/zte/zx_vou.c struct zx_vou_hw *vou = crtc_to_vou(crtc); crtc 289 drivers/gpu/drm/zte/zx_vou.c void zx_vou_config_dividers(struct drm_crtc *crtc, crtc 292 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(crtc); crtc 352 drivers/gpu/drm/zte/zx_vou.c static void zx_crtc_atomic_enable(struct drm_crtc *crtc, crtc 355 drivers/gpu/drm/zte/zx_vou.c struct drm_display_mode *mode = &crtc->state->adjusted_mode; crtc 357 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(crtc); crtc 444 drivers/gpu/drm/zte/zx_vou.c drm_crtc_vblank_on(crtc); crtc 457 drivers/gpu/drm/zte/zx_vou.c static void zx_crtc_atomic_disable(struct drm_crtc *crtc, crtc 460 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(crtc); crtc 466 drivers/gpu/drm/zte/zx_vou.c drm_crtc_vblank_off(crtc); crtc 475 drivers/gpu/drm/zte/zx_vou.c static void zx_crtc_atomic_flush(struct drm_crtc *crtc, crtc 478 drivers/gpu/drm/zte/zx_vou.c struct drm_pending_vblank_event *event = crtc->state->event; crtc 483 drivers/gpu/drm/zte/zx_vou.c crtc->state->event = NULL; crtc 485 drivers/gpu/drm/zte/zx_vou.c spin_lock_irq(&crtc->dev->event_lock); crtc 486 drivers/gpu/drm/zte/zx_vou.c if (drm_crtc_vblank_get(crtc) == 0) crtc 487 drivers/gpu/drm/zte/zx_vou.c drm_crtc_arm_vblank_event(crtc, event); crtc 489 drivers/gpu/drm/zte/zx_vou.c drm_crtc_send_vblank_event(crtc, event); crtc 490 drivers/gpu/drm/zte/zx_vou.c spin_unlock_irq(&crtc->dev->event_lock); crtc 499 drivers/gpu/drm/zte/zx_vou.c static int zx_vou_enable_vblank(struct drm_crtc *crtc) crtc 501 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(crtc); crtc 502 drivers/gpu/drm/zte/zx_vou.c struct zx_vou_hw *vou = crtc_to_vou(crtc); crtc 511 drivers/gpu/drm/zte/zx_vou.c static void zx_vou_disable_vblank(struct drm_crtc *crtc) crtc 513 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(crtc); crtc 514 drivers/gpu/drm/zte/zx_vou.c struct zx_vou_hw *vou = crtc_to_vou(crtc); crtc 592 drivers/gpu/drm/zte/zx_vou.c ret = drm_crtc_init_with_planes(drm, &zcrtc->crtc, zcrtc->primary, NULL, crtc 599 drivers/gpu/drm/zte/zx_vou.c drm_crtc_helper_add(&zcrtc->crtc, &zx_crtc_helper_funcs); crtc 611 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(plane->state->crtc); crtc 632 drivers/gpu/drm/zte/zx_vou.c struct zx_crtc *zcrtc = to_zx_crtc(old_state->crtc); crtc 673 drivers/gpu/drm/zte/zx_vou.c struct drm_crtc *crtc = &zcrtc->crtc; crtc 678 drivers/gpu/drm/zte/zx_vou.c drm_for_each_plane_mask(plane, crtc->dev, crtc->state->plane_mask) crtc 692 drivers/gpu/drm/zte/zx_vou.c drm_crtc_handle_vblank(&vou->main_crtc->crtc); crtc 695 drivers/gpu/drm/zte/zx_vou.c drm_crtc_handle_vblank(&vou->aux_crtc->crtc); crtc 30 drivers/gpu/drm/zte/zx_vou.h void vou_inf_hdmi_audio_sel(struct drm_crtc *crtc, crtc 32 drivers/gpu/drm/zte/zx_vou.h void vou_inf_enable(enum vou_inf_id id, struct drm_crtc *crtc); crtc 33 drivers/gpu/drm/zte/zx_vou.h void vou_inf_disable(enum vou_inf_id id, struct drm_crtc *crtc); crtc 57 drivers/gpu/drm/zte/zx_vou.h void zx_vou_config_dividers(struct drm_crtc *crtc, crtc 87 drivers/rtc/rtc-cadence.c static void cdns_rtc_set_enabled(struct cdns_rtc *crtc, bool enabled) crtc 91 drivers/rtc/rtc-cadence.c writel(reg, crtc->regs + CDNS_RTC_CTLR); crtc 94 drivers/rtc/rtc-cadence.c static bool cdns_rtc_get_enabled(struct cdns_rtc *crtc) crtc 96 drivers/rtc/rtc-cadence.c return !(readl(crtc->regs + CDNS_RTC_CTLR) & CDNS_RTC_CTLR_TIME_CAL); crtc 102 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc = dev_get_drvdata(dev); crtc 105 drivers/rtc/rtc-cadence.c if (!(readl(crtc->regs + CDNS_RTC_EFLR) & CDNS_RTC_AEI_ALRM)) crtc 108 drivers/rtc/rtc-cadence.c rtc_update_irq(crtc->rtc_dev, 1, RTC_IRQF | RTC_AF); crtc 128 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc = dev_get_drvdata(dev); crtc 132 drivers/rtc/rtc-cadence.c if (!cdns_rtc_get_enabled(crtc)) crtc 135 drivers/rtc/rtc-cadence.c cdns_rtc_set_enabled(crtc, false); crtc 137 drivers/rtc/rtc-cadence.c reg = readl(crtc->regs + CDNS_RTC_TIMR); crtc 140 drivers/rtc/rtc-cadence.c reg = readl(crtc->regs + CDNS_RTC_CALR); crtc 147 drivers/rtc/rtc-cadence.c cdns_rtc_set_enabled(crtc, true); crtc 153 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc = dev_get_drvdata(dev); crtc 159 drivers/rtc/rtc-cadence.c cdns_rtc_set_enabled(crtc, false); crtc 171 drivers/rtc/rtc-cadence.c writel(timr, crtc->regs + CDNS_RTC_TIMR); crtc 172 drivers/rtc/rtc-cadence.c writel(calr, crtc->regs + CDNS_RTC_CALR); crtc 173 drivers/rtc/rtc-cadence.c stsr = readl(crtc->regs + CDNS_RTC_STSR); crtc 181 drivers/rtc/rtc-cadence.c cdns_rtc_set_enabled(crtc, true); crtc 187 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc = dev_get_drvdata(dev); crtc 192 drivers/rtc/rtc-cadence.c crtc->regs + CDNS_RTC_AENR); crtc 193 drivers/rtc/rtc-cadence.c writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IENR); crtc 195 drivers/rtc/rtc-cadence.c writel(0, crtc->regs + CDNS_RTC_AENR); crtc 196 drivers/rtc/rtc-cadence.c writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IDISR); crtc 204 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc = dev_get_drvdata(dev); crtc 207 drivers/rtc/rtc-cadence.c reg = readl(crtc->regs + CDNS_RTC_TIMAR); crtc 210 drivers/rtc/rtc-cadence.c reg = readl(crtc->regs + CDNS_RTC_CALAR); crtc 219 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc = dev_get_drvdata(dev); crtc 232 drivers/rtc/rtc-cadence.c writel(timar, crtc->regs + CDNS_RTC_TIMAR); crtc 233 drivers/rtc/rtc-cadence.c writel(calar, crtc->regs + CDNS_RTC_CALAR); crtc 234 drivers/rtc/rtc-cadence.c stsr = readl(crtc->regs + CDNS_RTC_STSR); crtc 257 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc; crtc 262 drivers/rtc/rtc-cadence.c crtc = devm_kzalloc(&pdev->dev, sizeof(*crtc), GFP_KERNEL); crtc 263 drivers/rtc/rtc-cadence.c if (!crtc) crtc 267 drivers/rtc/rtc-cadence.c crtc->regs = devm_ioremap_resource(&pdev->dev, res); crtc 268 drivers/rtc/rtc-cadence.c if (IS_ERR(crtc->regs)) crtc 269 drivers/rtc/rtc-cadence.c return PTR_ERR(crtc->regs); crtc 271 drivers/rtc/rtc-cadence.c crtc->irq = platform_get_irq(pdev, 0); crtc 272 drivers/rtc/rtc-cadence.c if (crtc->irq < 0) crtc 275 drivers/rtc/rtc-cadence.c crtc->pclk = devm_clk_get(&pdev->dev, "pclk"); crtc 276 drivers/rtc/rtc-cadence.c if (IS_ERR(crtc->pclk)) { crtc 277 drivers/rtc/rtc-cadence.c ret = PTR_ERR(crtc->pclk); crtc 283 drivers/rtc/rtc-cadence.c crtc->ref_clk = devm_clk_get(&pdev->dev, "ref_clk"); crtc 284 drivers/rtc/rtc-cadence.c if (IS_ERR(crtc->ref_clk)) { crtc 285 drivers/rtc/rtc-cadence.c ret = PTR_ERR(crtc->ref_clk); crtc 291 drivers/rtc/rtc-cadence.c crtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev); crtc 292 drivers/rtc/rtc-cadence.c if (IS_ERR(crtc->rtc_dev)) crtc 293 drivers/rtc/rtc-cadence.c return PTR_ERR(crtc->rtc_dev); crtc 295 drivers/rtc/rtc-cadence.c platform_set_drvdata(pdev, crtc); crtc 297 drivers/rtc/rtc-cadence.c ret = clk_prepare_enable(crtc->pclk); crtc 304 drivers/rtc/rtc-cadence.c ret = clk_prepare_enable(crtc->ref_clk); crtc 311 drivers/rtc/rtc-cadence.c ref_clk_freq = clk_get_rate(crtc->ref_clk); crtc 320 drivers/rtc/rtc-cadence.c ret = devm_request_irq(&pdev->dev, crtc->irq, crtc 331 drivers/rtc/rtc-cadence.c crtc->rtc_dev->range_min = mktime64(1900, 1, 1, 0, 0, 0); crtc 332 drivers/rtc/rtc-cadence.c crtc->rtc_dev->range_max = mktime64(2999, 12, 31, 23, 59, 59); crtc 334 drivers/rtc/rtc-cadence.c crtc->rtc_dev->ops = &cdns_rtc_ops; crtc 338 drivers/rtc/rtc-cadence.c writel(0, crtc->regs + CDNS_RTC_HMR); crtc 339 drivers/rtc/rtc-cadence.c writel(CDNS_RTC_KRTCR_KRTC, crtc->regs + CDNS_RTC_KRTCR); crtc 341 drivers/rtc/rtc-cadence.c ret = rtc_register_device(crtc->rtc_dev); crtc 351 drivers/rtc/rtc-cadence.c clk_disable_unprepare(crtc->ref_clk); crtc 354 drivers/rtc/rtc-cadence.c clk_disable_unprepare(crtc->pclk); crtc 361 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc = platform_get_drvdata(pdev); crtc 366 drivers/rtc/rtc-cadence.c clk_disable_unprepare(crtc->pclk); crtc 367 drivers/rtc/rtc-cadence.c clk_disable_unprepare(crtc->ref_clk); crtc 375 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc = dev_get_drvdata(dev); crtc 378 drivers/rtc/rtc-cadence.c enable_irq_wake(crtc->irq); crtc 385 drivers/rtc/rtc-cadence.c struct cdns_rtc *crtc = dev_get_drvdata(dev); crtc 388 drivers/rtc/rtc-cadence.c disable_irq_wake(crtc->irq); crtc 108 drivers/staging/sm750fb/sm750.c struct lynxfb_crtc *crtc; crtc 112 drivers/staging/sm750fb/sm750.c crtc = &par->crtc; crtc 113 drivers/staging/sm750fb/sm750.c cursor = &crtc->cursor; crtc 178 drivers/staging/sm750fb/sm750.c base = par->crtc.oScreen; crtc 216 drivers/staging/sm750fb/sm750.c base = par->crtc.oScreen; crtc 250 drivers/staging/sm750fb/sm750.c base = par->crtc.oScreen; crtc 290 drivers/staging/sm750fb/sm750.c struct lynxfb_crtc *crtc; crtc 296 drivers/staging/sm750fb/sm750.c crtc = &par->crtc; crtc 297 drivers/staging/sm750fb/sm750.c return hw_sm750_pan_display(crtc, var, info); crtc 303 drivers/staging/sm750fb/sm750.c struct lynxfb_crtc *crtc; crtc 315 drivers/staging/sm750fb/sm750.c crtc = &par->crtc; crtc 322 drivers/staging/sm750fb/sm750.c line_length = ALIGN(line_length, crtc->line_pad); crtc 375 drivers/staging/sm750fb/sm750.c ret = hw_sm750_crtc_setMode(crtc, var, fix); crtc 448 drivers/staging/sm750fb/sm750.c struct lynxfb_crtc *crtc; crtc 483 drivers/staging/sm750fb/sm750.c crtc = &par->crtc; crtc 484 drivers/staging/sm750fb/sm750.c cursor = &crtc->cursor; crtc 486 drivers/staging/sm750fb/sm750.c memset_io(crtc->vScreen, 0x0, crtc->vidmem_size); crtc 495 drivers/staging/sm750fb/sm750.c crtc = &par->crtc; crtc 496 drivers/staging/sm750fb/sm750.c cursor = &crtc->cursor; crtc 498 drivers/staging/sm750fb/sm750.c memset_io(crtc->vScreen, 0x0, crtc->vidmem_size); crtc 515 drivers/staging/sm750fb/sm750.c struct lynxfb_crtc *crtc; crtc 519 drivers/staging/sm750fb/sm750.c crtc = &par->crtc; crtc 570 drivers/staging/sm750fb/sm750.c request = ALIGN(request, crtc->line_pad); crtc 572 drivers/staging/sm750fb/sm750.c if (crtc->vidmem_size < request) { crtc 577 drivers/staging/sm750fb/sm750.c return hw_sm750_crtc_checkMode(crtc, var); crtc 588 drivers/staging/sm750fb/sm750.c struct lynxfb_crtc *crtc; crtc 593 drivers/staging/sm750fb/sm750.c crtc = &par->crtc; crtc 610 drivers/staging/sm750fb/sm750.c ret = hw_sm750_setColReg(crtc, regno, red, green, blue); crtc 650 drivers/staging/sm750fb/sm750.c struct lynxfb_crtc *crtc; crtc 656 drivers/staging/sm750fb/sm750.c crtc = &par->crtc; crtc 658 drivers/staging/sm750fb/sm750.c crtc->vidmem_size = sm750_dev->vidmem_size; crtc 660 drivers/staging/sm750fb/sm750.c crtc->vidmem_size >>= 1; crtc 665 drivers/staging/sm750fb/sm750.c crtc->line_pad = 16; crtc 666 drivers/staging/sm750fb/sm750.c crtc->xpanstep = 8; crtc 667 drivers/staging/sm750fb/sm750.c crtc->ypanstep = 1; crtc 668 drivers/staging/sm750fb/sm750.c crtc->ywrapstep = 0; crtc 678 drivers/staging/sm750fb/sm750.c crtc->channel = sm750_primary; crtc 679 drivers/staging/sm750fb/sm750.c crtc->oScreen = 0; crtc 680 drivers/staging/sm750fb/sm750.c crtc->vScreen = sm750_dev->pvMem; crtc 685 drivers/staging/sm750fb/sm750.c crtc->channel = sm750_secondary; crtc 686 drivers/staging/sm750fb/sm750.c crtc->oScreen = 0; crtc 687 drivers/staging/sm750fb/sm750.c crtc->vScreen = sm750_dev->pvMem; crtc 692 drivers/staging/sm750fb/sm750.c crtc->channel = sm750_primary; crtc 693 drivers/staging/sm750fb/sm750.c crtc->oScreen = 0; crtc 694 drivers/staging/sm750fb/sm750.c crtc->vScreen = sm750_dev->pvMem; crtc 697 drivers/staging/sm750fb/sm750.c crtc->channel = sm750_secondary; crtc 699 drivers/staging/sm750fb/sm750.c crtc->oScreen = sm750_dev->vidmem_size >> 1; crtc 700 drivers/staging/sm750fb/sm750.c crtc->vScreen = sm750_dev->pvMem + crtc->oScreen; crtc 706 drivers/staging/sm750fb/sm750.c crtc->channel = sm750_secondary; crtc 707 drivers/staging/sm750fb/sm750.c crtc->oScreen = 0; crtc 708 drivers/staging/sm750fb/sm750.c crtc->vScreen = sm750_dev->pvMem; crtc 711 drivers/staging/sm750fb/sm750.c crtc->channel = sm750_primary; crtc 713 drivers/staging/sm750fb/sm750.c crtc->oScreen = sm750_dev->vidmem_size >> 1; crtc 714 drivers/staging/sm750fb/sm750.c crtc->vScreen = sm750_dev->pvMem + crtc->oScreen; crtc 742 drivers/staging/sm750fb/sm750.c struct lynxfb_crtc *crtc; crtc 766 drivers/staging/sm750fb/sm750.c crtc = &par->crtc; crtc 773 drivers/staging/sm750fb/sm750.c output->channel = &crtc->channel; crtc 781 drivers/staging/sm750fb/sm750.c crtc->cursor.offset = crtc->oScreen + crtc->vidmem_size - 1024; crtc 782 drivers/staging/sm750fb/sm750.c crtc->cursor.mmio = sm750_dev->pvReg + crtc 783 drivers/staging/sm750fb/sm750.c 0x800f0 + (int)crtc->channel * 0x140; crtc 785 drivers/staging/sm750fb/sm750.c pr_info("crtc->cursor.mmio = %p\n", crtc->cursor.mmio); crtc 786 drivers/staging/sm750fb/sm750.c crtc->cursor.maxH = crtc->cursor.maxW = 64; crtc 787 drivers/staging/sm750fb/sm750.c crtc->cursor.size = crtc->cursor.maxH * crtc->cursor.maxW * 2 / 8; crtc 788 drivers/staging/sm750fb/sm750.c crtc->cursor.vstart = sm750_dev->pvMem + crtc->cursor.offset; crtc 790 drivers/staging/sm750fb/sm750.c memset_io(crtc->cursor.vstart, 0, crtc->cursor.size); crtc 793 drivers/staging/sm750fb/sm750.c sm750_hw_cursor_disable(&crtc->cursor); crtc 861 drivers/staging/sm750fb/sm750.c crtc->line_pad); crtc 864 drivers/staging/sm750fb/sm750.c info->screen_base = crtc->vScreen; crtc 872 drivers/staging/sm750fb/sm750.c fix->xpanstep = crtc->xpanstep; crtc 873 drivers/staging/sm750fb/sm750.c fix->ypanstep = crtc->ypanstep; crtc 874 drivers/staging/sm750fb/sm750.c fix->ywrapstep = crtc->ywrapstep; crtc 879 drivers/staging/sm750fb/sm750.c fix->smem_start = crtc->oScreen + sm750_dev->vidmem_start; crtc 888 drivers/staging/sm750fb/sm750.c fix->smem_len = crtc->vidmem_size; crtc 173 drivers/staging/sm750fb/sm750.h struct lynxfb_crtc crtc; crtc 197 drivers/staging/sm750fb/sm750.h int hw_sm750_crtc_checkMode(struct lynxfb_crtc *crtc, crtc 200 drivers/staging/sm750fb/sm750.h int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, crtc 204 drivers/staging/sm750fb/sm750.h int hw_sm750_setColReg(struct lynxfb_crtc *crtc, ushort index, crtc 209 drivers/staging/sm750fb/sm750.h int hw_sm750_pan_display(struct lynxfb_crtc *crtc, crtc 224 drivers/staging/sm750fb/sm750_hw.c int hw_sm750_crtc_checkMode(struct lynxfb_crtc *crtc, crtc 228 drivers/staging/sm750fb/sm750_hw.c struct lynxfb_par *par = container_of(crtc, struct lynxfb_par, crtc); crtc 250 drivers/staging/sm750fb/sm750_hw.c int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, crtc 262 drivers/staging/sm750fb/sm750_hw.c par = container_of(crtc, struct lynxfb_par, crtc); crtc 302 drivers/staging/sm750fb/sm750_hw.c if (crtc->channel != sm750_secondary) crtc 314 drivers/staging/sm750fb/sm750_hw.c if (crtc->channel != sm750_secondary) { crtc 317 drivers/staging/sm750fb/sm750_hw.c crtc->oScreen & PANEL_FB_ADDRESS_ADDRESS_MASK); crtc 324 drivers/staging/sm750fb/sm750_hw.c reg = ALIGN(reg, crtc->line_pad); crtc 353 drivers/staging/sm750fb/sm750_hw.c poke32(CRT_FB_ADDRESS, crtc->oScreen); crtc 359 drivers/staging/sm750fb/sm750_hw.c reg = ALIGN(reg, crtc->line_pad) << CRT_FB_WIDTH_WIDTH_SHIFT; crtc 375 drivers/staging/sm750fb/sm750_hw.c int hw_sm750_setColReg(struct lynxfb_crtc *crtc, ushort index, crtc 380 drivers/staging/sm750fb/sm750_hw.c poke32(add[crtc->channel] + index * 4, crtc 544 drivers/staging/sm750fb/sm750_hw.c int hw_sm750_pan_display(struct lynxfb_crtc *crtc, crtc 557 drivers/staging/sm750fb/sm750_hw.c total += crtc->oScreen; crtc 558 drivers/staging/sm750fb/sm750_hw.c if (crtc->channel == sm750_primary) { crtc 443 drivers/video/fbdev/aty/aty128fb.c struct aty128_crtc crtc; crtc 739 drivers/video/fbdev/aty/aty128fb.c pitch_value = par->crtc.pitch; crtc 740 drivers/video/fbdev/aty/aty128fb.c if (par->crtc.bpp == 24) { crtc 761 drivers/video/fbdev/aty/aty128fb.c (depth_to_dst(par->crtc.depth) << 8) | crtc 1023 drivers/video/fbdev/aty/aty128fb.c static void aty128_set_crtc(const struct aty128_crtc *crtc, crtc 1026 drivers/video/fbdev/aty/aty128fb.c aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl); crtc 1027 drivers/video/fbdev/aty/aty128fb.c aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_total); crtc 1028 drivers/video/fbdev/aty/aty128fb.c aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid); crtc 1029 drivers/video/fbdev/aty/aty128fb.c aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_total); crtc 1030 drivers/video/fbdev/aty/aty128fb.c aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid); crtc 1031 drivers/video/fbdev/aty/aty128fb.c aty_st_le32(CRTC_PITCH, crtc->pitch); crtc 1032 drivers/video/fbdev/aty/aty128fb.c aty_st_le32(CRTC_OFFSET, crtc->offset); crtc 1033 drivers/video/fbdev/aty/aty128fb.c aty_st_le32(CRTC_OFFSET_CNTL, crtc->offset_cntl); crtc 1040 drivers/video/fbdev/aty/aty128fb.c struct aty128_crtc *crtc, crtc 1137 drivers/video/fbdev/aty/aty128fb.c crtc->gen_cntl = 0x3000000L | c_sync | (dst << 8); crtc 1139 drivers/video/fbdev/aty/aty128fb.c crtc->h_total = h_total | (h_disp << 16); crtc 1140 drivers/video/fbdev/aty/aty128fb.c crtc->v_total = v_total | (v_disp << 16); crtc 1142 drivers/video/fbdev/aty/aty128fb.c crtc->h_sync_strt_wid = h_sync_strt | (h_sync_wid << 16) | crtc 1144 drivers/video/fbdev/aty/aty128fb.c crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid << 16) | crtc 1147 drivers/video/fbdev/aty/aty128fb.c crtc->pitch = vxres >> 3; crtc 1149 drivers/video/fbdev/aty/aty128fb.c crtc->offset = 0; crtc 1152 drivers/video/fbdev/aty/aty128fb.c crtc->offset_cntl = 0x00010000; crtc 1154 drivers/video/fbdev/aty/aty128fb.c crtc->offset_cntl = 0; crtc 1156 drivers/video/fbdev/aty/aty128fb.c crtc->vxres = vxres; crtc 1157 drivers/video/fbdev/aty/aty128fb.c crtc->vyres = vyres; crtc 1158 drivers/video/fbdev/aty/aty128fb.c crtc->xoffset = xoffset; crtc 1159 drivers/video/fbdev/aty/aty128fb.c crtc->yoffset = yoffset; crtc 1160 drivers/video/fbdev/aty/aty128fb.c crtc->depth = depth; crtc 1161 drivers/video/fbdev/aty/aty128fb.c crtc->bpp = bpp; crtc 1230 drivers/video/fbdev/aty/aty128fb.c static int aty128_crtc_to_var(const struct aty128_crtc *crtc, crtc 1239 drivers/video/fbdev/aty/aty128fb.c h_total = crtc->h_total & 0x1ff; crtc 1240 drivers/video/fbdev/aty/aty128fb.c h_disp = (crtc->h_total >> 16) & 0xff; crtc 1241 drivers/video/fbdev/aty/aty128fb.c h_sync_strt = (crtc->h_sync_strt_wid >> 3) & 0x1ff; crtc 1242 drivers/video/fbdev/aty/aty128fb.c h_sync_dly = crtc->h_sync_strt_wid & 0x7; crtc 1243 drivers/video/fbdev/aty/aty128fb.c h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x3f; crtc 1244 drivers/video/fbdev/aty/aty128fb.c h_sync_pol = (crtc->h_sync_strt_wid >> 23) & 0x1; crtc 1245 drivers/video/fbdev/aty/aty128fb.c v_total = crtc->v_total & 0x7ff; crtc 1246 drivers/video/fbdev/aty/aty128fb.c v_disp = (crtc->v_total >> 16) & 0x7ff; crtc 1247 drivers/video/fbdev/aty/aty128fb.c v_sync_strt = crtc->v_sync_strt_wid & 0x7ff; crtc 1248 drivers/video/fbdev/aty/aty128fb.c v_sync_wid = (crtc->v_sync_strt_wid >> 16) & 0x1f; crtc 1249 drivers/video/fbdev/aty/aty128fb.c v_sync_pol = (crtc->v_sync_strt_wid >> 23) & 0x1; crtc 1250 drivers/video/fbdev/aty/aty128fb.c c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0; crtc 1251 drivers/video/fbdev/aty/aty128fb.c pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK; crtc 1270 drivers/video/fbdev/aty/aty128fb.c var->xres_virtual = crtc->vxres; crtc 1271 drivers/video/fbdev/aty/aty128fb.c var->yres_virtual = crtc->vyres; crtc 1272 drivers/video/fbdev/aty/aty128fb.c var->xoffset = crtc->xoffset; crtc 1273 drivers/video/fbdev/aty/aty128fb.c var->yoffset = crtc->yoffset; crtc 1517 drivers/video/fbdev/aty/aty128fb.c aty128_set_crtc(&par->crtc, par); crtc 1524 drivers/video/fbdev/aty/aty128fb.c if (par->crtc.bpp == 32) crtc 1526 drivers/video/fbdev/aty/aty128fb.c else if (par->crtc.bpp == 16) crtc 1533 drivers/video/fbdev/aty/aty128fb.c info->fix.line_length = (par->crtc.vxres * par->crtc.bpp) >> 3; crtc 1534 drivers/video/fbdev/aty/aty128fb.c info->fix.visual = par->crtc.bpp == 8 ? FB_VISUAL_PSEUDOCOLOR crtc 1546 drivers/video/fbdev/aty/aty128fb.c (((par->crtc.h_total>>16) & 0xff)+1)*8, crtc 1547 drivers/video/fbdev/aty/aty128fb.c ((par->crtc.v_total>>16) & 0x7ff)+1, crtc 1548 drivers/video/fbdev/aty/aty128fb.c par->crtc.bpp, crtc 1549 drivers/video/fbdev/aty/aty128fb.c par->crtc.vxres*par->crtc.bpp/8); crtc 1563 drivers/video/fbdev/aty/aty128fb.c struct aty128_crtc crtc; crtc 1567 drivers/video/fbdev/aty/aty128fb.c if ((err = aty128_var_to_crtc(var, &crtc, par))) crtc 1573 drivers/video/fbdev/aty/aty128fb.c if ((err = aty128_ddafifo(&fifo_reg, &pll, crtc.depth, par))) crtc 1576 drivers/video/fbdev/aty/aty128fb.c par->crtc = crtc; crtc 1590 drivers/video/fbdev/aty/aty128fb.c if ((err = aty128_crtc_to_var(&par->crtc, var))) crtc 1632 drivers/video/fbdev/aty/aty128fb.c xres = (((par->crtc.h_total >> 16) & 0xff) + 1) << 3; crtc 1633 drivers/video/fbdev/aty/aty128fb.c yres = ((par->crtc.v_total >> 16) & 0x7ff) + 1; crtc 1638 drivers/video/fbdev/aty/aty128fb.c if (xoffset+xres > par->crtc.vxres || yoffset+yres > par->crtc.vyres) crtc 1641 drivers/video/fbdev/aty/aty128fb.c par->crtc.xoffset = xoffset; crtc 1642 drivers/video/fbdev/aty/aty128fb.c par->crtc.yoffset = yoffset; crtc 1644 drivers/video/fbdev/aty/aty128fb.c offset = ((yoffset * par->crtc.vxres + xoffset) * (par->crtc.bpp >> 3)) crtc 1647 drivers/video/fbdev/aty/aty128fb.c if (par->crtc.bpp == 24) crtc 2243 drivers/video/fbdev/aty/aty128fb.c || (par->crtc.depth == 16 && regno > 63) crtc 2244 drivers/video/fbdev/aty/aty128fb.c || (par->crtc.depth == 15 && regno > 31)) crtc 2255 drivers/video/fbdev/aty/aty128fb.c switch (par->crtc.depth) { crtc 2272 drivers/video/fbdev/aty/aty128fb.c if (par->crtc.depth == 16 && regno > 0) { crtc 2290 drivers/video/fbdev/aty/aty128fb.c } else if (par->crtc.bpp == 16) crtc 136 drivers/video/fbdev/aty/atyfb.h struct crtc crtc; crtc 189 drivers/video/fbdev/aty/atyfb.h struct crtc saved_crtc; crtc 249 drivers/video/fbdev/aty/atyfb_base.c static void aty_get_crtc(const struct atyfb_par *par, struct crtc *crtc); crtc 251 drivers/video/fbdev/aty/atyfb_base.c static void aty_set_crtc(const struct atyfb_par *par, const struct crtc *crtc); crtc 254 drivers/video/fbdev/aty/atyfb_base.c struct crtc *crtc); crtc 255 drivers/video/fbdev/aty/atyfb_base.c static int aty_crtc_to_var(const struct crtc *crtc, crtc 642 drivers/video/fbdev/aty/atyfb_base.c static void aty_get_crtc(const struct atyfb_par *par, struct crtc *crtc) crtc 647 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_index = aty_ld_le32(LCD_INDEX, par); crtc 648 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(LCD_INDEX, crtc->lcd_index, par); crtc 650 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par); crtc 651 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par); crtc 655 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl & crtc 659 drivers/video/fbdev/aty/atyfb_base.c crtc->horz_stretching = aty_ld_lcd(HORZ_STRETCHING, par); crtc 660 drivers/video/fbdev/aty/atyfb_base.c crtc->vert_stretching = aty_ld_lcd(VERT_STRETCHING, par); crtc 662 drivers/video/fbdev/aty/atyfb_base.c crtc->ext_vert_stretch = aty_ld_lcd(EXT_VERT_STRETCH, par); crtc 665 drivers/video/fbdev/aty/atyfb_base.c crtc->h_tot_disp = aty_ld_le32(CRTC_H_TOTAL_DISP, par); crtc 666 drivers/video/fbdev/aty/atyfb_base.c crtc->h_sync_strt_wid = aty_ld_le32(CRTC_H_SYNC_STRT_WID, par); crtc 667 drivers/video/fbdev/aty/atyfb_base.c crtc->v_tot_disp = aty_ld_le32(CRTC_V_TOTAL_DISP, par); crtc 668 drivers/video/fbdev/aty/atyfb_base.c crtc->v_sync_strt_wid = aty_ld_le32(CRTC_V_SYNC_STRT_WID, par); crtc 669 drivers/video/fbdev/aty/atyfb_base.c crtc->vline_crnt_vline = aty_ld_le32(CRTC_VLINE_CRNT_VLINE, par); crtc 670 drivers/video/fbdev/aty/atyfb_base.c crtc->off_pitch = aty_ld_le32(CRTC_OFF_PITCH, par); crtc 671 drivers/video/fbdev/aty/atyfb_base.c crtc->gen_cntl = aty_ld_le32(CRTC_GEN_CNTL, par); crtc 676 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(LCD_GEN_CNTL, (crtc->lcd_gen_cntl & ~CRTC_RW_SELECT) | crtc 679 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_h_tot_disp = aty_ld_le32(CRTC_H_TOTAL_DISP, par); crtc 680 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_h_sync_strt_wid = aty_ld_le32(CRTC_H_SYNC_STRT_WID, par); crtc 681 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_v_tot_disp = aty_ld_le32(CRTC_V_TOTAL_DISP, par); crtc 682 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_v_sync_strt_wid = aty_ld_le32(CRTC_V_SYNC_STRT_WID, par); crtc 684 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(LCD_GEN_CNTL, crtc->lcd_gen_cntl, par); crtc 689 drivers/video/fbdev/aty/atyfb_base.c static void aty_set_crtc(const struct atyfb_par *par, const struct crtc *crtc) crtc 694 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl & crtc 698 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(CNFG_PANEL, crtc->lcd_config_panel, par); crtc 699 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl & crtc 703 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(HORZ_STRETCHING, crtc->horz_stretching & crtc 705 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(VERT_STRETCHING, crtc->vert_stretching & crtc 711 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl & ~CRTC_EN, par); crtc 715 drivers/video/fbdev/aty/atyfb_base.c ((((crtc->h_tot_disp >> 16) & 0xff) + 1) << 3), crtc 716 drivers/video/fbdev/aty/atyfb_base.c (((crtc->v_tot_disp >> 16) & 0x7ff) + 1), crtc 717 drivers/video/fbdev/aty/atyfb_base.c (crtc->h_sync_strt_wid & 0x200000) ? 'N' : 'P', crtc 718 drivers/video/fbdev/aty/atyfb_base.c (crtc->v_sync_strt_wid & 0x200000) ? 'N' : 'P', crtc 719 drivers/video/fbdev/aty/atyfb_base.c (crtc->gen_cntl & CRTC_CSYNC_EN) ? 'P' : 'N'); crtc 721 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("CRTC_H_TOTAL_DISP: %x\n", crtc->h_tot_disp); crtc 722 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("CRTC_H_SYNC_STRT_WID: %x\n", crtc->h_sync_strt_wid); crtc 723 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("CRTC_V_TOTAL_DISP: %x\n", crtc->v_tot_disp); crtc 724 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("CRTC_V_SYNC_STRT_WID: %x\n", crtc->v_sync_strt_wid); crtc 725 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("CRTC_OFF_PITCH: %x\n", crtc->off_pitch); crtc 726 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("CRTC_VLINE_CRNT_VLINE: %x\n", crtc->vline_crnt_vline); crtc 727 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("CRTC_GEN_CNTL: %x\n", crtc->gen_cntl); crtc 729 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_tot_disp, par); crtc 730 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid, par); crtc 731 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_tot_disp, par); crtc 732 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid, par); crtc 733 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_OFF_PITCH, crtc->off_pitch, par); crtc 734 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_VLINE_CRNT_VLINE, crtc->vline_crnt_vline, par); crtc 736 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl, par); crtc 746 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(LCD_GEN_CNTL, (crtc->lcd_gen_cntl & ~CRTC_RW_SELECT) | crtc 750 drivers/video/fbdev/aty/atyfb_base.c ((((crtc->shadow_h_tot_disp >> 16) & 0xff) + 1) << 3), crtc 751 drivers/video/fbdev/aty/atyfb_base.c (((crtc->shadow_v_tot_disp >> 16) & 0x7ff) + 1), crtc 752 drivers/video/fbdev/aty/atyfb_base.c (crtc->shadow_h_sync_strt_wid & 0x200000) ? 'N' : 'P', crtc 753 drivers/video/fbdev/aty/atyfb_base.c (crtc->shadow_v_sync_strt_wid & 0x200000) ? 'N' : 'P'); crtc 756 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_h_tot_disp); crtc 758 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_h_sync_strt_wid); crtc 760 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_v_tot_disp); crtc 762 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_v_sync_strt_wid); crtc 764 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_H_TOTAL_DISP, crtc->shadow_h_tot_disp, par); crtc 765 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->shadow_h_sync_strt_wid, par); crtc 766 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_V_TOTAL_DISP, crtc->shadow_v_tot_disp, par); crtc 767 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->shadow_v_sync_strt_wid, par); crtc 770 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("LCD_GEN_CNTL: %x\n", crtc->lcd_gen_cntl); crtc 771 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("HORZ_STRETCHING: %x\n", crtc->horz_stretching); crtc 772 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("VERT_STRETCHING: %x\n", crtc->vert_stretching); crtc 774 drivers/video/fbdev/aty/atyfb_base.c DPRINTK("EXT_VERT_STRETCH: %x\n", crtc->ext_vert_stretch); crtc 776 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl, par); crtc 777 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(HORZ_STRETCHING, crtc->horz_stretching, par); crtc 778 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(VERT_STRETCHING, crtc->vert_stretching, par); crtc 780 drivers/video/fbdev/aty/atyfb_base.c aty_st_lcd(EXT_VERT_STRETCH, crtc->ext_vert_stretch, par); crtc 782 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(LCD_INDEX, crtc->lcd_index, par); crtc 801 drivers/video/fbdev/aty/atyfb_base.c struct crtc *crtc) crtc 891 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_index = lcd_index & crtc 898 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_index |= CRTC2_DISPLAY_DIS; crtc 900 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par) | 0x4000; crtc 901 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par) & ~CRTC_RW_SELECT; crtc 903 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_gen_cntl &= crtc 907 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_gen_cntl |= DONT_SHADOW_VPAR | LOCK_8DOT; crtc 909 drivers/video/fbdev/aty/atyfb_base.c if ((crtc->lcd_gen_cntl & LCD_ON) && crtc 918 drivers/video/fbdev/aty/atyfb_base.c if (crtc->lcd_gen_cntl & CRT_ON) { crtc 921 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_gen_cntl &= ~LCD_ON; crtc 931 drivers/video/fbdev/aty/atyfb_base.c if ((par->lcd_table != 0) && (crtc->lcd_gen_cntl & LCD_ON)) { crtc 1003 drivers/video/fbdev/aty/atyfb_base.c crtc->vxres = vxres; crtc 1004 drivers/video/fbdev/aty/atyfb_base.c crtc->vyres = vyres; crtc 1005 drivers/video/fbdev/aty/atyfb_base.c crtc->xoffset = xoffset; crtc 1006 drivers/video/fbdev/aty/atyfb_base.c crtc->yoffset = yoffset; crtc 1007 drivers/video/fbdev/aty/atyfb_base.c crtc->bpp = bpp; crtc 1008 drivers/video/fbdev/aty/atyfb_base.c crtc->off_pitch = crtc 1011 drivers/video/fbdev/aty/atyfb_base.c crtc->vline_crnt_vline = 0; crtc 1013 drivers/video/fbdev/aty/atyfb_base.c crtc->h_tot_disp = h_total | (h_disp << 16); crtc 1014 drivers/video/fbdev/aty/atyfb_base.c crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly << 8) | crtc 1017 drivers/video/fbdev/aty/atyfb_base.c crtc->v_tot_disp = v_total | (v_disp << 16); crtc 1018 drivers/video/fbdev/aty/atyfb_base.c crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid << 16) | crtc 1022 drivers/video/fbdev/aty/atyfb_base.c crtc->gen_cntl = CRTC_EXT_DISP_EN | CRTC_EN | pix_width | c_sync; crtc 1023 drivers/video/fbdev/aty/atyfb_base.c crtc->gen_cntl |= CRTC_VGA_LINEAR; crtc 1027 drivers/video/fbdev/aty/atyfb_base.c crtc->gen_cntl |= CRTC_DBL_SCAN_EN; crtc 1030 drivers/video/fbdev/aty/atyfb_base.c crtc->gen_cntl |= CRTC_INTERLACE_EN; crtc 1036 drivers/video/fbdev/aty/atyfb_base.c crtc->gen_cntl &= ~(CRTC2_EN | CRTC2_PIX_WIDTH); crtc 1037 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_gen_cntl &= ~(HORZ_DIVBY2_EN | DIS_HOR_CRT_DIVBY2 | crtc 1042 drivers/video/fbdev/aty/atyfb_base.c crtc->lcd_gen_cntl |= DONT_SHADOW_VPAR/* | LOCK_8DOT*/; crtc 1045 drivers/video/fbdev/aty/atyfb_base.c crtc->horz_stretching = aty_ld_lcd(HORZ_STRETCHING, par); crtc 1047 drivers/video/fbdev/aty/atyfb_base.c crtc->ext_vert_stretch = aty_ld_lcd(EXT_VERT_STRETCH, par) & crtc 1050 drivers/video/fbdev/aty/atyfb_base.c crtc->horz_stretching &= ~(HORZ_STRETCH_RATIO | crtc 1053 drivers/video/fbdev/aty/atyfb_base.c if (xres < par->lcd_width && crtc->lcd_gen_cntl & LCD_ON) { crtc 1107 drivers/video/fbdev/aty/atyfb_base.c crtc->horz_stretching |= (HORZ_STRETCH_EN | crtc 1114 drivers/video/fbdev/aty/atyfb_base.c crtc->horz_stretching |= (HORZ_STRETCH_MODE | HORZ_STRETCH_EN | crtc 1119 drivers/video/fbdev/aty/atyfb_base.c if (vdisplay < par->lcd_height && crtc->lcd_gen_cntl & LCD_ON) { crtc 1120 drivers/video/fbdev/aty/atyfb_base.c crtc->vert_stretching = (VERT_STRETCH_USE0 | VERT_STRETCH_EN | crtc 1125 drivers/video/fbdev/aty/atyfb_base.c crtc->ext_vert_stretch |= VERT_STRETCH_MODE; crtc 1131 drivers/video/fbdev/aty/atyfb_base.c crtc->vert_stretching = 0; crtc 1134 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_h_tot_disp = crtc->h_tot_disp; crtc 1135 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_h_sync_strt_wid = crtc->h_sync_strt_wid; crtc 1136 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_v_tot_disp = crtc->v_tot_disp; crtc 1137 drivers/video/fbdev/aty/atyfb_base.c crtc->shadow_v_sync_strt_wid = crtc->v_sync_strt_wid; crtc 1143 drivers/video/fbdev/aty/atyfb_base.c crtc->gen_cntl |= (aty_ld_le32(CRTC_GEN_CNTL, par) & CRTC_FIFO_LWM); crtc 1145 drivers/video/fbdev/aty/atyfb_base.c crtc->dp_pix_width = dp_pix_width; crtc 1146 drivers/video/fbdev/aty/atyfb_base.c crtc->dp_chain_mask = dp_chain_mask; crtc 1151 drivers/video/fbdev/aty/atyfb_base.c static int aty_crtc_to_var(const struct crtc *crtc, crtc 1161 drivers/video/fbdev/aty/atyfb_base.c h_total = crtc->h_tot_disp & 0x1ff; crtc 1162 drivers/video/fbdev/aty/atyfb_base.c h_disp = (crtc->h_tot_disp >> 16) & 0xff; crtc 1163 drivers/video/fbdev/aty/atyfb_base.c h_sync_strt = (crtc->h_sync_strt_wid & 0xff) | ((crtc->h_sync_strt_wid >> 4) & 0x100); crtc 1164 drivers/video/fbdev/aty/atyfb_base.c h_sync_dly = (crtc->h_sync_strt_wid >> 8) & 0x7; crtc 1165 drivers/video/fbdev/aty/atyfb_base.c h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x1f; crtc 1166 drivers/video/fbdev/aty/atyfb_base.c h_sync_pol = (crtc->h_sync_strt_wid >> 21) & 0x1; crtc 1167 drivers/video/fbdev/aty/atyfb_base.c v_total = crtc->v_tot_disp & 0x7ff; crtc 1168 drivers/video/fbdev/aty/atyfb_base.c v_disp = (crtc->v_tot_disp >> 16) & 0x7ff; crtc 1169 drivers/video/fbdev/aty/atyfb_base.c v_sync_strt = crtc->v_sync_strt_wid & 0x7ff; crtc 1170 drivers/video/fbdev/aty/atyfb_base.c v_sync_wid = (crtc->v_sync_strt_wid >> 16) & 0x1f; crtc 1171 drivers/video/fbdev/aty/atyfb_base.c v_sync_pol = (crtc->v_sync_strt_wid >> 21) & 0x1; crtc 1172 drivers/video/fbdev/aty/atyfb_base.c c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0; crtc 1173 drivers/video/fbdev/aty/atyfb_base.c pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK; crtc 1174 drivers/video/fbdev/aty/atyfb_base.c double_scan = crtc->gen_cntl & CRTC_DBL_SCAN_EN; crtc 1175 drivers/video/fbdev/aty/atyfb_base.c interlace = crtc->gen_cntl & CRTC_INTERLACE_EN; crtc 1254 drivers/video/fbdev/aty/atyfb_base.c var->xres_virtual = crtc->vxres; crtc 1255 drivers/video/fbdev/aty/atyfb_base.c var->yres_virtual = crtc->vyres; crtc 1300 drivers/video/fbdev/aty/atyfb_base.c err = aty_var_to_crtc(info, var, &par->crtc); crtc 1329 drivers/video/fbdev/aty/atyfb_base.c aty_set_crtc(par, &par->crtc); crtc 1346 drivers/video/fbdev/aty/atyfb_base.c if (!aty_crtc_to_var(&par->crtc, &debug)) { crtc 1362 drivers/video/fbdev/aty/atyfb_base.c if (par->crtc.gen_cntl & CRTC_INTERLACE_EN) crtc 1364 drivers/video/fbdev/aty/atyfb_base.c if (par->crtc.gen_cntl & CRTC_DBL_SCAN_EN) crtc 1451 drivers/video/fbdev/aty/atyfb_base.c (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8, crtc 1452 drivers/video/fbdev/aty/atyfb_base.c ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1, crtc 1454 drivers/video/fbdev/aty/atyfb_base.c par->crtc.vxres * var->bits_per_pixel / 8); crtc 1522 drivers/video/fbdev/aty/atyfb_base.c struct crtc crtc; crtc 1528 drivers/video/fbdev/aty/atyfb_base.c err = aty_var_to_crtc(info, var, &crtc); crtc 1550 drivers/video/fbdev/aty/atyfb_base.c aty_crtc_to_var(&crtc, var); crtc 1562 drivers/video/fbdev/aty/atyfb_base.c par->crtc.off_pitch = crtc 1602 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_OFF_PITCH, par->crtc.off_pitch, par); crtc 1652 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_OFF_PITCH, par->crtc.off_pitch, par); crtc 1728 drivers/video/fbdev/aty/atyfb_base.c xres = (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8; crtc 1729 drivers/video/fbdev/aty/atyfb_base.c yres = ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1; crtc 1730 drivers/video/fbdev/aty/atyfb_base.c if (par->crtc.gen_cntl & CRTC_DBL_SCAN_EN) crtc 1734 drivers/video/fbdev/aty/atyfb_base.c if (xoffset + xres > par->crtc.vxres || crtc 1735 drivers/video/fbdev/aty/atyfb_base.c yoffset + yres > par->crtc.vyres) crtc 1747 drivers/video/fbdev/aty/atyfb_base.c aty_st_le32(CRTC_OFF_PITCH, par->crtc.off_pitch, par); crtc 1753 drivers/video/fbdev/aty/atyfb_base.c static int aty_waitforvblank(struct atyfb_par *par, u32 crtc) crtc 1759 drivers/video/fbdev/aty/atyfb_base.c switch (crtc) { crtc 1820 drivers/video/fbdev/aty/atyfb_base.c fbtyp.fb_width = par->crtc.vxres; crtc 1821 drivers/video/fbdev/aty/atyfb_base.c fbtyp.fb_height = par->crtc.vyres; crtc 1833 drivers/video/fbdev/aty/atyfb_base.c u32 crtc; crtc 1835 drivers/video/fbdev/aty/atyfb_base.c if (get_user(crtc, (__u32 __user *) arg)) crtc 1838 drivers/video/fbdev/aty/atyfb_base.c return aty_waitforvblank(par, crtc); crtc 3036 drivers/video/fbdev/aty/atyfb_base.c struct crtc crtc; crtc 3040 drivers/video/fbdev/aty/atyfb_base.c crtc.vxres = of_getintprop_default(dp, "width", 1024); crtc 3041 drivers/video/fbdev/aty/atyfb_base.c crtc.vyres = of_getintprop_default(dp, "height", 768); crtc 3044 drivers/video/fbdev/aty/atyfb_base.c crtc.h_tot_disp = aty_ld_le32(CRTC_H_TOTAL_DISP, par); crtc 3045 drivers/video/fbdev/aty/atyfb_base.c crtc.h_sync_strt_wid = aty_ld_le32(CRTC_H_SYNC_STRT_WID, par); crtc 3046 drivers/video/fbdev/aty/atyfb_base.c crtc.v_tot_disp = aty_ld_le32(CRTC_V_TOTAL_DISP, par); crtc 3047 drivers/video/fbdev/aty/atyfb_base.c crtc.v_sync_strt_wid = aty_ld_le32(CRTC_V_SYNC_STRT_WID, par); crtc 3048 drivers/video/fbdev/aty/atyfb_base.c crtc.gen_cntl = aty_ld_le32(CRTC_GEN_CNTL, par); crtc 3049 drivers/video/fbdev/aty/atyfb_base.c aty_crtc_to_var(&crtc, var); crtc 142 drivers/video/fbdev/aty/mach64_accel.c aty_st_le32(SC_BOTTOM, par->crtc.vyres - 1, par); crtc 171 drivers/video/fbdev/aty/mach64_accel.c aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, par); crtc 172 drivers/video/fbdev/aty/mach64_accel.c aty_st_le32(DP_CHAIN_MASK, par->crtc.dp_chain_mask, par); crtc 239 drivers/video/fbdev/aty/mach64_accel.c aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, par); crtc 276 drivers/video/fbdev/aty/mach64_accel.c aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, par); crtc 303 drivers/video/fbdev/aty/mach64_accel.c pix_width = par->crtc.dp_pix_width; crtc 113 drivers/video/fbdev/aty/mach64_cursor.c if (par->crtc.gen_cntl & CRTC_DBL_SCAN_EN) { crtc 423 drivers/video/fbdev/cyber2000fb.c u_char crtc[19]; crtc 480 drivers/video/fbdev/cyber2000fb.c cyber2000_crtcw(crtc_idx[i], hw->crtc[i], cfb); crtc 567 drivers/video/fbdev/cyber2000fb.c hw->crtc[13] = hw->pitch; crtc 568 drivers/video/fbdev/cyber2000fb.c hw->crtc[17] = 0xe3; crtc 569 drivers/video/fbdev/cyber2000fb.c hw->crtc[14] = 0; crtc 570 drivers/video/fbdev/cyber2000fb.c hw->crtc[8] = 0; crtc 578 drivers/video/fbdev/cyber2000fb.c hw->crtc[0] = (Htotal >> 3) - 5; crtc 579 drivers/video/fbdev/cyber2000fb.c hw->crtc[1] = (var->xres >> 3) - 1; crtc 580 drivers/video/fbdev/cyber2000fb.c hw->crtc[2] = var->xres >> 3; crtc 581 drivers/video/fbdev/cyber2000fb.c hw->crtc[4] = (var->xres + var->right_margin) >> 3; crtc 585 drivers/video/fbdev/cyber2000fb.c hw->crtc[3] = ENCODE_BIT(Hblankend, 0, 0x1f, 0) | crtc 590 drivers/video/fbdev/cyber2000fb.c hw->crtc[5] = ENCODE_BIT(Hsyncend, 0, 0x1f, 0) | crtc 605 drivers/video/fbdev/cyber2000fb.c hw->crtc[6] = Vtotal; crtc 606 drivers/video/fbdev/cyber2000fb.c hw->crtc[7] = ENCODE_BIT(Vtotal, 8, 0x01, 0) | crtc 614 drivers/video/fbdev/cyber2000fb.c hw->crtc[9] = ENCODE_BIT(0, 0, 0x1f, 0) | crtc 617 drivers/video/fbdev/cyber2000fb.c hw->crtc[10] = Vsyncstart; crtc 618 drivers/video/fbdev/cyber2000fb.c hw->crtc[11] = ENCODE_BIT(Vsyncend, 0, 0x0f, 0) | crtc 620 drivers/video/fbdev/cyber2000fb.c hw->crtc[12] = Vdispend; crtc 621 drivers/video/fbdev/cyber2000fb.c hw->crtc[15] = Vblankstart; crtc 622 drivers/video/fbdev/cyber2000fb.c hw->crtc[16] = Vblankend; crtc 623 drivers/video/fbdev/cyber2000fb.c hw->crtc[18] = 0xff; crtc 47 drivers/video/fbdev/i740fb.c u8 crtc[VGA_CRT_C]; crtc 501 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_H_TOTAL] = (xtotal >> 3) - 5; crtc 502 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_H_DISP] = (xres >> 3) - 1; crtc 503 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_H_BLANK_START] = ((xres + right) >> 3) - 1; crtc 504 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_H_SYNC_START] = (xres + right) >> 3; crtc 505 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_H_SYNC_END] = (((xres + right + hslen) >> 3) & 0x1F) crtc 507 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_H_BLANK_END] = ((xres + right + hslen) >> 3 & 0x1F) crtc 510 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_V_TOTAL] = ytotal - 2; crtc 518 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_PRESET_ROW] = 0; crtc 519 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_MAX_SCAN] = 0x40; /* 1 scanline, no linecmp */ crtc 521 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_MAX_SCAN] |= 0x80; crtc 522 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_CURSOR_START] = 0x00; crtc 523 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_CURSOR_END] = 0x00; crtc 524 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_CURSOR_HI] = 0x00; crtc 525 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_CURSOR_LO] = 0x00; crtc 526 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_V_DISP_END] = yres-1; crtc 532 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_V_BLANK_START] = yres + lower - 1; crtc 533 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_V_SYNC_START] = yres + lower - 1; crtc 537 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_MAX_SCAN] |= 0x20; crtc 542 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_V_SYNC_END] = crtc 545 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_V_BLANK_END] = (yres + lower - 1 + vslen) & 0xFF; crtc 547 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_UNDERLINE] = 0x00; crtc 548 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_MODE] = 0xC3 ; crtc 549 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_LINE_COMPARE] = 0xFF; crtc 550 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_OVERFLOW] = r7; crtc 585 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_OFFSET] = vxres >> 3; crtc 594 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_OFFSET] = vxres >> 2; crtc 600 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_OFFSET] = (vxres * 3) >> 3; crtc 608 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_OFFSET] = vxres >> 1; crtc 616 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_START_LO] = base & 0x000000FF; crtc 617 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_START_HI] = (base & 0x0000FF00) >> 8; crtc 778 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_V_SYNC_END]); crtc 782 drivers/video/fbdev/i740fb.c i740outreg(par, VGA_CRT_IC, i, par->crtc[i]); crtc 926 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_START_LO] = base & 0x000000FF; crtc 927 drivers/video/fbdev/i740fb.c par->crtc[VGA_CRTC_START_HI] = (base & 0x0000FF00) >> 8; crtc 518 drivers/video/fbdev/matrox/matroxfb_DAC1064.c m->mnp = matroxfb_g450_setclk(minfo, m->pixclock, (m->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); crtc 269 drivers/video/fbdev/matrox/matroxfb_base.c int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc) crtc 275 drivers/video/fbdev/matrox/matroxfb_base.c switch (crtc) { crtc 788 drivers/video/fbdev/matrox/matroxfb_base.c mt.crtc = MATROXFB_SRC_CRTC1; crtc 1174 drivers/video/fbdev/matrox/matroxfb_base.c int crtc; crtc 1184 drivers/video/fbdev/matrox/matroxfb_base.c case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */ crtc 1185 drivers/video/fbdev/matrox/matroxfb_base.c case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break; crtc 1186 drivers/video/fbdev/matrox/matroxfb_base.c case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break; crtc 1187 drivers/video/fbdev/matrox/matroxfb_base.c case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break; crtc 1188 drivers/video/fbdev/matrox/matroxfb_base.c default: seq = 0x00; crtc = 0x00; break; crtc 1196 drivers/video/fbdev/matrox/matroxfb_base.c mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc); crtc 190 drivers/video/fbdev/matrox/matroxfb_base.h unsigned int crtc; crtc 697 drivers/video/fbdev/matrox/matroxfb_base.h extern int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc); crtc 350 drivers/video/fbdev/matrox/matroxfb_crtc2.c mt.crtc = MATROXFB_SRC_CRTC2; crtc 526 drivers/video/fbdev/matrox/matroxfb_g450.c if (mt->crtc == MATROXFB_SRC_CRTC2 && crtc 552 drivers/video/fbdev/matrox/matroxfb_g450.c mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); crtc 582 drivers/video/fbdev/matrox/matroxfb_g450.c mt->mnp = matroxfb_g450_setclk(minfo, mt->pixclock, (mt->crtc == MATROXFB_SRC_CRTC1) ? M_PIXEL_PLL_C : M_VIDEO_PLL); crtc 50 drivers/video/fbdev/nvidia/nv_type.h u8 crtc[NUM_CRT_REGS]; crtc 231 drivers/video/fbdev/nvidia/nvidia.c state->crtc[i] = NVReadCrtc(par, i); crtc 265 drivers/video/fbdev/nvidia/nvidia.c NVWriteCrtc(par, 0x11, state->crtc[0x11] & ~0x80); crtc 274 drivers/video/fbdev/nvidia/nvidia.c printk("CRTC[%02x] = %08x\n", i, state->crtc[i]); crtc 276 drivers/video/fbdev/nvidia/nvidia.c NVWriteCrtc(par, i, state->crtc[i]); crtc 335 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x0] = Set8Bits(h_total); crtc 336 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x1] = Set8Bits(h_display); crtc 337 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x2] = Set8Bits(h_blank_s); crtc 338 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x3] = SetBitField(h_blank_e, 4: 0, 4:0) crtc 340 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x4] = Set8Bits(h_start); crtc 341 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x5] = SetBitField(h_blank_e, 5: 5, 7:7) crtc 343 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x6] = SetBitField(v_total, 7: 0, 7:0); crtc 344 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x7] = SetBitField(v_total, 8: 8, 0:0) crtc 352 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x9] = SetBitField(v_blank_s, 9: 9, 5:5) crtc 355 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x10] = Set8Bits(v_start); crtc 356 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x11] = SetBitField(v_end, 3: 0, 3:0) | SetBit(5); crtc 357 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x12] = Set8Bits(v_display); crtc 358 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x13] = ((info->var.xres_virtual / 8) * crtc 360 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x15] = Set8Bits(v_blank_s); crtc 361 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x16] = Set8Bits(v_blank_e); crtc 508 drivers/video/fbdev/nvidia/nvidia.c memset(state->crtc, 0x00, NUM_CRT_REGS); crtc 509 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x0a] = 0x20; crtc 510 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x17] = 0xe3; crtc 511 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x18] = 0xff; crtc 512 drivers/video/fbdev/nvidia/nvidia.c state->crtc[0x28] = 0x40; crtc 754 drivers/video/fbdev/ps3fb.c static int ps3fb_wait_for_vsync(u32 crtc) crtc 600 drivers/video/fbdev/riva/fbdev.c regs->crtc[i] = CRTCin(par, i); crtc 647 drivers/video/fbdev/riva/fbdev.c CRTCout(par, i, regs->crtc[i]); crtc 724 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x0] = Set8Bits (hTotal); crtc 725 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x1] = Set8Bits (hDisplay); crtc 726 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x2] = Set8Bits (hBlankStart); crtc 727 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x3] = SetBitField (hBlankEnd, 4: 0, 4:0) | SetBit (7); crtc 728 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x4] = Set8Bits (hStart); crtc 729 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x5] = SetBitField (hBlankEnd, 5: 5, 7:7) crtc 731 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x6] = SetBitField (vTotal, 7: 0, 7:0); crtc 732 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x7] = SetBitField (vTotal, 8: 8, 0:0) crtc 740 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x9] = SetBitField (vBlankStart, 9: 9, 5:5) crtc 742 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x10] = Set8Bits (vStart); crtc 743 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x11] = SetBitField (vEnd, 3: 0, 3:0) crtc 745 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x12] = Set8Bits (vDisplay); crtc 746 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x13] = (width / 8) * ((bpp + 1) / 8); crtc 747 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x15] = Set8Bits (vBlankStart); crtc 748 drivers/video/fbdev/riva/fbdev.c newmode.crtc[0x16] = Set8Bits (vBlankEnd); crtc 28 drivers/video/fbdev/riva/rivafb.h u8 crtc[NUM_CRT_REGS]; crtc 990 drivers/video/fbdev/s3c-fb.c static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc) crtc 995 drivers/video/fbdev/s3c-fb.c if (crtc != 0) crtc 1020 drivers/video/fbdev/s3c-fb.c u32 crtc; crtc 1024 drivers/video/fbdev/s3c-fb.c if (get_user(crtc, (u32 __user *)arg)) { crtc 1029 drivers/video/fbdev/s3c-fb.c ret = s3c_fb_wait_for_vsync(sfb, crtc); crtc 1218 drivers/video/fbdev/uvesafb.c struct vbe_crtc_ib *crtc = NULL; crtc 1244 drivers/video/fbdev/uvesafb.c crtc = kzalloc(sizeof(struct vbe_crtc_ib), GFP_KERNEL); crtc 1245 drivers/video/fbdev/uvesafb.c if (!crtc) { crtc 1249 drivers/video/fbdev/uvesafb.c crtc->horiz_start = info->var.xres + info->var.right_margin; crtc 1250 drivers/video/fbdev/uvesafb.c crtc->horiz_end = crtc->horiz_start + info->var.hsync_len; crtc 1251 drivers/video/fbdev/uvesafb.c crtc->horiz_total = crtc->horiz_end + info->var.left_margin; crtc 1253 drivers/video/fbdev/uvesafb.c crtc->vert_start = info->var.yres + info->var.lower_margin; crtc 1254 drivers/video/fbdev/uvesafb.c crtc->vert_end = crtc->vert_start + info->var.vsync_len; crtc 1255 drivers/video/fbdev/uvesafb.c crtc->vert_total = crtc->vert_end + info->var.upper_margin; crtc 1257 drivers/video/fbdev/uvesafb.c crtc->pixel_clock = PICOS2KHZ(info->var.pixclock) * 1000; crtc 1258 drivers/video/fbdev/uvesafb.c crtc->refresh_rate = (u16)(100 * (crtc->pixel_clock / crtc 1259 drivers/video/fbdev/uvesafb.c (crtc->vert_total * crtc->horiz_total))); crtc 1262 drivers/video/fbdev/uvesafb.c crtc->flags |= 0x1; crtc 1264 drivers/video/fbdev/uvesafb.c crtc->flags |= 0x2; crtc 1266 drivers/video/fbdev/uvesafb.c crtc->flags |= 0x4; crtc 1268 drivers/video/fbdev/uvesafb.c crtc->flags |= 0x8; crtc 1269 drivers/video/fbdev/uvesafb.c memcpy(&par->crtc, crtc, sizeof(*crtc)); crtc 1271 drivers/video/fbdev/uvesafb.c memset(&par->crtc, 0, sizeof(*crtc)); crtc 1275 drivers/video/fbdev/uvesafb.c task->buf = &par->crtc; crtc 1283 drivers/video/fbdev/uvesafb.c if (crtc != NULL) { crtc 1287 drivers/video/fbdev/uvesafb.c kfree(crtc); crtc 1288 drivers/video/fbdev/uvesafb.c crtc = NULL; crtc 1321 drivers/video/fbdev/uvesafb.c kfree(crtc); crtc 63 drivers/video/fbdev/vga16fb.c u8 crtc[VGA_CRT_C]; crtc 385 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_H_TOTAL] = xtotal - 5; crtc 386 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_H_BLANK_START] = xres - 1; crtc 387 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_H_DISP] = xres - 1; crtc 389 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_H_SYNC_START] = pos; crtc 391 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_H_SYNC_END] = pos & 0x1F; crtc 393 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_H_BLANK_END] = (pos & 0x1F) | 0x80; crtc 395 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_H_SYNC_END] |= 0x80; crtc 440 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_V_TOTAL] = ytotal - 2; crtc 444 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_PRESET_ROW] = 0; crtc 445 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_MAX_SCAN] = 0x40; /* 1 scanline, no linecmp */ crtc 447 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_MAX_SCAN] |= 0x80; crtc 448 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_CURSOR_START] = 0x20; crtc 449 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_CURSOR_END] = 0x00; crtc 453 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_START_HI] = pos >> 8; crtc 454 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_START_LO] = pos & 0xFF; crtc 455 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_CURSOR_HI] = 0x00; crtc 456 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_CURSOR_LO] = 0x00; crtc 458 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_V_DISP_END] = pos & 0xFF; crtc 459 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_V_BLANK_START] = pos & 0xFF; crtc 464 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_MAX_SCAN] |= 0x20; /* BLANK_START */ crtc 467 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_V_SYNC_START] = pos & 0xFF; crtc 473 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_V_SYNC_END] = (pos & 0x0F) & ~0x10; /* disabled IRQ */ crtc 475 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_V_BLANK_END] = pos & 0xFF; /* 0x7F for original VGA, crtc 479 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_OFFSET] = vxres >> 1; crtc 481 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_UNDERLINE] = 0x5F; /* 256, cfb8 */ crtc 483 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_UNDERLINE] = 0x1F; /* 16, vgap */ crtc 484 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_MODE] = rMode | ((mode & MODE_TEXT) ? 0xA3 : 0xE3); crtc 485 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_LINE_COMPARE] = 0xFF; crtc 486 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_OVERFLOW] = r7; crtc 575 drivers/video/fbdev/vga16fb.c par->crtc[VGA_CRTC_MAX_SCAN] = (par->crtc[VGA_CRTC_MAX_SCAN] crtc 606 drivers/video/fbdev/vga16fb.c vga_io_wcrt(VGA_CRTC_V_SYNC_END, par->crtc[VGA_CRTC_V_SYNC_END]); crtc 610 drivers/video/fbdev/vga16fb.c vga_io_wcrt(i, par->crtc[i]); crtc 308 drivers/video/fbdev/via/share.h struct via_display_timing crtc; crtc 28 drivers/video/vgastate.c __u8 *crtc; crtc 239 drivers/video/vgastate.c saved->crtc[i] = vga_rcrtcs(state->vgabase, iobase, i); crtc 286 drivers/video/vgastate.c vga_wcrtcs(state->vgabase, iobase, 17, saved->crtc[17] & ~0x80); crtc 288 drivers/video/vgastate.c vga_wcrtcs(state->vgabase, iobase, i, saved->crtc[i]); crtc 389 drivers/video/vgastate.c saved->crtc = saved->attr + state->num_attr; crtc 390 drivers/video/vgastate.c saved->gfx = saved->crtc + state->num_crtc; crtc 76 include/drm/drm_atomic.h struct drm_crtc *crtc; crtc 438 include/drm/drm_atomic.h struct drm_crtc *crtc); crtc 482 include/drm/drm_atomic.h struct drm_crtc *crtc) crtc 484 include/drm/drm_atomic.h return state->crtcs[drm_crtc_index(crtc)].state; crtc 497 include/drm/drm_atomic.h struct drm_crtc *crtc) crtc 499 include/drm/drm_atomic.h return state->crtcs[drm_crtc_index(crtc)].old_state; crtc 511 include/drm/drm_atomic.h struct drm_crtc *crtc) crtc 513 include/drm/drm_atomic.h return state->crtcs[drm_crtc_index(crtc)].new_state; crtc 665 include/drm/drm_atomic.h struct drm_crtc *crtc); crtc 668 include/drm/drm_atomic.h struct drm_crtc *crtc); crtc 751 include/drm/drm_atomic.h #define for_each_oldnew_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \ crtc 756 include/drm/drm_atomic.h ((crtc) = (__state)->crtcs[__i].ptr, \ crtc 771 include/drm/drm_atomic.h #define for_each_old_crtc_in_state(__state, crtc, old_crtc_state, __i) \ crtc 776 include/drm/drm_atomic.h ((crtc) = (__state)->crtcs[__i].ptr, \ crtc 790 include/drm/drm_atomic.h #define for_each_new_crtc_in_state(__state, crtc, new_crtc_state, __i) \ crtc 795 include/drm/drm_atomic.h ((crtc) = (__state)->crtcs[__i].ptr, \ crtc 111 include/drm/drm_atomic_helper.h struct drm_crtc *crtc, crtc 135 include/drm/drm_atomic_helper.h int drm_atomic_helper_page_flip(struct drm_crtc *crtc, crtc 141 include/drm/drm_atomic_helper.h struct drm_crtc *crtc, crtc 147 include/drm/drm_atomic_helper.h int drm_atomic_helper_legacy_gamma_set(struct drm_crtc *crtc, crtc 163 include/drm/drm_atomic_helper.h #define drm_atomic_crtc_for_each_plane(plane, crtc) \ crtc 164 include/drm/drm_atomic_helper.h drm_for_each_plane_mask(plane, (crtc)->dev, (crtc)->state->plane_mask) crtc 221 include/drm/drm_atomic_helper.h WARN_ON((new_plane_state->crtc == NULL && new_plane_state->fb != NULL) || crtc 222 include/drm/drm_atomic_helper.h (new_plane_state->crtc != NULL && new_plane_state->fb == NULL)); crtc 224 include/drm/drm_atomic_helper.h return old_plane_state->crtc && !new_plane_state->crtc; crtc 40 include/drm/drm_atomic_state_helper.h void __drm_atomic_helper_crtc_reset(struct drm_crtc *crtc, crtc 42 include/drm/drm_atomic_state_helper.h void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc); crtc 43 include/drm/drm_atomic_state_helper.h void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, crtc 46 include/drm/drm_atomic_state_helper.h drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc); crtc 48 include/drm/drm_atomic_state_helper.h void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc, crtc 49 include/drm/drm_atomic_uapi.h struct drm_crtc *crtc); crtc 56 include/drm/drm_atomic_uapi.h struct drm_crtc *crtc); crtc 170 include/drm/drm_client.h modeset = (client)->modesets; modeset->crtc; modeset++) crtc 34 include/drm/drm_color_mgmt.h void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, crtc 39 include/drm/drm_color_mgmt.h int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc, crtc 535 include/drm/drm_connector.h struct drm_crtc *crtc; crtc 102 include/drm/drm_crtc.h struct drm_crtc *crtc; crtc 401 include/drm/drm_crtc.h void (*reset)(struct drm_crtc *crtc); crtc 424 include/drm/drm_crtc.h int (*cursor_set)(struct drm_crtc *crtc, struct drm_file *file_priv, crtc 446 include/drm/drm_crtc.h int (*cursor_set2)(struct drm_crtc *crtc, struct drm_file *file_priv, crtc 466 include/drm/drm_crtc.h int (*cursor_move)(struct drm_crtc *crtc, int x, int y); crtc 481 include/drm/drm_crtc.h int (*gamma_set)(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b, crtc 492 include/drm/drm_crtc.h void (*destroy)(struct drm_crtc *crtc); crtc 564 include/drm/drm_crtc.h int (*page_flip)(struct drm_crtc *crtc, crtc 583 include/drm/drm_crtc.h int (*page_flip_target)(struct drm_crtc *crtc, crtc 603 include/drm/drm_crtc.h int (*set_property)(struct drm_crtc *crtc, crtc 637 include/drm/drm_crtc.h struct drm_crtc_state *(*atomic_duplicate_state)(struct drm_crtc *crtc); crtc 647 include/drm/drm_crtc.h void (*atomic_destroy_state)(struct drm_crtc *crtc, crtc 692 include/drm/drm_crtc.h int (*atomic_set_property)(struct drm_crtc *crtc, crtc 714 include/drm/drm_crtc.h int (*atomic_get_property)(struct drm_crtc *crtc, crtc 732 include/drm/drm_crtc.h int (*late_register)(struct drm_crtc *crtc); crtc 743 include/drm/drm_crtc.h void (*early_unregister)(struct drm_crtc *crtc); crtc 772 include/drm/drm_crtc.h int (*set_crc_source)(struct drm_crtc *crtc, const char *source); crtc 788 include/drm/drm_crtc.h int (*verify_crc_source)(struct drm_crtc *crtc, const char *source, crtc 810 include/drm/drm_crtc.h const char *const *(*get_crc_sources)(struct drm_crtc *crtc, crtc 849 include/drm/drm_crtc.h u32 (*get_vblank_counter)(struct drm_crtc *crtc); crtc 862 include/drm/drm_crtc.h int (*enable_vblank)(struct drm_crtc *crtc); crtc 870 include/drm/drm_crtc.h void (*disable_vblank)(struct drm_crtc *crtc); crtc 1131 include/drm/drm_crtc.h struct drm_crtc *crtc; crtc 1145 include/drm/drm_crtc.h struct drm_crtc *crtc, crtc 1150 include/drm/drm_crtc.h void drm_crtc_cleanup(struct drm_crtc *crtc); crtc 1159 include/drm/drm_crtc.h static inline unsigned int drm_crtc_index(const struct drm_crtc *crtc) crtc 1161 include/drm/drm_crtc.h return crtc->index; crtc 1171 include/drm/drm_crtc.h static inline uint32_t drm_crtc_mask(const struct drm_crtc *crtc) crtc 1173 include/drm/drm_crtc.h return 1 << drm_crtc_index(crtc); crtc 1205 include/drm/drm_crtc.h #define drm_for_each_crtc(crtc, dev) \ crtc 1206 include/drm/drm_crtc.h list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head) crtc 49 include/drm/drm_crtc_helper.h bool drm_crtc_helper_set_mode(struct drm_crtc *crtc, crtc 53 include/drm/drm_crtc_helper.h bool drm_helper_crtc_in_use(struct drm_crtc *crtc); crtc 64 include/drm/drm_debugfs_crc.h int drm_crtc_add_crc_entry(struct drm_crtc *crtc, bool has_frame, crtc 67 include/drm/drm_debugfs_crc.h static inline int drm_crtc_add_crc_entry(struct drm_crtc *crtc, bool has_frame, crtc 1294 include/drm/drm_dp_helper.h struct drm_crtc *crtc; crtc 1384 include/drm/drm_dp_helper.h int drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc); crtc 174 include/drm/drm_encoder.h struct drm_crtc *crtc; crtc 220 include/drm/drm_encoder.h struct drm_crtc *crtc) crtc 222 include/drm/drm_encoder.h return !!(encoder->possible_crtcs & drm_crtc_mask(crtc)); crtc 38 include/drm/drm_modeset_helper.h int drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, crtc 78 include/drm/drm_modeset_helper_vtables.h void (*dpms)(struct drm_crtc *crtc, int mode); crtc 93 include/drm/drm_modeset_helper_vtables.h void (*prepare)(struct drm_crtc *crtc); crtc 108 include/drm/drm_modeset_helper_vtables.h void (*commit)(struct drm_crtc *crtc); crtc 141 include/drm/drm_modeset_helper_vtables.h enum drm_mode_status (*mode_valid)(struct drm_crtc *crtc, crtc 187 include/drm/drm_modeset_helper_vtables.h bool (*mode_fixup)(struct drm_crtc *crtc, crtc 206 include/drm/drm_modeset_helper_vtables.h int (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode, crtc 231 include/drm/drm_modeset_helper_vtables.h void (*mode_set_nofb)(struct drm_crtc *crtc); crtc 250 include/drm/drm_modeset_helper_vtables.h int (*mode_set_base)(struct drm_crtc *crtc, int x, int y, crtc 267 include/drm/drm_modeset_helper_vtables.h int (*mode_set_base_atomic)(struct drm_crtc *crtc, crtc 302 include/drm/drm_modeset_helper_vtables.h void (*disable)(struct drm_crtc *crtc); crtc 355 include/drm/drm_modeset_helper_vtables.h int (*atomic_check)(struct drm_crtc *crtc, crtc 376 include/drm/drm_modeset_helper_vtables.h void (*atomic_begin)(struct drm_crtc *crtc, crtc 400 include/drm/drm_modeset_helper_vtables.h void (*atomic_flush)(struct drm_crtc *crtc, crtc 426 include/drm/drm_modeset_helper_vtables.h void (*atomic_enable)(struct drm_crtc *crtc, crtc 451 include/drm/drm_modeset_helper_vtables.h void (*atomic_disable)(struct drm_crtc *crtc, crtc 460 include/drm/drm_modeset_helper_vtables.h static inline void drm_crtc_helper_add(struct drm_crtc *crtc, crtc 463 include/drm/drm_modeset_helper_vtables.h crtc->helper_private = funcs; crtc 522 include/drm/drm_modeset_helper_vtables.h enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, crtc 57 include/drm/drm_plane.h struct drm_crtc *crtc; crtc 265 include/drm/drm_plane.h struct drm_crtc *crtc, struct drm_framebuffer *fb, crtc 613 include/drm/drm_plane.h struct drm_crtc *crtc; crtc 19 include/drm/drm_self_refresh_helper.h int drm_self_refresh_helper_init(struct drm_crtc *crtc); crtc 20 include/drm/drm_self_refresh_helper.h void drm_self_refresh_helper_cleanup(struct drm_crtc *crtc); crtc 52 include/drm/drm_simple_kms_helper.h enum drm_mode_status (*mode_valid)(struct drm_crtc *crtc, crtc 163 include/drm/drm_simple_kms_helper.h struct drm_crtc crtc; crtc 198 include/drm/drm_vblank.h u64 drm_crtc_vblank_count(struct drm_crtc *crtc); crtc 199 include/drm/drm_vblank.h u64 drm_crtc_vblank_count_and_time(struct drm_crtc *crtc, crtc 201 include/drm/drm_vblank.h void drm_crtc_send_vblank_event(struct drm_crtc *crtc, crtc 203 include/drm/drm_vblank.h void drm_crtc_arm_vblank_event(struct drm_crtc *crtc, crtc 209 include/drm/drm_vblank.h bool drm_crtc_handle_vblank(struct drm_crtc *crtc); crtc 210 include/drm/drm_vblank.h int drm_crtc_vblank_get(struct drm_crtc *crtc); crtc 211 include/drm/drm_vblank.h void drm_crtc_vblank_put(struct drm_crtc *crtc); crtc 213 include/drm/drm_vblank.h void drm_crtc_wait_one_vblank(struct drm_crtc *crtc); crtc 214 include/drm/drm_vblank.h void drm_crtc_vblank_off(struct drm_crtc *crtc); crtc 215 include/drm/drm_vblank.h void drm_crtc_vblank_reset(struct drm_crtc *crtc); crtc 216 include/drm/drm_vblank.h void drm_crtc_vblank_on(struct drm_crtc *crtc); crtc 217 include/drm/drm_vblank.h u64 drm_crtc_accurate_vblank_count(struct drm_crtc *crtc); crtc 219 include/drm/drm_vblank.h void drm_crtc_vblank_restore(struct drm_crtc *crtc); crtc 225 include/drm/drm_vblank.h void drm_calc_timestamping_constants(struct drm_crtc *crtc, crtc 227 include/drm/drm_vblank.h wait_queue_head_t *drm_crtc_vblank_waitqueue(struct drm_crtc *crtc); crtc 228 include/drm/drm_vblank.h void drm_crtc_set_max_vblank_count(struct drm_crtc *crtc, crtc 527 include/uapi/drm/drm.h __u32 crtc; crtc 137 include/video/uvesafb.h struct vbe_crtc_ib crtc; crtc 527 tools/include/uapi/drm/drm.h __u32 crtc;