cr1 12 arch/arm/include/asm/hardware/ssp.h unsigned int cr1; cr1 13 arch/arm/include/asm/vfp.h #define FPSCR cr1 cr1 161 arch/arm/mach-sa1100/ssp.c ssp->cr1 = Ser4SSCR1; cr1 177 arch/arm/mach-sa1100/ssp.c Ser4SSCR1 = ssp->cr1; cr1 57 arch/powerpc/include/asm/ppc_asm.h cmpd cr1,r11,r10; \ cr1 58 arch/powerpc/include/asm/ppc_asm.h beq+ cr1,33f; \ cr1 67 arch/powerpc/platforms/52xx/mpc52xx_pci.c u32 cr1; /* PCI + 0x0C */ cr1 302 arch/powerpc/platforms/cell/cbe_thermal.c union spe_reg cr1; cr1 332 arch/powerpc/platforms/cell/cbe_thermal.c cr1.val = 0x0404040404040404ull; cr1 357 arch/powerpc/platforms/cell/cbe_thermal.c out_be64(&pmd_regs->tm_cr1.val, cr1.val); cr1 23 arch/sh/include/cpu-sh5/cpu/registers.h #define SSR cr1 cr1 110 drivers/counter/stm32-timer-cnt.c u32 cr1, sms; cr1 128 drivers/counter/stm32-timer-cnt.c regmap_read(priv->regmap, TIM_CR1, &cr1); cr1 142 drivers/counter/stm32-timer-cnt.c regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, cr1); cr1 153 drivers/counter/stm32-timer-cnt.c u32 cr1; cr1 155 drivers/counter/stm32-timer-cnt.c regmap_read(priv->regmap, TIM_CR1, &cr1); cr1 156 drivers/counter/stm32-timer-cnt.c direction = (cr1 & TIM_CR1_DIR) ? "backward" : "forward"; cr1 199 drivers/counter/stm32-timer-cnt.c u32 cr1; cr1 201 drivers/counter/stm32-timer-cnt.c regmap_read(priv->regmap, TIM_CR1, &cr1); cr1 203 drivers/counter/stm32-timer-cnt.c return scnprintf(buf, PAGE_SIZE, "%d\n", (bool)(cr1 & TIM_CR1_CEN)); cr1 213 drivers/counter/stm32-timer-cnt.c u32 cr1; cr1 221 drivers/counter/stm32-timer-cnt.c regmap_read(priv->regmap, TIM_CR1, &cr1); cr1 222 drivers/counter/stm32-timer-cnt.c if (!(cr1 & TIM_CR1_CEN)) cr1 228 drivers/counter/stm32-timer-cnt.c regmap_read(priv->regmap, TIM_CR1, &cr1); cr1 230 drivers/counter/stm32-timer-cnt.c if (cr1 & TIM_CR1_CEN) cr1 554 drivers/gpu/drm/mcde/mcde_display.c u32 cr0, cr1; cr1 560 drivers/gpu/drm/mcde/mcde_display.c cr1 = MCDE_CRA1; cr1 565 drivers/gpu/drm/mcde/mcde_display.c cr1 = MCDE_CRB1; cr1 589 drivers/gpu/drm/mcde/mcde_display.c writel(val, mcde->regs + cr1); cr1 489 drivers/i2c/busses/i2c-stm32f4.c u32 cr1; cr1 506 drivers/i2c/busses/i2c-stm32f4.c cr1 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR1); cr1 507 drivers/i2c/busses/i2c-stm32f4.c cr1 &= ~(STM32F4_I2C_CR1_ACK | STM32F4_I2C_CR1_POS); cr1 508 drivers/i2c/busses/i2c-stm32f4.c writel_relaxed(cr1, i2c_dev->base + STM32F4_I2C_CR1); cr1 513 drivers/i2c/busses/i2c-stm32f4.c cr1 |= STM32F4_I2C_CR1_STOP; cr1 515 drivers/i2c/busses/i2c-stm32f4.c cr1 |= STM32F4_I2C_CR1_START; cr1 516 drivers/i2c/busses/i2c-stm32f4.c writel_relaxed(cr1, i2c_dev->base + STM32F4_I2C_CR1); cr1 526 drivers/i2c/busses/i2c-stm32f4.c cr1 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR1); cr1 527 drivers/i2c/busses/i2c-stm32f4.c cr1 &= ~STM32F4_I2C_CR1_ACK; cr1 528 drivers/i2c/busses/i2c-stm32f4.c cr1 |= STM32F4_I2C_CR1_POS; cr1 529 drivers/i2c/busses/i2c-stm32f4.c writel_relaxed(cr1, i2c_dev->base + STM32F4_I2C_CR1); cr1 541 drivers/i2c/busses/i2c-stm32f4.c cr1 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR1); cr1 542 drivers/i2c/busses/i2c-stm32f4.c cr1 |= STM32F4_I2C_CR1_ACK; cr1 543 drivers/i2c/busses/i2c-stm32f4.c cr1 &= ~STM32F4_I2C_CR1_POS; cr1 544 drivers/i2c/busses/i2c-stm32f4.c writel_relaxed(cr1, i2c_dev->base + STM32F4_I2C_CR1); cr1 775 drivers/i2c/busses/i2c-stm32f7.c u32 cr1, cr2; cr1 786 drivers/i2c/busses/i2c-stm32f7.c cr1 = readl_relaxed(base + STM32F7_I2C_CR1); cr1 815 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_ERRIE | STM32F7_I2C_CR1_TCIE | cr1 819 drivers/i2c/busses/i2c-stm32f7.c cr1 &= ~(STM32F7_I2C_CR1_RXIE | STM32F7_I2C_CR1_TXIE | cr1 838 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_RXIE; cr1 840 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_TXIE; cr1 843 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_RXDMAEN; cr1 845 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_TXDMAEN; cr1 854 drivers/i2c/busses/i2c-stm32f7.c writel_relaxed(cr1, base + STM32F7_I2C_CR1); cr1 865 drivers/i2c/busses/i2c-stm32f7.c u32 cr1, cr2; cr1 872 drivers/i2c/busses/i2c-stm32f7.c cr1 = readl_relaxed(base + STM32F7_I2C_CR1); cr1 967 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_PECEN; cr1 972 drivers/i2c/busses/i2c-stm32f7.c cr1 &= ~STM32F7_I2C_CR1_PECEN; cr1 981 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_ERRIE | STM32F7_I2C_CR1_TCIE | cr1 985 drivers/i2c/busses/i2c-stm32f7.c cr1 &= ~(STM32F7_I2C_CR1_RXIE | STM32F7_I2C_CR1_TXIE | cr1 1004 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_RXIE; cr1 1006 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_TXIE; cr1 1009 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_RXDMAEN; cr1 1011 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_TXDMAEN; cr1 1020 drivers/i2c/busses/i2c-stm32f7.c writel_relaxed(cr1, base + STM32F7_I2C_CR1); cr1 1030 drivers/i2c/busses/i2c-stm32f7.c u32 cr1, cr2; cr1 1034 drivers/i2c/busses/i2c-stm32f7.c cr1 = readl_relaxed(base + STM32F7_I2C_CR1); cr1 1058 drivers/i2c/busses/i2c-stm32f7.c if (cr1 & STM32F7_I2C_CR1_PECEN) cr1 1068 drivers/i2c/busses/i2c-stm32f7.c cr1 &= ~(STM32F7_I2C_CR1_RXIE | STM32F7_I2C_CR1_TXIE); cr1 1069 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_RXIE; cr1 1076 drivers/i2c/busses/i2c-stm32f7.c cr1 &= ~(STM32F7_I2C_CR1_RXIE | STM32F7_I2C_CR1_TXIE | cr1 1096 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_RXIE; cr1 1098 drivers/i2c/busses/i2c-stm32f7.c cr1 |= STM32F7_I2C_CR1_RXDMAEN; cr1 1104 drivers/i2c/busses/i2c-stm32f7.c writel_relaxed(cr1, base + STM32F7_I2C_CR1); cr1 502 drivers/iio/adc/stm32-dfsdm-adc.c u32 cr1; cr1 558 drivers/iio/adc/stm32-dfsdm-adc.c cr1 = DFSDM_CR1_RCH(chan->channel); cr1 562 drivers/iio/adc/stm32-dfsdm-adc.c cr1 |= DFSDM_CR1_RCONT(1); cr1 564 drivers/iio/adc/stm32-dfsdm-adc.c cr1 |= DFSDM_CR1_RSYNC(fl->sync_mode); cr1 577 drivers/iio/adc/stm32-dfsdm-adc.c cr1 = DFSDM_CR1_JSCAN((adc->nconv > 1) ? 1 : 0); cr1 587 drivers/iio/adc/stm32-dfsdm-adc.c cr1 |= DFSDM_CR1_JSYNC(fl->sync_mode); cr1 591 drivers/iio/adc/stm32-dfsdm-adc.c cr1); cr1 109 drivers/iio/trigger/stm32-timer-trigger.c u32 ccer, cr1; cr1 139 drivers/iio/trigger/stm32-timer-trigger.c regmap_read(priv->regmap, TIM_CR1, &cr1); cr1 140 drivers/iio/trigger/stm32-timer-trigger.c if (!(cr1 & TIM_CR1_CEN)) cr1 167 drivers/iio/trigger/stm32-timer-trigger.c u32 ccer, cr1; cr1 173 drivers/iio/trigger/stm32-timer-trigger.c regmap_read(priv->regmap, TIM_CR1, &cr1); cr1 174 drivers/iio/trigger/stm32-timer-trigger.c if (cr1 & TIM_CR1_CEN) cr1 222 drivers/iio/trigger/stm32-timer-trigger.c u32 psc, arr, cr1; cr1 225 drivers/iio/trigger/stm32-timer-trigger.c regmap_read(priv->regmap, TIM_CR1, &cr1); cr1 229 drivers/iio/trigger/stm32-timer-trigger.c if (cr1 & TIM_CR1_CEN) { cr1 71 drivers/input/touchscreen/mc13783_ts.c int cr0, cr1; cr1 84 drivers/input/touchscreen/mc13783_ts.c cr1 = (priv->sample[3] >> 12) & 0xfff; cr1 88 drivers/input/touchscreen/mc13783_ts.c x0, x1, x2, y0, y1, y2, cr0, cr1); cr1 93 drivers/input/touchscreen/mc13783_ts.c cr0 = (cr0 + cr1) / 2; cr1 1394 drivers/mtd/devices/st_spi_fsm.c uint8_t sr1, cr1, dyb; cr1 1444 drivers/mtd/devices/st_spi_fsm.c stfsm_read_status(fsm, SPINOR_OP_RDCR, &cr1, 1); cr1 1447 drivers/mtd/devices/st_spi_fsm.c if (!(cr1 & STFSM_S25FL_CONFIG_QE)) { cr1 1449 drivers/mtd/devices/st_spi_fsm.c cr1 |= STFSM_S25FL_CONFIG_QE; cr1 1454 drivers/mtd/devices/st_spi_fsm.c if (cr1 & STFSM_S25FL_CONFIG_QE) { cr1 1456 drivers/mtd/devices/st_spi_fsm.c cr1 &= ~STFSM_S25FL_CONFIG_QE; cr1 1463 drivers/mtd/devices/st_spi_fsm.c sta_wr = ((uint16_t)cr1 << 8) | sr1; cr1 959 drivers/parport/parport_pc.c int cr1, cr4, cra, cr23, cr26, cr27; cr1 971 drivers/parport/parport_pc.c cr1 = inb(io + 1); cr1 988 drivers/parport/parport_pc.c cr1, cr4, cra, cr23, cr26, cr27); cr1 1001 drivers/parport/parport_pc.c (cr1 & 4) ? "yes" : "no"); cr1 1004 drivers/parport/parport_pc.c (cr1 & 0x08) ? "Standard mode only (SPP)" cr1 419 drivers/spi/spi-pl022.c u16 cr1; cr1 566 drivers/spi/spi-pl022.c writew(chip->cr1, SSP_CR1(pl022->virtbase)); cr1 1974 drivers/spi/spi-pl022.c chip->cr1 = 0; cr1 2002 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, chip_info->clkdelay, cr1 2012 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, chip_info->wait_state, cr1 2025 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, tmp, SSP_CR1_MASK_RENDN_ST, 4); cr1 2026 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, etx, SSP_CR1_MASK_TENDN_ST, 5); cr1 2027 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, chip_info->rx_lev_trig, cr1 2029 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, chip_info->tx_lev_trig, cr1 2058 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, tmp, SSP_CR1_MASK_LBM, 0); cr1 2060 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, SSP_DISABLED, SSP_CR1_MASK_SSE, 1); cr1 2061 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, chip_info->hierarchy, SSP_CR1_MASK_MS, 2); cr1 2062 drivers/spi/spi-pl022.c SSP_WRITE_BITS(chip->cr1, chip_info->slave_tx_disable, SSP_CR1_MASK_SOD, cr1 954 drivers/spi/spi-pxa2xx.c u32 cr1; cr1 1040 drivers/spi/spi-pxa2xx.c cr1 = chip->cr1 | dma_thresh | drv_data->dma_cr1; cr1 1049 drivers/spi/spi-pxa2xx.c cr1 = chip->cr1 | chip->threshold | drv_data->int_cr1; cr1 1084 drivers/spi/spi-pxa2xx.c != (cr1 & change_mask)) { cr1 1090 drivers/spi/spi-pxa2xx.c pxa2xx_spi_write(drv_data, SSCR1, cr1 & change_mask); cr1 1127 drivers/spi/spi-pxa2xx.c pxa2xx_spi_write(drv_data, SSCR1, cr1); cr1 1317 drivers/spi/spi-pxa2xx.c chip->cr1 = 0; cr1 1329 drivers/spi/spi-pxa2xx.c chip->cr1 = SSCR1_LBM; cr1 1332 drivers/spi/spi-pxa2xx.c chip->cr1 |= SSCR1_SCFR; cr1 1333 drivers/spi/spi-pxa2xx.c chip->cr1 |= SSCR1_SCLKDIR; cr1 1334 drivers/spi/spi-pxa2xx.c chip->cr1 |= SSCR1_SFRMDIR; cr1 1335 drivers/spi/spi-pxa2xx.c chip->cr1 |= SSCR1_SPH; cr1 1376 drivers/spi/spi-pxa2xx.c chip->cr1 &= ~(SSCR1_SPO | SSCR1_SPH); cr1 1377 drivers/spi/spi-pxa2xx.c chip->cr1 |= (((spi->mode & SPI_CPHA) != 0) ? SSCR1_SPH : 0) cr1 1381 drivers/spi/spi-pxa2xx.c chip->cr1 |= SSCR1_LBM; cr1 70 drivers/spi/spi-pxa2xx.h u32 cr1; cr1 466 drivers/spi/spi-rockchip.c u32 cr1; cr1 484 drivers/spi/spi-rockchip.c cr1 = xfer->len - 1; cr1 488 drivers/spi/spi-rockchip.c cr1 = xfer->len - 1; cr1 492 drivers/spi/spi-rockchip.c cr1 = xfer->len / 2 - 1; cr1 510 drivers/spi/spi-rockchip.c writel_relaxed(cr1, rs->regs + ROCKCHIP_SPI_CTRLR1); cr1 78 drivers/spi/spi-sh.c unsigned long cr1; cr1 188 drivers/spi/spi-sh.c ss->cr1 &= ~SPI_SH_TBE; cr1 191 drivers/spi/spi-sh.c ss->cr1 & SPI_SH_TBE, cr1 193 drivers/spi/spi-sh.c if (ret == 0 && !(ss->cr1 & SPI_SH_TBE)) { cr1 204 drivers/spi/spi-sh.c ss->cr1 &= ~SPI_SH_TBE; cr1 207 drivers/spi/spi-sh.c ss->cr1 & SPI_SH_TBE, cr1 209 drivers/spi/spi-sh.c if (ret == 0 && (ss->cr1 & SPI_SH_TBE)) { cr1 240 drivers/spi/spi-sh.c ss->cr1 &= ~SPI_SH_RBF; cr1 243 drivers/spi/spi-sh.c ss->cr1 & SPI_SH_RBF, cr1 394 drivers/spi/spi-sh.c unsigned long cr1; cr1 396 drivers/spi/spi-sh.c cr1 = spi_sh_read(ss, SPI_SH_CR1); cr1 397 drivers/spi/spi-sh.c if (cr1 & SPI_SH_TBE) cr1 398 drivers/spi/spi-sh.c ss->cr1 |= SPI_SH_TBE; cr1 399 drivers/spi/spi-sh.c if (cr1 & SPI_SH_TBF) cr1 400 drivers/spi/spi-sh.c ss->cr1 |= SPI_SH_TBF; cr1 401 drivers/spi/spi-sh.c if (cr1 & SPI_SH_RBE) cr1 402 drivers/spi/spi-sh.c ss->cr1 |= SPI_SH_RBE; cr1 403 drivers/spi/spi-sh.c if (cr1 & SPI_SH_RBF) cr1 404 drivers/spi/spi-sh.c ss->cr1 |= SPI_SH_RBF; cr1 406 drivers/spi/spi-sh.c if (ss->cr1) { cr1 407 drivers/spi/spi-sh.c spi_sh_clear_bit(ss, ss->cr1, SPI_SH_CR4); cr1 709 drivers/spi/spi-stm32.c u32 cr1, sr; cr1 715 drivers/spi/spi-stm32.c cr1 = readl_relaxed(spi->base + STM32H7_SPI_CR1); cr1 717 drivers/spi/spi-stm32.c if (!(cr1 & STM32H7_SPI_CR1_SPE)) { cr1 726 drivers/spi/spi-stm32.c if (cr1 & STM32H7_SPI_CR1_CSTART) { cr1 727 drivers/spi/spi-stm32.c writel_relaxed(cr1 | STM32H7_SPI_CR1_CSUSP, cr1 248 drivers/staging/media/imx/imx7-media-csi.c u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); cr1 250 drivers/staging/media/imx/imx7-media-csi.c cr1 |= BIT_SOF_INTEN; cr1 251 drivers/staging/media/imx/imx7-media-csi.c cr1 |= BIT_RFF_OR_INT; cr1 254 drivers/staging/media/imx/imx7-media-csi.c cr1 |= BIT_FB1_DMA_DONE_INTEN; cr1 255 drivers/staging/media/imx/imx7-media-csi.c cr1 |= BIT_FB2_DMA_DONE_INTEN; cr1 257 drivers/staging/media/imx/imx7-media-csi.c cr1 |= BIT_EOF_INT_EN; cr1 259 drivers/staging/media/imx/imx7-media-csi.c imx7_csi_reg_write(csi, cr1, CSI_CSICR1); cr1 264 drivers/staging/media/imx/imx7-media-csi.c u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); cr1 266 drivers/staging/media/imx/imx7-media-csi.c cr1 &= ~BIT_SOF_INTEN; cr1 267 drivers/staging/media/imx/imx7-media-csi.c cr1 &= ~BIT_RFF_OR_INT; cr1 268 drivers/staging/media/imx/imx7-media-csi.c cr1 &= ~BIT_FB1_DMA_DONE_INTEN; cr1 269 drivers/staging/media/imx/imx7-media-csi.c cr1 &= ~BIT_FB2_DMA_DONE_INTEN; cr1 270 drivers/staging/media/imx/imx7-media-csi.c cr1 &= ~BIT_EOF_INT_EN; cr1 272 drivers/staging/media/imx/imx7-media-csi.c imx7_csi_reg_write(csi, cr1, CSI_CSICR1); cr1 304 drivers/staging/media/imx/imx7-media-csi.c u32 cr1; cr1 306 drivers/staging/media/imx/imx7-media-csi.c cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); cr1 307 drivers/staging/media/imx/imx7-media-csi.c imx7_csi_reg_write(csi, cr1 & ~BIT_FCC, CSI_CSICR1); cr1 308 drivers/staging/media/imx/imx7-media-csi.c cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); cr1 309 drivers/staging/media/imx/imx7-media-csi.c imx7_csi_reg_write(csi, cr1 | BIT_CLR_RXFIFO, CSI_CSICR1); cr1 311 drivers/staging/media/imx/imx7-media-csi.c cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); cr1 312 drivers/staging/media/imx/imx7-media-csi.c imx7_csi_reg_write(csi, cr1 | BIT_FCC, CSI_CSICR1); cr1 767 drivers/staging/media/imx/imx7-media-csi.c u32 cr1, cr18; cr1 796 drivers/staging/media/imx/imx7-media-csi.c cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); cr1 797 drivers/staging/media/imx/imx7-media-csi.c cr1 &= ~BIT_GCLK_MODE; cr1 817 drivers/staging/media/imx/imx7-media-csi.c cr1 |= BIT_PIXEL_BIT; cr1 823 drivers/staging/media/imx/imx7-media-csi.c imx7_csi_reg_write(csi, cr1, CSI_CSICR1); cr1 337 drivers/tty/serial/fsl_linflexuart.c unsigned long cr, ier, cr1; cr1 351 drivers/tty/serial/fsl_linflexuart.c cr1 = LINFLEXD_LINCR1_BF | LINFLEXD_LINCR1_MME cr1 353 drivers/tty/serial/fsl_linflexuart.c writel(cr1, sport->membase + LINCR1); cr1 377 drivers/tty/serial/fsl_linflexuart.c cr1 &= ~(LINFLEXD_LINCR1_INIT); cr1 379 drivers/tty/serial/fsl_linflexuart.c writel(cr1, sport->membase + LINCR1); cr1 427 drivers/tty/serial/fsl_linflexuart.c unsigned long cr, old_cr, cr1; cr1 434 drivers/tty/serial/fsl_linflexuart.c cr1 = readl(port->membase + LINCR1); cr1 435 drivers/tty/serial/fsl_linflexuart.c cr1 |= LINFLEXD_LINCR1_INIT; cr1 436 drivers/tty/serial/fsl_linflexuart.c writel(cr1, port->membase + LINCR1); cr1 527 drivers/tty/serial/fsl_linflexuart.c cr1 &= ~(LINFLEXD_LINCR1_INIT); cr1 529 drivers/tty/serial/fsl_linflexuart.c writel(cr1, port->membase + LINCR1); cr1 1633 drivers/tty/serial/fsl_lpuart.c unsigned char cr1, old_cr1, old_cr2, cr3, cr4, bdh, modem; cr1 1638 drivers/tty/serial/fsl_lpuart.c cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); cr1 1661 drivers/tty/serial/fsl_lpuart.c cr1 = old_cr1 & ~UARTCR1_M; cr1 1668 drivers/tty/serial/fsl_lpuart.c cr1 |= UARTCR1_M; cr1 1691 drivers/tty/serial/fsl_lpuart.c cr1 &= ~UARTCR1_PE; cr1 1697 drivers/tty/serial/fsl_lpuart.c cr1 |= UARTCR1_PE; cr1 1699 drivers/tty/serial/fsl_lpuart.c cr1 |= UARTCR1_M; cr1 1701 drivers/tty/serial/fsl_lpuart.c cr1 |= UARTCR1_PT; cr1 1703 drivers/tty/serial/fsl_lpuart.c cr1 &= ~UARTCR1_PT; cr1 1706 drivers/tty/serial/fsl_lpuart.c cr1 &= ~UARTCR1_PE; cr1 1766 drivers/tty/serial/fsl_lpuart.c writeb(cr1, sport->port.membase + UARTCR1); cr1 66 drivers/tty/serial/stm32-usart.c static void stm32_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE, cr1 74 drivers/tty/serial/stm32-usart.c over8 = *cr1 & USART_CR1_OVER8; cr1 86 drivers/tty/serial/stm32-usart.c *cr1 |= rs485_deat_dedt; cr1 98 drivers/tty/serial/stm32-usart.c *cr1 |= rs485_deat_dedt; cr1 107 drivers/tty/serial/stm32-usart.c u32 usartdiv, baud, cr1, cr3; cr1 110 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); cr1 117 drivers/tty/serial/stm32-usart.c cr1 = readl_relaxed(port->membase + ofs->cr1); cr1 121 drivers/tty/serial/stm32-usart.c over8 = cr1 & USART_CR1_OVER8; cr1 128 drivers/tty/serial/stm32-usart.c stm32_config_reg_rs485(&cr1, &cr3, cr1 141 drivers/tty/serial/stm32-usart.c writel_relaxed(cr1, port->membase + ofs->cr1); cr1 144 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, cr1 148 drivers/tty/serial/stm32-usart.c stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); cr1 311 drivers/tty/serial/stm32-usart.c stm32_set_bits(port, ofs->cr1, USART_CR1_TXEIE); cr1 322 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); cr1 550 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); cr1 565 drivers/tty/serial/stm32-usart.c stm32_set_bits(port, ofs->cr1, stm32_port->cr1_irq); cr1 578 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); cr1 620 drivers/tty/serial/stm32-usart.c stm32_set_bits(port, ofs->cr1, val); cr1 646 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, val); cr1 691 drivers/tty/serial/stm32-usart.c u32 cr1, cr2, cr3; cr1 702 drivers/tty/serial/stm32-usart.c writel_relaxed(0, port->membase + ofs->cr1); cr1 709 drivers/tty/serial/stm32-usart.c cr1 = USART_CR1_TE | USART_CR1_RE; cr1 711 drivers/tty/serial/stm32-usart.c cr1 |= USART_CR1_FIFOEN; cr1 725 drivers/tty/serial/stm32-usart.c cr1 |= USART_CR1_PCE; cr1 736 drivers/tty/serial/stm32-usart.c cr1 |= USART_CR1_M0; cr1 738 drivers/tty/serial/stm32-usart.c cr1 |= USART_CR1_M1; cr1 759 drivers/tty/serial/stm32-usart.c cr1 |= stm32_port->cr1_irq; cr1 763 drivers/tty/serial/stm32-usart.c cr1 |= USART_CR1_PS; cr1 781 drivers/tty/serial/stm32-usart.c cr1 |= USART_CR1_OVER8; cr1 782 drivers/tty/serial/stm32-usart.c stm32_set_bits(port, ofs->cr1, USART_CR1_OVER8); cr1 785 drivers/tty/serial/stm32-usart.c cr1 &= ~USART_CR1_OVER8; cr1 786 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, USART_CR1_OVER8); cr1 823 drivers/tty/serial/stm32-usart.c stm32_config_reg_rs485(&cr1, &cr3, cr1 836 drivers/tty/serial/stm32-usart.c cr1 &= ~(USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK); cr1 841 drivers/tty/serial/stm32-usart.c writel_relaxed(cr1, port->membase + ofs->cr1); cr1 843 drivers/tty/serial/stm32-usart.c stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); cr1 889 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); cr1 1277 drivers/tty/serial/stm32-usart.c old_cr1 = readl_relaxed(port->membase + ofs->cr1); cr1 1280 drivers/tty/serial/stm32-usart.c writel_relaxed(new_cr1, port->membase + ofs->cr1); cr1 1285 drivers/tty/serial/stm32-usart.c writel_relaxed(old_cr1, port->membase + ofs->cr1); cr1 1357 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); cr1 1358 drivers/tty/serial/stm32-usart.c stm32_set_bits(port, ofs->cr1, USART_CR1_UESM); cr1 1364 drivers/tty/serial/stm32-usart.c stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); cr1 1366 drivers/tty/serial/stm32-usart.c stm32_clr_bits(port, ofs->cr1, USART_CR1_UESM); cr1 12 drivers/tty/serial/stm32-usart.h u8 cr1; cr1 47 drivers/tty/serial/stm32-usart.h .cr1 = 0x0c, cr1 64 drivers/tty/serial/stm32-usart.h .cr1 = 0x00, cr1 85 drivers/tty/serial/stm32-usart.h .cr1 = 0x00, cr1 1220 fs/btrfs/send.c struct clone_root *cr1 = (struct clone_root *)e1; cr1 1223 fs/btrfs/send.c if (cr1->root->root_key.objectid < cr2->root->root_key.objectid) cr1 1225 fs/btrfs/send.c if (cr1->root->root_key.objectid > cr2->root->root_key.objectid) cr1 2747 fs/cifs/cifspdu.h char cr1; /* \n */ cr1 2167 fs/nfsd/nfs4state.c same_creds(struct svc_cred *cr1, struct svc_cred *cr2) cr1 2169 fs/nfsd/nfs4state.c if ((is_gss_cred(cr1) != is_gss_cred(cr2)) cr1 2170 fs/nfsd/nfs4state.c || (!uid_eq(cr1->cr_uid, cr2->cr_uid)) cr1 2171 fs/nfsd/nfs4state.c || (!gid_eq(cr1->cr_gid, cr2->cr_gid)) cr1 2172 fs/nfsd/nfs4state.c || !groups_equal(cr1->cr_group_info, cr2->cr_group_info)) cr1 2175 fs/nfsd/nfs4state.c if (cr1->cr_principal == cr2->cr_principal) cr1 2177 fs/nfsd/nfs4state.c if (!cr1->cr_principal || !cr2->cr_principal) cr1 2179 fs/nfsd/nfs4state.c return 0 == strcmp(cr1->cr_principal, cr2->cr_principal); cr1 47 sound/soc/pxa/pxa-ssp.c uint32_t cr1; cr1 145 sound/soc/pxa/pxa-ssp.c priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1); cr1 164 sound/soc/pxa/pxa-ssp.c __raw_writel(priv->cr1, ssp->mmio_base + SSCR1); cr1 339 sound/soc/stm/stm32_sai_sub.c int ret, cr1, mask; cr1 347 sound/soc/stm/stm32_sai_sub.c cr1 = SAI_XCR1_MCKDIV_SET(div); cr1 348 sound/soc/stm/stm32_sai_sub.c ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, mask, cr1); cr1 647 sound/soc/stm/stm32_sai_sub.c int cr1, frcr = 0; cr1 654 sound/soc/stm/stm32_sai_sub.c cr1 = SAI_XCR1_NODIV; cr1 659 sound/soc/stm/stm32_sai_sub.c cr1 |= SAI_XCR1_PRTCFG_SET(SAI_SPDIF_PROTOCOL); cr1 663 sound/soc/stm/stm32_sai_sub.c cr1 |= SAI_XCR1_PRTCFG_SET(SAI_FREE_PROTOCOL); cr1 668 sound/soc/stm/stm32_sai_sub.c cr1 |= SAI_XCR1_CKSTR; cr1 700 sound/soc/stm/stm32_sai_sub.c cr1 ^= SAI_XCR1_CKSTR; cr1 707 sound/soc/stm/stm32_sai_sub.c cr1 ^= SAI_XCR1_CKSTR; cr1 724 sound/soc/stm/stm32_sai_sub.c cr1 |= SAI_XCR1_SLAVE; cr1 739 sound/soc/stm/stm32_sai_sub.c cr1 |= SAI_XCR1_SLAVE; cr1 746 sound/soc/stm/stm32_sai_sub.c ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, cr1_mask, cr1); cr1 809 sound/soc/stm/stm32_sai_sub.c int cr1, cr1_mask, ret; cr1 831 sound/soc/stm/stm32_sai_sub.c cr1 = SAI_XCR1_DS_SET(SAI_DATASIZE_8); cr1 834 sound/soc/stm/stm32_sai_sub.c cr1 = SAI_XCR1_DS_SET(SAI_DATASIZE_16); cr1 837 sound/soc/stm/stm32_sai_sub.c cr1 = SAI_XCR1_DS_SET(SAI_DATASIZE_32); cr1 846 sound/soc/stm/stm32_sai_sub.c cr1 |= SAI_XCR1_MONO; cr1 848 sound/soc/stm/stm32_sai_sub.c ret = stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, cr1_mask, cr1); cr1 991 sound/soc/stm/stm32_sai_sub.c int div = 0, cr1 = 0; cr1 1039 sound/soc/stm/stm32_sai_sub.c cr1 = SAI_XCR1_OSR; cr1 1049 sound/soc/stm/stm32_sai_sub.c SAI_XCR1_OSR, cr1); cr1 1181 sound/soc/stm/stm32_sai_sub.c int cr1 = 0, cr1_mask, ret; cr1 1208 sound/soc/stm/stm32_sai_sub.c cr1 |= SAI_XCR1_RX_TX; cr1 1220 sound/soc/stm/stm32_sai_sub.c cr1 |= SAI_XCR1_SYNCEN_SET(sai->sync); cr1 1222 sound/soc/stm/stm32_sai_sub.c return stm32_sai_sub_reg_up(sai, STM_SAI_CR1_REGX, cr1_mask, cr1); cr1 57 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h cmpd cr1,r11,r10; \ cr1 58 tools/testing/selftests/powerpc/primitives/asm/ppc_asm.h beq+ cr1,33f; \