cpuid_feature_extract_unsigned_field 481 arch/arm64/include/asm/cpufeature.h return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 || cpuid_feature_extract_unsigned_field 482 arch/arm64/include/asm/cpufeature.h cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1; cpuid_feature_extract_unsigned_field 487 arch/arm64/include/asm/cpufeature.h u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL0_SHIFT); cpuid_feature_extract_unsigned_field 494 arch/arm64/include/asm/cpufeature.h u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_SVE_SHIFT); cpuid_feature_extract_unsigned_field 520 arch/arm64/include/asm/cpufeature.h val = cpuid_feature_extract_unsigned_field(mmfr0, cpuid_feature_extract_unsigned_field 532 arch/arm64/include/asm/cpufeature.h val = cpuid_feature_extract_unsigned_field(mmfr0, cpuid_feature_extract_unsigned_field 544 arch/arm64/include/asm/cpufeature.h val = cpuid_feature_extract_unsigned_field(mmfr0, cpuid_feature_extract_unsigned_field 561 arch/arm64/include/asm/cpufeature.h val = cpuid_feature_extract_unsigned_field(mmfr0, cpuid_feature_extract_unsigned_field 144 arch/arm64/include/asm/hw_breakpoint.h cpuid_feature_extract_unsigned_field(dfr0, cpuid_feature_extract_unsigned_field 153 arch/arm64/include/asm/hw_breakpoint.h cpuid_feature_extract_unsigned_field(dfr0, cpuid_feature_extract_unsigned_field 418 arch/arm64/include/asm/kvm_mmu.h return (cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR1_VMIDBITS_SHIFT) == 2) ? 16 : 8; cpuid_feature_extract_unsigned_field 134 arch/arm64/kernel/alternative.c d_size = 4 << cpuid_feature_extract_unsigned_field(ctr_el0, cpuid_feature_extract_unsigned_field 602 arch/arm64/kernel/cpu_errata.c if (cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64PFR0_EL1), cpuid_feature_extract_unsigned_field 1691 arch/arm64/kernel/cpufeature.c return cpuid_feature_extract_unsigned_field(mvfr1, MVFR1_SIMDSP_SHIFT) && cpuid_feature_extract_unsigned_field 1692 arch/arm64/kernel/cpufeature.c cpuid_feature_extract_unsigned_field(mvfr1, MVFR1_SIMDINT_SHIFT) && cpuid_feature_extract_unsigned_field 1693 arch/arm64/kernel/cpufeature.c cpuid_feature_extract_unsigned_field(mvfr1, MVFR1_SIMDLS_SHIFT); cpuid_feature_extract_unsigned_field 30 arch/arm64/kernel/debug-monitors.c return cpuid_feature_extract_unsigned_field(read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1), cpuid_feature_extract_unsigned_field 971 arch/arm64/kernel/perf_event.c pmuver = cpuid_feature_extract_unsigned_field(dfr0, cpuid_feature_extract_unsigned_field 96 arch/arm64/kvm/hyp/debug-sr.c if (!cpuid_feature_extract_unsigned_field(read_sysreg(id_aa64dfr0_el1), cpuid_feature_extract_unsigned_field 1662 arch/arm64/kvm/sys_regs.c u32 el3 = !!cpuid_feature_extract_unsigned_field(pfr, ID_AA64PFR0_EL3_SHIFT); cpuid_feature_extract_unsigned_field 46 arch/arm64/mm/context.c int fld = cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64MMFR0_EL1), cpuid_feature_extract_unsigned_field 932 drivers/perf/arm_spe_pmu.c fld = cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64DFR0_EL1),