cpsw_sl_reg_read  266 drivers/net/ethernet/ti/cpsw_sl.c 	} while ((cpsw_sl_reg_read(sl, CPSW_SL_SOFT_RESET) &
cpsw_sl_reg_read  270 drivers/net/ethernet/ti/cpsw_sl.c 	if (cpsw_sl_reg_read(sl, CPSW_SL_SOFT_RESET) & CPSW_SL_SOFT_RESET_BIT)
cpsw_sl_reg_read  284 drivers/net/ethernet/ti/cpsw_sl.c 	val = cpsw_sl_reg_read(sl, CPSW_SL_MACCONTROL);
cpsw_sl_reg_read  301 drivers/net/ethernet/ti/cpsw_sl.c 	val = cpsw_sl_reg_read(sl, CPSW_SL_MACCONTROL);
cpsw_sl_reg_read  319 drivers/net/ethernet/ti/cpsw_sl.c 	} while (!(cpsw_sl_reg_read(sl, CPSW_SL_MACSTATUS) &
cpsw_sl_reg_read  322 drivers/net/ethernet/ti/cpsw_sl.c 	if (!(cpsw_sl_reg_read(sl, CPSW_SL_MACSTATUS) & sl->idle_mask)) {
cpsw_sl_reg_read   70 drivers/net/ethernet/ti/cpsw_sl.h u32 cpsw_sl_reg_read(struct cpsw_sl *sl, enum cpsw_sl_regs reg);