controller_id     102 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 			adev->pm.pm_display_cfg.displays[i].controller_id = dc_cfg->pipe_idx + 1;
controller_id     829 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	enum controller_id id,
controller_id     842 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	enum controller_id controller_id,
controller_id     850 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.enable_disp_power_gating(bp, controller_id,
controller_id    1079 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	enum controller_id id,
controller_id    1092 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	enum controller_id controller_id,
controller_id    1100 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	return bp->cmd_tbl.enable_disp_power_gating(bp, controller_id,
controller_id     984 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	if (CONTROLLER_ID_D1 != bp_params->controller_id)
controller_id    1017 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t controller_id;
controller_id    1024 drivers/gpu/drm/amd/display/dc/bios/command_table.c 					bp_params->controller_id, &controller_id)) {
controller_id    1025 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		clk.sPCLKInput.ucCRTC = controller_id;
controller_id    1074 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t controller_id;
controller_id    1081 drivers/gpu/drm/amd/display/dc/bios/command_table.c 					bp_params->controller_id, &controller_id)) {
controller_id    1101 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		clk.sPCLKInput.ulCrtcPclkFreq.ucCRTC = controller_id;
controller_id    1152 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	uint8_t controller_id;
controller_id    1158 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			&& bp->cmd_helper->controller_id_to_atom(bp_params->controller_id, &controller_id)) {
controller_id    1178 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		clk.ucCRTC = controller_id;
controller_id    1749 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			bp_params->controller_id, &atom_controller_id))
controller_id    1822 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			bp_params->controller_id, &atom_controller_id))
controller_id    1906 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	enum controller_id controller_id,
controller_id    1925 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	enum controller_id controller_id,
controller_id    1932 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	if (bp->cmd_helper->controller_id_to_atom(controller_id, &id))
controller_id    1958 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	enum controller_id controller_id,
controller_id    1975 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	enum controller_id controller_id,
controller_id    1982 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	if (bp->cmd_helper->controller_id_to_atom(controller_id, &id)) {
controller_id    2238 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	enum controller_id crtc_id,
controller_id    2259 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	enum controller_id crtc_id,
controller_id      76 drivers/gpu/drm/amd/display/dc/bios/command_table.h 		enum controller_id controller_id,
controller_id      80 drivers/gpu/drm/amd/display/dc/bios/command_table.h 		enum controller_id controller_id,
controller_id      90 drivers/gpu/drm/amd/display/dc/bios/command_table.h 		enum controller_id crtc_id,
controller_id     266 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	uint8_t controller_id;
controller_id     273 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 					controller_id, &controller_id)) {
controller_id     293 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		clk.crtc_id = controller_id;
controller_id     313 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 				bp_params->target_pixel_clock_100hz, (int)controller_id,
controller_id     378 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 			bp_params->controller_id, &atom_controller_id))
controller_id     473 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	enum controller_id controller_id,
controller_id     492 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	enum controller_id controller_id,
controller_id     499 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	if (bp->cmd_helper->controller_id_to_atom(controller_id, &id))
controller_id     569 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	enum controller_id crtc_id,
controller_id     590 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	enum controller_id crtc_id,
controller_id      76 drivers/gpu/drm/amd/display/dc/bios/command_table2.h 		enum controller_id controller_id,
controller_id      80 drivers/gpu/drm/amd/display/dc/bios/command_table2.h 		enum controller_id controller_id,
controller_id      90 drivers/gpu/drm/amd/display/dc/bios/command_table2.h 		enum controller_id crtc_id,
controller_id      68 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c 	enum controller_id id,
controller_id      38 drivers/gpu/drm/amd/display/dc/bios/command_table_helper.h 	enum controller_id id,
controller_id      90 drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c 	enum controller_id id,
controller_id      38 drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.h 	enum controller_id id,
controller_id      35 drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h 	bool (*controller_id_to_atom)(enum controller_id id, uint8_t *atom_id);
controller_id    2324 drivers/gpu/drm/amd/display/dc/core/dc_link.c 	unsigned int controller_id = 0;
controller_id    2348 drivers/gpu/drm/amd/display/dc/core/dc_link.c 					controller_id =
controller_id    2365 drivers/gpu/drm/amd/display/dc/core/dc_link.c 				controller_id,
controller_id     107 drivers/gpu/drm/amd/display/dc/core/dc_surface.c 		uint32_t controller_id)
controller_id     109 drivers/gpu/drm/amd/display/dc/core/dc_surface.c 	plane_state->irq_source = controller_id + DC_IRQ_SOURCE_PFLIP1 - 1;
controller_id     103 drivers/gpu/drm/amd/display/dc/dc_bios_types.h 		enum controller_id id,
controller_id     126 drivers/gpu/drm/amd/display/dc/dc_bios_types.h 		enum controller_id controller_id,
controller_id     650 drivers/gpu/drm/amd/display/dc/dc_types.h 	enum controller_id controllerId;
controller_id      58 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c static bool dce_abm_set_pipe(struct abm *abm, uint32_t controller_id)
controller_id      75 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 			MASTER_COMM_CMD_REG_BYTE1, controller_id);
controller_id     204 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 	uint32_t controller_id)
controller_id     216 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 	dce_abm_set_pipe(&abm_dce->base, controller_id);
controller_id     226 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 	if (controller_id == 0)
controller_id     418 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 		unsigned int controller_id,
controller_id     431 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c 				controller_id);
controller_id     859 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_pc_params.controller_id = pix_clk_params->controller_id;
controller_id     910 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		unsigned int inst = pix_clk_params->controller_id - CONTROLLER_ID_D0;
controller_id     933 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_pc_params.controller_id = pix_clk_params->controller_id;
controller_id     973 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_pixel_clock_params.controller_id = CONTROLLER_ID_UNDEFINED;
controller_id      75 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c 	uint8_t controller_id,
controller_id      90 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c 	if (!(power_gating == PIPE_GATING_CONTROL_INIT && controller_id != 0)){
controller_id      93 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c 						dcb, controller_id + 1, cntl);
controller_id      99 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c 			HW_REG_CRTC(mmMASTER_UPDATE_MODE, controller_id),
controller_id      44 drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h bool dce100_enable_display_power_gating(struct dc *dc, uint8_t controller_id,
controller_id     459 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c unsigned int controller_id_to_index(enum controller_id controller_id)
controller_id     463 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	switch (controller_id) {
controller_id     194 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	uint8_t controller_id,
controller_id     213 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	if (controller_id == underlay_idx)
controller_id     214 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		controller_id = CONTROLLER_ID_UNDERLAY0 - 1;
controller_id     216 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	if (power_gating != PIPE_GATING_CONTROL_INIT || controller_id == 0){
controller_id     219 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 						dcb, controller_id + 1, cntl);
controller_id     228 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		if (controller_id < CONTROLLER_ID_MAX - 1)
controller_id     230 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 				HW_REG_CRTC(mmCRTC_MASTER_UPDATE_MODE, controller_id),
controller_id    1092 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c static enum audio_dto_source translate_to_dto_source(enum controller_id crtc_id)
controller_id     822 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1;
controller_id     146 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true);
controller_id     238 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, false);
controller_id     308 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	bp_params.controller_id = tg110->controller_id;
controller_id    1805 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	switch (tg110->controller_id) {
controller_id    2250 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	tg110->controller_id = CONTROLLER_ID_D0 + instance;
controller_id     101 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h 	enum controller_id controller_id;
controller_id     693 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c 	tg110->controller_id = CONTROLLER_ID_UNDERLAY0;
controller_id     115 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c 	uint8_t controller_id,
controller_id     133 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c 	if (power_gating != PIPE_GATING_CONTROL_INIT || controller_id == 0){
controller_id     136 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c 						dcb, controller_id + 1, cntl);
controller_id     142 drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c 			HW_REG_CRTC(mmCRTC_MASTER_UPDATE_MODE, controller_id),
controller_id      77 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c #define CNTL_ID(controller_id)\
controller_id      78 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c 	controller_id
controller_id      83 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c static void dce120_init_pte(struct dc_context *ctx, uint8_t controller_id)
controller_id     152 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c 	uint8_t controller_id,
controller_id     172 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c 	if (power_gating != PIPE_GATING_CONTROL_INIT || controller_id == 0) {
controller_id     175 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c 						dcb, controller_id + 1, cntl);
controller_id     181 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c 			HW_REG_CRTC(mmCRTC0_CRTC_MASTER_UPDATE_MODE, controller_id),
controller_id     186 drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c 		dce120_init_pte(ctx, controller_id);
controller_id     151 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 	result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true);
controller_id     393 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 	switch (tg110->controller_id) {
controller_id    1246 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 	tg110->controller_id = CONTROLLER_ID_D0 + instance;
controller_id     230 drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c 	tg110->controller_id = CONTROLLER_ID_D0 + instance;
controller_id    2915 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	uint8_t controller_id,
controller_id     993 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1;
controller_id    1448 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1;
controller_id     327 drivers/gpu/drm/amd/display/dc/dm_services.h bool dm_dmcu_set_pipe(struct dc_context *ctx, unsigned int controller_id);
controller_id      92 drivers/gpu/drm/amd/display/dc/inc/clock_source.h 	enum controller_id controller_id;
controller_id      47 drivers/gpu/drm/amd/display/dc/inc/core_types.h 		uint32_t controller_id);
controller_id      49 drivers/gpu/drm/amd/display/dc/inc/hw/abm.h 	bool (*set_pipe)(struct abm *abm, unsigned int controller_id);
controller_id      58 drivers/gpu/drm/amd/display/dc/inc/hw/abm.h 			unsigned int controller_id,
controller_id     185 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 					uint8_t controller_id,
controller_id     130 drivers/gpu/drm/amd/display/include/bios_parser_types.h 	enum controller_id controller_id;
controller_id     161 drivers/gpu/drm/amd/display/include/bios_parser_types.h 	enum controller_id controller_id;
controller_id     209 drivers/gpu/drm/amd/display/include/bios_parser_types.h 	enum controller_id controller_id; /* (Which CRTC uses this PLL) */
controller_id     248 drivers/gpu/drm/amd/display/include/grph_object_id.h static inline enum controller_id dal_graphics_object_id_get_controller_id(
controller_id     252 drivers/gpu/drm/amd/display/include/grph_object_id.h 		return (enum controller_id) id.id;
controller_id      51 drivers/gpu/drm/amd/include/dm_pp_interface.h 	uint32_t controller_id;
controller_id    1420 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 		if (display_config->displays[index].controller_id != 0)
controller_id     302 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 		if (display_config->displays[index].controller_id != 0)
controller_id    1247 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		enum dpu_intf_type type, u32 controller_id)
controller_id    1253 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		    && catalog->intf[i].controller_id == controller_id) {
controller_id    2086 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		u32 controller_id = disp_info->h_tile_instance[i];
controller_id    2098 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				i, controller_id, phys_params.split_role);
controller_id    2102 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 													controller_id);
controller_id    2105 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 						  intf_type, controller_id);
controller_id     282 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 	.controller_id = _ctrl_id, \
controller_id     492 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h 	u32 controller_id;
controller_id    1361 drivers/net/ethernet/emulex/benet/be_cmds.h 	struct controller_id cont_id;
controller_id      73 drivers/pci/controller/dwc/pci-imx6.c 	u32			controller_id;
controller_id     421 drivers/pci/controller/dwc/pci-imx6.c 	return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
controller_id     611 drivers/pci/controller/dwc/pci-imx6.c 	    imx6_pcie->controller_id == 1) {
controller_id    1113 drivers/pci/controller/dwc/pci-imx6.c 			imx6_pcie->controller_id = 1;
controller_id     242 drivers/pci/hotplug/ibmphp.h 	u8 controller_id;
controller_id     119 drivers/pci/hotplug/ibmphp_ebda.c 		debug("%s - controller_id = %x\n", __func__, ptr->controller_id);
controller_id     755 drivers/pci/hotplug/ibmphp_ebda.c 				bus_info_ptr1->controller_id = hpc_ptr->ctlr_id;
controller_id      85 drivers/scsi/aic94xx/aic94xx_sds.h 	struct controller_id contrl_id; /*PCI id to identify the controller */