control_phy        27 drivers/phy/ti/phy-omap-control.c 	struct omap_control_phy	*control_phy;
control_phy        34 drivers/phy/ti/phy-omap-control.c 	control_phy = dev_get_drvdata(dev);
control_phy        35 drivers/phy/ti/phy-omap-control.c 	if (!control_phy) {
control_phy        40 drivers/phy/ti/phy-omap-control.c 	if (control_phy->type != OMAP_CTRL_TYPE_PCIE) {
control_phy        45 drivers/phy/ti/phy-omap-control.c 	val = readl(control_phy->pcie_pcs);
control_phy        49 drivers/phy/ti/phy-omap-control.c 	writel(val, control_phy->pcie_pcs);
control_phy        62 drivers/phy/ti/phy-omap-control.c 	struct omap_control_phy	*control_phy;
control_phy        69 drivers/phy/ti/phy-omap-control.c 	control_phy = dev_get_drvdata(dev);
control_phy        70 drivers/phy/ti/phy-omap-control.c 	if (!control_phy) {
control_phy        75 drivers/phy/ti/phy-omap-control.c 	if (control_phy->type == OMAP_CTRL_TYPE_OTGHS)
control_phy        78 drivers/phy/ti/phy-omap-control.c 	val = readl(control_phy->power);
control_phy        80 drivers/phy/ti/phy-omap-control.c 	switch (control_phy->type) {
control_phy        90 drivers/phy/ti/phy-omap-control.c 		rate = clk_get_rate(control_phy->sys_clk);
control_phy       129 drivers/phy/ti/phy-omap-control.c 			__func__, control_phy->type);
control_phy       133 drivers/phy/ti/phy-omap-control.c 	writel(val, control_phy->power);
control_phy       273 drivers/phy/ti/phy-omap-control.c 	struct omap_control_phy *control_phy;
control_phy       279 drivers/phy/ti/phy-omap-control.c 	control_phy = devm_kzalloc(&pdev->dev, sizeof(*control_phy),
control_phy       281 drivers/phy/ti/phy-omap-control.c 	if (!control_phy)
control_phy       284 drivers/phy/ti/phy-omap-control.c 	control_phy->dev = &pdev->dev;
control_phy       285 drivers/phy/ti/phy-omap-control.c 	control_phy->type = *(enum omap_control_phy_type *)of_id->data;
control_phy       287 drivers/phy/ti/phy-omap-control.c 	if (control_phy->type == OMAP_CTRL_TYPE_OTGHS) {
control_phy       290 drivers/phy/ti/phy-omap-control.c 		control_phy->otghs_control = devm_ioremap_resource(
control_phy       292 drivers/phy/ti/phy-omap-control.c 		if (IS_ERR(control_phy->otghs_control))
control_phy       293 drivers/phy/ti/phy-omap-control.c 			return PTR_ERR(control_phy->otghs_control);
control_phy       297 drivers/phy/ti/phy-omap-control.c 		control_phy->power = devm_ioremap_resource(&pdev->dev, res);
control_phy       298 drivers/phy/ti/phy-omap-control.c 		if (IS_ERR(control_phy->power)) {
control_phy       300 drivers/phy/ti/phy-omap-control.c 			return PTR_ERR(control_phy->power);
control_phy       304 drivers/phy/ti/phy-omap-control.c 	if (control_phy->type == OMAP_CTRL_TYPE_PIPE3 ||
control_phy       305 drivers/phy/ti/phy-omap-control.c 	    control_phy->type == OMAP_CTRL_TYPE_PCIE) {
control_phy       306 drivers/phy/ti/phy-omap-control.c 		control_phy->sys_clk = devm_clk_get(control_phy->dev,
control_phy       308 drivers/phy/ti/phy-omap-control.c 		if (IS_ERR(control_phy->sys_clk)) {
control_phy       314 drivers/phy/ti/phy-omap-control.c 	if (control_phy->type == OMAP_CTRL_TYPE_PCIE) {
control_phy       317 drivers/phy/ti/phy-omap-control.c 		control_phy->pcie_pcs = devm_ioremap_resource(&pdev->dev, res);
control_phy       318 drivers/phy/ti/phy-omap-control.c 		if (IS_ERR(control_phy->pcie_pcs))
control_phy       319 drivers/phy/ti/phy-omap-control.c 			return PTR_ERR(control_phy->pcie_pcs);
control_phy       322 drivers/phy/ti/phy-omap-control.c 	dev_set_drvdata(control_phy->dev, control_phy);
control_phy       578 drivers/scsi/aic94xx/aic94xx_sas.h 		struct control_phy       control_phy;
control_phy       629 drivers/scsi/aic94xx/aic94xx_scb.c 	struct control_phy *control_phy = &scb->control_phy;
control_phy       630 drivers/scsi/aic94xx/aic94xx_scb.c 	u8 phy_id = control_phy->phy_id;
control_phy       644 drivers/scsi/aic94xx/aic94xx_scb.c 	switch (control_phy->sub_func) {
control_phy       688 drivers/scsi/aic94xx/aic94xx_scb.c 			    phy_id, control_phy->sub_func);
control_phy       693 drivers/scsi/aic94xx/aic94xx_scb.c 			    phy_id, control_phy->sub_func);
control_phy       766 drivers/scsi/aic94xx/aic94xx_scb.c 	struct control_phy *control_phy = &scb->control_phy;
control_phy       769 drivers/scsi/aic94xx/aic94xx_scb.c 	control_phy->phy_id = (u8) phy_id;
control_phy       770 drivers/scsi/aic94xx/aic94xx_scb.c 	control_phy->sub_func = subfunc;
control_phy       776 drivers/scsi/aic94xx/aic94xx_scb.c 		control_phy->hot_plug_delay = HOTPLUG_DELAY_TIMEOUT;
control_phy       779 drivers/scsi/aic94xx/aic94xx_scb.c 		set_speed_mask(&control_phy->speed_mask, phy->phy_desc);
control_phy       783 drivers/scsi/aic94xx/aic94xx_scb.c 			control_phy->port_type = SAS_PROTOCOL_ALL << 4;
control_phy       785 drivers/scsi/aic94xx/aic94xx_scb.c 			control_phy->port_type = SAS_PROTOCOL_ALL;
control_phy       787 drivers/scsi/aic94xx/aic94xx_scb.c 			control_phy->port_type =
control_phy       791 drivers/scsi/aic94xx/aic94xx_scb.c 		control_phy->link_reset_retries = 10;
control_phy       796 drivers/scsi/aic94xx/aic94xx_scb.c 		control_phy->func_mask = FUNCTION_MASK_DEFAULT;
control_phy       798 drivers/scsi/aic94xx/aic94xx_scb.c 			control_phy->func_mask &= ~SPINUP_HOLD_DIS;
control_phy       800 drivers/scsi/aic94xx/aic94xx_scb.c 			control_phy->func_mask |= SPINUP_HOLD_DIS;
control_phy       803 drivers/scsi/aic94xx/aic94xx_scb.c 	control_phy->conn_handle = cpu_to_le16(0xFFFF);