cmd_tbl           182 drivers/ata/acard-ahci.c static unsigned int acard_ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
cmd_tbl           185 drivers/ata/acard-ahci.c 	struct acard_sg *acard_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;
cmd_tbl           218 drivers/ata/acard-ahci.c 	void *cmd_tbl;
cmd_tbl           227 drivers/ata/acard-ahci.c 	cmd_tbl = pp->cmd_tbl + qc->hw_tag * AHCI_CMD_TBL_SZ;
cmd_tbl           229 drivers/ata/acard-ahci.c 	ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, cmd_tbl);
cmd_tbl           231 drivers/ata/acard-ahci.c 		memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
cmd_tbl           232 drivers/ata/acard-ahci.c 		memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);
cmd_tbl           237 drivers/ata/acard-ahci.c 		n_elem = acard_ahci_fill_sg(qc, cmd_tbl);
cmd_tbl           340 drivers/ata/acard-ahci.c 	pp->cmd_tbl = mem;
cmd_tbl           304 drivers/ata/ahci.h 	void			*cmd_tbl;
cmd_tbl          1349 drivers/ata/libahci.c 	u8 *fis = pp->cmd_tbl;
cmd_tbl          1593 drivers/ata/libahci.c static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
cmd_tbl          1596 drivers/ata/libahci.c 	struct ahci_sg *ahci_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;
cmd_tbl          1632 drivers/ata/libahci.c 	void *cmd_tbl;
cmd_tbl          1641 drivers/ata/libahci.c 	cmd_tbl = pp->cmd_tbl + qc->hw_tag * AHCI_CMD_TBL_SZ;
cmd_tbl          1643 drivers/ata/libahci.c 	ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, cmd_tbl);
cmd_tbl          1645 drivers/ata/libahci.c 		memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
cmd_tbl          1646 drivers/ata/libahci.c 		memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);
cmd_tbl          1651 drivers/ata/libahci.c 		n_elem = ahci_fill_sg(qc, cmd_tbl);
cmd_tbl          2391 drivers/ata/libahci.c 	pp->cmd_tbl = mem;
cmd_tbl           732 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.transmitter_control)
cmd_tbl           735 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.transmitter_control(bp, cntl);
cmd_tbl           744 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.dig_encoder_control)
cmd_tbl           747 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.dig_encoder_control(bp, cntl);
cmd_tbl           756 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.adjust_display_pll)
cmd_tbl           759 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.adjust_display_pll(bp, bp_params);
cmd_tbl           768 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.set_pixel_clock)
cmd_tbl           771 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.set_pixel_clock(bp, bp_params);
cmd_tbl           780 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.set_dce_clock)
cmd_tbl           783 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.set_dce_clock(bp, bp_params);
cmd_tbl           793 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.enable_spread_spectrum_on_ppll)
cmd_tbl           796 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.enable_spread_spectrum_on_ppll(
cmd_tbl           807 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.set_crtc_timing)
cmd_tbl           810 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.set_crtc_timing(bp, bp_params);
cmd_tbl           819 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.program_clock)
cmd_tbl           822 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.program_clock(bp, bp_params);
cmd_tbl           834 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.enable_crtc)
cmd_tbl           837 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.enable_crtc(bp, id, enable);
cmd_tbl           847 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	if (!bp->cmd_tbl.enable_disp_power_gating)
cmd_tbl           850 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c 	return bp->cmd_tbl.enable_disp_power_gating(bp, controller_id,
cmd_tbl          1023 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	if (!bp->cmd_tbl.transmitter_control)
cmd_tbl          1026 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	return bp->cmd_tbl.transmitter_control(bp, cntl);
cmd_tbl          1035 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	if (!bp->cmd_tbl.dig_encoder_control)
cmd_tbl          1038 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	return bp->cmd_tbl.dig_encoder_control(bp, cntl);
cmd_tbl          1047 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	if (!bp->cmd_tbl.set_pixel_clock)
cmd_tbl          1050 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	return bp->cmd_tbl.set_pixel_clock(bp, bp_params);
cmd_tbl          1059 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	if (!bp->cmd_tbl.set_dce_clock)
cmd_tbl          1062 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	return bp->cmd_tbl.set_dce_clock(bp, bp_params);
cmd_tbl          1071 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	if (!bp->cmd_tbl.set_crtc_timing)
cmd_tbl          1074 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	return bp->cmd_tbl.set_crtc_timing(bp, bp_params);
cmd_tbl          1084 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	if (!bp->cmd_tbl.enable_crtc)
cmd_tbl          1087 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	return bp->cmd_tbl.enable_crtc(bp, id, enable);
cmd_tbl          1097 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	if (!bp->cmd_tbl.enable_disp_power_gating)
cmd_tbl          1100 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	return bp->cmd_tbl.enable_disp_power_gating(bp, controller_id,
cmd_tbl          1202 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	if (bp->cmd_tbl.get_smu_clock_info != NULL) {
cmd_tbl          1205 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 				bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10;
cmd_tbl          1277 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 	if (bp->cmd_tbl.get_smu_clock_info != NULL) {
cmd_tbl          1280 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 					bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10;
cmd_tbl          1283 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c 					bp->cmd_tbl.get_smu_clock_info(bp, SMU11_SYSPLL3_0_ID) * 10;
cmd_tbl            63 drivers/gpu/drm/amd/display/dc/bios/bios_parser_types_internal.h 	struct cmd_tbl cmd_tbl;
cmd_tbl            65 drivers/gpu/drm/amd/display/dc/bios/bios_parser_types_internal2.h 	struct cmd_tbl cmd_tbl;
cmd_tbl           125 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v3;
cmd_tbl           128 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v4;
cmd_tbl           132 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v5;
cmd_tbl           153 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	struct cmd_tbl *cmd_tbl = &bp->cmd_tbl;
cmd_tbl           156 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		cmd_tbl->encoder_control_dig1 = encoder_control_dig1_v1;
cmd_tbl           158 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		cmd_tbl->encoder_control_dig1 = NULL;
cmd_tbl           161 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		cmd_tbl->encoder_control_dig2 = encoder_control_dig2_v1;
cmd_tbl           163 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		cmd_tbl->encoder_control_dig2 = NULL;
cmd_tbl           165 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	cmd_tbl->dig_encoder_control = encoder_control_dig_v1;
cmd_tbl           173 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	struct cmd_tbl *cmd_tbl = &bp->cmd_tbl;
cmd_tbl           178 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			if (cmd_tbl->encoder_control_dig1 != NULL)
cmd_tbl           180 drivers/gpu/drm/amd/display/dc/bios/command_table.c 					cmd_tbl->encoder_control_dig1(bp, cntl);
cmd_tbl           183 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			if (cmd_tbl->encoder_control_dig2 != NULL)
cmd_tbl           185 drivers/gpu/drm/amd/display/dc/bios/command_table.c 					cmd_tbl->encoder_control_dig2(bp, cntl);
cmd_tbl           375 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.transmitter_control = transmitter_control_v2;
cmd_tbl           378 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.transmitter_control = transmitter_control_v3;
cmd_tbl           381 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.transmitter_control = transmitter_control_v4;
cmd_tbl           384 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.transmitter_control = transmitter_control_v1_5;
cmd_tbl           387 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.transmitter_control = transmitter_control_v1_6;
cmd_tbl           391 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.transmitter_control = NULL;
cmd_tbl           920 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v3;
cmd_tbl           923 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v5;
cmd_tbl           926 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v6;
cmd_tbl           929 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7;
cmd_tbl           934 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.set_pixel_clock = NULL;
cmd_tbl          1238 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_spread_spectrum_on_ppll =
cmd_tbl          1242 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_spread_spectrum_on_ppll =
cmd_tbl          1246 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_spread_spectrum_on_ppll =
cmd_tbl          1252 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_spread_spectrum_on_ppll = NULL;
cmd_tbl          1441 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.adjust_display_pll = adjust_display_pll_v2;
cmd_tbl          1444 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.adjust_display_pll = adjust_display_pll_v3;
cmd_tbl          1449 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.adjust_display_pll = NULL;
cmd_tbl          1552 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dac1_encoder_control = dac1_encoder_control_v1;
cmd_tbl          1555 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dac1_encoder_control = NULL;
cmd_tbl          1560 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dac2_encoder_control = dac2_encoder_control_v1;
cmd_tbl          1563 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dac2_encoder_control = NULL;
cmd_tbl          1646 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dac1_output_control = dac1_output_control_v1;
cmd_tbl          1649 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dac1_output_control = NULL;
cmd_tbl          1654 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dac2_output_control = dac2_output_control_v1;
cmd_tbl          1657 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.dac2_output_control = NULL;
cmd_tbl          1718 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			bp->cmd_tbl.set_crtc_timing =
cmd_tbl          1724 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			bp->cmd_tbl.set_crtc_timing = NULL;
cmd_tbl          1730 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			bp->cmd_tbl.set_crtc_timing = set_crtc_timing_v1;
cmd_tbl          1735 drivers/gpu/drm/amd/display/dc/bios/command_table.c 			bp->cmd_tbl.set_crtc_timing = NULL;
cmd_tbl          1913 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_crtc = enable_crtc_v1;
cmd_tbl          1918 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_crtc = NULL;
cmd_tbl          1965 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_crtc_mem_req = enable_crtc_mem_req_v1;
cmd_tbl          1968 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_crtc_mem_req = NULL;
cmd_tbl          2018 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.program_clock = program_clock_v5;
cmd_tbl          2021 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.program_clock = program_clock_v6;
cmd_tbl          2026 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.program_clock = NULL;
cmd_tbl          2118 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.external_encoder_control =
cmd_tbl          2122 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.external_encoder_control = NULL;
cmd_tbl          2246 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_disp_power_gating =
cmd_tbl          2252 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.enable_disp_power_gating = NULL;
cmd_tbl          2296 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1;
cmd_tbl          2301 drivers/gpu/drm/amd/display/dc/bios/command_table.c 		bp->cmd_tbl.set_dce_clock = NULL;
cmd_tbl            97 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v1_5;
cmd_tbl           101 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.dig_encoder_control = NULL;
cmd_tbl           185 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.transmitter_control = transmitter_control_v1_6;
cmd_tbl           189 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.transmitter_control = NULL;
cmd_tbl           248 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7;
cmd_tbl           253 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.set_pixel_clock = NULL;
cmd_tbl           359 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.set_crtc_timing =
cmd_tbl           364 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.set_crtc_timing = NULL;
cmd_tbl           480 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.enable_crtc = enable_crtc_v1;
cmd_tbl           485 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.enable_crtc = NULL;
cmd_tbl           542 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.external_encoder_control =
cmd_tbl           546 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.external_encoder_control = NULL;
cmd_tbl           577 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.enable_disp_power_gating =
cmd_tbl           583 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.enable_disp_power_gating = NULL;
cmd_tbl           629 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1;
cmd_tbl           634 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 		bp->cmd_tbl.set_dce_clock = NULL;
cmd_tbl           712 drivers/gpu/drm/amd/display/dc/bios/command_table2.c 	bp->cmd_tbl.get_smu_clock_info = get_smu_clock_info_v3_1;
cmd_tbl           350 drivers/scsi/mvsas/mv_sas.c 	hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
cmd_tbl           490 drivers/scsi/mvsas/mv_sas.c 	hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
cmd_tbl           607 drivers/scsi/mvsas/mv_sas.c 	hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
cmd_tbl           188 drivers/scsi/mvsas/mv_sas.h 	__le64			cmd_tbl;  	/* command table address */