cmd_reg 43 arch/m68k/include/asm/intersil.h unsigned char cmd_reg; cmd_reg 158 arch/m68k/sun3/config.c intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_DISABLE|INTERSIL_24H_MODE); cmd_reg 162 arch/m68k/sun3/config.c intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_ENABLE|INTERSIL_24H_MODE); cmd_reg 36 arch/m68k/sun3/intersil.c intersil_clock->cmd_reg = STOP_VAL; cmd_reg 62 arch/m68k/sun3/intersil.c intersil_clock->cmd_reg = START_VAL; cmd_reg 28 arch/parisc/include/asm/led.h int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg); cmd_reg 650 drivers/atm/iphase.h ffreg_t cmd_reg; /* Command register */ cmd_reg 730 drivers/atm/iphase.h rreg_t cmd_reg; /* Command register */ cmd_reg 982 drivers/gpu/drm/i915/gvt/cmd_parser.c cmd_reg(s, i) == i915_mmio_reg_offset(DERRMR)) cmd_reg 989 drivers/gpu/drm/i915/gvt/cmd_parser.c ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lri"); cmd_reg 1008 drivers/gpu/drm/i915/gvt/cmd_parser.c ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lrr-src"); cmd_reg 1011 drivers/gpu/drm/i915/gvt/cmd_parser.c ret |= cmd_reg_handler(s, cmd_reg(s, i + 1), i, "lrr-dst"); cmd_reg 1034 drivers/gpu/drm/i915/gvt/cmd_parser.c ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lrm"); cmd_reg 1058 drivers/gpu/drm/i915/gvt/cmd_parser.c ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "srm"); cmd_reg 1121 drivers/gpu/drm/i915/gvt/cmd_parser.c ret = cmd_reg_handler(s, cmd_reg(s, 2), 1, "pipe_ctrl"); cmd_reg 271 drivers/mmc/host/davinci_mmc.c u32 cmd_reg = 0; cmd_reg 302 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_BSYEXP; cmd_reg 305 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_RSPFMT_R1456; cmd_reg 308 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_RSPFMT_R2; cmd_reg 311 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_RSPFMT_R3; cmd_reg 314 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_RSPFMT_NONE; cmd_reg 321 drivers/mmc/host/davinci_mmc.c cmd_reg |= cmd->opcode; cmd_reg 325 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_DMATRIG; cmd_reg 329 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_DMATRIG; cmd_reg 333 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_WDATX; cmd_reg 337 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_DTRW; cmd_reg 340 drivers/mmc/host/davinci_mmc.c cmd_reg |= MMCCMD_PPLEN; cmd_reg 367 drivers/mmc/host/davinci_mmc.c writel(cmd_reg, host->base + DAVINCI_MMCCMD); cmd_reg 547 drivers/parisc/led.c int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg) cmd_reg 555 drivers/parisc/led.c LCD_CMD_REG = (cmd_reg == LED_CMD_REG_NONE) ? 0 : cmd_reg; cmd_reg 8836 drivers/scsi/advansys.c static int AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg) cmd_reg 8842 drivers/scsi/advansys.c AscSetChipEEPCmd(iop_base, cmd_reg); cmd_reg 8845 drivers/scsi/advansys.c if (read_back == cmd_reg) cmd_reg 8859 drivers/scsi/advansys.c uchar cmd_reg; cmd_reg 8863 drivers/scsi/advansys.c cmd_reg = addr | ASC_EEP_CMD_READ; cmd_reg 8864 drivers/scsi/advansys.c AscWriteEEPCmdReg(iop_base, cmd_reg); cmd_reg 149 drivers/scsi/aic94xx/aic94xx_init.c u16 cmd_reg; cmd_reg 151 drivers/scsi/aic94xx/aic94xx_init.c err = pci_read_config_word(asd_ha->pcidev, PCI_COMMAND, &cmd_reg); cmd_reg 159 drivers/scsi/aic94xx/aic94xx_init.c if (cmd_reg & PCI_COMMAND_MEMORY) { cmd_reg 162 drivers/scsi/aic94xx/aic94xx_init.c } else if (cmd_reg & PCI_COMMAND_IO) { cmd_reg 8939 drivers/scsi/ipr.c u16 cmd_reg; cmd_reg 8943 drivers/scsi/ipr.c rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg); cmd_reg 8945 drivers/scsi/ipr.c if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) { cmd_reg 1587 drivers/usb/host/xhci-ring.c u32 portsc, cmd_reg; cmd_reg 1650 drivers/usb/host/xhci-ring.c cmd_reg = readl(&xhci->op_regs->command); cmd_reg 1651 drivers/usb/host/xhci-ring.c if (!(cmd_reg & CMD_RUN)) {