clocksource_mmio_init 132 arch/arm/mach-ep93xx/timer-ep93xx.c clocksource_mmio_init(NULL, "timer4", clocksource_mmio_init 195 arch/arm/mach-omap1/time.c if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate, clocksource_mmio_init 92 arch/arm/mach-spear/time.c clocksource_mmio_init(gpt_base + COUNT(CLKSRC), "tmr1", tick_rate, clocksource_mmio_init 102 arch/arm/plat-omap/counter_32k.c ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768, clocksource_mmio_init 233 arch/arm/plat-orion/time.c clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, "orion_clocksource", clocksource_mmio_init 141 arch/mips/ralink/cevt-rt3352.c ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name, clocksource_mmio_init 60 drivers/clocksource/armv7m_systick.c ret = clocksource_mmio_init(base + SYST_CVR, "arm_system_timer", rate, clocksource_mmio_init 226 drivers/clocksource/asm9260_timer.c clocksource_mmio_init(priv.base + HW_TC1, DRIVER_NAME, rate, clocksource_mmio_init 92 drivers/clocksource/bcm2835_timer.c clocksource_mmio_init(base + REG_COUNTER_LO, node->name, clocksource_mmio_init 54 drivers/clocksource/clksrc_st_lpc.c ret = clocksource_mmio_init(ddata.base + LPC_LPT_LSB_OFF, clocksource_mmio_init 36 drivers/clocksource/clps711x-timer.c clocksource_mmio_init(tcd, "clps711x-clocksource", rate, 300, 16, clocksource_mmio_init 158 drivers/clocksource/jcore-pit.c err = clocksource_mmio_init(jcore_pit_base, "jcore_pit_cs", clocksource_mmio_init 225 drivers/clocksource/mps2-timer.c ret = clocksource_mmio_init(base + TIMER_VALUE, name, clocksource_mmio_init 205 drivers/clocksource/mxs_timer.c clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1), clocksource_mmio_init 225 drivers/clocksource/nomadik-mtu.c ret = clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0", clocksource_mmio_init 82 drivers/clocksource/renesas-ostm.c return clocksource_mmio_init(ostm->base + OSTM_CNT, clocksource_mmio_init 297 drivers/clocksource/timer-armada-370-xp.c res = clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, clocksource_mmio_init 236 drivers/clocksource/timer-atcpit100.c ret = clocksource_mmio_init(base + CH1_CNT, clocksource_mmio_init 188 drivers/clocksource/timer-digicolor.c clocksource_mmio_init(dc_timer_dev.base + COUNT(TIMER_B), node->name, clocksource_mmio_init 163 drivers/clocksource/timer-efm32.c ret = clocksource_mmio_init(base + TIMERn_CNT, "efm32 timer", clocksource_mmio_init 223 drivers/clocksource/timer-fsl-ftm.c err = clocksource_mmio_init(priv->clksrc_base + FTM_CNT, "fsl-ftm", clocksource_mmio_init 337 drivers/clocksource/timer-fttmr010.c clocksource_mmio_init(fttmr010->base + TIMER2_COUNT, clocksource_mmio_init 345 drivers/clocksource/timer-fttmr010.c clocksource_mmio_init(fttmr010->base + TIMER2_COUNT, clocksource_mmio_init 124 drivers/clocksource/timer-gx6605s.c return clocksource_mmio_init(base + TIMER_VALUE, "gx6605s", clocksource_mmio_init 167 drivers/clocksource/timer-imx-gpt.c return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32, clocksource_mmio_init 156 drivers/clocksource/timer-imx-tpm.c return clocksource_mmio_init(timer_base + TPM_CNT, clocksource_mmio_init 41 drivers/clocksource/timer-integrator-ap.c ret = clocksource_mmio_init(base + TIMER_VALUE, "timer2", clocksource_mmio_init 208 drivers/clocksource/timer-ixp4xx.c clocksource_mmio_init(NULL, "OSTS", timer_freq, 200, 32, clocksource_mmio_init 197 drivers/clocksource/timer-lpc32xx.c ret = clocksource_mmio_init(base + LPC32XX_TIMER_TC, "lpc3220 timer", clocksource_mmio_init 297 drivers/clocksource/timer-mediatek.c clocksource_mmio_init(timer_of_base(&to) + GPT_CNT_REG(TIMER_CLK_SRC), clocksource_mmio_init 185 drivers/clocksource/timer-meson6.c clocksource_mmio_init(timer_base + MESON_ISA_TIMERE, node->name, clocksource_mmio_init 179 drivers/clocksource/timer-milbeaut.c clocksource_mmio_init(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS, clocksource_mmio_init 182 drivers/clocksource/timer-npcm7xx.c clocksource_mmio_init(timer_of_base(&npcm7xx_to) + clocksource_mmio_init 103 drivers/clocksource/timer-nps.c ret = clocksource_mmio_init(nps_msu_reg_low_addr, "nps-tick", clocksource_mmio_init 164 drivers/clocksource/timer-orion.c ret = clocksource_mmio_init(timer_base + TIMER0_VAL, clocksource_mmio_init 147 drivers/clocksource/timer-owl.c clocksource_mmio_init(owl_clksrc_base + OWL_Tx_VAL, node->name, clocksource_mmio_init 198 drivers/clocksource/timer-oxnas-rps.c ret = clocksource_mmio_init(timer_sched_base, clocksource_mmio_init 170 drivers/clocksource/timer-pxa.c ret = clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200, clocksource_mmio_init 270 drivers/clocksource/timer-rockchip.c ret = clocksource_mmio_init(rk_clksrc->base + TIMER_CURRENT_VALUE0, clocksource_mmio_init 95 drivers/clocksource/timer-sp804.c clocksource_mmio_init(base + TIMER_VALUE, name, clocksource_mmio_init 263 drivers/clocksource/timer-stm32.c return clocksource_mmio_init(timer_of_base(to) + TIM_CNT, name, clocksource_mmio_init 194 drivers/clocksource/timer-sun4i.c ret = clocksource_mmio_init(timer_of_base(&to) + TIMER_CNTVAL_REG(1), clocksource_mmio_init 44 drivers/clocksource/timer-tango-xtal.c ret = clocksource_mmio_init(xtal_in_cnt, "tango-xtal", xtal_freq, 350, clocksource_mmio_init 337 drivers/clocksource/timer-tegra.c ret = clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, clocksource_mmio_init 443 drivers/clocksource/timer-u300.c ret = clocksource_mmio_init(u300_timer_base + U300_TIMER_APP_GPT2CC, clocksource_mmio_init 64 drivers/clocksource/timer-vf-pit.c return clocksource_mmio_init(clksrc_base + PITCVAL, "vf-pit", rate, clocksource_mmio_init 193 drivers/clocksource/timer-zevio.c clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL, clocksource_mmio_init 257 include/linux/clocksource.h extern int clocksource_mmio_init(void __iomem *, const char *,