clock_type 140 arch/arm/mach-ixp4xx/goramo_mlr.c static int hss_set_clock(int port, unsigned int clock_type) clock_type 144 arch/arm/mach-ixp4xx/goramo_mlr.c switch (clock_type) { clock_type 109 arch/arm/mach-ixp4xx/include/mach/platform.h int (*set_clock)(int port, unsigned int clock_type); clock_type 78 arch/mips/cavium-octeon/octeon-platform.c const char *clock_type; clock_type 92 arch/mips/cavium-octeon/octeon-platform.c "refclk-type", &clock_type); clock_type 94 arch/mips/cavium-octeon/octeon-platform.c if (!i && strcmp("crystal", clock_type) == 0) clock_type 7373 arch/x86/kvm/x86.c unsigned long clock_type) clock_type 7380 arch/x86/kvm/x86.c if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK) clock_type 161 arch/x86/platform/uv/bios_uv.c s64 uv_bios_freq_base(u64 clock_type, u64 *ticks_per_second) clock_type 163 arch/x86/platform/uv/bios_uv.c return uv_bios_call(UV_BIOS_FREQ_BASE, clock_type, clock_type 4103 drivers/char/pcmcia/synclink_cs.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; clock_type 4104 drivers/char/pcmcia/synclink_cs.c case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; clock_type 4105 drivers/char/pcmcia/synclink_cs.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; clock_type 4106 drivers/char/pcmcia/synclink_cs.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; clock_type 4107 drivers/char/pcmcia/synclink_cs.c default: new_line.clock_type = CLOCK_DEFAULT; clock_type 4124 drivers/char/pcmcia/synclink_cs.c switch (new_line.clock_type) clock_type 997 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c u8 clock_type, clock_type 1018 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (clock_type == COMPUTE_ENGINE_PLL_PARAM) { clock_type 1019 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); clock_type 1037 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); clock_type 1067 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v6_in.ulClock.ulComputeClockFlag = clock_type; clock_type 158 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h u8 clock_type, clock_type 211 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h u8 clock_type, clock_type 500 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c pp_clock_request.clock_type = dc_to_pp_clock_type(clock_for_voltage_req->clk_type); clock_type 503 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (!pp_clock_request.clock_type) clock_type 784 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c clock_req.clock_type = amd_pp_dcef_clock; clock_type 806 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c clock_req.clock_type = amd_pp_mem_clock; clock_type 844 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c clock_req.clock_type = amd_pp_disp_clock; clock_type 847 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c clock_req.clock_type = amd_pp_phy_clock; clock_type 850 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c clock_req.clock_type = amd_pp_pixel_clock; clock_type 2320 drivers/gpu/drm/amd/display/dc/bios/command_table.c !cmd->dc_clock_type_to_atom(bp_params->clock_type, &atom_clock_type)) clock_type 2326 drivers/gpu/drm/amd/display/dc/bios/command_table.c if (bp_params->clock_type == DCECLOCK_TYPE_DPREFCLK) { clock_type 653 drivers/gpu/drm/amd/display/dc/bios/command_table2.c !cmd->dc_clock_type_to_atom(bp_params->clock_type, clock_type 660 drivers/gpu/drm/amd/display/dc/bios/command_table2.c if (bp_params->clock_type == DCECLOCK_TYPE_DPREFCLK) { clock_type 686 drivers/gpu/drm/amd/display/dc/bios/command_table2.c bp_params->clock_type); clock_type 88 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; clock_type 103 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK; clock_type 142 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; clock_type 179 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK; clock_type 400 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c enum dc_clock_type clock_type, clock_type 404 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c if (clock_type == DC_CLOCK_TYPE_DISPCLK) { clock_type 410 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c if (clock_type == DC_CLOCK_TYPE_DPPCLK) { clock_type 50 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h enum dc_clock_type clock_type, clock_type 2527 drivers/gpu/drm/amd/display/dc/core/dc.c enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping) clock_type 2530 drivers/gpu/drm/amd/display/dc/core/dc.c return dc->hwss.set_clock(dc, clock_type, clk_khz, stepping); clock_type 2533 drivers/gpu/drm/amd/display/dc/core/dc.c void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg) clock_type 2536 drivers/gpu/drm/amd/display/dc/core/dc.c dc->hwss.get_clock(dc, clock_type, clock_cfg); clock_type 1066 drivers/gpu/drm/amd/display/dc/dc.h enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping); clock_type 1067 drivers/gpu/drm/amd/display/dc/dc.h void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg); clock_type 306 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; clock_type 319 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK; clock_type 3259 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c enum dc_clock_type clock_type, clock_type 3269 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c context, clock_type, &clock_cfg); clock_type 3284 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c if (clock_type == DC_CLOCK_TYPE_DISPCLK) clock_type 3286 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c else if (clock_type == DC_CLOCK_TYPE_DPPCLK) clock_type 3299 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c enum dc_clock_type clock_type, clock_type 3305 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c dc->clk_mgr->funcs->get_clock(dc->clk_mgr, context, clock_type, clock_cfg); clock_type 181 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h enum dc_clock_type clock_type, clock_type 334 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h enum dc_clock_type clock_type, clock_type 339 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h enum dc_clock_type clock_type, clock_type 262 drivers/gpu/drm/amd/display/include/bios_parser_types.h enum bp_dce_clock_type clock_type; clock_type 190 drivers/gpu/drm/amd/include/dm_pp_interface.h enum amd_pp_clock_type clock_type; clock_type 247 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c uint32_t clock_type, uint32_t clock_value, clock_type 256 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c pll_parameters.gpu_clock_type = clock_type; clock_type 219 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h uint32_t clock_type, uint32_t clock_value, clock_type 60 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c enum amd_pp_clock_type clk_type = clock_req->clock_type; clock_type 199 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c clock_req.clock_type = amd_pp_dcf_clock; clock_type 3856 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c enum amd_pp_clock_type clk_type = clock_req->clock_type; clock_type 3941 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c clock_req.clock_type = amd_pp_dcef_clock; clock_type 1435 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c enum amd_pp_clock_type clk_type = clock_req->clock_type; clock_type 1491 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c clock_req.clock_type = amd_pp_dcef_clock; clock_type 2246 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c enum amd_pp_clock_type clk_type = clock_req->clock_type; clock_type 2305 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c clock_req.clock_type = amd_pp_dcef_clock; clock_type 1264 drivers/gpu/drm/amd/powerplay/navi10_ppt.c clock_req.clock_type = amd_pp_dcef_clock; clock_type 1285 drivers/gpu/drm/amd/powerplay/smu_v11_0.c enum amd_pp_clock_type clk_type = clock_req->clock_type; clock_type 2264 drivers/gpu/drm/amd/powerplay/vega20_ppt.c clock_req.clock_type = amd_pp_dcef_clock; clock_type 291 drivers/gpu/drm/radeon/radeon.h u8 clock_type, clock_type 2838 drivers/gpu/drm/radeon/radeon_atombios.c u8 clock_type, clock_type 2856 drivers/gpu/drm/radeon/radeon_atombios.c args.v1.ucAction = clock_type; clock_type 2870 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ucAction = clock_type; clock_type 2885 drivers/gpu/drm/radeon/radeon_atombios.c if (clock_type == COMPUTE_ENGINE_PLL_PARAM) { clock_type 2886 drivers/gpu/drm/radeon/radeon_atombios.c args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); clock_type 2904 drivers/gpu/drm/radeon/radeon_atombios.c args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); clock_type 2935 drivers/gpu/drm/radeon/radeon_atombios.c args.v6_in.ulClock.ulComputeClockFlag = clock_type; clock_type 154 drivers/net/wan/c101.c switch(port->settings.clock_type) { clock_type 261 drivers/net/wan/c101.c if (new_line.clock_type != CLOCK_EXT && clock_type 262 drivers/net/wan/c101.c new_line.clock_type != CLOCK_TXFROMRX && clock_type 263 drivers/net/wan/c101.c new_line.clock_type != CLOCK_INT && clock_type 264 drivers/net/wan/c101.c new_line.clock_type != CLOCK_TXINT) clock_type 375 drivers/net/wan/c101.c card->settings.clock_type = CLOCK_EXT; clock_type 1906 drivers/net/wan/farsync.c switch (sync.clock_type) { clock_type 1965 drivers/net/wan/farsync.c sync.clock_type = FST_RDB(card, portConfig[i].internalClock) == clock_type 692 drivers/net/wan/fsl_ucc_hdlc.c line.clock_type = priv->clocking; clock_type 263 drivers/net/wan/ixp4xx_hss.c unsigned int clock_type, clock_rate, loopback; clock_type 400 drivers/net/wan/ixp4xx_hss.c if (port->clock_type == CLOCK_INT) clock_type 1262 drivers/net/wan/ixp4xx_hss.c new_line.clock_type = port->clock_type; clock_type 1276 drivers/net/wan/ixp4xx_hss.c clk = new_line.clock_type; clock_type 1286 drivers/net/wan/ixp4xx_hss.c port->clock_type = clk; /* Update settings */ clock_type 1351 drivers/net/wan/ixp4xx_hss.c port->clock_type = CLOCK_EXT; clock_type 173 drivers/net/wan/n2.c switch(port->settings.clock_type) { clock_type 280 drivers/net/wan/n2.c if (new_line.clock_type != CLOCK_EXT && clock_type 281 drivers/net/wan/n2.c new_line.clock_type != CLOCK_TXFROMRX && clock_type 282 drivers/net/wan/n2.c new_line.clock_type != CLOCK_INT && clock_type 283 drivers/net/wan/n2.c new_line.clock_type != CLOCK_TXINT) clock_type 469 drivers/net/wan/n2.c port->settings.clock_type = CLOCK_EXT; clock_type 127 drivers/net/wan/pc300too.c switch(port->settings.clock_type) { clock_type 243 drivers/net/wan/pc300too.c if (new_line.clock_type != CLOCK_EXT && clock_type 244 drivers/net/wan/pc300too.c new_line.clock_type != CLOCK_TXFROMRX && clock_type 245 drivers/net/wan/pc300too.c new_line.clock_type != CLOCK_INT && clock_type 246 drivers/net/wan/pc300too.c new_line.clock_type != CLOCK_TXINT) clock_type 455 drivers/net/wan/pc300too.c port->settings.clock_type = CLOCK_EXT; clock_type 125 drivers/net/wan/pci200syn.c switch(port->settings.clock_type) { clock_type 217 drivers/net/wan/pci200syn.c if (new_line.clock_type != CLOCK_EXT && clock_type 218 drivers/net/wan/pci200syn.c new_line.clock_type != CLOCK_TXFROMRX && clock_type 219 drivers/net/wan/pci200syn.c new_line.clock_type != CLOCK_INT && clock_type 220 drivers/net/wan/pci200syn.c new_line.clock_type != CLOCK_TXINT) clock_type 393 drivers/net/wan/pci200syn.c port->settings.clock_type = CLOCK_EXT; clock_type 59 drivers/net/wan/wanxl.c unsigned int clock_type; clock_type 356 drivers/net/wan/wanxl.c line.clock_type = get_status(port)->clocking; clock_type 374 drivers/net/wan/wanxl.c if (line.clock_type != CLOCK_EXT && clock_type 375 drivers/net/wan/wanxl.c line.clock_type != CLOCK_TXFROMRX) clock_type 381 drivers/net/wan/wanxl.c get_status(port)->clocking = line.clock_type; clock_type 56 drivers/nfc/fdp/fdp.c u8 clock_type; clock_type 119 drivers/nfc/fdp/fdp.c static int fdp_nci_set_clock(struct nci_dev *ndev, u8 clock_type, clock_type 139 drivers/nfc/fdp/fdp.c data[8] = clock_type; clock_type 577 drivers/nfc/fdp/fdp.c r = fdp_nci_set_clock(ndev, info->clock_type, info->clock_freq); clock_type 734 drivers/nfc/fdp/fdp.c int tx_tailroom, u8 clock_type, u32 clock_freq, clock_type 749 drivers/nfc/fdp/fdp.c info->clock_type = clock_type; clock_type 26 drivers/nfc/fdp/fdp.h u8 clock_type, u32 clock_freq, u8 *fw_vsc_cfg); clock_type 226 drivers/nfc/fdp/i2c.c u8 *clock_type, u32 *clock_freq, clock_type 232 drivers/nfc/fdp/i2c.c r = device_property_read_u8(dev, FDP_DP_CLOCK_TYPE_NAME, clock_type); clock_type 235 drivers/nfc/fdp/i2c.c *clock_type = 0; clock_type 272 drivers/nfc/fdp/i2c.c *clock_type, *clock_freq, *fw_vsc_cfg != NULL ? "yes" : "no"); clock_type 287 drivers/nfc/fdp/i2c.c u8 clock_type; clock_type 334 drivers/nfc/fdp/i2c.c fdp_nci_i2c_read_device_properties(dev, &clock_type, &clock_freq, clock_type 340 drivers/nfc/fdp/i2c.c clock_type, clock_freq, fw_vsc_cfg); clock_type 3541 drivers/staging/octeon-usb/octeon-hcd.c const char *clock_type; clock_type 3576 drivers/staging/octeon-usb/octeon-hcd.c "cavium,refclk-type", &clock_type); clock_type 3579 drivers/staging/octeon-usb/octeon-hcd.c "refclk-type", &clock_type); clock_type 3581 drivers/staging/octeon-usb/octeon-hcd.c if (!i && strcmp("crystal", clock_type) == 0) clock_type 43 drivers/staging/sm750fb/ddk750_chip.h enum clock_type clockType; clock_type 209 drivers/staging/sm750fb/ddk750_mode.c int ddk750_setModeTiming(struct mode_parameter *parm, enum clock_type clock) clock_type 36 drivers/staging/sm750fb/ddk750_mode.h int ddk750_setModeTiming(struct mode_parameter *parm, enum clock_type clock); clock_type 257 drivers/staging/sm750fb/sm750_hw.c enum clock_type clock; clock_type 7774 drivers/tty/synclink.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; clock_type 7775 drivers/tty/synclink.c case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; clock_type 7776 drivers/tty/synclink.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; clock_type 7777 drivers/tty/synclink.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; clock_type 7778 drivers/tty/synclink.c default: new_line.clock_type = CLOCK_DEFAULT; clock_type 7795 drivers/tty/synclink.c switch (new_line.clock_type) clock_type 1619 drivers/tty/synclink_gt.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; clock_type 1620 drivers/tty/synclink_gt.c case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; clock_type 1621 drivers/tty/synclink_gt.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; clock_type 1622 drivers/tty/synclink_gt.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; clock_type 1623 drivers/tty/synclink_gt.c default: new_line.clock_type = CLOCK_DEFAULT; clock_type 1640 drivers/tty/synclink_gt.c switch (new_line.clock_type) clock_type 1744 drivers/tty/synclinkmp.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; clock_type 1745 drivers/tty/synclinkmp.c case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; clock_type 1746 drivers/tty/synclinkmp.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; clock_type 1747 drivers/tty/synclinkmp.c case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; clock_type 1748 drivers/tty/synclinkmp.c default: new_line.clock_type = CLOCK_DEFAULT; clock_type 1765 drivers/tty/synclinkmp.c switch (new_line.clock_type) clock_type 434 drivers/video/fbdev/sm501fb.c unsigned int clock_type; clock_type 445 drivers/video/fbdev/sm501fb.c clock_type = SM501_CLOCK_V2XCLK; clock_type 451 drivers/video/fbdev/sm501fb.c clock_type = SM501_CLOCK_P2XCLK; clock_type 458 drivers/video/fbdev/sm501fb.c clock_type = 0; clock_type 504 drivers/video/fbdev/sm501fb.c sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type, clock_type 42 include/uapi/linux/hdlc/ioctl.h unsigned int clock_type; /* internal, external, TX-internal etc. */ clock_type 48 include/uapi/linux/hdlc/ioctl.h unsigned int clock_type; /* internal, external, TX-internal etc. */ clock_type 414 sound/pci/pcxhr/pcxhr.c enum pcxhr_clock_type clock_type, clock_type 421 sound/pci/pcxhr/pcxhr.c switch (clock_type) { clock_type 477 sound/pci/pcxhr/pcxhr.c enum pcxhr_clock_type clock_type, clock_type 481 sound/pci/pcxhr/pcxhr.c return hr222_get_external_clock(mgr, clock_type, clock_type 484 sound/pci/pcxhr/pcxhr.c return pcxhr_sub_get_external_clock(mgr, clock_type, clock_type 196 sound/pci/pcxhr/pcxhr.h enum pcxhr_clock_type clock_type, clock_type 403 sound/pci/pcxhr/pcxhr_mix22.c enum pcxhr_clock_type clock_type, clock_type 410 sound/pci/pcxhr/pcxhr_mix22.c if (clock_type == HR22_CLOCK_TYPE_AES_SYNC) { clock_type 416 sound/pci/pcxhr/pcxhr_mix22.c } else if (clock_type == HR22_CLOCK_TYPE_AES_1 && mgr->board_has_aes1) { clock_type 425 sound/pci/pcxhr/pcxhr_mix22.c clock_type); clock_type 431 sound/pci/pcxhr/pcxhr_mix22.c "get_external_clock(%d) = 0 Hz\n", clock_type); clock_type 19 sound/pci/pcxhr/pcxhr_mix22.h enum pcxhr_clock_type clock_type, clock_type 94 tools/testing/selftests/timers/inconsistency-check.c int consistency_test(int clock_type, unsigned long seconds) clock_type 102 tools/testing/selftests/timers/inconsistency-check.c clock_gettime(clock_type, &list[0]); clock_type 114 tools/testing/selftests/timers/inconsistency-check.c clock_gettime(clock_type, &list[i]);