clock 284 arch/arm/kernel/vdso.c if (!tk->tkr_mono.clock->archdata.vdso_direct) clock 63 arch/arm/mach-davinci/usb-da8xx.c .clock = "usb20", clock 29 arch/arm/mach-davinci/usb.c .clock = "usb", clock 196 arch/arm/mach-s3c24xx/iotiming-s3c2412.c static inline unsigned int s3c2412_decode_timing(unsigned int clock, u32 reg) clock 198 arch/arm/mach-s3c24xx/iotiming-s3c2412.c return (reg & 0xf) * clock; clock 27 arch/arm64/include/asm/vdso/vsyscall.h u32 use_syscall = !tk->tkr_mono.clock->archdata.vdso_direct; clock 11 arch/arm64/kernel/vdso/vgettimeofday.c int __kernel_clock_gettime(clockid_t clock, clock 14 arch/arm64/kernel/vdso/vgettimeofday.c return __cvdso_clock_gettime(clock, ts); clock 11 arch/arm64/kernel/vdso32/vgettimeofday.c int __vdso_clock_gettime(clockid_t clock, clock 18 arch/arm64/kernel/vdso32/vgettimeofday.c return __cvdso_clock_gettime32(clock, ts); clock 21 arch/arm64/kernel/vdso32/vgettimeofday.c int __vdso_clock_gettime64(clockid_t clock, clock 28 arch/arm64/kernel/vdso32/vgettimeofday.c return __cvdso_clock_gettime(clock, ts); clock 439 arch/ia64/kernel/time.c fsyscall_gtod_data.clk_fsys_mmio = tk->tkr_mono.clock->archdata.fsys_mmio; clock 159 arch/mips/ar7/clock.c static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock, clock 164 arch/mips/ar7/clock.c u32 ctrl = readl(&clock->ctrl); clock 165 arch/mips/ar7/clock.c u32 pll = readl(&clock->pll); clock 205 arch/mips/ar7/clock.c static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, clock 228 arch/mips/ar7/clock.c writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl); clock 230 arch/mips/ar7/clock.c writel(4, &clock->pll); clock 231 arch/mips/ar7/clock.c while (readl(&clock->pll) & PLL_STATUS) clock 233 arch/mips/ar7/clock.c writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); clock 261 arch/mips/ar7/clock.c static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock, clock 269 arch/mips/ar7/clock.c writel(0, &clock->ctrl); clock 270 arch/mips/ar7/clock.c writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv); clock 271 arch/mips/ar7/clock.c writel((mul - 1) & 0xF, &clock->mul); clock 273 arch/mips/ar7/clock.c while (readl(&clock->status) & 0x1) clock 276 arch/mips/ar7/clock.c writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv); clock 278 arch/mips/ar7/clock.c writel(readl(&clock->cmden) | 1, &clock->cmden); clock 279 arch/mips/ar7/clock.c writel(readl(&clock->cmd) | 1, &clock->cmd); clock 281 arch/mips/ar7/clock.c while (readl(&clock->status) & 0x1) clock 284 arch/mips/ar7/clock.c writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2); clock 286 arch/mips/ar7/clock.c writel(readl(&clock->cmden) | 1, &clock->cmden); clock 287 arch/mips/ar7/clock.c writel(readl(&clock->cmd) | 1, &clock->cmd); clock 289 arch/mips/ar7/clock.c while (readl(&clock->status) & 0x1) clock 292 arch/mips/ar7/clock.c writel(readl(&clock->ctrl) | 1, &clock->ctrl); clock 11 arch/mips/include/asm/ds1287.h extern void ds1287_set_base_clock(unsigned int clock); clock 563 arch/mips/include/asm/gt64120.h extern void gt641xx_set_base_clock(unsigned int clock); clock 68 arch/mips/include/asm/time.h unsigned int clock) clock 70 arch/mips/include/asm/time.h clockevents_calc_mult_shift(cd, clock, 4); clock 25 arch/mips/include/asm/vdso/vsyscall.h u32 clock_mode = tk->tkr_mono.clock->archdata.vdso_clock_mode; clock 67 arch/mips/include/asm/vr41xx/vr41xx.h extern void vr41xx_supply_clock(vr41xx_clock_t clock); clock 68 arch/mips/include/asm/vr41xx/vr41xx.h extern void vr41xx_mask_clock(vr41xx_clock_t clock); clock 19 arch/mips/kernel/cevt-gt641xx.c void gt641xx_set_base_clock(unsigned int clock) clock 21 arch/mips/kernel/cevt-gt641xx.c gt641xx_base_clock = clock; clock 14 arch/mips/vdso/vgettimeofday.c int __vdso_clock_gettime(clockid_t clock, clock 17 arch/mips/vdso/vgettimeofday.c return __cvdso_clock_gettime32(clock, ts); clock 42 arch/mips/vdso/vgettimeofday.c int __vdso_clock_gettime64(clockid_t clock, clock 45 arch/mips/vdso/vgettimeofday.c return __cvdso_clock_gettime(clock, ts); clock 50 arch/mips/vdso/vgettimeofday.c int __vdso_clock_gettime(clockid_t clock, clock 53 arch/mips/vdso/vgettimeofday.c return __cvdso_clock_gettime(clock, ts); clock 64 arch/mips/vr41xx/common/cmu.c void vr41xx_supply_clock(vr41xx_clock_t clock) clock 68 arch/mips/vr41xx/common/cmu.c switch (clock) { clock 116 arch/mips/vr41xx/common/cmu.c if (clock == CEU_CLOCK || clock == ETHER0_CLOCK || clock 117 arch/mips/vr41xx/common/cmu.c clock == ETHER1_CLOCK) clock 127 arch/mips/vr41xx/common/cmu.c void vr41xx_mask_clock(vr41xx_clock_t clock) clock 131 arch/mips/vr41xx/common/cmu.c switch (clock) { clock 191 arch/mips/vr41xx/common/cmu.c if (clock == CEU_CLOCK || clock == ETHER0_CLOCK || clock 192 arch/mips/vr41xx/common/cmu.c clock == ETHER1_CLOCK) clock 485 arch/powerpc/boot/4xx.c unsigned int clock; clock 505 arch/powerpc/boot/4xx.c clock = ser_clk; clock 507 arch/powerpc/boot/4xx.c clock = plb_clk / __fix_zero(sdr & 0xff, 256); clock 509 arch/powerpc/boot/4xx.c dt_fixup_clock(path, clock); clock 607 arch/powerpc/include/asm/cpm1.h int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode); clock 1136 arch/powerpc/include/asm/cpm2.h extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode); clock 1137 arch/powerpc/include/asm/cpm2.h extern int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock); clock 29 arch/powerpc/include/asm/udbg.h extern void udbg_uart_setup(unsigned int speed, unsigned int clock); clock 30 arch/powerpc/include/asm/udbg.h extern unsigned int udbg_probe_uart_speed(unsigned int clock); clock 34 arch/powerpc/kernel/legacy_serial.c unsigned int clock; clock 79 arch/powerpc/kernel/legacy_serial.c u32 clock = BASE_BAUD * 16; clock 86 arch/powerpc/kernel/legacy_serial.c clock = be32_to_cpup(clk); clock 136 arch/powerpc/kernel/legacy_serial.c legacy_serial_ports[index].uartclk = clock; clock 142 arch/powerpc/kernel/legacy_serial.c legacy_serial_infos[index].clock = clock; clock 349 arch/powerpc/kernel/legacy_serial.c info->speed = udbg_probe_uart_speed(info->clock); clock 353 arch/powerpc/kernel/legacy_serial.c udbg_uart_setup(info->speed, info->clock); clock 871 arch/powerpc/kernel/time.c struct clocksource *clock = tk->tkr_mono.clock; clock 878 arch/powerpc/kernel/time.c if (clock != &clocksource_timebase) clock 905 arch/powerpc/kernel/time.c if (mult <= 62500000 && clock->shift >= 16) clock 906 arch/powerpc/kernel/time.c new_tb_to_xs = ((u64) mult * 295147905179ULL) >> (clock->shift - 16); clock 908 arch/powerpc/kernel/time.c new_tb_to_xs = (u64) mult * (19342813113834067ULL >> clock->shift); clock 957 arch/powerpc/kernel/time.c struct clocksource *clock; clock 960 arch/powerpc/kernel/time.c clock = &clocksource_rtc; clock 962 arch/powerpc/kernel/time.c clock = &clocksource_timebase; clock 964 arch/powerpc/kernel/time.c if (clocksource_register_hz(clock, tb_ticks_per_sec)) { clock 966 arch/powerpc/kernel/time.c clock->name); clock 971 arch/powerpc/kernel/time.c clock->name, clock->mult, clock->shift); clock 95 arch/powerpc/kernel/udbg_16550.c void udbg_uart_setup(unsigned int speed, unsigned int clock) clock 102 arch/powerpc/kernel/udbg_16550.c if (clock == 0) clock 103 arch/powerpc/kernel/udbg_16550.c clock = 1843200; clock 107 arch/powerpc/kernel/udbg_16550.c base_bauds = clock / 16; clock 124 arch/powerpc/kernel/udbg_16550.c unsigned int udbg_probe_uart_speed(unsigned int clock) clock 149 arch/powerpc/kernel/udbg_16550.c speed = (clock / prescaler) / (divisor * 16); clock 152 arch/powerpc/kernel/udbg_16550.c if (speed > (clock / 16)) clock 397 arch/powerpc/platforms/8xx/cpm1.c int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode) clock 497 arch/powerpc/platforms/8xx/cpm1.c if (clk_map[i][0] == target && clk_map[i][1] == clock) { clock 56 arch/powerpc/platforms/embedded6xx/ls_uart.c #define AVR_QUOT(clock) ((clock) + 8 * 9600) / (16 * 9600) clock 139 arch/powerpc/sysdev/cpm2.c int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) clock 244 arch/powerpc/sysdev/cpm2.c if (clk_map[i][0] == target && clk_map[i][1] == clock) { clock 269 arch/powerpc/sysdev/cpm2.c int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock) clock 308 arch/powerpc/sysdev/cpm2.c if (clk_map[i][0] == target && clk_map[i][1] == clock) { clock 70 arch/powerpc/sysdev/fsl_gtm.c unsigned int clock; clock 181 arch/powerpc/sysdev/fsl_gtm.c prescaler = gtm->clock / frequency; clock 382 arch/powerpc/sysdev/fsl_gtm.c const u32 *clock; clock 394 arch/powerpc/sysdev/fsl_gtm.c clock = of_get_property(np, "clock-frequency", &size); clock 395 arch/powerpc/sysdev/fsl_gtm.c if (!clock || size != sizeof(*clock)) { clock 399 arch/powerpc/sysdev/fsl_gtm.c gtm->clock = *clock; clock 181 arch/s390/include/asm/timex.h int get_phys_clock(unsigned long *clock); clock 21 arch/s390/include/uapi/asm/debug.h unsigned long long clock:52; clock 280 arch/s390/kernel/time.c if (tk->tkr_mono.clock != &clocksource_tod) clock 366 arch/s390/kernel/time.c int get_phys_clock(unsigned long *clock) clock 373 arch/s390/kernel/time.c *clock = get_tod_clock() - lpar_offset; clock 127 arch/s390/kernel/vtime.c u64 timer, clock, user, guest, system, hardirq, softirq; clock 130 arch/s390/kernel/vtime.c clock = S390_lowcore.last_update_clock; clock 140 arch/s390/kernel/vtime.c clock = S390_lowcore.last_update_clock - clock; clock 165 arch/s390/kernel/vtime.c clock - user - guest - system - hardirq - softirq; clock 22 arch/sparc/include/asm/vvar.h } clock; clock 33 arch/sparc/kernel/vdso.c vdata->vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode; clock 34 arch/sparc/kernel/vdso.c vdata->clock.cycle_last = tk->tkr_mono.cycle_last; clock 35 arch/sparc/kernel/vdso.c vdata->clock.mask = tk->tkr_mono.mask; clock 36 arch/sparc/kernel/vdso.c vdata->clock.mult = tk->tkr_mono.mult; clock 37 arch/sparc/kernel/vdso.c vdata->clock.shift = tk->tkr_mono.shift; clock 66 arch/sparc/vdso/vclock_gettime.c notrace static long vdso_fallback_gettime(long clock, struct timespec *ts) clock 69 arch/sparc/vdso/vclock_gettime.c register long o0 __asm__("o0") = clock; clock 132 arch/sparc/vdso/vclock_gettime.c v = (cycles - vvar->clock.cycle_last) & vvar->clock.mask; clock 133 arch/sparc/vdso/vclock_gettime.c return v * vvar->clock.mult; clock 142 arch/sparc/vdso/vclock_gettime.c v = (cycles - vvar->clock.cycle_last) & vvar->clock.mask; clock 143 arch/sparc/vdso/vclock_gettime.c return v * vvar->clock.mult; clock 157 arch/sparc/vdso/vclock_gettime.c ns >>= vvar->clock.shift; clock 177 arch/sparc/vdso/vclock_gettime.c ns >>= vvar->clock.shift; clock 197 arch/sparc/vdso/vclock_gettime.c ns >>= vvar->clock.shift; clock 217 arch/sparc/vdso/vclock_gettime.c ns >>= vvar->clock.shift; clock 254 arch/sparc/vdso/vclock_gettime.c __vdso_clock_gettime(clockid_t clock, struct timespec *ts) clock 258 arch/sparc/vdso/vclock_gettime.c switch (clock) { clock 275 arch/sparc/vdso/vclock_gettime.c return vdso_fallback_gettime(clock, ts); clock 282 arch/sparc/vdso/vclock_gettime.c __vdso_clock_gettime_stick(clockid_t clock, struct timespec *ts) clock 286 arch/sparc/vdso/vclock_gettime.c switch (clock) { clock 303 arch/sparc/vdso/vclock_gettime.c return vdso_fallback_gettime(clock, ts); clock 75 arch/unicore32/kernel/puv3-core.c .clock = 0, clock 38 arch/x86/entry/vdso/vclock_gettime.c extern int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts); clock 39 arch/x86/entry/vdso/vclock_gettime.c extern int __vdso_clock_getres(clockid_t clock, struct __kernel_timespec *res); clock 41 arch/x86/entry/vdso/vclock_gettime.c int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts) clock 43 arch/x86/entry/vdso/vclock_gettime.c return __cvdso_clock_gettime(clock, ts); clock 49 arch/x86/entry/vdso/vclock_gettime.c int __vdso_clock_getres(clockid_t clock, clock 52 arch/x86/entry/vdso/vclock_gettime.c return __cvdso_clock_getres(clock, res); clock 59 arch/x86/entry/vdso/vclock_gettime.c extern int __vdso_clock_gettime(clockid_t clock, struct old_timespec32 *ts); clock 60 arch/x86/entry/vdso/vclock_gettime.c extern int __vdso_clock_getres(clockid_t clock, struct old_timespec32 *res); clock 62 arch/x86/entry/vdso/vclock_gettime.c int __vdso_clock_gettime(clockid_t clock, struct old_timespec32 *ts) clock 64 arch/x86/entry/vdso/vclock_gettime.c return __cvdso_clock_gettime32(clock, ts); clock 70 arch/x86/entry/vdso/vclock_gettime.c int __vdso_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts) clock 72 arch/x86/entry/vdso/vclock_gettime.c return __cvdso_clock_gettime(clock, ts); clock 78 arch/x86/entry/vdso/vclock_gettime.c int __vdso_clock_getres(clockid_t clock, struct old_timespec32 *res) clock 80 arch/x86/entry/vdso/vclock_gettime.c return __cvdso_clock_getres_time32(clock, res); clock 112 arch/x86/include/asm/vdso/gettimeofday.h : "0" (__NR_clock_gettime64), [clock] "g" (_clkid), "c" (_ts) clock 129 arch/x86/include/asm/vdso/gettimeofday.h : "0" (__NR_clock_gettime), [clock] "g" (_clkid), "c" (_ts) clock 164 arch/x86/include/asm/vdso/gettimeofday.h : "0" (__NR_clock_getres_time64), [clock] "g" (_clkid), "c" (_ts) clock 181 arch/x86/include/asm/vdso/gettimeofday.h : "0" (__NR_clock_getres), [clock] "g" (_clkid), "c" (_ts) clock 29 arch/x86/include/asm/vdso/vsyscall.h int vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode; clock 1628 arch/x86/kvm/x86.c } clock; clock 1647 arch/x86/kvm/x86.c vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode; clock 1648 arch/x86/kvm/x86.c vdata->clock.cycle_last = tk->tkr_mono.cycle_last; clock 1649 arch/x86/kvm/x86.c vdata->clock.mask = tk->tkr_mono.mask; clock 1650 arch/x86/kvm/x86.c vdata->clock.mult = tk->tkr_mono.mult; clock 1651 arch/x86/kvm/x86.c vdata->clock.shift = tk->tkr_mono.shift; clock 1862 arch/x86/kvm/x86.c (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched)) clock 1867 arch/x86/kvm/x86.c ka->use_master_clock, gtod->clock.vclock_mode); clock 1933 arch/x86/kvm/x86.c if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK) clock 2064 arch/x86/kvm/x86.c u64 last = pvclock_gtod_data.clock.cycle_last; clock 2087 arch/x86/kvm/x86.c switch (gtod->clock.vclock_mode) { clock 2094 arch/x86/kvm/x86.c v = (tsc_pg_val - gtod->clock.cycle_last) & clock 2095 arch/x86/kvm/x86.c gtod->clock.mask; clock 2104 arch/x86/kvm/x86.c v = (*tsc_timestamp - gtod->clock.cycle_last) & clock 2105 arch/x86/kvm/x86.c gtod->clock.mask; clock 2114 arch/x86/kvm/x86.c return v * gtod->clock.mult; clock 2128 arch/x86/kvm/x86.c ns >>= gtod->clock.shift; clock 2148 arch/x86/kvm/x86.c ns >>= gtod->clock.shift; clock 2161 arch/x86/kvm/x86.c if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode)) clock 2173 arch/x86/kvm/x86.c if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode)) clock 2246 arch/x86/kvm/x86.c vclock_mode = pvclock_gtod_data.clock.vclock_mode; clock 5129 arch/x86/kvm/x86.c kvm->arch.kvmclock_offset += user_ns.clock - now_ns; clock 5138 arch/x86/kvm/x86.c user_ns.clock = now_ns; clock 7229 arch/x86/kvm/x86.c if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) && clock 16 arch/x86/um/vdso/um_vdso.c int __vdso_clock_gettime(clockid_t clock, struct timespec *ts) clock 21 arch/x86/um/vdso/um_vdso.c "0" (__NR_clock_gettime), "D" (clock), "S" (ts) : "memory"); clock 43 drivers/ata/pata_amd.c static void timing_setup(struct ata_port *ap, struct ata_device *adev, int offset, int speed, int clock) clock 59 drivers/ata/pata_amd.c if (clock >= 2) clock 97 drivers/ata/pata_amd.c switch (clock) { clock 40 drivers/ata/pata_artop.c static int clock = 0; clock 109 drivers/ata/pata_artop.c pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]); clock 163 drivers/ata/pata_artop.c pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]); clock 224 drivers/ata/pata_artop.c u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock; clock 262 drivers/ata/pata_artop.c u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock; clock 192 drivers/ata/pata_it821x.c int clock, altclock; clock 198 drivers/ata/pata_it821x.c clock = itdev->want[0][1]; clock 201 drivers/ata/pata_it821x.c clock = itdev->want[1][1]; clock 206 drivers/ata/pata_it821x.c if (clock == ATA_ANY) clock 207 drivers/ata/pata_it821x.c clock = altclock; clock 210 drivers/ata/pata_it821x.c if (clock == ATA_ANY) clock 213 drivers/ata/pata_it821x.c if (clock == itdev->clock_mode) clock 217 drivers/ata/pata_it821x.c if (clock == ATA_66) clock 86 drivers/ata/pata_legacy.c u8 clock[2]; clock 451 drivers/ata/pata_legacy.c int clock; clock 461 drivers/ata/pata_legacy.c clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03]; clock 464 drivers/ata/pata_legacy.c ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000); clock 469 drivers/ata/pata_legacy.c ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000); clock 526 drivers/ata/pata_legacy.c int clock; clock 540 drivers/ata/pata_legacy.c clock = 1000000000 / khz[sysclk]; clock 543 drivers/ata/pata_legacy.c ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000); clock 548 drivers/ata/pata_legacy.c ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000); clock 656 drivers/ata/pata_legacy.c ld_qdi->clock[adev->devno] = timing; clock 682 drivers/ata/pata_legacy.c if (ld_qdi->clock[adev->devno] != ld_qdi->last) { clock 684 drivers/ata/pata_legacy.c ld_qdi->last = ld_qdi->clock[adev->devno]; clock 685 drivers/ata/pata_legacy.c outb(ld_qdi->clock[adev->devno], ld_qdi->timing + clock 110 drivers/ata/pata_opti.c int clock; clock 126 drivers/ata/pata_opti.c clock = ioread16(regio + 5) & 1; clock 133 drivers/ata/pata_opti.c addr = addr_timing[clock][pio]; clock 136 drivers/ata/pata_opti.c u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0]; clock 143 drivers/ata/pata_opti.c opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG); clock 144 drivers/ata/pata_opti.c opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG); clock 185 drivers/ata/pata_pdc202xx_old.c void __iomem *clock = master + 0x11; clock 192 drivers/ata/pata_pdc202xx_old.c iowrite8(ioread8(clock) | sel66, clock); clock 194 drivers/ata/pata_pdc202xx_old.c iowrite8(ioread8(clock) & ~sel66, clock); clock 236 drivers/ata/pata_pdc202xx_old.c void __iomem *clock = master + 0x11; clock 242 drivers/ata/pata_pdc202xx_old.c iowrite8(ioread8(clock) & ~sel66, clock); clock 246 drivers/ata/pata_pdc202xx_old.c iowrite8(ioread8(clock) & ~sel66, clock); clock 120 drivers/ata/pata_sc1200.c int clock = sc1200_clock(); clock 127 drivers/ata/pata_sc1200.c format = udma_timing[clock][mode - XFER_UDMA_0]; clock 129 drivers/ata/pata_sc1200.c format = mwdma_timing[clock][mode - XFER_MW_DMA_0]; clock 1263 drivers/ata/sata_sx4.c u32 clock = 0; clock 1300 drivers/ata/sata_sx4.c clock = (ticks / 300000); clock 1301 drivers/ata/sata_sx4.c VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); clock 1303 drivers/ata/sata_sx4.c clock = (clock * 33); clock 1304 drivers/ata/sata_sx4.c VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); clock 1307 drivers/ata/sata_sx4.c fparam = (1400000 / clock) - 2; clock 557 drivers/atm/he.c unsigned clock, rate, delta; clock 567 drivers/atm/he.c clock = he_is622(he_dev) ? 66667000 : 50000000; clock 577 drivers/atm/he.c unsigned period = clock / rate; clock 2124 drivers/atm/he.c unsigned cid, rsr0, rsr1, rsr4, tsr0, tsr0_aal, tsr4, period, reg, clock; clock 2226 drivers/atm/he.c clock = he_is622(he_dev) ? 66667000 : 50000000; clock 2227 drivers/atm/he.c period = clock / pcr_goal; clock 388 drivers/bcma/driver_chipcommon_pmu.c u32 clock; clock 404 drivers/bcma/driver_chipcommon_pmu.c clock = (25000000 / 4) * ndiv * p2div / p1div; clock 407 drivers/bcma/driver_chipcommon_pmu.c clock = (25000000 / 2) * ndiv * p2div / p1div; clock 410 drivers/bcma/driver_chipcommon_pmu.c clock = clock / 4; clock 412 drivers/bcma/driver_chipcommon_pmu.c return clock; clock 148 drivers/bluetooth/hci_bcm.c struct bcm_write_uart_clock_setting clock; clock 150 drivers/bluetooth/hci_bcm.c clock.type = BCM_UART_CLOCK_48MHZ; clock 152 drivers/bluetooth/hci_bcm.c bt_dev_dbg(hdev, "Set Controller clock (%d)", clock.type); clock 157 drivers/bluetooth/hci_bcm.c skb = __hci_cmd_sync(hdev, 0xfc45, 1, &clock, HCI_INIT_TIMEOUT); clock 192 drivers/bus/ti-sysc.c struct clk *clock; clock 201 drivers/bus/ti-sysc.c clock = of_clk_get_by_name(np, n); clock 202 drivers/bus/ti-sysc.c if (!IS_ERR(clock)) { clock 203 drivers/bus/ti-sysc.c clk_put(clock); clock 212 drivers/bus/ti-sysc.c clock = devm_get_clk_from_child(ddata->dev, child, name); clock 213 drivers/bus/ti-sysc.c if (IS_ERR(clock)) clock 214 drivers/bus/ti-sysc.c return PTR_ERR(clock); clock 227 drivers/bus/ti-sysc.c cl->clk = clock; clock 230 drivers/bus/ti-sysc.c clk_put(clock); clock 374 drivers/bus/ti-sysc.c struct clk *clock; clock 381 drivers/bus/ti-sysc.c clock = ddata->clocks[i]; clock 384 drivers/bus/ti-sysc.c if (IS_ERR_OR_NULL(clock)) clock 387 drivers/bus/ti-sysc.c error = clk_enable(clock); clock 396 drivers/bus/ti-sysc.c clock = ddata->clocks[i]; clock 399 drivers/bus/ti-sysc.c if (IS_ERR_OR_NULL(clock)) clock 402 drivers/bus/ti-sysc.c clk_disable(clock); clock 410 drivers/bus/ti-sysc.c struct clk *clock; clock 417 drivers/bus/ti-sysc.c clock = ddata->clocks[i]; clock 418 drivers/bus/ti-sysc.c if (IS_ERR_OR_NULL(clock)) clock 421 drivers/bus/ti-sysc.c clk_disable(clock); clock 427 drivers/bus/ti-sysc.c struct clk *clock; clock 434 drivers/bus/ti-sysc.c clock = ddata->clocks[i]; clock 437 drivers/bus/ti-sysc.c if (IS_ERR_OR_NULL(clock)) clock 440 drivers/bus/ti-sysc.c error = clk_enable(clock); clock 449 drivers/bus/ti-sysc.c clock = ddata->clocks[i]; clock 450 drivers/bus/ti-sysc.c if (IS_ERR_OR_NULL(clock)) clock 453 drivers/bus/ti-sysc.c clk_disable(clock); clock 461 drivers/bus/ti-sysc.c struct clk *clock; clock 468 drivers/bus/ti-sysc.c clock = ddata->clocks[i]; clock 471 drivers/bus/ti-sysc.c if (IS_ERR_OR_NULL(clock)) clock 474 drivers/bus/ti-sysc.c clk_disable(clock); clock 910 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 911 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 912 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 922 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 923 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 959 drivers/clk/bcm/clk-bcm2835.c static long bcm2835_clock_rate_from_divisor(struct bcm2835_clock *clock, clock 963 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 989 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 990 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 991 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 999 drivers/clk/bcm/clk-bcm2835.c return bcm2835_clock_rate_from_divisor(clock, parent_rate, div); clock 1002 drivers/clk/bcm/clk-bcm2835.c static void bcm2835_clock_wait_busy(struct bcm2835_clock *clock) clock 1004 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 1005 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 1011 drivers/clk/bcm/clk-bcm2835.c clk_hw_get_name(&clock->hw)); clock 1020 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 1021 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 1022 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 1030 drivers/clk/bcm/clk-bcm2835.c bcm2835_clock_wait_busy(clock); clock 1035 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 1036 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 1037 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 1063 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 1064 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 1065 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 1106 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 1107 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 1108 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 1119 drivers/clk/bcm/clk-bcm2835.c *avgrate = bcm2835_clock_rate_from_divisor(clock, *prate, *div); clock 1125 drivers/clk/bcm/clk-bcm2835.c high = bcm2835_clock_rate_from_divisor(clock, *prate, clock 1128 drivers/clk/bcm/clk-bcm2835.c low = bcm2835_clock_rate_from_divisor(clock, *prate, clock 1224 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 1225 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 1226 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 1235 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 1236 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 1237 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 1257 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); clock 1258 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_cprman *cprman = clock->cprman; clock 1259 drivers/clk/bcm/clk-bcm2835.c const struct bcm2835_clock_data *data = clock->data; clock 1391 drivers/clk/bcm/clk-bcm2835.c struct bcm2835_clock *clock; clock 1437 drivers/clk/bcm/clk-bcm2835.c clock = devm_kzalloc(cprman->dev, sizeof(*clock), GFP_KERNEL); clock 1438 drivers/clk/bcm/clk-bcm2835.c if (!clock) clock 1441 drivers/clk/bcm/clk-bcm2835.c clock->cprman = cprman; clock 1442 drivers/clk/bcm/clk-bcm2835.c clock->data = data; clock 1443 drivers/clk/bcm/clk-bcm2835.c clock->hw.init = &init; clock 1445 drivers/clk/bcm/clk-bcm2835.c ret = devm_clk_hw_register(cprman->dev, &clock->hw); clock 1448 drivers/clk/bcm/clk-bcm2835.c return &clock->hw; clock 540 drivers/clk/bcm/clk-kona-setup.c const char **clock; clock 556 drivers/clk/bcm/clk-kona-setup.c for (clock = clocks; *clock; clock++) clock 557 drivers/clk/bcm/clk-kona-setup.c if (*clock == BAD_CLK_NAME) clock 559 drivers/clk/bcm/clk-kona-setup.c orig_count = (u32)(clock - clocks); clock 479 drivers/clk/clk-cdce706.c unsigned clock, source; clock 498 drivers/clk/clk-cdce706.c ret = cdce706_reg_read(cdce, CDCE706_CLKIN_CLOCK, &clock); clock 501 drivers/clk/clk-cdce706.c cdce->clkin[0].parent = !!(clock & CDCE706_CLKIN_CLOCK_MASK); clock 50 drivers/clk/renesas/clk-div6.c struct div6_clock *clock = to_div6_clock(hw); clock 53 drivers/clk/renesas/clk-div6.c val = (readl(clock->reg) & ~(CPG_DIV6_DIV_MASK | CPG_DIV6_CKSTP)) clock 54 drivers/clk/renesas/clk-div6.c | CPG_DIV6_DIV(clock->div - 1); clock 55 drivers/clk/renesas/clk-div6.c writel(val, clock->reg); clock 62 drivers/clk/renesas/clk-div6.c struct div6_clock *clock = to_div6_clock(hw); clock 65 drivers/clk/renesas/clk-div6.c val = readl(clock->reg); clock 75 drivers/clk/renesas/clk-div6.c writel(val, clock->reg); clock 80 drivers/clk/renesas/clk-div6.c struct div6_clock *clock = to_div6_clock(hw); clock 82 drivers/clk/renesas/clk-div6.c return !(readl(clock->reg) & CPG_DIV6_CKSTP); clock 88 drivers/clk/renesas/clk-div6.c struct div6_clock *clock = to_div6_clock(hw); clock 90 drivers/clk/renesas/clk-div6.c return parent_rate / clock->div; clock 116 drivers/clk/renesas/clk-div6.c struct div6_clock *clock = to_div6_clock(hw); clock 120 drivers/clk/renesas/clk-div6.c clock->div = div; clock 122 drivers/clk/renesas/clk-div6.c val = readl(clock->reg) & ~CPG_DIV6_DIV_MASK; clock 125 drivers/clk/renesas/clk-div6.c writel(val | CPG_DIV6_DIV(clock->div - 1), clock->reg); clock 132 drivers/clk/renesas/clk-div6.c struct div6_clock *clock = to_div6_clock(hw); clock 136 drivers/clk/renesas/clk-div6.c if (clock->src_width == 0) clock 139 drivers/clk/renesas/clk-div6.c hw_index = (readl(clock->reg) >> clock->src_shift) & clock 140 drivers/clk/renesas/clk-div6.c (BIT(clock->src_width) - 1); clock 142 drivers/clk/renesas/clk-div6.c if (clock->parents[i] == hw_index) clock 153 drivers/clk/renesas/clk-div6.c struct div6_clock *clock = to_div6_clock(hw); clock 160 drivers/clk/renesas/clk-div6.c mask = ~((BIT(clock->src_width) - 1) << clock->src_shift); clock 161 drivers/clk/renesas/clk-div6.c hw_index = clock->parents[index]; clock 163 drivers/clk/renesas/clk-div6.c writel((readl(clock->reg) & mask) | (hw_index << clock->src_shift), clock 164 drivers/clk/renesas/clk-div6.c clock->reg); clock 183 drivers/clk/renesas/clk-div6.c struct div6_clock *clock = container_of(nb, struct div6_clock, nb); clock 194 drivers/clk/renesas/clk-div6.c if (__clk_get_enable_count(clock->hw.clk)) clock 195 drivers/clk/renesas/clk-div6.c cpg_div6_clock_enable(&clock->hw); clock 197 drivers/clk/renesas/clk-div6.c cpg_div6_clock_disable(&clock->hw); clock 220 drivers/clk/renesas/clk-div6.c struct div6_clock *clock; clock 224 drivers/clk/renesas/clk-div6.c clock = kzalloc(struct_size(clock, parents, num_parents), GFP_KERNEL); clock 225 drivers/clk/renesas/clk-div6.c if (!clock) clock 228 drivers/clk/renesas/clk-div6.c clock->reg = reg; clock 234 drivers/clk/renesas/clk-div6.c clock->div = (readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1; clock 239 drivers/clk/renesas/clk-div6.c clock->src_shift = clock->src_width = 0; clock 243 drivers/clk/renesas/clk-div6.c clock->src_shift = 6; clock 244 drivers/clk/renesas/clk-div6.c clock->src_width = 2; clock 248 drivers/clk/renesas/clk-div6.c clock->src_shift = 12; clock 249 drivers/clk/renesas/clk-div6.c clock->src_width = 3; clock 262 drivers/clk/renesas/clk-div6.c clock->parents[valid_parents] = i; clock 274 drivers/clk/renesas/clk-div6.c clock->hw.init = &init; clock 276 drivers/clk/renesas/clk-div6.c clk = clk_register(NULL, &clock->hw); clock 281 drivers/clk/renesas/clk-div6.c clock->nb.notifier_call = cpg_div6_clock_notifier_call; clock 282 drivers/clk/renesas/clk-div6.c raw_notifier_chain_register(notifiers, &clock->nb); clock 288 drivers/clk/renesas/clk-div6.c kfree(clock); clock 77 drivers/clk/renesas/clk-mstp.c struct mstp_clock *clock = to_mstp_clock(hw); clock 78 drivers/clk/renesas/clk-mstp.c struct mstp_clock_group *group = clock->group; clock 79 drivers/clk/renesas/clk-mstp.c u32 bitmask = BIT(clock->bit_index); clock 112 drivers/clk/renesas/clk-mstp.c group->smstpcr, clock->bit_index); clock 131 drivers/clk/renesas/clk-mstp.c struct mstp_clock *clock = to_mstp_clock(hw); clock 132 drivers/clk/renesas/clk-mstp.c struct mstp_clock_group *group = clock->group; clock 140 drivers/clk/renesas/clk-mstp.c return !(value & BIT(clock->bit_index)); clock 154 drivers/clk/renesas/clk-mstp.c struct mstp_clock *clock; clock 157 drivers/clk/renesas/clk-mstp.c clock = kzalloc(sizeof(*clock), GFP_KERNEL); clock 158 drivers/clk/renesas/clk-mstp.c if (!clock) clock 172 drivers/clk/renesas/clk-mstp.c clock->bit_index = index; clock 173 drivers/clk/renesas/clk-mstp.c clock->group = group; clock 174 drivers/clk/renesas/clk-mstp.c clock->hw.init = &init; clock 176 drivers/clk/renesas/clk-mstp.c clk = clk_register(NULL, &clock->hw); clock 179 drivers/clk/renesas/clk-mstp.c kfree(clock); clock 280 drivers/clk/renesas/rcar-gen3-cpg.c struct sd_clock *clock = to_sd_clock(hw); clock 282 drivers/clk/renesas/rcar-gen3-cpg.c cpg_reg_modify(clock->csn.reg, CPG_SD_STP_MASK, clock 283 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_table[clock->cur_div_idx].val & clock 291 drivers/clk/renesas/rcar-gen3-cpg.c struct sd_clock *clock = to_sd_clock(hw); clock 293 drivers/clk/renesas/rcar-gen3-cpg.c cpg_reg_modify(clock->csn.reg, 0, CPG_SD_STP_MASK); clock 298 drivers/clk/renesas/rcar-gen3-cpg.c struct sd_clock *clock = to_sd_clock(hw); clock 300 drivers/clk/renesas/rcar-gen3-cpg.c return !(readl(clock->csn.reg) & CPG_SD_STP_MASK); clock 306 drivers/clk/renesas/rcar-gen3-cpg.c struct sd_clock *clock = to_sd_clock(hw); clock 309 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_table[clock->cur_div_idx].div); clock 312 drivers/clk/renesas/rcar-gen3-cpg.c static unsigned int cpg_sd_clock_calc_div(struct sd_clock *clock, clock 319 drivers/clk/renesas/rcar-gen3-cpg.c for (i = 0; i < clock->div_num; i++) { clock 321 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_table[i].div); clock 324 drivers/clk/renesas/rcar-gen3-cpg.c best_div = clock->div_table[i].div; clock 335 drivers/clk/renesas/rcar-gen3-cpg.c struct sd_clock *clock = to_sd_clock(hw); clock 336 drivers/clk/renesas/rcar-gen3-cpg.c unsigned int div = cpg_sd_clock_calc_div(clock, rate, *parent_rate); clock 344 drivers/clk/renesas/rcar-gen3-cpg.c struct sd_clock *clock = to_sd_clock(hw); clock 345 drivers/clk/renesas/rcar-gen3-cpg.c unsigned int div = cpg_sd_clock_calc_div(clock, rate, parent_rate); clock 348 drivers/clk/renesas/rcar-gen3-cpg.c for (i = 0; i < clock->div_num; i++) clock 349 drivers/clk/renesas/rcar-gen3-cpg.c if (div == clock->div_table[i].div) clock 352 drivers/clk/renesas/rcar-gen3-cpg.c if (i >= clock->div_num) clock 355 drivers/clk/renesas/rcar-gen3-cpg.c clock->cur_div_idx = i; clock 357 drivers/clk/renesas/rcar-gen3-cpg.c cpg_reg_modify(clock->csn.reg, CPG_SD_STP_MASK | CPG_SD_FC_MASK, clock 358 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_table[i].val & clock 384 drivers/clk/renesas/rcar-gen3-cpg.c struct sd_clock *clock; clock 388 drivers/clk/renesas/rcar-gen3-cpg.c clock = kzalloc(sizeof(*clock), GFP_KERNEL); clock 389 drivers/clk/renesas/rcar-gen3-cpg.c if (!clock) clock 398 drivers/clk/renesas/rcar-gen3-cpg.c clock->csn.reg = base + offset; clock 399 drivers/clk/renesas/rcar-gen3-cpg.c clock->hw.init = &init; clock 400 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_table = cpg_sd_div_table; clock 401 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_num = ARRAY_SIZE(cpg_sd_div_table); clock 404 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_table++; clock 405 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_num--; clock 408 drivers/clk/renesas/rcar-gen3-cpg.c val = readl(clock->csn.reg) & ~CPG_SD_FC_MASK; clock 409 drivers/clk/renesas/rcar-gen3-cpg.c val |= CPG_SD_STP_MASK | (clock->div_table[0].val & CPG_SD_FC_MASK); clock 410 drivers/clk/renesas/rcar-gen3-cpg.c writel(val, clock->csn.reg); clock 412 drivers/clk/renesas/rcar-gen3-cpg.c clk = clk_register(NULL, &clock->hw); clock 416 drivers/clk/renesas/rcar-gen3-cpg.c cpg_simple_notifier_register(notifiers, &clock->csn); clock 420 drivers/clk/renesas/rcar-gen3-cpg.c kfree(clock); clock 166 drivers/clk/renesas/renesas-cpg-mssr.c struct mstp_clock *clock = to_mstp_clock(hw); clock 167 drivers/clk/renesas/renesas-cpg-mssr.c struct cpg_mssr_priv *priv = clock->priv; clock 168 drivers/clk/renesas/renesas-cpg-mssr.c unsigned int reg = clock->index / 32; clock 169 drivers/clk/renesas/renesas-cpg-mssr.c unsigned int bit = clock->index % 32; clock 232 drivers/clk/renesas/renesas-cpg-mssr.c struct mstp_clock *clock = to_mstp_clock(hw); clock 233 drivers/clk/renesas/renesas-cpg-mssr.c struct cpg_mssr_priv *priv = clock->priv; clock 237 drivers/clk/renesas/renesas-cpg-mssr.c value = readb(priv->base + STBCR(clock->index / 32)); clock 239 drivers/clk/renesas/renesas-cpg-mssr.c value = readl(priv->base + MSTPSR(clock->index / 32)); clock 241 drivers/clk/renesas/renesas-cpg-mssr.c return !(value & BIT(clock->index % 32)); clock 386 drivers/clk/renesas/renesas-cpg-mssr.c struct mstp_clock *clock = NULL; clock 410 drivers/clk/renesas/renesas-cpg-mssr.c clock = kzalloc(sizeof(*clock), GFP_KERNEL); clock 411 drivers/clk/renesas/renesas-cpg-mssr.c if (!clock) { clock 431 drivers/clk/renesas/renesas-cpg-mssr.c clock->index = id - priv->num_core_clks; clock 432 drivers/clk/renesas/renesas-cpg-mssr.c clock->priv = priv; clock 433 drivers/clk/renesas/renesas-cpg-mssr.c clock->hw.init = &init; clock 435 drivers/clk/renesas/renesas-cpg-mssr.c clk = clk_register(NULL, &clock->hw); clock 441 drivers/clk/renesas/renesas-cpg-mssr.c priv->smstpcr_saved[clock->index / 32].mask |= BIT(clock->index % 32); clock 447 drivers/clk/renesas/renesas-cpg-mssr.c kfree(clock); clock 213 drivers/clk/ti/adpll.c static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock, clock 221 drivers/clk/ti/adpll.c d->clocks[index].clk = clock; clock 231 drivers/clk/ti/adpll.c cl = clkdev_create(clock, con_id, NULL); clock 242 drivers/clk/ti/adpll.c d->outputs.clks[output_index] = clock; clock 258 drivers/clk/ti/adpll.c struct clk *clock; clock 265 drivers/clk/ti/adpll.c clock = clk_register_divider(d->dev, child_name, parent_name, 0, clock 268 drivers/clk/ti/adpll.c if (IS_ERR(clock)) { clock 270 drivers/clk/ti/adpll.c name, PTR_ERR(clock)); clock 271 drivers/clk/ti/adpll.c return PTR_ERR(clock); clock 274 drivers/clk/ti/adpll.c return ti_adpll_setup_clock(d, clock, index, output_index, child_name, clock 287 drivers/clk/ti/adpll.c struct clk *clock; clock 294 drivers/clk/ti/adpll.c clock = clk_register_mux(d->dev, child_name, parents, 2, 0, clock 296 drivers/clk/ti/adpll.c if (IS_ERR(clock)) { clock 298 drivers/clk/ti/adpll.c name, PTR_ERR(clock)); clock 299 drivers/clk/ti/adpll.c return PTR_ERR(clock); clock 302 drivers/clk/ti/adpll.c return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name, clock 316 drivers/clk/ti/adpll.c struct clk *clock; clock 323 drivers/clk/ti/adpll.c clock = clk_register_gate(d->dev, child_name, parent_name, 0, clock 326 drivers/clk/ti/adpll.c if (IS_ERR(clock)) { clock 328 drivers/clk/ti/adpll.c name, PTR_ERR(clock)); clock 329 drivers/clk/ti/adpll.c return PTR_ERR(clock); clock 332 drivers/clk/ti/adpll.c return ti_adpll_setup_clock(d, clock, index, output_index, child_name, clock 345 drivers/clk/ti/adpll.c struct clk *clock; clock 352 drivers/clk/ti/adpll.c clock = clk_register_fixed_factor(d->dev, child_name, parent_name, clock 354 drivers/clk/ti/adpll.c if (IS_ERR(clock)) clock 355 drivers/clk/ti/adpll.c return PTR_ERR(clock); clock 357 drivers/clk/ti/adpll.c return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name, clock 501 drivers/clk/ti/adpll.c struct clk *clock; clock 540 drivers/clk/ti/adpll.c clock = devm_clk_register(d->dev, &d->dco.hw); clock 541 drivers/clk/ti/adpll.c if (IS_ERR(clock)) clock 542 drivers/clk/ti/adpll.c return PTR_ERR(clock); clock 544 drivers/clk/ti/adpll.c return ti_adpll_setup_clock(d, clock, TI_ADPLL_DCO, d->c->output_index, clock 597 drivers/clk/ti/adpll.c struct clk *clock; clock 636 drivers/clk/ti/adpll.c clock = devm_clk_register(d->dev, &co->hw); clock 637 drivers/clk/ti/adpll.c if (IS_ERR(clock)) { clock 639 drivers/clk/ti/adpll.c name, PTR_ERR(clock)); clock 640 drivers/clk/ti/adpll.c return PTR_ERR(clock); clock 643 drivers/clk/ti/adpll.c return ti_adpll_setup_clock(d, clock, index, output_index, child_name, clock 818 drivers/clk/ti/adpll.c struct clk *clock; clock 828 drivers/clk/ti/adpll.c clock = devm_clk_get(d->dev, d->parent_names[0]); clock 829 drivers/clk/ti/adpll.c if (IS_ERR(clock)) { clock 831 drivers/clk/ti/adpll.c return PTR_ERR(clock); clock 833 drivers/clk/ti/adpll.c d->parent_clocks[TI_ADPLL_CLKINP] = clock; clock 835 drivers/clk/ti/adpll.c clock = devm_clk_get(d->dev, d->parent_names[1]); clock 836 drivers/clk/ti/adpll.c if (IS_ERR(clock)) { clock 838 drivers/clk/ti/adpll.c return PTR_ERR(clock); clock 840 drivers/clk/ti/adpll.c d->parent_clocks[TI_ADPLL_CLKINPULOW] = clock; clock 843 drivers/clk/ti/adpll.c clock = devm_clk_get(d->dev, d->parent_names[2]); clock 844 drivers/clk/ti/adpll.c if (IS_ERR(clock)) { clock 846 drivers/clk/ti/adpll.c return PTR_ERR(clock); clock 848 drivers/clk/ti/adpll.c d->parent_clocks[TI_ADPLL_CLKINPHIF] = clock; clock 88 drivers/clk/ti/clk-814x.c struct clk *clock; clock 90 drivers/clk/ti/clk-814x.c clock = clk_get(NULL, init_clocks[i]); clock 91 drivers/clk/ti/clk-814x.c if (WARN(IS_ERR(clock), "could not find init clock %s\n", clock 94 drivers/clk/ti/clk-814x.c err = clk_prepare_enable(clock); clock 134 drivers/clk/zynqmp/clkc.c static struct zynqmp_clock *clock; clock 150 drivers/clk/zynqmp/clkc.c return clock[clk_id].valid; clock 166 drivers/clk/zynqmp/clkc.c strncpy(clk_name, clock[clk_id].clk_name, MAX_NAME_LEN); clock 186 drivers/clk/zynqmp/clkc.c *type = clock[clk_id].type; clock 423 drivers/clk/zynqmp/clkc.c ret = zynqmp_pm_clock_get_topology(clock[clk_id].clk_id, j, clock 490 drivers/clk/zynqmp/clkc.c ret = zynqmp_pm_clock_get_parents(clock[clk_id].clk_id, j, clock 518 drivers/clk/zynqmp/clkc.c u32 total_parents = clock[clk_id].num_parents; clock 522 drivers/clk/zynqmp/clkc.c clk_nodes = clock[clk_id].node; clock 523 drivers/clk/zynqmp/clkc.c parents = clock[clk_id].parent; clock 565 drivers/clk/zynqmp/clkc.c nodes = clock[clk_id].node; clock 566 drivers/clk/zynqmp/clkc.c num_nodes = clock[clk_id].num_nodes; clock 567 drivers/clk/zynqmp/clkc.c clk_dev_id = clock[clk_id].clk_id; clock 629 drivers/clk/zynqmp/clkc.c clock[i].clk_name); clock 642 drivers/clk/zynqmp/clkc.c clock[i].clk_name, PTR_ERR(zynqmp_data->hws[i])); clock 665 drivers/clk/zynqmp/clkc.c clock[i].valid = FIELD_GET(CLK_ATTR_VALID, attr.attr[0]); clock 666 drivers/clk/zynqmp/clkc.c clock[i].type = FIELD_GET(CLK_ATTR_TYPE, attr.attr[0]) ? clock 673 drivers/clk/zynqmp/clkc.c clock[i].clk_id = FIELD_PREP(CLK_ATTR_NODE_CLASS, class) | clock 678 drivers/clk/zynqmp/clkc.c zynqmp_pm_clock_get_name(clock[i].clk_id, &name); clock 681 drivers/clk/zynqmp/clkc.c strncpy(clock[i].clk_name, name.name, MAX_NAME_LEN); clock 690 drivers/clk/zynqmp/clkc.c ret = zynqmp_clock_get_topology(i, clock[i].node, clock 691 drivers/clk/zynqmp/clkc.c &clock[i].num_nodes); clock 695 drivers/clk/zynqmp/clkc.c ret = zynqmp_clock_get_parents(i, clock[i].parent, clock 696 drivers/clk/zynqmp/clkc.c &clock[i].num_parents); clock 721 drivers/clk/zynqmp/clkc.c clock = kcalloc(clock_max_idx, sizeof(*clock), GFP_KERNEL); clock 722 drivers/clk/zynqmp/clkc.c if (!clock) { clock 30 drivers/clocksource/clps711x-timer.c static void __init clps711x_clksrc_init(struct clk *clock, void __iomem *base) clock 32 drivers/clocksource/clps711x-timer.c unsigned long rate = clk_get_rate(clock); clock 51 drivers/clocksource/clps711x-timer.c static int __init _clps711x_clkevt_init(struct clk *clock, void __iomem *base, clock 61 drivers/clocksource/clps711x-timer.c rate = clk_get_rate(clock); clock 79 drivers/clocksource/clps711x-timer.c struct clk *clock = of_clk_get(np, 0); clock 86 drivers/clocksource/clps711x-timer.c if (IS_ERR(clock)) clock 87 drivers/clocksource/clps711x-timer.c return PTR_ERR(clock); clock 91 drivers/clocksource/clps711x-timer.c clps711x_clksrc_init(clock, base); clock 94 drivers/clocksource/clps711x-timer.c return _clps711x_clkevt_init(clock, base, irq); clock 35 drivers/cpufreq/elanfreq.c int clock; /* frequency in kHz */ clock 153 drivers/devfreq/tegra30-devfreq.c struct clk *clock; clock 609 drivers/devfreq/tegra30-devfreq.c tegra->clock = devm_clk_get(&pdev->dev, "actmon"); clock 610 drivers/devfreq/tegra30-devfreq.c if (IS_ERR(tegra->clock)) { clock 612 drivers/devfreq/tegra30-devfreq.c return PTR_ERR(tegra->clock); clock 630 drivers/devfreq/tegra30-devfreq.c err = clk_prepare_enable(tegra->clock); clock 707 drivers/devfreq/tegra30-devfreq.c clk_disable_unprepare(tegra->clock); clock 723 drivers/devfreq/tegra30-devfreq.c clk_disable_unprepare(tegra->clock); clock 864 drivers/gpu/drm/amd/amdgpu/amdgpu.h struct amdgpu_clock clock; clock 1223 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 clock; clock 1236 drivers/gpu/drm/amd/amdgpu/amdgpu.h struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock); clock 51 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq) clock 58 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c cts = clock * 1000; clock 88 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock) clock 95 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c if (amdgpu_afmt_predefined_acr[i].clock == clock) clock 100 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c amdgpu_afmt_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); clock 101 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c amdgpu_afmt_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); clock 102 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c amdgpu_afmt_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); clock 447 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c mem_info->mem_clk_max = adev->clock.default_mclk / 100; clock 472 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->clock.default_sclk / 100; clock 569 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_pll *ppll = &adev->clock.ppll[0]; clock 570 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_pll *spll = &adev->clock.spll; clock 571 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_pll *mpll = &adev->clock.mpll; clock 613 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.ppll[i] = *ppll; clock 661 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_sclk = clock 663 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_mclk = clock 675 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk = clock 678 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->clock.default_dispclk < 53900) { clock 680 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk / 100); clock 681 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk = 60000; clock 682 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c } else if (adev->clock.default_dispclk <= 60000) { clock 684 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk / 100); clock 685 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk = 62500; clock 687 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.dp_extclk = clock 689 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.current_dispclk = adev->clock.default_dispclk; clock 691 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock); clock 692 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->clock.max_pixel_clock == 0) clock 693 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.max_pixel_clock = 40000; clock 702 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->pm.current_sclk = adev->clock.default_sclk; clock 703 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->pm.current_mclk = adev->clock.default_mclk; clock 882 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int id, u32 clock) clock 916 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) { clock 934 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) { clock 956 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) { clock 998 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c u32 clock, clock 1019 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); clock 1037 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); clock 1057 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ clock 1068 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ clock 1087 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c u32 clock, clock 1106 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c args.ulClock = cpu_to_le32(clock); /* 10 khz */ clock 155 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int id, u32 clock); clock 159 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h u32 clock, clock 164 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h u32 clock, clock 212 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h u32 clock, clock 346 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_pll *spll = &adev->clock.spll; clock 347 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_pll *mpll = &adev->clock.mpll; clock 360 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->clock.default_sclk = clock 362 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->clock.default_mclk = clock 365 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->pm.current_sclk = adev->clock.default_sclk; clock 366 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->pm.current_mclk = adev->clock.default_mclk; clock 376 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_encoder->native_mode.clock = 0; clock 390 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c native_mode->clock != 0) { clock 598 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c (amdgpu_encoder->native_mode.clock == 0)) clock 627 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (!native_mode->clock) { clock 639 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (!native_mode->clock) { clock 842 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->clock / 10) > adev->clock.max_pixel_clock) clock 1161 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (amdgpu_connector->use_digital && (mode->clock > 165000)) { clock 1168 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (mode->clock > 340000) clock 1178 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->clock / 10) > adev->clock.max_pixel_clock) clock 1312 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((adev->clock.default_dispclk >= 53900) && clock 1454 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (mode->clock > 340000) clock 1457 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (mode->clock > 165000) clock 150 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { clock 157 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock; clock 176 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { clock 160 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c adjusted_mode->clock = native_mode->clock; clock 130 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c static void amdgpu_i2c_set_clock(void *i2c_priv, int clock) clock 139 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c val |= clock ? 0 : rec->en_clk_mask; clock 690 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.max_engine_clock = adev->clock.default_sclk * 10; clock 691 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.max_memory_clock = adev->clock.default_mclk * 10; clock 343 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c if ((crtc->mode.clock == test_crtc->mode.clock) && clock 314 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c u32 adjusted_clock = mode->clock; clock 316 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c u32 dp_clock = mode->clock; clock 317 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c u32 clock = mode->clock; clock 319 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c bool is_duallink = amdgpu_dig_monitor_is_duallink(encoder, mode->clock); clock 350 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c adjusted_clock = mode->clock * 2; clock 364 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c clock = (clock * 5) / 4; clock 367 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c clock = (clock * 3) / 2; clock 370 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c clock = clock * 2; clock 391 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.usPixelClock = cpu_to_le16(clock / 10); clock 403 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v3.sInput.usPixelClock = cpu_to_le16(clock / 10); clock 581 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c u32 clock, clock 606 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c if (clock == ATOM_DISABLE) clock 608 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v1.usPixelClock = cpu_to_le16(clock / 10); clock 618 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v2.usPixelClock = cpu_to_le16(clock / 10); clock 628 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v3.usPixelClock = cpu_to_le16(clock / 10); clock 645 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v5.usPixelClock = cpu_to_le16(clock / 10); clock 675 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v6.ulDispEngClkFreq = cpu_to_le32(crtc_id << 24 | clock / 10); clock 707 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v7.ulPixelClock = cpu_to_le32(clock * 10); /* 100 hz units */ clock 710 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c (clock > 165000)) clock 772 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_connector->pixelclock_for_modeset = mode->clock; clock 790 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c mode->clock / 10); clock 797 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c mode->clock / 10); clock 804 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c mode->clock / 10); clock 824 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c u32 pll_clock = mode->clock; clock 825 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c u32 clock = mode->clock; clock 833 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c clock = amdgpu_crtc->adjusted_clock; clock 837 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c pll = &adev->clock.ppll[0]; clock 840 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c pll = &adev->clock.ppll[1]; clock 845 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c pll = &adev->clock.ppll[2]; clock 861 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c encoder_mode, amdgpu_encoder->encoder_id, clock, clock 47 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h u32 clock, clock 412 drivers/gpu/drm/amd/amdgpu/atombios_dp.c mode->clock, clock 435 drivers/gpu/drm/amd/amdgpu/atombios_dp.c mode->clock, &dp_lanes, &dp_clock); clock 969 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (is_dp && adev->clock.dp_extclk) clock 1029 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (adev->clock.dp_extclk) clock 1096 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (is_dp && adev->clock.dp_extclk) clock 2021 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c lvds->native_mode.clock = clock 843 drivers/gpu/drm/amd/amdgpu/cik.c u32 reference_clock = adev->clock.spll.reference_freq; clock 1305 drivers/gpu/drm/amd/amdgpu/cik.c static int cik_set_uvd_clock(struct amdgpu_device *adev, u32 clock, clock 1314 drivers/gpu/drm/amd/amdgpu/cik.c clock, false, ÷rs); clock 1033 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c (u32)mode->clock); clock 1035 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c (u32)mode->clock); clock 1049 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_high.disp_clk = mode->clock; clock 1088 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_low.disp_clk = mode->clock; clock 1465 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock) clock 1469 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock); clock 1520 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_audio_set_dto(struct drm_encoder *encoder, u32 clock) clock 1528 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c u32 dto_modulo = clock; clock 1581 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_set_dto(encoder, mode->clock); clock 1664 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_afmt_update_ACR(encoder, mode->clock); clock 2240 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->clock.dp_extclk) clock 2847 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); clock 3309 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_encoder->pixel_clock = adjusted_mode->clock; clock 1059 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (u32)mode->clock); clock 1061 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (u32)mode->clock); clock 1075 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_high.disp_clk = mode->clock; clock 1114 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_low.disp_clk = mode->clock; clock 1507 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock) clock 1511 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock); clock 1562 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_audio_set_dto(struct drm_encoder *encoder, u32 clock) clock 1570 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c u32 dto_modulo = clock; clock 1623 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_set_dto(encoder, mode->clock); clock 1706 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_afmt_update_ACR(encoder, mode->clock); clock 2309 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->clock.dp_extclk) clock 2705 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adjusted_mode->clock, 0, 0, 0, 0, clock 2974 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_set_dce_clock(adev, adev->clock.default_dispclk, clock 2979 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); clock 3435 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_encoder->pixel_clock = adjusted_mode->clock; clock 837 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c (u32)mode->clock); clock 839 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c (u32)mode->clock); clock 857 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c wm_high.disp_clk = mode->clock; clock 884 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c wm_low.disp_clk = mode->clock; clock 925 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b.full = dfixed_const(mode->clock); clock 937 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b.full = dfixed_const(mode->clock); clock 1391 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c uint32_t clock, int bpc) clock 1395 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock); clock 1471 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_audio_set_dto(struct drm_encoder *encoder, u32 clock) clock 1498 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmDCCG_AUDIO_DTO0_MODULE, clock); clock 1501 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmDCCG_AUDIO_DTO1_MODULE, clock); clock 1674 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_set_dto(encoder, mode->clock); clock 1676 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_set_acr(encoder, mode->clock, bpc); clock 1678 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_set_dto(encoder, adev->clock.default_dispclk * 10); clock 2136 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->clock.dp_extclk) clock 2715 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); clock 3107 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_encoder->pixel_clock = adjusted_mode->clock; clock 968 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (u32)mode->clock); clock 970 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (u32)mode->clock); clock 984 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_high.disp_clk = mode->clock; clock 1023 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_low.disp_clk = mode->clock; clock 1428 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock) clock 1432 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock); clock 1471 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_audio_set_dto(struct drm_encoder *encoder, u32 clock) clock 1479 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c u32 dto_modulo = clock; clock 1530 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_set_dto(encoder, mode->clock); clock 1600 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_afmt_update_ACR(encoder, mode->clock); clock 2130 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->clock.dp_extclk) clock 2742 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); clock 3197 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_encoder->pixel_clock = adjusted_mode->clock; clock 3979 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c uint64_t clock; clock 3984 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c clock = (uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_LSB) | clock 3988 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c return clock; clock 2967 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c uint64_t clock; clock 2971 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c clock = (uint64_t)RREG32(mmRLC_GPU_CLOCK_COUNT_LSB) | clock 2974 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c return clock; clock 4080 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c uint64_t clock; clock 4084 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c clock = (uint64_t)RREG32(mmRLC_GPU_CLOCK_COUNT_LSB) | clock 4087 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c return clock; clock 5192 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c uint64_t clock; clock 5196 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c clock = (uint64_t)RREG32(mmRLC_GPU_CLOCK_COUNT_LSB) | clock 5199 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c return clock; clock 4084 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c uint64_t clock; clock 4089 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c clock = (uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_LSB) | clock 4093 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c return clock; clock 3011 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.default_sclk = adev->clock.default_sclk; clock 3012 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.default_mclk = adev->clock.default_mclk; clock 3013 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.current_sclk = adev->clock.default_sclk; clock 3014 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.current_mclk = adev->clock.default_mclk; clock 127 drivers/gpu/drm/amd/amdgpu/nv.c return adev->clock.spll.reference_freq; clock 1216 drivers/gpu/drm/amd/amdgpu/si.c u32 reference_clock = adev->clock.spll.reference_freq; clock 3253 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 i, clock = 0; clock 3256 drivers/gpu/drm/amd/amdgpu/si_dpm.c *max_clock = clock; clock 3261 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (clock < table->entries[i].clk) clock 3262 drivers/gpu/drm/amd/amdgpu/si_dpm.c clock = table->entries[i].clk; clock 3264 drivers/gpu/drm/amd/amdgpu/si_dpm.c *max_clock = clock; clock 3268 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 clock, u16 max_voltage, u16 *voltage) clock 3276 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (clock <= table->entries[i].clk) { clock 3624 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->clock.current_dispclk, clock 5258 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 reference_clock = adev->clock.spll.reference_freq; clock 5380 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 reference_clock = adev->clock.mpll.reference_freq; clock 5623 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->clock.current_dispclk <= clock 7192 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->mclk = adev->clock.default_mclk; clock 7193 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->sclk = adev->clock.default_sclk; clock 7705 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.default_sclk = adev->clock.default_sclk; clock 7706 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.default_mclk = adev->clock.default_mclk; clock 7707 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.current_sclk = adev->clock.default_sclk; clock 7708 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.current_mclk = adev->clock.default_mclk; clock 277 drivers/gpu/drm/amd/amdgpu/soc15.c u32 reference_clock = adev->clock.spll.reference_freq; clock 329 drivers/gpu/drm/amd/amdgpu/vi.c u32 reference_clock = adev->clock.spll.reference_freq; clock 725 drivers/gpu/drm/amd/amdgpu/vi.c static int vi_set_uvd_clock(struct amdgpu_device *adev, u32 clock, clock 734 drivers/gpu/drm/amd/amdgpu/vi.c clock, false, ÷rs); clock 3466 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (native_mode->clock == drm_mode->clock && clock 4141 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mode->clock, clock 4880 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_encoder->native_mode.clock = 0; clock 190 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c int clock; clock 207 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c clock = stream->timing.pix_clk_100hz / 10; clock 238 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c pbn = drm_dp_calc_pbn_mode(clock, bpp); clock 271 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c DRM_INFO("DM_PPLIB:\t %d\n", pp_clks->clock[i]); clock 272 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c dc_clks->clocks_in_khz[i] = pp_clks->clock[i]; clock 625 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void pp_rv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int clock) clock 635 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c pp_funcs->set_min_deep_sleep_dcefclk(pp_handle, clock); clock 638 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void pp_rv_set_hard_min_dcefclk_by_freq(struct pp_smu *pp, int clock) clock 648 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c pp_funcs->set_hard_min_dcefclk_by_freq(pp_handle, clock); clock 165 drivers/gpu/drm/amd/include/dm_pp_interface.h uint32_t clock[MAX_NUM_CLOCKS]; clock 300 drivers/gpu/drm/amd/include/kgd_pp_interface.h struct pp_display_clock_request *clock); clock 306 drivers/gpu/drm/amd/include/kgd_pp_interface.h int (*set_hard_min_dcefclk_by_freq)(void *handle, uint32_t clock); clock 307 drivers/gpu/drm/amd/include/kgd_pp_interface.h int (*set_hard_min_fclk_by_freq)(void *handle, uint32_t clock); clock 308 drivers/gpu/drm/amd/include/kgd_pp_interface.h int (*set_min_deep_sleep_dcefclk)(void *handle, uint32_t clock); clock 1185 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_display_clock_request *clock) clock 1190 drivers/gpu/drm/amd/powerplay/amd_powerplay.c if (!hwmgr || !hwmgr->pm_en ||!clock) clock 1194 drivers/gpu/drm/amd/powerplay/amd_powerplay.c ret = phm_display_clock_voltage_request(hwmgr, clock); clock 1348 drivers/gpu/drm/amd/powerplay/amd_powerplay.c static int pp_set_min_deep_sleep_dcefclk(void *handle, uint32_t clock) clock 1361 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->hwmgr_func->set_min_deep_sleep_dcefclk(hwmgr, clock); clock 1367 drivers/gpu/drm/amd/powerplay/amd_powerplay.c static int pp_set_hard_min_dcefclk_by_freq(void *handle, uint32_t clock) clock 1380 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->hwmgr_func->set_hard_min_dcefclk_by_freq(hwmgr, clock); clock 1386 drivers/gpu/drm/amd/powerplay/amd_powerplay.c static int pp_set_hard_min_fclk_by_freq(void *handle, uint32_t clock) clock 1399 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->hwmgr_func->set_hard_min_fclk_by_freq(hwmgr, clock); clock 461 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c struct pp_display_clock_request *clock) clock 468 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c return hwmgr->hwmgr_func->display_clock_voltage_request(hwmgr, clock); clock 501 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c int phm_set_min_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock) clock 508 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c return hwmgr->hwmgr_func->set_min_deep_sleep_dcefclk(hwmgr, clock); clock 511 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c int phm_set_hard_min_dcefclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) clock 518 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c return hwmgr->hwmgr_func->set_hard_min_dcefclk_by_freq(hwmgr, clock); clock 521 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c int phm_set_hard_min_fclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) clock 528 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c return hwmgr->hwmgr_func->set_hard_min_fclk_by_freq(hwmgr, clock); clock 486 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c uint32_t clock; clock 494 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c clock = 2700; clock 496 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c clock = (uint32_t)(le16_to_cpu(fw_info->usReferenceClock)); clock 498 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c return clock; clock 1167 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c uint32_t clock; clock 1177 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c clock = 2700; clock 1183 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c clock = (uint32_t)(le16_to_cpu(fwInfo_2_1->usMemoryReferenceClock)); clock 1187 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c clock = (uint32_t)(le16_to_cpu(fwInfo_0_0->usReferenceClock)); clock 1191 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c return clock; clock 208 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c static int smu10_set_min_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock) clock 213 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c smu10_data->deep_sleep_dcefclk != clock) { clock 214 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c smu10_data->deep_sleep_dcefclk = clock; clock 222 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c static int smu10_set_hard_min_dcefclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) clock 227 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c smu10_data->dcf_actual_hard_min_freq != clock) { clock 228 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c smu10_data->dcf_actual_hard_min_freq = clock; clock 236 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c static int smu10_set_hard_min_fclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) clock 241 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c smu10_data->f_actual_hard_min_freq != clock) { clock 242 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c smu10_data->f_actual_hard_min_freq = clock; clock 975 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c uint32_t clock) clock 977 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c if (clock >= MEM_FREQ_LOW_LATENCY && clock 978 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c clock < MEM_FREQ_HIGH_LATENCY) clock 980 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c else if (clock >= MEM_FREQ_HIGH_LATENCY) clock 841 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c entries[i].clock = data->golden_dpm_table.sclk_table.dpm_levels[i].value; clock 853 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c entries[i].clock = data->golden_dpm_table.mclk_table.dpm_levels[i].value; clock 907 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (odn_table->odn_core_clock_dpm_levels.entries[i].clock != clock 915 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (odn_table->odn_memory_clock_dpm_levels.entries[i].clock != clock 3771 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dpm_table->sclk_table.dpm_levels[count].value = odn_sclk_table->entries[count].clock; clock 3778 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c dpm_table->mclk_table.dpm_levels[count].value = odn_mclk_table->entries[count].clock; clock 4452 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint32_t clock, pcie_speed; clock 4457 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c clock = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); clock 4460 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (clock > sclk_table->dpm_levels[i].value) clock 4473 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c clock = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); clock 4476 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (clock > mclk_table->dpm_levels[i].value) clock 4508 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c i, odn_sclk_table->entries[i].clock/100, clock 4517 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c i, odn_mclk_table->entries[i].clock/100, clock 4664 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c clocks->clock[i] = dep_sclk_table->entries[i].clk * 10; clock 4669 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c clocks->clock[i] = sclk_table->entries[i].clk * 10; clock 4701 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c clocks->clock[i] = dep_mclk_table->entries[i].clk * 10; clock 4709 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c clocks->clock[i] = mclk_table->entries[i].clk * 10; clock 4902 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c podn_dpm_table_in_backend->entries[input_level].clock = input_clk; clock 5167 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock, clock 5174 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0); clock 5176 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c temp = clock >> i; clock 365 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock, clock 69 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c uint32_t clock, uint32_t msg) clock 79 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock <= ptable->entries[i].ecclk) clock 87 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock >= ptable->entries[i].ecclk) clock 100 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c uint32_t clock, uint32_t msg) clock 110 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock <= table->entries[i].clk) clock 118 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock >= table->entries[i].clk) clock 130 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c uint32_t clock, uint32_t msg) clock 140 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock <= ptable->entries[i].vclk) clock 148 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock >= ptable->entries[i].vclk) clock 557 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c unsigned long clock = 0, level; clock 568 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[level].clk; clock 570 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[table->count - 1].clk; clock 572 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->sclk_dpm.soft_max_clk = clock; clock 573 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->sclk_dpm.hard_max_clk = clock; clock 583 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c unsigned long clock = 0, level; clock 595 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[level].vclk; clock 597 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[table->count - 1].vclk; clock 599 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->uvd_dpm.soft_max_clk = clock; clock 600 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->uvd_dpm.hard_max_clk = clock; clock 610 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c unsigned long clock = 0, level; clock 622 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[level].ecclk; clock 624 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[table->count - 1].ecclk; clock 626 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->vce_dpm.soft_max_clk = clock; clock 627 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->vce_dpm.hard_max_clk = clock; clock 637 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c unsigned long clock = 0, level; clock 649 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[level].acpclk; clock 651 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[table->count - 1].acpclk; clock 653 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->acp_dpm.soft_max_clk = clock; clock 654 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->acp_dpm.hard_max_clk = clock; clock 687 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c unsigned long clock = 0; clock 700 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = hwmgr->display_config->min_core_set_clock; clock 701 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock == 0) clock 704 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (data->sclk_dpm.hard_min_clk != clock) { clock 705 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->sclk_dpm.hard_min_clk = clock; clock 714 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = data->sclk_dpm.soft_min_clk; clock 724 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock < stable_pstate_sclk) clock 725 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = stable_pstate_sclk; clock 728 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (data->sclk_dpm.soft_min_clk != clock) { clock 729 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->sclk_dpm.soft_min_clk = clock; clock 739 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->sclk_dpm.soft_max_clk != clock) { clock 740 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->sclk_dpm.soft_max_clk = clock; clock 1146 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c unsigned long clock = 0, level; clock 1159 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[level].clk; clock 1161 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[table->count - 1].clk; clock 1163 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->sclk_dpm.soft_max_clk = clock; clock 1164 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c data->sclk_dpm.hard_max_clk = clock; clock 1612 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clocks->clock[i] = data->sys_info.display_clock[i] * 10; clock 1617 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clocks->clock[i] = table->entries[i].clk * 10; clock 1622 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clocks->clock[i] = data->sys_info.nbp_memory_clock[clocks->count - 1 - i] * 10; clock 54 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c uint32_t *clock, clock 500 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c PPCLK_e clkID, uint32_t index, uint32_t *clock) clock 513 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c *clock = smum_get_argument(hwmgr); clock 903 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c PPCLK_e clkid, struct vega12_clock_range *clock) clock 910 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c clock->ACMax = smum_get_argument(hwmgr); clock 917 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c clock->ACMin = smum_get_argument(hwmgr); clock 924 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c clock->DCMax = smum_get_argument(hwmgr); clock 1696 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c uint32_t *clock, clock 1703 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c *clock = data->clk_range[clock_select].ACMax; clock 1705 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c *clock = data->clk_range[clock_select].ACMin; clock 1738 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c uint32_t clock) clock 1553 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c PP_Clock *clock, PPCLK_e clock_select) clock 1562 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c *clock = smum_get_argument(hwmgr); clock 1565 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c if (*clock == 0) { clock 1571 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c *clock = smum_get_argument(hwmgr); clock 1996 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c uint32_t *clock, clock 2001 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c *clock = 0; clock 2008 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c *clock = smum_get_argument(hwmgr); clock 2015 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c *clock = smum_get_argument(hwmgr); clock 2777 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c uint32_t clock) clock 463 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h int (*get_dpm_uclk_limited)(struct smu_context *smu, uint32_t *clock, bool max); clock 767 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h #define smu_get_dpm_uclk_limited(smu, clock, max) \ clock 768 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h ((smu)->ppt_funcs->get_dpm_uclk_limited ? (smu)->ppt_funcs->get_dpm_uclk_limited((smu), (clock), (max)) : -EINVAL) clock 374 drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h uint32_t clock[MAX_NUM_CLOCKS]; clock 385 drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h uint32_t clock; clock 461 drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h struct pp_display_clock_request *clock); clock 311 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h struct pp_display_clock_request *clock); clock 325 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h int (*set_min_deep_sleep_dcefclk)(struct pp_hwmgr *hwmgr, uint32_t clock); clock 348 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h int (*set_hard_min_dcefclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock); clock 349 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock); clock 163 drivers/gpu/drm/amd/powerplay/renoir_ppt.c static int renoir_get_dpm_uclk_limited(struct smu_context *smu, uint32_t *clock, bool max) clock 168 drivers/gpu/drm/amd/powerplay/renoir_ppt.c if (!clock || !table) clock 172 drivers/gpu/drm/amd/powerplay/renoir_ppt.c *clock = table->FClocks[NUM_FCLK_DPM_LEVELS-1].Freq; clock 174 drivers/gpu/drm/amd/powerplay/renoir_ppt.c *clock = table->FClocks[0].Freq; clock 942 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu_v11_0_get_max_sustainable_clock(struct smu_context *smu, uint32_t *clock, clock 966 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = smu_read_smc_arg(smu, clock); clock 970 drivers/gpu/drm/amd/powerplay/smu_v11_0.c if (*clock != 0) clock 981 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = smu_read_smc_arg(smu, clock); clock 277 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t clock, uint32_t *vol) clock 285 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (allowed_clock_voltage_table->entries[i].clk >= clock) { clock 296 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t clock, struct SMU7_Discrete_GraphicsLevel *sclk) clock 311 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c result = atomctrl_get_engine_pll_dividers_vi(hwmgr, clock, ÷rs); clock 341 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t vco_freq = clock * dividers.uc_pll_post_div; clock 359 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c sclk->SclkFrequency = clock; clock 386 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c static uint8_t ci_get_sleep_divider_id_from_clock(uint32_t clock, clock 393 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c if (clock < min) { clock 398 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c temp = clock >> i; clock 407 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t clock, struct SMU7_Discrete_GraphicsLevel *level) clock 413 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c result = ci_calculate_sclk_params(hwmgr, clock, level); clock 417 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c hwmgr->dyn_state.vddc_dependency_on_sclk, clock, clock 424 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c level->SclkFrequency = clock; clock 430 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c clock, clock 448 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c ci_get_sleep_divider_id_from_clock(clock, clock 356 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c uint32_t clock, uint32_t *voltage, uint32_t *mvdd) clock 370 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c if (dep_table->entries[i].clk >= clock) { clock 858 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c uint32_t clock, struct SMU73_Discrete_GraphicsLevel *sclk) clock 873 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c result = atomctrl_get_engine_pll_dividers_vi(hwmgr, clock, ÷rs); clock 904 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c uint32_t vco_freq = clock * dividers.uc_pll_post_div; clock 928 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c sclk->SclkFrequency = clock; clock 939 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c uint32_t clock, struct SMU73_Discrete_GraphicsLevel *level) clock 949 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c result = fiji_calculate_sclk_params(hwmgr, clock, level); clock 958 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c vdd_dep_table, clock, clock 965 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c level->SclkFrequency = clock; clock 976 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c threshold = clock * data->fast_watermark_threshold / 100; clock 981 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c level->DeepSleepDivId = smu7_get_sleep_divider_id_from_clock(clock, clock 1147 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c uint32_t clock, struct SMU73_Discrete_MemoryLevel *mclk) clock 1152 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c result = atomctrl_get_memory_pll_dividers_vi(hwmgr, clock, &mem_param); clock 1158 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c mclk->MclkFrequency = clock; clock 1160 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c mclk->FreqRange = fiji_get_mclk_frequency_ratio(clock); clock 1166 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c uint32_t clock, struct SMU73_Discrete_MemoryLevel *mem_level) clock 1182 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c vdd_dep_table, clock, clock 1207 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (clock <= mclk_stutter_mode_threshold) && clock 1213 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c result = fiji_calculate_mclk_params(hwmgr, clock, mem_level); clock 508 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c uint32_t clock, uint32_t *vol) clock 518 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c if (allowed_clock_voltage_table->entries[i].clk >= clock) { clock 354 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) clock 368 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (dep_table->entries[i].clk >= clock) { clock 842 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c uint32_t clock, SMU_SclkSetting *sclk_setting) clock 853 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c sclk_setting->SclkFrequency = clock; clock 855 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c result = atomctrl_get_engine_pll_dividers_ai(hwmgr, clock, ÷rs); clock 874 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (clock > smu_data->range_table[i].trans_lower_frequency clock 875 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c && clock <= smu_data->range_table[i].trans_upper_frequency) { clock 881 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c sclk_setting->Fcw_int = (uint16_t)((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); clock 882 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; clock 888 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c pcc_target_freq = clock - (clock * pcc_target_percent / 100); clock 895 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ss_target_freq = clock - (clock * ss_target_percent / 100); clock 907 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c uint32_t clock, struct SMU74_Discrete_GraphicsLevel *level) clock 918 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c result = polaris10_calculate_sclk_params(hwmgr, clock, &curr_sclk_setting); clock 927 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c vdd_dep_table, clock, clock 947 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c level->DeepSleepDivId = smu7_get_sleep_divider_id_from_clock(clock, clock 1072 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c uint32_t clock, struct SMU74_Discrete_MemoryLevel *mem_level) clock 1089 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c vdd_dep_table, clock, clock 1096 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c mem_level->MclkFrequency = clock; clock 1110 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (clock <= mclk_stutter_mode_threshold) && clock 248 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) clock 261 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c if (allowed_clock_voltage_table->entries[i].clk >= clock) { clock 601 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) clock 615 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (dep_table->entries[i].clk >= clock) { clock 717 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c uint32_t clock, SMU_SclkSetting *sclk_setting) clock 728 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c sclk_setting->SclkFrequency = clock; clock 730 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c result = atomctrl_get_engine_pll_dividers_ai(hwmgr, clock, ÷rs); clock 749 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c if (clock > smu_data->range_table[i].trans_lower_frequency clock 750 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c && clock <= smu_data->range_table[i].trans_upper_frequency) { clock 757 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / clock 759 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; clock 765 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c pcc_target_freq = clock - (clock * pcc_target_percent / 100); clock 774 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ss_target_freq = clock - (clock * ss_target_percent / 100); clock 787 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c static uint8_t vegam_get_sleep_divider_id_from_clock(uint32_t clock, clock 794 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c PP_ASSERT_WITH_CODE((clock >= min), clock 798 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c temp = clock / (i + 1); clock 807 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c uint32_t clock, struct SMU75_Discrete_GraphicsLevel *level) clock 817 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c result = vegam_calculate_sclk_params(hwmgr, clock, &curr_sclk_setting); clock 821 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->vdd_dep_on_sclk, clock, clock 839 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c level->DeepSleepDivId = vegam_get_sleep_divider_id_from_clock(clock, clock 961 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) clock 966 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c clock, &mpll_param), clock 979 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) clock 990 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table_info->vdd_dep_on_mclk, clock, clock 997 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c result = vegam_calculate_mclk_params(hwmgr, clock, mem_level); clock 1014 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (clock <= mclk_stutter_mode_threshold) && clock 64 drivers/gpu/drm/arc/arcpgu_crtc.c long rate, clk_rate = mode->clock * 1000; clock 377 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c min_pxlclk = m->clock * 1000; clock 195 drivers/gpu/drm/arm/hdlcd_crtc.c long rate, clk_rate = mode->clock * 1000; clock 221 drivers/gpu/drm/ast/ast_mode.c ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000); clock 1002 drivers/gpu/drm/ast/ast_mode.c static void set_clock(void *i2c_priv, int clock) clock 1010 drivers/gpu/drm/ast/ast_mode.c ujcrb7 = ((clock & 0x01) ? 0 : 1); clock 672 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c if (mode->clock > 165000) clock 774 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c adv7511->f_tmds = mode->clock; clock 111 drivers/gpu/drm/bridge/adv7511/adv7533.c if (mode->clock > 80000) clock 1061 drivers/gpu/drm/bridge/analogix-anx78xx.c if (mode->clock > 154000) clock 1319 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = clk_prepare_enable(dp->clock); clock 1361 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c clk_disable_unprepare(dp->clock); clock 1429 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c clk_disable_unprepare(dp->clock); clock 1688 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c dp->clock = devm_clk_get(&pdev->dev, "dp"); clock 1689 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (IS_ERR(dp->clock)) { clock 1691 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c return ERR_CAST(dp->clock); clock 1694 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c clk_prepare_enable(dp->clock); clock 1799 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c clk_disable_unprepare(dp->clock); clock 1806 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c clk_disable_unprepare(dp->clock); clock 1821 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = clk_prepare_enable(dp->clock); clock 164 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h struct clk *clock; clock 585 drivers/gpu/drm/bridge/cdns-dsi.c dpi_hz = (mode_valid_check ? mode->clock : mode->crtc_clock) * 1000; clock 642 drivers/gpu/drm/bridge/cdns-dsi.c (mode_valid_check ? mode->clock : mode->crtc_clock) * 1000) clock 357 drivers/gpu/drm/bridge/sii902x.c u16 pixel_clock_10kHz = adj->clock / 10; clock 887 drivers/gpu/drm/bridge/sii9234.c if (mode->clock > MHL1_MAX_CLK) clock 1188 drivers/gpu/drm/bridge/sil-sii8620.c int clk = mode->clock * (ctx->use_packed_pixel ? 2 : 3); clock 2232 drivers/gpu/drm/bridge/sil-sii8620.c if (mode->clock < max_pclk) clock 2234 drivers/gpu/drm/bridge/sil-sii8620.c else if (mode->clock < max_pclk_pp_mode) clock 1740 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c vmode->mtmdsclock = vmode->mpixelclock = mode->clock * 1000; clock 672 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c frac = lbcc % mode->clock; clock 673 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c lbcc = lbcc / mode->clock; clock 741 drivers/gpu/drm/bridge/tc358767.c in_bw = mode->clock * bits_per_pixel / 8; clock 1158 drivers/gpu/drm/bridge/tc358767.c 1000 * tc->mode.clock); clock 1295 drivers/gpu/drm/bridge/tc358767.c if (mode->clock > 154000) clock 1298 drivers/gpu/drm/bridge/tc358767.c req = mode->clock * bits_per_pixel / 8; clock 73 drivers/gpu/drm/bridge/thc63lvd1024.c if (mode->clock < min_freq) clock 76 drivers/gpu/drm/bridge/thc63lvd1024.c if (mode->clock > max_freq) clock 216 drivers/gpu/drm/bridge/ti-sn65dsi86.c if (mode->clock > 594000) clock 367 drivers/gpu/drm/bridge/ti-sn65dsi86.c bit_rate_khz = mode->clock * clock 436 drivers/gpu/drm/bridge/ti-sn65dsi86.c bit_rate_mhz = (mode->clock / 1000) * clock 3547 drivers/gpu/drm/drm_dp_mst_topology.c int drm_dp_calc_pbn_mode(int clock, int bpp) clock 3554 drivers/gpu/drm/drm_dp_mst_topology.c kbps = clock * bpp; clock 2334 drivers/gpu/drm/drm_edid.c mode->clock = le16_to_cpu(timing->pixel_clock) * 10; clock 2447 drivers/gpu/drm/drm_edid.c if (mode->clock > max_clock) clock 2981 drivers/gpu/drm/drm_edid.c unsigned int clock = cea_mode->clock; clock 2984 drivers/gpu/drm/drm_edid.c return clock; clock 2992 drivers/gpu/drm/drm_edid.c clock = DIV_ROUND_CLOSEST(clock * 1001, 1000); clock 2994 drivers/gpu/drm/drm_edid.c clock = DIV_ROUND_CLOSEST(clock * 1000, 1001); clock 2996 drivers/gpu/drm/drm_edid.c return clock; clock 3040 drivers/gpu/drm/drm_edid.c if (!to_match->clock) clock 3051 drivers/gpu/drm/drm_edid.c clock1 = cea_mode.clock; clock 3054 drivers/gpu/drm/drm_edid.c if (abs(to_match->clock - clock1) > clock_tolerance && clock 3055 drivers/gpu/drm/drm_edid.c abs(to_match->clock - clock2) > clock_tolerance) clock 3079 drivers/gpu/drm/drm_edid.c if (!to_match->clock) clock 3090 drivers/gpu/drm/drm_edid.c clock1 = cea_mode.clock; clock 3093 drivers/gpu/drm/drm_edid.c if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) && clock 3094 drivers/gpu/drm/drm_edid.c KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2)) clock 3137 drivers/gpu/drm/drm_edid.c return hdmi_mode->clock; clock 3148 drivers/gpu/drm/drm_edid.c if (!to_match->clock) clock 3156 drivers/gpu/drm/drm_edid.c clock1 = hdmi_mode->clock; clock 3159 drivers/gpu/drm/drm_edid.c if (abs(to_match->clock - clock1) > clock_tolerance && clock 3160 drivers/gpu/drm/drm_edid.c abs(to_match->clock - clock2) > clock_tolerance) clock 3183 drivers/gpu/drm/drm_edid.c if (!to_match->clock) clock 3191 drivers/gpu/drm/drm_edid.c clock1 = hdmi_mode->clock; clock 3194 drivers/gpu/drm/drm_edid.c if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || clock 3195 drivers/gpu/drm/drm_edid.c KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && clock 3243 drivers/gpu/drm/drm_edid.c clock1 = cea_mode->clock; clock 3248 drivers/gpu/drm/drm_edid.c if (mode->clock != clock1 && mode->clock != clock2) clock 3262 drivers/gpu/drm/drm_edid.c if (mode->clock != clock1) clock 3263 drivers/gpu/drm/drm_edid.c newmode->clock = clock1; clock 3265 drivers/gpu/drm/drm_edid.c newmode->clock = clock2; clock 3897 drivers/gpu/drm/drm_edid.c int clock1, clock2, clock; clock 3909 drivers/gpu/drm/drm_edid.c clock1 = cea_mode->clock; clock 3916 drivers/gpu/drm/drm_edid.c clock1 = cea_mode->clock; clock 3924 drivers/gpu/drm/drm_edid.c if (abs(mode->clock - clock1) < abs(mode->clock - clock2)) clock 3925 drivers/gpu/drm/drm_edid.c clock = clock1; clock 3927 drivers/gpu/drm/drm_edid.c clock = clock2; clock 3929 drivers/gpu/drm/drm_edid.c if (mode->clock == clock) clock 3933 drivers/gpu/drm/drm_edid.c type, vic, mode->clock, clock); clock 3934 drivers/gpu/drm/drm_edid.c mode->clock = clock; clock 4762 drivers/gpu/drm/drm_edid.c mode->clock = pixel_clock * 10; clock 323 drivers/gpu/drm/drm_modes.c tmp -= drm_mode->clock % CVT_CLOCK_STEP; clock 324 drivers/gpu/drm/drm_modes.c drm_mode->clock = tmp; clock 518 drivers/gpu/drm/drm_modes.c drm_mode->clock = pixel_freq; clock 600 drivers/gpu/drm/drm_modes.c dmode->clock = vm->pixelclock / 1000; clock 641 drivers/gpu/drm/drm_modes.c vm->pixelclock = dmode->clock * 1000; clock 767 drivers/gpu/drm/drm_modes.c calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ clock 792 drivers/gpu/drm/drm_modes.c num = mode->clock * 1000; clock 848 drivers/gpu/drm/drm_modes.c p->crtc_clock = p->clock; clock 972 drivers/gpu/drm/drm_modes.c if (mode1->clock && mode2->clock) clock 973 drivers/gpu/drm/drm_modes.c return KHZ2PICOS(mode1->clock) == KHZ2PICOS(mode2->clock); clock 975 drivers/gpu/drm/drm_modes.c return mode1->clock == mode2->clock; clock 1118 drivers/gpu/drm/drm_modes.c if (mode->clock == 0) clock 1340 drivers/gpu/drm/drm_modes.c diff = b->clock - a->clock; clock 1938 drivers/gpu/drm/drm_modes.c out->clock = in->clock; clock 1995 drivers/gpu/drm/drm_modes.c if (in->clock > INT_MAX || in->vrefresh > INT_MAX) clock 1998 drivers/gpu/drm/drm_modes.c out->clock = in->clock; clock 442 drivers/gpu/drm/etnaviv/etnaviv_gpu.c static void etnaviv_gpu_load_clock(struct etnaviv_gpu *gpu, u32 clock) clock 444 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock | clock 446 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); clock 459 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); clock 461 drivers/gpu/drm/etnaviv/etnaviv_gpu.c clock &= ~VIVS_HI_CLOCK_CONTROL_FSCALE_VAL__MASK; clock 462 drivers/gpu/drm/etnaviv/etnaviv_gpu.c clock |= VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(fscale); clock 463 drivers/gpu/drm/etnaviv/etnaviv_gpu.c etnaviv_gpu_load_clock(gpu, clock); clock 53 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); clock 58 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c clock &= ~(VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE__MASK); clock 59 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c clock |= VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE(i); clock 60 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); clock 66 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c clock &= ~(VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE__MASK); clock 67 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c clock |= VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE(0); clock 68 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); clock 398 drivers/gpu/drm/exynos/exynos_drm_fimd.c if (mode->clock == 0) { clock 403 drivers/gpu/drm/exynos/exynos_drm_fimd.c ideal_clk = mode->clock * 1000; clock 62 drivers/gpu/drm/exynos/exynos_drm_rotator.c struct clk *clock; clock 308 drivers/gpu/drm/exynos/exynos_drm_rotator.c rot->clock = devm_clk_get(dev, "rotator"); clock 309 drivers/gpu/drm/exynos/exynos_drm_rotator.c if (IS_ERR(rot->clock)) { clock 311 drivers/gpu/drm/exynos/exynos_drm_rotator.c return PTR_ERR(rot->clock); clock 347 drivers/gpu/drm/exynos/exynos_drm_rotator.c clk_disable_unprepare(rot->clock); clock 355 drivers/gpu/drm/exynos/exynos_drm_rotator.c return clk_prepare_enable(rot->clock); clock 45 drivers/gpu/drm/exynos/exynos_drm_scaler.c struct clk *clock[SCALER_MAX_CLK]; clock 518 drivers/gpu/drm/exynos/exynos_drm_scaler.c scaler->clock[i] = devm_clk_get(dev, clock 520 drivers/gpu/drm/exynos/exynos_drm_scaler.c if (IS_ERR(scaler->clock[i])) { clock 522 drivers/gpu/drm/exynos/exynos_drm_scaler.c return PTR_ERR(scaler->clock[i]); clock 570 drivers/gpu/drm/exynos/exynos_drm_scaler.c clk_fun(scaler->clock[i]); clock 924 drivers/gpu/drm/exynos/exynos_hdmi.c false, mode->clock * 1000); clock 926 drivers/gpu/drm/exynos/exynos_hdmi.c ret = hdmi_find_phy_conf(hdata, mode->clock * 1000); clock 1427 drivers/gpu/drm/exynos/exynos_hdmi.c ret = hdmi_find_phy_conf(hdata, m->clock * 1000); clock 89 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c clk_set_rate(fsl_dev->pix_clk, mode->clock * 1000); clock 74 drivers/gpu/drm/gma500/cdv_intel_crt.c if (mode->clock < 20000) clock 78 drivers/gpu/drm/gma500/cdv_intel_crt.c if (mode->clock > 355000) clock 213 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_clock_t *clock, bool is_lvds, u32 ddi_select) clock 271 drivers/gpu/drm/gma500/cdv_intel_display.c m |= ((clock->m2) << SB_M_DIVIDER_SHIFT); clock 287 drivers/gpu/drm/gma500/cdv_intel_display.c n_vco |= ((clock->n) << SB_N_DIVIDER_SHIFT); clock 289 drivers/gpu/drm/gma500/cdv_intel_display.c if (clock->vco < 2250000) { clock 292 drivers/gpu/drm/gma500/cdv_intel_display.c } else if (clock->vco < 2750000) { clock 295 drivers/gpu/drm/gma500/cdv_intel_display.c } else if (clock->vco < 3300000) { clock 311 drivers/gpu/drm/gma500/cdv_intel_display.c p |= SET_FIELD(clock->p1, SB_P1_DIVIDER); clock 312 drivers/gpu/drm/gma500/cdv_intel_display.c switch (clock->p2) { clock 326 drivers/gpu/drm/gma500/cdv_intel_display.c DRM_ERROR("Bad P2 clock: %d\n", clock->p2); clock 392 drivers/gpu/drm/gma500/cdv_intel_display.c static void cdv_intel_clock(int refclk, struct gma_clock_t *clock) clock 394 drivers/gpu/drm/gma500/cdv_intel_display.c clock->m = clock->m2 + 2; clock 395 drivers/gpu/drm/gma500/cdv_intel_display.c clock->p = clock->p1 * clock->p2; clock 396 drivers/gpu/drm/gma500/cdv_intel_display.c clock->vco = (refclk * clock->m) / clock->n; clock 397 drivers/gpu/drm/gma500/cdv_intel_display.c clock->dot = clock->vco / clock->p; clock 406 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_clock_t clock; clock 411 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p1 = 2; clock 412 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p2 = 10; clock 413 drivers/gpu/drm/gma500/cdv_intel_display.c clock.n = 1; clock 414 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m1 = 0; clock 415 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = 118; clock 417 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p1 = 1; clock 418 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p2 = 10; clock 419 drivers/gpu/drm/gma500/cdv_intel_display.c clock.n = 1; clock 420 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m1 = 0; clock 421 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = 98; clock 427 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p1 = 2; clock 428 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p2 = 10; clock 429 drivers/gpu/drm/gma500/cdv_intel_display.c clock.n = 5; clock 430 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m1 = 0; clock 431 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = 160; clock 433 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p1 = 1; clock 434 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p2 = 10; clock 435 drivers/gpu/drm/gma500/cdv_intel_display.c clock.n = 5; clock 436 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m1 = 0; clock 437 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = 133; clock 445 drivers/gpu/drm/gma500/cdv_intel_display.c gma_crtc->clock_funcs->clock(refclk, &clock); clock 446 drivers/gpu/drm/gma500/cdv_intel_display.c memcpy(best_clock, &clock, sizeof(struct gma_clock_t)); clock 580 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_clock_t clock; clock 655 drivers/gpu/drm/gma500/cdv_intel_display.c ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, clock 656 drivers/gpu/drm/gma500/cdv_intel_display.c &clock); clock 659 drivers/gpu/drm/gma500/cdv_intel_display.c adjusted_mode->clock, clock.dot); clock 729 drivers/gpu/drm/gma500/cdv_intel_display.c cdv_dpll_set_clock_cdv(dev, crtc, &clock, is_lvds, ddi_select); clock 748 drivers/gpu/drm/gma500/cdv_intel_display.c if (clock.p2 == 7) clock 783 drivers/gpu/drm/gma500/cdv_intel_display.c int sdvo_pixel_multiply = adjusted_mode->clock / mode->clock; clock 830 drivers/gpu/drm/gma500/cdv_intel_display.c static void i8xx_clock(int refclk, struct gma_clock_t *clock) clock 832 drivers/gpu/drm/gma500/cdv_intel_display.c clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); clock 833 drivers/gpu/drm/gma500/cdv_intel_display.c clock->p = clock->p1 * clock->p2; clock 834 drivers/gpu/drm/gma500/cdv_intel_display.c clock->vco = refclk * clock->m / (clock->n + 2); clock 835 drivers/gpu/drm/gma500/cdv_intel_display.c clock->dot = clock->vco / clock->p; clock 848 drivers/gpu/drm/gma500/cdv_intel_display.c struct gma_clock_t clock; clock 871 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT; clock 872 drivers/gpu/drm/gma500/cdv_intel_display.c clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT; clock 873 drivers/gpu/drm/gma500/cdv_intel_display.c clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT; clock 876 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p1 = clock 880 drivers/gpu/drm/gma500/cdv_intel_display.c if (clock.p1 == 0) { clock 881 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p1 = 4; clock 884 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p2 = 14; clock 889 drivers/gpu/drm/gma500/cdv_intel_display.c i8xx_clock(66000, &clock); clock 891 drivers/gpu/drm/gma500/cdv_intel_display.c i8xx_clock(48000, &clock); clock 894 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p1 = 2; clock 896 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p1 = clock 902 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p2 = 4; clock 904 drivers/gpu/drm/gma500/cdv_intel_display.c clock.p2 = 2; clock 906 drivers/gpu/drm/gma500/cdv_intel_display.c i8xx_clock(48000, &clock); clock 914 drivers/gpu/drm/gma500/cdv_intel_display.c return clock.dot; clock 949 drivers/gpu/drm/gma500/cdv_intel_display.c mode->clock = cdv_intel_crtc_clock_get(dev, crtc); clock 983 drivers/gpu/drm/gma500/cdv_intel_display.c .clock = cdv_intel_clock, clock 529 drivers/gpu/drm/gma500/cdv_intel_dp.c (cdv_intel_dp_link_required(mode->clock, dev_priv->edp.bpp) clock 534 drivers/gpu/drm/gma500/cdv_intel_dp.c if (cdv_intel_dp_link_required(mode->clock, 24) clock 539 drivers/gpu/drm/gma500/cdv_intel_dp.c if (mode->clock < 10000) clock 889 drivers/gpu/drm/gma500/cdv_intel_dp.c adjusted_mode->clock = fixed_mode->clock; clock 901 drivers/gpu/drm/gma500/cdv_intel_dp.c int lane_count, clock; clock 905 drivers/gpu/drm/gma500/cdv_intel_dp.c int refclock = mode->clock; clock 910 drivers/gpu/drm/gma500/cdv_intel_dp.c refclock = intel_dp->panel_fixed_mode->clock; clock 915 drivers/gpu/drm/gma500/cdv_intel_dp.c for (clock = max_clock; clock >= 0; clock--) { clock 916 drivers/gpu/drm/gma500/cdv_intel_dp.c int link_avail = cdv_intel_dp_max_data_rate(cdv_intel_dp_link_clock(bws[clock]), lane_count); clock 919 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_bw = bws[clock]; clock 921 drivers/gpu/drm/gma500/cdv_intel_dp.c adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); clock 925 drivers/gpu/drm/gma500/cdv_intel_dp.c adjusted_mode->clock); clock 934 drivers/gpu/drm/gma500/cdv_intel_dp.c adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); clock 938 drivers/gpu/drm/gma500/cdv_intel_dp.c adjusted_mode->clock); clock 1026 drivers/gpu/drm/gma500/cdv_intel_dp.c mode->clock, adjusted_mode->clock, &m_n); clock 230 drivers/gpu/drm/gma500/cdv_intel_hdmi.c if (mode->clock > 165000) clock 232 drivers/gpu/drm/gma500/cdv_intel_hdmi.c if (mode->clock < 20000) clock 294 drivers/gpu/drm/gma500/cdv_intel_lvds.c adjusted_mode->clock = panel_fixed_mode->clock; clock 12 drivers/gpu/drm/gma500/gma_device.c uint32_t clock; clock 22 drivers/gpu/drm/gma500/gma_device.c pci_read_config_dword(pci_root, 0xD4, &clock); clock 25 drivers/gpu/drm/gma500/gma_device.c switch (clock & 0x07) { clock 670 drivers/gpu/drm/gma500/gma_display.c struct gma_clock_t *clock) clock 672 drivers/gpu/drm/gma500/gma_display.c if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1) clock 674 drivers/gpu/drm/gma500/gma_display.c if (clock->p < limit->p.min || limit->p.max < clock->p) clock 676 drivers/gpu/drm/gma500/gma_display.c if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2) clock 678 drivers/gpu/drm/gma500/gma_display.c if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1) clock 681 drivers/gpu/drm/gma500/gma_display.c if (clock->m1 <= clock->m2 && clock->m1 != 0) clock 683 drivers/gpu/drm/gma500/gma_display.c if (clock->m < limit->m.min || limit->m.max < clock->m) clock 685 drivers/gpu/drm/gma500/gma_display.c if (clock->n < limit->n.min || limit->n.max < clock->n) clock 687 drivers/gpu/drm/gma500/gma_display.c if (clock->vco < limit->vco.min || limit->vco.max < clock->vco) clock 693 drivers/gpu/drm/gma500/gma_display.c if (clock->dot < limit->dot.min || limit->dot.max < clock->dot) clock 706 drivers/gpu/drm/gma500/gma_display.c struct gma_clock_t clock; clock 719 drivers/gpu/drm/gma500/gma_display.c clock.p2 = limit->p2.p2_fast; clock 721 drivers/gpu/drm/gma500/gma_display.c clock.p2 = limit->p2.p2_slow; clock 724 drivers/gpu/drm/gma500/gma_display.c clock.p2 = limit->p2.p2_slow; clock 726 drivers/gpu/drm/gma500/gma_display.c clock.p2 = limit->p2.p2_fast; clock 732 drivers/gpu/drm/gma500/gma_display.c for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) { clock 733 drivers/gpu/drm/gma500/gma_display.c for (clock.m2 = limit->m2.min; clock 734 drivers/gpu/drm/gma500/gma_display.c (clock.m2 < clock.m1 || clock.m1 == 0) && clock 735 drivers/gpu/drm/gma500/gma_display.c clock.m2 <= limit->m2.max; clock.m2++) { clock 736 drivers/gpu/drm/gma500/gma_display.c for (clock.n = limit->n.min; clock 737 drivers/gpu/drm/gma500/gma_display.c clock.n <= limit->n.max; clock.n++) { clock 738 drivers/gpu/drm/gma500/gma_display.c for (clock.p1 = limit->p1.min; clock 739 drivers/gpu/drm/gma500/gma_display.c clock.p1 <= limit->p1.max; clock 740 drivers/gpu/drm/gma500/gma_display.c clock.p1++) { clock 743 drivers/gpu/drm/gma500/gma_display.c clock_funcs->clock(refclk, &clock); clock 746 drivers/gpu/drm/gma500/gma_display.c limit, &clock)) clock 749 drivers/gpu/drm/gma500/gma_display.c this_err = abs(clock.dot - target); clock 751 drivers/gpu/drm/gma500/gma_display.c *best_clock = clock; clock 48 drivers/gpu/drm/gma500/gma_display.h void (*clock)(int refclk, struct gma_clock_t *clock); clock 52 drivers/gpu/drm/gma500/gma_display.h struct gma_clock_t *clock); clock 86 drivers/gpu/drm/gma500/gma_display.h extern void gma_clock(int refclk, struct gma_clock_t *clock); clock 89 drivers/gpu/drm/gma500/gma_display.h struct gma_clock_t *clock); clock 166 drivers/gpu/drm/gma500/intel_bios.c panel_fixed_mode->clock = dvo_timing->clock * 10; clock 292 drivers/gpu/drm/gma500/intel_bios.h u16 clock; /**< In 10khz */ clock 706 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c adjusted_mode->clock = fixed_mode->clock; clock 620 drivers/gpu/drm/gma500/mdfld_intel_display.c static void mdfld_clock(int refclk, struct mrst_clock_t *clock) clock 622 drivers/gpu/drm/gma500/mdfld_intel_display.c clock->dot = (refclk * clock->m) / clock->p1; clock 633 drivers/gpu/drm/gma500/mdfld_intel_display.c struct mrst_clock_t clock; clock 639 drivers/gpu/drm/gma500/mdfld_intel_display.c for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) { clock 640 drivers/gpu/drm/gma500/mdfld_intel_display.c for (clock.p1 = limit->p1.min; clock.p1 <= limit->p1.max; clock 641 drivers/gpu/drm/gma500/mdfld_intel_display.c clock.p1++) { clock 644 drivers/gpu/drm/gma500/mdfld_intel_display.c mdfld_clock(refclk, &clock); clock 646 drivers/gpu/drm/gma500/mdfld_intel_display.c this_err = abs(clock.dot - target); clock 648 drivers/gpu/drm/gma500/mdfld_intel_display.c *best_clock = clock; clock 670 drivers/gpu/drm/gma500/mdfld_intel_display.c struct mrst_clock_t clock; clock 715 drivers/gpu/drm/gma500/mdfld_intel_display.c adjusted_mode->clock); clock 854 drivers/gpu/drm/gma500/mdfld_intel_display.c clk = adjusted_mode->clock; clock 899 drivers/gpu/drm/gma500/mdfld_intel_display.c adjusted_mode->clock, clk_tmp); clock 901 drivers/gpu/drm/gma500/mdfld_intel_display.c ok = mdfldFindBestPLL(crtc, clk_tmp, refclk, &clock); clock 907 drivers/gpu/drm/gma500/mdfld_intel_display.c m_conv = mdfld_m_converts[(clock.m - MDFLD_M_MIN)]; clock 911 drivers/gpu/drm/gma500/mdfld_intel_display.c clock.dot, clock.m, clock 912 drivers/gpu/drm/gma500/mdfld_intel_display.c clock.p1, m_conv); clock 959 drivers/gpu/drm/gma500/mdfld_intel_display.c dpll |= (1 << (clock.p1 - 2)) << 17; clock 65 drivers/gpu/drm/gma500/mdfld_tmd_vid.c mode->clock = ti->pixel_clock * 10; clock 75 drivers/gpu/drm/gma500/mdfld_tmd_vid.c dev_dbg(dev->dev, "clock is %d\n", mode->clock); clock 85 drivers/gpu/drm/gma500/mdfld_tmd_vid.c mode->clock = 33264; clock 46 drivers/gpu/drm/gma500/mdfld_tpo_vid.c mode->clock = 33264; clock 111 drivers/gpu/drm/gma500/oaktrail_crtc.c static void mrst_lvds_clock(int refclk, struct gma_clock_t *clock) clock 113 drivers/gpu/drm/gma500/oaktrail_crtc.c clock->dot = (refclk * clock->m) / (14 * clock->p1); clock 116 drivers/gpu/drm/gma500/oaktrail_crtc.c static void mrst_print_pll(struct gma_clock_t *clock) clock 119 drivers/gpu/drm/gma500/oaktrail_crtc.c clock->dot, clock->m, clock->m1, clock->m2, clock->n, clock 120 drivers/gpu/drm/gma500/oaktrail_crtc.c clock->p1, clock->p2); clock 127 drivers/gpu/drm/gma500/oaktrail_crtc.c struct gma_clock_t clock; clock 132 drivers/gpu/drm/gma500/oaktrail_crtc.c memset(&clock, 0, sizeof(clock)); clock 134 drivers/gpu/drm/gma500/oaktrail_crtc.c for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) { clock 135 drivers/gpu/drm/gma500/oaktrail_crtc.c for (clock.n = limit->n.min; clock.n <= limit->n.max; clock 136 drivers/gpu/drm/gma500/oaktrail_crtc.c clock.n++) { clock 137 drivers/gpu/drm/gma500/oaktrail_crtc.c for (clock.p1 = limit->p1.min; clock 138 drivers/gpu/drm/gma500/oaktrail_crtc.c clock.p1 <= limit->p1.max; clock.p1++) { clock 140 drivers/gpu/drm/gma500/oaktrail_crtc.c clock.p = clock.p1 * limit->p2.p2_slow; clock 141 drivers/gpu/drm/gma500/oaktrail_crtc.c target_vco = target * clock.p; clock 150 drivers/gpu/drm/gma500/oaktrail_crtc.c actual_freq = (refclk * clock.m) / clock 151 drivers/gpu/drm/gma500/oaktrail_crtc.c (clock.n * clock.p); clock 166 drivers/gpu/drm/gma500/oaktrail_crtc.c *best_clock = clock; clock 185 drivers/gpu/drm/gma500/oaktrail_crtc.c struct gma_clock_t clock; clock 189 drivers/gpu/drm/gma500/oaktrail_crtc.c memset(&clock, 0, sizeof(clock)); clock 191 drivers/gpu/drm/gma500/oaktrail_crtc.c for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) { clock 192 drivers/gpu/drm/gma500/oaktrail_crtc.c for (clock.p1 = limit->p1.min; clock.p1 <= limit->p1.max; clock 193 drivers/gpu/drm/gma500/oaktrail_crtc.c clock.p1++) { clock 196 drivers/gpu/drm/gma500/oaktrail_crtc.c mrst_lvds_clock(refclk, &clock); clock 198 drivers/gpu/drm/gma500/oaktrail_crtc.c this_err = abs(clock.dot - target); clock 200 drivers/gpu/drm/gma500/oaktrail_crtc.c *best_clock = clock; clock 368 drivers/gpu/drm/gma500/oaktrail_crtc.c struct gma_clock_t clock; clock 503 drivers/gpu/drm/gma500/oaktrail_crtc.c ok = limit->find_pll(limit, crtc, adjusted_mode->clock, clock 504 drivers/gpu/drm/gma500/oaktrail_crtc.c refclk, &clock); clock 508 drivers/gpu/drm/gma500/oaktrail_crtc.c clock.p1 = (1L << (clock.p1 - 1)); clock 509 drivers/gpu/drm/gma500/oaktrail_crtc.c clock.m -= 2; clock 510 drivers/gpu/drm/gma500/oaktrail_crtc.c clock.n = (1L << (clock.n - 1)); clock 516 drivers/gpu/drm/gma500/oaktrail_crtc.c mrst_print_pll(&clock); clock 519 drivers/gpu/drm/gma500/oaktrail_crtc.c fp = clock.n << 16 | clock.m; clock 521 drivers/gpu/drm/gma500/oaktrail_crtc.c fp = oaktrail_m_converts[(clock.m - MRST_M_MIN)] << 8; clock 535 drivers/gpu/drm/gma500/oaktrail_crtc.c adjusted_mode->clock / mode->clock; clock 546 drivers/gpu/drm/gma500/oaktrail_crtc.c dpll |= clock.p1 << 16; // dpll |= (1 << (clock.p1 - 1)) << 16; clock 548 drivers/gpu/drm/gma500/oaktrail_crtc.c dpll |= (1 << (clock.p1 - 2)) << 17; clock 660 drivers/gpu/drm/gma500/oaktrail_crtc.c .clock = mrst_lvds_clock, clock 170 drivers/gpu/drm/gma500/oaktrail_hdmi.c new_crtc_htotal = (mode->crtc_htotal - 1) * 200 * 1000 / mode->clock; clock 282 drivers/gpu/drm/gma500/oaktrail_hdmi.c struct oaktrail_hdmi_clock clock; clock 306 drivers/gpu/drm/gma500/oaktrail_hdmi.c oaktrail_hdmi_find_dpll(crtc, adjusted_mode->clock, refclk, &clock); clock 313 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_DIV_CTRL, ((clock.nf << 6) | clock.nr)); clock 314 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_ADJUST, ((clock.nf >> 14) - 1)); clock 315 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_CTRL, (dpll | (clock.np << DPLL_PDIV_SHIFT) | DPLL_ENSTAT | DPLL_DITHEN)); clock 517 drivers/gpu/drm/gma500/oaktrail_hdmi.c if (mode->clock > 165000) clock 519 drivers/gpu/drm/gma500/oaktrail_hdmi.c if (mode->clock < 20000) clock 244 drivers/gpu/drm/gma500/oaktrail_lvds.c mode->clock = ti->pixel_clock * 10; clock 254 drivers/gpu/drm/gma500/oaktrail_lvds.c pr_info("clock is %d\n", mode->clock); clock 66 drivers/gpu/drm/gma500/psb_intel_display.c static void psb_intel_clock(int refclk, struct gma_clock_t *clock) clock 68 drivers/gpu/drm/gma500/psb_intel_display.c clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); clock 69 drivers/gpu/drm/gma500/psb_intel_display.c clock->p = clock->p1 * clock->p2; clock 70 drivers/gpu/drm/gma500/psb_intel_display.c clock->vco = refclk * clock->m / (clock->n + 2); clock 71 drivers/gpu/drm/gma500/psb_intel_display.c clock->dot = clock->vco / clock->p; clock 104 drivers/gpu/drm/gma500/psb_intel_display.c struct gma_clock_t clock; clock 142 drivers/gpu/drm/gma500/psb_intel_display.c ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, clock 143 drivers/gpu/drm/gma500/psb_intel_display.c &clock); clock 146 drivers/gpu/drm/gma500/psb_intel_display.c adjusted_mode->clock, clock.dot); clock 150 drivers/gpu/drm/gma500/psb_intel_display.c fp = clock.n << 16 | clock.m1 << 8 | clock.m2; clock 160 drivers/gpu/drm/gma500/psb_intel_display.c adjusted_mode->clock / mode->clock; clock 167 drivers/gpu/drm/gma500/psb_intel_display.c dpll |= (1 << (clock.p1 - 1)) << 16; clock 168 drivers/gpu/drm/gma500/psb_intel_display.c switch (clock.p2) { clock 236 drivers/gpu/drm/gma500/psb_intel_display.c if (clock.p2 == 7) clock 306 drivers/gpu/drm/gma500/psb_intel_display.c struct gma_clock_t clock; clock 330 drivers/gpu/drm/gma500/psb_intel_display.c clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT; clock 331 drivers/gpu/drm/gma500/psb_intel_display.c clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT; clock 332 drivers/gpu/drm/gma500/psb_intel_display.c clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT; clock 335 drivers/gpu/drm/gma500/psb_intel_display.c clock.p1 = clock 339 drivers/gpu/drm/gma500/psb_intel_display.c clock.p2 = 14; clock 344 drivers/gpu/drm/gma500/psb_intel_display.c psb_intel_clock(66000, &clock); clock 346 drivers/gpu/drm/gma500/psb_intel_display.c psb_intel_clock(48000, &clock); clock 349 drivers/gpu/drm/gma500/psb_intel_display.c clock.p1 = 2; clock 351 drivers/gpu/drm/gma500/psb_intel_display.c clock.p1 = clock 357 drivers/gpu/drm/gma500/psb_intel_display.c clock.p2 = 4; clock 359 drivers/gpu/drm/gma500/psb_intel_display.c clock.p2 = 2; clock 361 drivers/gpu/drm/gma500/psb_intel_display.c psb_intel_clock(48000, &clock); clock 369 drivers/gpu/drm/gma500/psb_intel_display.c return clock.dot; clock 404 drivers/gpu/drm/gma500/psb_intel_display.c mode->clock = psb_intel_crtc_clock_get(dev, crtc); clock 438 drivers/gpu/drm/gma500/psb_intel_display.c .clock = psb_intel_clock, clock 65 drivers/gpu/drm/gma500/psb_intel_drv.h mode->clock *= multiplier; clock 410 drivers/gpu/drm/gma500/psb_intel_lvds.c adjusted_mode->clock = panel_fixed_mode->clock; clock 547 drivers/gpu/drm/gma500/psb_intel_sdvo.c if (mode->clock >= 100000) clock 549 drivers/gpu/drm/gma500/psb_intel_sdvo.c else if (mode->clock >= 50000) clock 690 drivers/gpu/drm/gma500/psb_intel_sdvo.c uint16_t clock, clock 697 drivers/gpu/drm/gma500/psb_intel_sdvo.c args.clock = clock; clock 748 drivers/gpu/drm/gma500/psb_intel_sdvo.c dtd->part1.clock = mode->clock / 10; clock 801 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->clock = dtd->part1.clock * 10; clock 941 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->clock / 10, clock 1176 drivers/gpu/drm/gma500/psb_intel_sdvo.c if (psb_intel_sdvo->pixel_clock_min > mode->clock) clock 1179 drivers/gpu/drm/gma500/psb_intel_sdvo.c if (psb_intel_sdvo->pixel_clock_max < mode->clock) clock 67 drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h u16 clock; /**< pixel clock, in 10kHz units */ clock 100 drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h u16 clock; clock 599 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c mode->clock = 33324 << 1; clock 609 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c dev_info(&dev->pdev->dev, "clock = %d\n", mode->clock); clock 474 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c pixel_clk_kHz = mode->clock; clock 548 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dphy_req_kHz = mode->clock * bpp / dsi->lanes; clock 567 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->lanes, mode->clock, phy->lane_byte_clk_kHz); clock 618 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c req_kHz = mode->clock * bpp / dsi->lanes; clock 624 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c drm_mode_vrefresh(mode), mode->clock); clock 630 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c if (mode->clock/dsi->lanes == lane_byte_clk_kHz/3) { clock 147 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c adjusted_mode->clock = clock 148 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c clk_round_rate(ctx->ade_pix_clk, mode->clock * 1000) / 1000; clock 157 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c u32 clk_Hz = mode->clock * 1000; clock 167 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000; clock 232 drivers/gpu/drm/i2c/ch7006_drv.c for (mode = ch7006_modes; mode->mode.clock; mode++) { clock 111 drivers/gpu/drm/i2c/ch7006_mode.c .clock = f, \ clock 180 drivers/gpu/drm/i2c/ch7006_mode.c for (mode = ch7006_modes; mode->mode.clock; mode++) { clock 189 drivers/gpu/drm/i2c/ch7006_mode.c mode->mode.clock != drm_mode->clock) clock 269 drivers/gpu/drm/i2c/ch7006_mode.c if (abs(freq - mode->mode.clock) < clock 270 drivers/gpu/drm/i2c/ch7006_mode.c abs(best_freq - mode->mode.clock)) { clock 222 drivers/gpu/drm/i2c/sil164_drv.c bool duallink = (on && encoder->crtc->mode.clock > 165000); clock 262 drivers/gpu/drm/i2c/sil164_drv.c if (mode->clock < 32000) clock 265 drivers/gpu/drm/i2c/sil164_drv.c if (mode->clock > 330000 || clock 266 drivers/gpu/drm/i2c/sil164_drv.c (mode->clock > 165000 && !priv->duallink_slave)) clock 278 drivers/gpu/drm/i2c/sil164_drv.c bool duallink = adjusted_mode->clock > 165000; clock 1378 drivers/gpu/drm/i2c/tda998x_drv.c if (mode->clock > ((priv->rev == TDA19988) ? 165000 : 150000)) clock 1514 drivers/gpu/drm/i2c/tda998x_drv.c tmds_clock = mode->clock * (1 + rep); clock 252 drivers/gpu/drm/i915/display/dvo_ch7017.c if (mode->clock > 160000) clock 272 drivers/gpu/drm/i915/display/dvo_ch7017.c if (mode->clock < 100000) { clock 270 drivers/gpu/drm/i915/display/dvo_ch7xxx.c if (mode->clock > 165000) clock 282 drivers/gpu/drm/i915/display/dvo_ch7xxx.c if (mode->clock <= 65000) { clock 319 drivers/gpu/drm/i915/display/dvo_ivch.c if (mode->clock > 112000) clock 540 drivers/gpu/drm/i915/display/dvo_ns2501.c if ((mode->hdisplay == 640 && mode->vdisplay == 480 && mode->clock == 25175) || clock 541 drivers/gpu/drm/i915/display/dvo_ns2501.c (mode->hdisplay == 800 && mode->vdisplay == 600 && mode->clock == 40000) || clock 542 drivers/gpu/drm/i915/display/dvo_ns2501.c (mode->hdisplay == 1024 && mode->vdisplay == 768 && mode->clock == 65000)) { clock 70 drivers/gpu/drm/i915/display/intel_audio.c int clock; clock 77 drivers/gpu/drm/i915/display/intel_audio.c int clock; clock 129 drivers/gpu/drm/i915/display/intel_audio.c crtc_state->port_clock == dp_aud_n_m[i].clock) clock 137 drivers/gpu/drm/i915/display/intel_audio.c int clock; clock 240 drivers/gpu/drm/i915/display/intel_audio.c if (adjusted_mode->crtc_clock == hdmi_audio_clock[i].clock) clock 251 drivers/gpu/drm/i915/display/intel_audio.c hdmi_audio_clock[i].clock, clock 276 drivers/gpu/drm/i915/display/intel_audio.c crtc_state->port_clock == hdmi_ncts_table[i].clock) { clock 134 drivers/gpu/drm/i915/display/intel_bios.c panel_fixed_mode->clock = dvo_timing->clock * 10; clock 323 drivers/gpu/drm/i915/display/intel_crt.c if (mode->clock < 25000) clock 338 drivers/gpu/drm/i915/display/intel_crt.c if (mode->clock > max_clock) clock 341 drivers/gpu/drm/i915/display/intel_crt.c if (mode->clock > max_dotclk) clock 346 drivers/gpu/drm/i915/display/intel_crt.c (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2)) clock 1023 drivers/gpu/drm/i915/display/intel_ddi.c int clock = crtc_state->port_clock; clock 1035 drivers/gpu/drm/i915/display/intel_ddi.c switch (clock) { clock 1045 drivers/gpu/drm/i915/display/intel_ddi.c MISSING_CASE(clock); clock 1656 drivers/gpu/drm/i915/display/intel_ddi.c struct dpll clock; clock 1658 drivers/gpu/drm/i915/display/intel_ddi.c clock.m1 = 2; clock 1659 drivers/gpu/drm/i915/display/intel_ddi.c clock.m2 = (pll_state->pll0 & PORT_PLL_M2_MASK) << 22; clock 1661 drivers/gpu/drm/i915/display/intel_ddi.c clock.m2 |= pll_state->pll2 & PORT_PLL_M2_FRAC_MASK; clock 1662 drivers/gpu/drm/i915/display/intel_ddi.c clock.n = (pll_state->pll1 & PORT_PLL_N_MASK) >> PORT_PLL_N_SHIFT; clock 1663 drivers/gpu/drm/i915/display/intel_ddi.c clock.p1 = (pll_state->ebb0 & PORT_PLL_P1_MASK) >> PORT_PLL_P1_SHIFT; clock 1664 drivers/gpu/drm/i915/display/intel_ddi.c clock.p2 = (pll_state->ebb0 & PORT_PLL_P2_MASK) >> PORT_PLL_P2_SHIFT; clock 1666 drivers/gpu/drm/i915/display/intel_ddi.c return chv_calc_dpll_params(100000, &clock); clock 533 drivers/gpu/drm/i915/display/intel_display.c static int pnv_calc_dpll_params(int refclk, struct dpll *clock) clock 535 drivers/gpu/drm/i915/display/intel_display.c clock->m = clock->m2 + 2; clock 536 drivers/gpu/drm/i915/display/intel_display.c clock->p = clock->p1 * clock->p2; clock 537 drivers/gpu/drm/i915/display/intel_display.c if (WARN_ON(clock->n == 0 || clock->p == 0)) clock 539 drivers/gpu/drm/i915/display/intel_display.c clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); clock 540 drivers/gpu/drm/i915/display/intel_display.c clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p); clock 542 drivers/gpu/drm/i915/display/intel_display.c return clock->dot; clock 550 drivers/gpu/drm/i915/display/intel_display.c static int i9xx_calc_dpll_params(int refclk, struct dpll *clock) clock 552 drivers/gpu/drm/i915/display/intel_display.c clock->m = i9xx_dpll_compute_m(clock); clock 553 drivers/gpu/drm/i915/display/intel_display.c clock->p = clock->p1 * clock->p2; clock 554 drivers/gpu/drm/i915/display/intel_display.c if (WARN_ON(clock->n + 2 == 0 || clock->p == 0)) clock 556 drivers/gpu/drm/i915/display/intel_display.c clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2); clock 557 drivers/gpu/drm/i915/display/intel_display.c clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p); clock 559 drivers/gpu/drm/i915/display/intel_display.c return clock->dot; clock 562 drivers/gpu/drm/i915/display/intel_display.c static int vlv_calc_dpll_params(int refclk, struct dpll *clock) clock 564 drivers/gpu/drm/i915/display/intel_display.c clock->m = clock->m1 * clock->m2; clock 565 drivers/gpu/drm/i915/display/intel_display.c clock->p = clock->p1 * clock->p2; clock 566 drivers/gpu/drm/i915/display/intel_display.c if (WARN_ON(clock->n == 0 || clock->p == 0)) clock 568 drivers/gpu/drm/i915/display/intel_display.c clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); clock 569 drivers/gpu/drm/i915/display/intel_display.c clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p); clock 571 drivers/gpu/drm/i915/display/intel_display.c return clock->dot / 5; clock 574 drivers/gpu/drm/i915/display/intel_display.c int chv_calc_dpll_params(int refclk, struct dpll *clock) clock 576 drivers/gpu/drm/i915/display/intel_display.c clock->m = clock->m1 * clock->m2; clock 577 drivers/gpu/drm/i915/display/intel_display.c clock->p = clock->p1 * clock->p2; clock 578 drivers/gpu/drm/i915/display/intel_display.c if (WARN_ON(clock->n == 0 || clock->p == 0)) clock 580 drivers/gpu/drm/i915/display/intel_display.c clock->vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m), clock 581 drivers/gpu/drm/i915/display/intel_display.c clock->n << 22); clock 582 drivers/gpu/drm/i915/display/intel_display.c clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p); clock 584 drivers/gpu/drm/i915/display/intel_display.c return clock->dot / 5; clock 595 drivers/gpu/drm/i915/display/intel_display.c const struct dpll *clock) clock 597 drivers/gpu/drm/i915/display/intel_display.c if (clock->n < limit->n.min || limit->n.max < clock->n) clock 599 drivers/gpu/drm/i915/display/intel_display.c if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1) clock 601 drivers/gpu/drm/i915/display/intel_display.c if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2) clock 603 drivers/gpu/drm/i915/display/intel_display.c if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1) clock 608 drivers/gpu/drm/i915/display/intel_display.c if (clock->m1 <= clock->m2) clock 613 drivers/gpu/drm/i915/display/intel_display.c if (clock->p < limit->p.min || limit->p.max < clock->p) clock 615 drivers/gpu/drm/i915/display/intel_display.c if (clock->m < limit->m.min || limit->m.max < clock->m) clock 619 drivers/gpu/drm/i915/display/intel_display.c if (clock->vco < limit->vco.min || limit->vco.max < clock->vco) clock 624 drivers/gpu/drm/i915/display/intel_display.c if (clock->dot < limit->dot.min || limit->dot.max < clock->dot) clock 672 drivers/gpu/drm/i915/display/intel_display.c struct dpll clock; clock 677 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = i9xx_select_p2_div(limit, crtc_state, target); clock 679 drivers/gpu/drm/i915/display/intel_display.c for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock 680 drivers/gpu/drm/i915/display/intel_display.c clock.m1++) { clock 681 drivers/gpu/drm/i915/display/intel_display.c for (clock.m2 = limit->m2.min; clock 682 drivers/gpu/drm/i915/display/intel_display.c clock.m2 <= limit->m2.max; clock.m2++) { clock 683 drivers/gpu/drm/i915/display/intel_display.c if (clock.m2 >= clock.m1) clock 685 drivers/gpu/drm/i915/display/intel_display.c for (clock.n = limit->n.min; clock 686 drivers/gpu/drm/i915/display/intel_display.c clock.n <= limit->n.max; clock.n++) { clock 687 drivers/gpu/drm/i915/display/intel_display.c for (clock.p1 = limit->p1.min; clock 688 drivers/gpu/drm/i915/display/intel_display.c clock.p1 <= limit->p1.max; clock.p1++) { clock 691 drivers/gpu/drm/i915/display/intel_display.c i9xx_calc_dpll_params(refclk, &clock); clock 694 drivers/gpu/drm/i915/display/intel_display.c &clock)) clock 697 drivers/gpu/drm/i915/display/intel_display.c clock.p != match_clock->p) clock 700 drivers/gpu/drm/i915/display/intel_display.c this_err = abs(clock.dot - target); clock 702 drivers/gpu/drm/i915/display/intel_display.c *best_clock = clock; clock 730 drivers/gpu/drm/i915/display/intel_display.c struct dpll clock; clock 735 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = i9xx_select_p2_div(limit, crtc_state, target); clock 737 drivers/gpu/drm/i915/display/intel_display.c for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock 738 drivers/gpu/drm/i915/display/intel_display.c clock.m1++) { clock 739 drivers/gpu/drm/i915/display/intel_display.c for (clock.m2 = limit->m2.min; clock 740 drivers/gpu/drm/i915/display/intel_display.c clock.m2 <= limit->m2.max; clock.m2++) { clock 741 drivers/gpu/drm/i915/display/intel_display.c for (clock.n = limit->n.min; clock 742 drivers/gpu/drm/i915/display/intel_display.c clock.n <= limit->n.max; clock.n++) { clock 743 drivers/gpu/drm/i915/display/intel_display.c for (clock.p1 = limit->p1.min; clock 744 drivers/gpu/drm/i915/display/intel_display.c clock.p1 <= limit->p1.max; clock.p1++) { clock 747 drivers/gpu/drm/i915/display/intel_display.c pnv_calc_dpll_params(refclk, &clock); clock 750 drivers/gpu/drm/i915/display/intel_display.c &clock)) clock 753 drivers/gpu/drm/i915/display/intel_display.c clock.p != match_clock->p) clock 756 drivers/gpu/drm/i915/display/intel_display.c this_err = abs(clock.dot - target); clock 758 drivers/gpu/drm/i915/display/intel_display.c *best_clock = clock; clock 786 drivers/gpu/drm/i915/display/intel_display.c struct dpll clock; clock 794 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = i9xx_select_p2_div(limit, crtc_state, target); clock 798 drivers/gpu/drm/i915/display/intel_display.c for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { clock 800 drivers/gpu/drm/i915/display/intel_display.c for (clock.m1 = limit->m1.max; clock 801 drivers/gpu/drm/i915/display/intel_display.c clock.m1 >= limit->m1.min; clock.m1--) { clock 802 drivers/gpu/drm/i915/display/intel_display.c for (clock.m2 = limit->m2.max; clock 803 drivers/gpu/drm/i915/display/intel_display.c clock.m2 >= limit->m2.min; clock.m2--) { clock 804 drivers/gpu/drm/i915/display/intel_display.c for (clock.p1 = limit->p1.max; clock 805 drivers/gpu/drm/i915/display/intel_display.c clock.p1 >= limit->p1.min; clock.p1--) { clock 808 drivers/gpu/drm/i915/display/intel_display.c i9xx_calc_dpll_params(refclk, &clock); clock 811 drivers/gpu/drm/i915/display/intel_display.c &clock)) clock 814 drivers/gpu/drm/i915/display/intel_display.c this_err = abs(clock.dot - target); clock 816 drivers/gpu/drm/i915/display/intel_display.c *best_clock = clock; clock 818 drivers/gpu/drm/i915/display/intel_display.c max_n = clock.n; clock 881 drivers/gpu/drm/i915/display/intel_display.c struct dpll clock; clock 892 drivers/gpu/drm/i915/display/intel_display.c for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { clock 893 drivers/gpu/drm/i915/display/intel_display.c for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) { clock 894 drivers/gpu/drm/i915/display/intel_display.c for (clock.p2 = limit->p2.p2_fast; clock.p2 >= limit->p2.p2_slow; clock 895 drivers/gpu/drm/i915/display/intel_display.c clock.p2 -= clock.p2 > 10 ? 2 : 1) { clock 896 drivers/gpu/drm/i915/display/intel_display.c clock.p = clock.p1 * clock.p2; clock 898 drivers/gpu/drm/i915/display/intel_display.c for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) { clock 901 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = DIV_ROUND_CLOSEST(target * clock.p * clock.n, clock 902 drivers/gpu/drm/i915/display/intel_display.c refclk * clock.m1); clock 904 drivers/gpu/drm/i915/display/intel_display.c vlv_calc_dpll_params(refclk, &clock); clock 908 drivers/gpu/drm/i915/display/intel_display.c &clock)) clock 912 drivers/gpu/drm/i915/display/intel_display.c &clock, clock 917 drivers/gpu/drm/i915/display/intel_display.c *best_clock = clock; clock 942 drivers/gpu/drm/i915/display/intel_display.c struct dpll clock; clock 954 drivers/gpu/drm/i915/display/intel_display.c clock.n = 1, clock.m1 = 2; clock 957 drivers/gpu/drm/i915/display/intel_display.c for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) { clock 958 drivers/gpu/drm/i915/display/intel_display.c for (clock.p2 = limit->p2.p2_fast; clock 959 drivers/gpu/drm/i915/display/intel_display.c clock.p2 >= limit->p2.p2_slow; clock 960 drivers/gpu/drm/i915/display/intel_display.c clock.p2 -= clock.p2 > 10 ? 2 : 1) { clock 963 drivers/gpu/drm/i915/display/intel_display.c clock.p = clock.p1 * clock.p2; clock 965 drivers/gpu/drm/i915/display/intel_display.c m2 = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(target, clock.p * clock.n) << 22, clock 966 drivers/gpu/drm/i915/display/intel_display.c refclk * clock.m1); clock 968 drivers/gpu/drm/i915/display/intel_display.c if (m2 > INT_MAX/clock.m1) clock 971 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = m2; clock 973 drivers/gpu/drm/i915/display/intel_display.c chv_calc_dpll_params(refclk, &clock); clock 975 drivers/gpu/drm/i915/display/intel_display.c if (!intel_PLL_is_valid(to_i915(dev), limit, &clock)) clock 978 drivers/gpu/drm/i915/display/intel_display.c if (!vlv_PLL_is_optimal(dev, target, &clock, best_clock, clock 982 drivers/gpu/drm/i915/display/intel_display.c *best_clock = clock; clock 4996 drivers/gpu/drm/i915/display/intel_display.c int clock = crtc_state->base.adjusted_mode.crtc_clock; clock 5014 drivers/gpu/drm/i915/display/intel_display.c clock << auxdiv); clock 5033 drivers/gpu/drm/i915/display/intel_display.c clock, clock 8003 drivers/gpu/drm/i915/display/intel_display.c struct dpll *clock = &crtc_state->dpll; clock 8029 drivers/gpu/drm/i915/display/intel_display.c dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT_PINEVIEW; clock 8031 drivers/gpu/drm/i915/display/intel_display.c dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; clock 8035 drivers/gpu/drm/i915/display/intel_display.c switch (clock->p2) { clock 8077 drivers/gpu/drm/i915/display/intel_display.c struct dpll *clock = &crtc_state->dpll; clock 8084 drivers/gpu/drm/i915/display/intel_display.c dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; clock 8086 drivers/gpu/drm/i915/display/intel_display.c if (clock->p1 == 2) clock 8089 drivers/gpu/drm/i915/display/intel_display.c dpll |= (clock->p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT; clock 8090 drivers/gpu/drm/i915/display/intel_display.c if (clock->p2 == 4) clock 8272 drivers/gpu/drm/i915/display/intel_display.c mode->clock = pipe_config->base.adjusted_mode.crtc_clock; clock 8567 drivers/gpu/drm/i915/display/intel_display.c struct dpll clock; clock 8579 drivers/gpu/drm/i915/display/intel_display.c clock.m1 = (mdiv >> DPIO_M1DIV_SHIFT) & 7; clock 8580 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = mdiv & DPIO_M2DIV_MASK; clock 8581 drivers/gpu/drm/i915/display/intel_display.c clock.n = (mdiv >> DPIO_N_SHIFT) & 0xf; clock 8582 drivers/gpu/drm/i915/display/intel_display.c clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7; clock 8583 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f; clock 8585 drivers/gpu/drm/i915/display/intel_display.c pipe_config->port_clock = vlv_calc_dpll_params(refclk, &clock); clock 8678 drivers/gpu/drm/i915/display/intel_display.c struct dpll clock; clock 8694 drivers/gpu/drm/i915/display/intel_display.c clock.m1 = (pll_dw1 & 0x7) == DPIO_CHV_M1_DIV_BY_2 ? 2 : 0; clock 8695 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = (pll_dw0 & 0xff) << 22; clock 8697 drivers/gpu/drm/i915/display/intel_display.c clock.m2 |= pll_dw2 & 0x3fffff; clock 8698 drivers/gpu/drm/i915/display/intel_display.c clock.n = (pll_dw1 >> DPIO_CHV_N_DIV_SHIFT) & 0xf; clock 8699 drivers/gpu/drm/i915/display/intel_display.c clock.p1 = (cmn_dw13 >> DPIO_CHV_P1_DIV_SHIFT) & 0x7; clock 8700 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = (cmn_dw13 >> DPIO_CHV_P2_DIV_SHIFT) & 0x1f; clock 8702 drivers/gpu/drm/i915/display/intel_display.c pipe_config->port_clock = chv_calc_dpll_params(refclk, &clock); clock 11292 drivers/gpu/drm/i915/display/intel_display.c struct dpll clock; clock 11301 drivers/gpu/drm/i915/display/intel_display.c clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT; clock 11303 drivers/gpu/drm/i915/display/intel_display.c clock.n = ffs((fp & FP_N_PINEVIEW_DIV_MASK) >> FP_N_DIV_SHIFT) - 1; clock 11304 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = (fp & FP_M2_PINEVIEW_DIV_MASK) >> FP_M2_DIV_SHIFT; clock 11306 drivers/gpu/drm/i915/display/intel_display.c clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT; clock 11307 drivers/gpu/drm/i915/display/intel_display.c clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT; clock 11312 drivers/gpu/drm/i915/display/intel_display.c clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_PINEVIEW) >> clock 11315 drivers/gpu/drm/i915/display/intel_display.c clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >> clock 11320 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = dpll & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? clock 11324 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? clock 11334 drivers/gpu/drm/i915/display/intel_display.c port_clock = pnv_calc_dpll_params(refclk, &clock); clock 11336 drivers/gpu/drm/i915/display/intel_display.c port_clock = i9xx_calc_dpll_params(refclk, &clock); clock 11342 drivers/gpu/drm/i915/display/intel_display.c clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >> clock 11346 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = 7; clock 11348 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = 14; clock 11351 drivers/gpu/drm/i915/display/intel_display.c clock.p1 = 2; clock 11353 drivers/gpu/drm/i915/display/intel_display.c clock.p1 = ((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830) >> clock 11357 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = 4; clock 11359 drivers/gpu/drm/i915/display/intel_display.c clock.p2 = 2; clock 11362 drivers/gpu/drm/i915/display/intel_display.c port_clock = i9xx_calc_dpll_params(refclk, &clock); clock 16289 drivers/gpu/drm/i915/display/intel_display.c struct dpll clock = { clock 16299 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(i9xx_calc_dpll_params(48000, &clock) != 25154); clock 16302 drivers/gpu/drm/i915/display/intel_display.c pipe_name(pipe), clock.vco, clock.dot); clock 16304 drivers/gpu/drm/i915/display/intel_display.c fp = i9xx_dpll_compute_fp(&clock); clock 16307 drivers/gpu/drm/i915/display/intel_display.c ((clock.p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT) | clock 91 drivers/gpu/drm/i915/display/intel_dp.c int clock; clock 453 drivers/gpu/drm/i915/display/intel_dp.c mode_rate = intel_dp_link_required(fixed_mode->clock, 18); clock 596 drivers/gpu/drm/i915/display/intel_dp.c int target_clock = mode->clock; clock 614 drivers/gpu/drm/i915/display/intel_dp.c target_clock = fixed_mode->clock; clock 652 drivers/gpu/drm/i915/display/intel_dp.c if (mode->clock < 10000) clock 1300 drivers/gpu/drm/i915/display/intel_dp.c int try, clock = 0; clock 1360 drivers/gpu/drm/i915/display/intel_dp.c while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) { clock 1750 drivers/gpu/drm/i915/display/intel_dp.c if (pipe_config->port_clock == divisor[i].clock) { clock 1949 drivers/gpu/drm/i915/display/intel_dp.c int bpp, clock, lane_count; clock 1958 drivers/gpu/drm/i915/display/intel_dp.c for (clock = limits->min_clock; clock <= limits->max_clock; clock++) { clock 1962 drivers/gpu/drm/i915/display/intel_dp.c link_clock = intel_dp->common_rates[clock]; clock 2331 drivers/gpu/drm/i915/display/intel_dp.c intel_connector->panel.downclock_mode->clock, clock 444 drivers/gpu/drm/i915/display/intel_dp_mst.c mode_rate = intel_dp_link_required(mode->clock, 18); clock 447 drivers/gpu/drm/i915/display/intel_dp_mst.c if (mode->clock < 10000) clock 453 drivers/gpu/drm/i915/display/intel_dp_mst.c if (mode_rate > max_rate || mode->clock > max_dotclk) clock 613 drivers/gpu/drm/i915/display/intel_dpll_mgr.c static unsigned hsw_wrpll_get_budget_for_freq(int clock) clock 617 drivers/gpu/drm/i915/display/intel_dpll_mgr.c switch (clock) { clock 748 drivers/gpu/drm/i915/display/intel_dpll_mgr.c hsw_ddi_calculate_wrpll(int clock /* in Hz */, clock 756 drivers/gpu/drm/i915/display/intel_dpll_mgr.c freq2k = clock / 100; clock 758 drivers/gpu/drm/i915/display/intel_dpll_mgr.c budget = hsw_wrpll_get_budget_for_freq(clock); clock 846 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int clock = crtc_state->port_clock; clock 848 drivers/gpu/drm/i915/display/intel_dpll_mgr.c switch (clock / 2) { clock 859 drivers/gpu/drm/i915/display/intel_dpll_mgr.c DRM_DEBUG_KMS("Invalid clock for DP: %d\n", clock); clock 1289 drivers/gpu/drm/i915/display/intel_dpll_mgr.c skl_ddi_calculate_wrpll(int clock /* in Hz */, clock 1292 drivers/gpu/drm/i915/display/intel_dpll_mgr.c u64 afe_clock = clock * 5; /* AFE Clock is 5x Pixel clock */ clock 1345 drivers/gpu/drm/i915/display/intel_dpll_mgr.c DRM_DEBUG_DRIVER("No valid divider found for %dHz\n", clock); clock 1726 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int clock; clock 1783 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int clock = crtc_state->port_clock; clock 1788 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (bxt_dp_clk_val[i].clock == clock) { clock 1794 drivers/gpu/drm/i915/display/intel_dpll_mgr.c clk_div->vco = clock * 10 / 2 * clk_div->p1 * clk_div->p2; clock 1801 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int clock = crtc_state->port_clock; clock 1829 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (clock > 270000) clock 1831 drivers/gpu/drm/i915/display/intel_dpll_mgr.c else if (clock > 135000) clock 1833 drivers/gpu/drm/i915/display/intel_dpll_mgr.c else if (clock > 67000) clock 1835 drivers/gpu/drm/i915/display/intel_dpll_mgr.c else if (clock > 33000) clock 2464 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int clock; clock 2546 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int clock = crtc_state->port_clock; clock 2550 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (clock == params[i].clock) { clock 2556 drivers/gpu/drm/i915/display/intel_dpll_mgr.c MISSING_CASE(clock); clock 2702 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int clock = crtc_state->port_clock; clock 2714 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (!icl_mg_pll_find_divisors(clock, is_dp, use_ssc, &dco_khz, clock 2716 drivers/gpu/drm/i915/display/intel_dpll_mgr.c DRM_DEBUG_KMS("Failed to find divisors for clock %d\n", clock); clock 2727 drivers/gpu/drm/i915/display/intel_dpll_mgr.c clock); clock 72 drivers/gpu/drm/i915/display/intel_dsi.c if (fixed_mode->clock > max_dotclk) clock 606 drivers/gpu/drm/i915/display/intel_dsi_vbt.c intel_dsi->pclk = mode->clock; clock 227 drivers/gpu/drm/i915/display/intel_dvo.c int target_clock = mode->clock; clock 240 drivers/gpu/drm/i915/display/intel_dvo.c target_clock = fixed_mode->clock; clock 2122 drivers/gpu/drm/i915/display/intel_hdmi.c int clock, bool respect_downstream_limits, clock 2127 drivers/gpu/drm/i915/display/intel_hdmi.c if (clock < 25000) clock 2129 drivers/gpu/drm/i915/display/intel_hdmi.c if (clock > hdmi_port_clock_limit(hdmi, respect_downstream_limits, force_dvi)) clock 2133 drivers/gpu/drm/i915/display/intel_hdmi.c if (IS_GEN9_LP(dev_priv) && clock > 223333 && clock < 240000) clock 2137 drivers/gpu/drm/i915/display/intel_hdmi.c if (IS_CHERRYVIEW(dev_priv) && clock > 216000 && clock < 240000) clock 2151 drivers/gpu/drm/i915/display/intel_hdmi.c int clock; clock 2159 drivers/gpu/drm/i915/display/intel_hdmi.c clock = mode->clock; clock 2162 drivers/gpu/drm/i915/display/intel_hdmi.c clock *= 2; clock 2164 drivers/gpu/drm/i915/display/intel_hdmi.c if (clock > max_dotclk) clock 2168 drivers/gpu/drm/i915/display/intel_hdmi.c clock *= 2; clock 2171 drivers/gpu/drm/i915/display/intel_hdmi.c clock /= 2; clock 2174 drivers/gpu/drm/i915/display/intel_hdmi.c status = hdmi_port_clock_valid(hdmi, clock, true, force_dvi); clock 2179 drivers/gpu/drm/i915/display/intel_hdmi.c status = hdmi_port_clock_valid(hdmi, clock * 3 / 2, clock 2184 drivers/gpu/drm/i915/display/intel_hdmi.c status = hdmi_port_clock_valid(hdmi, clock * 5 / 4, clock 380 drivers/gpu/drm/i915/display/intel_lvds.c if (fixed_mode->clock > max_pixclk) clock 782 drivers/gpu/drm/i915/display/intel_lvds.c if (lvds_encoder->attached_connector->panel.fixed_mode->clock > 112999) clock 61 drivers/gpu/drm/i915/display/intel_panel.c downclock_mode->clock < fixed_mode->clock; clock 71 drivers/gpu/drm/i915/display/intel_panel.c int best_clock = fixed_mode->clock; clock 82 drivers/gpu/drm/i915/display/intel_panel.c scan->clock < best_clock) { clock 87 drivers/gpu/drm/i915/display/intel_panel.c best_clock = scan->clock; clock 1421 drivers/gpu/drm/i915/display/intel_panel.c u32 mul, clock; clock 1429 drivers/gpu/drm/i915/display/intel_panel.c clock = MHz(135); /* LPT:H */ clock 1431 drivers/gpu/drm/i915/display/intel_panel.c clock = MHz(24); /* LPT:LP */ clock 1433 drivers/gpu/drm/i915/display/intel_panel.c return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); clock 1458 drivers/gpu/drm/i915/display/intel_panel.c int clock; clock 1461 drivers/gpu/drm/i915/display/intel_panel.c clock = KHz(dev_priv->rawclk_freq); clock 1463 drivers/gpu/drm/i915/display/intel_panel.c clock = KHz(dev_priv->cdclk.hw.cdclk); clock 1465 drivers/gpu/drm/i915/display/intel_panel.c return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); clock 1476 drivers/gpu/drm/i915/display/intel_panel.c int clock; clock 1479 drivers/gpu/drm/i915/display/intel_panel.c clock = KHz(dev_priv->rawclk_freq); clock 1481 drivers/gpu/drm/i915/display/intel_panel.c clock = KHz(dev_priv->cdclk.hw.cdclk); clock 1483 drivers/gpu/drm/i915/display/intel_panel.c return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); clock 1494 drivers/gpu/drm/i915/display/intel_panel.c int mul, clock; clock 1498 drivers/gpu/drm/i915/display/intel_panel.c clock = KHz(19200); clock 1500 drivers/gpu/drm/i915/display/intel_panel.c clock = MHz(25); clock 1503 drivers/gpu/drm/i915/display/intel_panel.c clock = KHz(dev_priv->rawclk_freq); clock 1507 drivers/gpu/drm/i915/display/intel_panel.c return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); clock 784 drivers/gpu/drm/i915/display/intel_sdvo.c u16 clock, clock 791 drivers/gpu/drm/i915/display/intel_sdvo.c args.clock = clock; clock 849 drivers/gpu/drm/i915/display/intel_sdvo.c mode_clock = mode->clock; clock 851 drivers/gpu/drm/i915/display/intel_sdvo.c dtd->part1.clock = mode_clock; clock 907 drivers/gpu/drm/i915/display/intel_sdvo.c mode.clock = dtd->part1.clock * 10; clock 1227 drivers/gpu/drm/i915/display/intel_sdvo.c mode->clock / 10, clock 1245 drivers/gpu/drm/i915/display/intel_sdvo.c struct dpll *clock = &pipe_config->dpll; clock 1252 drivers/gpu/drm/i915/display/intel_sdvo.c clock->p1 = 2; clock 1253 drivers/gpu/drm/i915/display/intel_sdvo.c clock->p2 = 10; clock 1254 drivers/gpu/drm/i915/display/intel_sdvo.c clock->n = 3; clock 1255 drivers/gpu/drm/i915/display/intel_sdvo.c clock->m1 = 16; clock 1256 drivers/gpu/drm/i915/display/intel_sdvo.c clock->m2 = 8; clock 1258 drivers/gpu/drm/i915/display/intel_sdvo.c clock->p1 = 1; clock 1259 drivers/gpu/drm/i915/display/intel_sdvo.c clock->p2 = 10; clock 1260 drivers/gpu/drm/i915/display/intel_sdvo.c clock->n = 6; clock 1261 drivers/gpu/drm/i915/display/intel_sdvo.c clock->m1 = 12; clock 1262 drivers/gpu/drm/i915/display/intel_sdvo.c clock->m2 = 8; clock 1834 drivers/gpu/drm/i915/display/intel_sdvo.c if (intel_sdvo->pixel_clock_min > mode->clock) clock 1837 drivers/gpu/drm/i915/display/intel_sdvo.c if (intel_sdvo->pixel_clock_max < mode->clock) clock 1840 drivers/gpu/drm/i915/display/intel_sdvo.c if (mode->clock > max_dotclk) clock 78 drivers/gpu/drm/i915/display/intel_sdvo_regs.h u16 clock; /* pixel clock, in 10kHz units */ clock 111 drivers/gpu/drm/i915/display/intel_sdvo_regs.h u16 clock; clock 311 drivers/gpu/drm/i915/display/intel_tv.c u32 clock; clock 382 drivers/gpu/drm/i915/display/intel_tv.c .clock = 108000, clock 425 drivers/gpu/drm/i915/display/intel_tv.c .clock = 108000, clock 467 drivers/gpu/drm/i915/display/intel_tv.c .clock = 108000, clock 510 drivers/gpu/drm/i915/display/intel_tv.c .clock = 108000, clock 554 drivers/gpu/drm/i915/display/intel_tv.c .clock = 108000, clock 599 drivers/gpu/drm/i915/display/intel_tv.c .clock = 108000, clock 641 drivers/gpu/drm/i915/display/intel_tv.c .clock = 108000, clock 665 drivers/gpu/drm/i915/display/intel_tv.c .clock = 108000, clock 689 drivers/gpu/drm/i915/display/intel_tv.c .clock = 148500, clock 713 drivers/gpu/drm/i915/display/intel_tv.c .clock = 148500, clock 737 drivers/gpu/drm/i915/display/intel_tv.c .clock = 148500, clock 763 drivers/gpu/drm/i915/display/intel_tv.c .clock = 148500, clock 790 drivers/gpu/drm/i915/display/intel_tv.c .clock = 148500, clock 816 drivers/gpu/drm/i915/display/intel_tv.c .clock = 148500, clock 842 drivers/gpu/drm/i915/display/intel_tv.c .clock = 148500, clock 960 drivers/gpu/drm/i915/display/intel_tv.c if (mode->clock > max_dotclk) clock 984 drivers/gpu/drm/i915/display/intel_tv.c mode->clock = tv_mode->clock / clock 1058 drivers/gpu/drm/i915/display/intel_tv.c mode->clock = mode->clock * new_htotal / mode->htotal; clock 1075 drivers/gpu/drm/i915/display/intel_tv.c mode->clock = mode->clock * new_vtotal / mode->vtotal; clock 1119 drivers/gpu/drm/i915/display/intel_tv.c tv_mode.clock = pipe_config->port_clock; clock 1156 drivers/gpu/drm/i915/display/intel_tv.c adjusted_mode->crtc_clock = mode.clock; clock 1207 drivers/gpu/drm/i915/display/intel_tv.c pipe_config->port_clock = tv_mode->clock; clock 1241 drivers/gpu/drm/i915/display/intel_tv.c adjusted_mode->clock /= 2; clock 578 drivers/gpu/drm/i915/display/intel_vbt_defs.h u16 clock; /**< In 10khz */ clock 1908 drivers/gpu/drm/i915/display/vlv_dsi.c intel_dsi->pclk, current_mode->clock); clock 1910 drivers/gpu/drm/i915/display/vlv_dsi.c current_mode->clock)) { clock 1912 drivers/gpu/drm/i915/display/vlv_dsi.c intel_dsi->pclk = current_mode->clock; clock 851 drivers/gpu/drm/i915/i915_irq.c u32 clock = mode->crtc_clock; clock 878 drivers/gpu/drm/i915/i915_irq.c clock), 1000 * htotal); clock 886 drivers/gpu/drm/i915/intel_pm.c int clock = adjusted_mode->crtc_clock; clock 889 drivers/gpu/drm/i915/intel_pm.c wm = intel_calculate_wm(clock, &pineview_display_wm, clock 899 drivers/gpu/drm/i915/intel_pm.c wm = intel_calculate_wm(clock, &pineview_cursor_wm, clock 908 drivers/gpu/drm/i915/intel_pm.c wm = intel_calculate_wm(clock, &pineview_display_hplloff_wm, clock 917 drivers/gpu/drm/i915/intel_pm.c wm = intel_calculate_wm(clock, &pineview_cursor_hplloff_wm, clock 1120 drivers/gpu/drm/i915/intel_pm.c unsigned int clock, htotal, cpp, width, wm; clock 1145 drivers/gpu/drm/i915/intel_pm.c clock = adjusted_mode->crtc_clock; clock 1154 drivers/gpu/drm/i915/intel_pm.c wm = intel_wm_method2(clock, htotal, width, cpp, latency); clock 1157 drivers/gpu/drm/i915/intel_pm.c wm = intel_wm_method1(clock, cpp, latency); clock 1161 drivers/gpu/drm/i915/intel_pm.c small = intel_wm_method1(clock, cpp, latency); clock 1162 drivers/gpu/drm/i915/intel_pm.c large = intel_wm_method2(clock, htotal, width, cpp, latency); clock 1628 drivers/gpu/drm/i915/intel_pm.c unsigned int clock, htotal, cpp, width, wm; clock 1637 drivers/gpu/drm/i915/intel_pm.c clock = adjusted_mode->crtc_clock; clock 1650 drivers/gpu/drm/i915/intel_pm.c wm = vlv_wm_method2(clock, htotal, width, cpp, clock 2225 drivers/gpu/drm/i915/intel_pm.c int clock = adjusted_mode->crtc_clock; clock 2231 drivers/gpu/drm/i915/intel_pm.c entries = intel_wm_method2(clock, htotal, clock 2241 drivers/gpu/drm/i915/intel_pm.c entries = intel_wm_method2(clock, htotal, clock 2381 drivers/gpu/drm/i915/intel_pm.c int clock = adjusted_mode->crtc_clock; clock 2392 drivers/gpu/drm/i915/intel_pm.c entries = intel_wm_method2(clock, htotal, hdisplay, cpp, clock 154 drivers/gpu/drm/imx/dw_hdmi-imx.c if (mode->clock < 13500) clock 157 drivers/gpu/drm/imx/dw_hdmi-imx.c if (mode->clock > 216000) clock 167 drivers/gpu/drm/imx/dw_hdmi-imx.c if (mode->clock < 13500) clock 170 drivers/gpu/drm/imx/dw_hdmi-imx.c if (mode->clock > 216000) clock 254 drivers/gpu/drm/imx/imx-ldb.c unsigned long di_clk = mode->clock * 1000; clock 258 drivers/gpu/drm/imx/imx-ldb.c if (mode->clock > 170000) { clock 262 drivers/gpu/drm/imx/imx-ldb.c if (mode->clock > 85000 && !dual) { clock 268 drivers/gpu/drm/imx/imx-ldb.c serial_clk = 3500UL * mode->clock; clock 272 drivers/gpu/drm/imx/imx-ldb.c serial_clk = 7000UL * mode->clock; clock 247 drivers/gpu/drm/imx/imx-tve.c rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000; clock 248 drivers/gpu/drm/imx/imx-tve.c if (rate == mode->clock) clock 252 drivers/gpu/drm/imx/imx-tve.c rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000; clock 253 drivers/gpu/drm/imx/imx-tve.c if (rate == mode->clock) clock 285 drivers/gpu/drm/imx/imx-tve.c rate = 2000UL * mode->clock; clock 329 drivers/gpu/drm/ingenic/ingenic-drm.c state->adjusted_mode.clock * 1000); clock 351 drivers/gpu/drm/ingenic/ingenic-drm.c clk_set_rate(priv->pix_clk, state->adjusted_mode.clock * 1000); clock 488 drivers/gpu/drm/mcde/mcde_dsi.c bpl = mode->clock * mode->htotal; clock 682 drivers/gpu/drm/mcde/mcde_dsi.c unsigned long pixel_clock_hz = mode->clock * 1000; clock 111 drivers/gpu/drm/mediatek/mtk_dpi.c unsigned int (*cal_factor)(int clock); clock 430 drivers/gpu/drm/mediatek/mtk_dpi.c factor = dpi->conf->cal_factor(mode->clock); clock 644 drivers/gpu/drm/mediatek/mtk_dpi.c static unsigned int mt8173_calculate_factor(int clock) clock 646 drivers/gpu/drm/mediatek/mtk_dpi.c if (clock <= 27000) clock 648 drivers/gpu/drm/mediatek/mtk_dpi.c else if (clock <= 84000) clock 650 drivers/gpu/drm/mediatek/mtk_dpi.c else if (clock <= 167000) clock 656 drivers/gpu/drm/mediatek/mtk_dpi.c static unsigned int mt2701_calculate_factor(int clock) clock 658 drivers/gpu/drm/mediatek/mtk_dpi.c if (clock <= 64000) clock 660 drivers/gpu/drm/mediatek/mtk_dpi.c else if (clock <= 128000) clock 413 drivers/gpu/drm/mediatek/mtk_hdmi.c mode->clock == 74250 && clock 649 drivers/gpu/drm/mediatek/mtk_hdmi.c unsigned int clock; clock 669 drivers/gpu/drm/mediatek/mtk_hdmi.c static unsigned int hdmi_recommended_n(unsigned int freq, unsigned int clock) clock 675 drivers/gpu/drm/mediatek/mtk_hdmi.c if (clock == hdmi_rec_n_table[i].clock) clock 700 drivers/gpu/drm/mediatek/mtk_hdmi.c static unsigned int hdmi_mode_clock_to_hz(unsigned int clock) clock 702 drivers/gpu/drm/mediatek/mtk_hdmi.c switch (clock) { clock 712 drivers/gpu/drm/mediatek/mtk_hdmi.c return clock * 1000; clock 749 drivers/gpu/drm/mediatek/mtk_hdmi.c unsigned int clock) clock 753 drivers/gpu/drm/mediatek/mtk_hdmi.c n = hdmi_recommended_n(sample_rate, clock); clock 754 drivers/gpu/drm/mediatek/mtk_hdmi.c cts = hdmi_expected_cts(sample_rate, clock, n); clock 757 drivers/gpu/drm/mediatek/mtk_hdmi.c __func__, sample_rate, clock, n, cts); clock 834 drivers/gpu/drm/mediatek/mtk_hdmi.c static int mtk_hdmi_video_change_vpll(struct mtk_hdmi *hdmi, u32 clock) clock 840 drivers/gpu/drm/mediatek/mtk_hdmi.c ret = clk_set_rate(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL], clock); clock 842 drivers/gpu/drm/mediatek/mtk_hdmi.c dev_err(hdmi->dev, "Failed to set PLL to %u Hz: %d\n", clock, clock 849 drivers/gpu/drm/mediatek/mtk_hdmi.c if (DIV_ROUND_CLOSEST(rate, 1000) != DIV_ROUND_CLOSEST(clock, 1000)) clock 850 drivers/gpu/drm/mediatek/mtk_hdmi.c dev_warn(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock, clock 853 drivers/gpu/drm/mediatek/mtk_hdmi.c dev_dbg(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock, rate); clock 951 drivers/gpu/drm/mediatek/mtk_hdmi.c mtk_hdmi_hw_aud_set_ncts(hdmi, sample_rate, display_mode->clock); clock 1134 drivers/gpu/drm/mediatek/mtk_hdmi.c mode->clock * 1000); clock 1243 drivers/gpu/drm/mediatek/mtk_hdmi.c !!(mode->flags & DRM_MODE_FLAG_INTERLACE), mode->clock * 1000); clock 1254 drivers/gpu/drm/mediatek/mtk_hdmi.c if (mode->clock < 27000) clock 1256 drivers/gpu/drm/mediatek/mtk_hdmi.c if (mode->clock > 297000) clock 298 drivers/gpu/drm/meson/meson_dw_hdmi.c unsigned int pixel_clock = mode->clock; clock 379 drivers/gpu/drm/meson/meson_dw_hdmi.c vclk_freq = mode->clock; clock 418 drivers/gpu/drm/meson/meson_dw_hdmi.c mode->clock > 340000 ? 40 : 10); clock 441 drivers/gpu/drm/meson/meson_dw_hdmi.c if (mode->clock > 340000) { clock 626 drivers/gpu/drm/meson/meson_dw_hdmi.c mode->clock > connector->display_info.max_tmds_clock) clock 635 drivers/gpu/drm/meson/meson_dw_hdmi.c return meson_vclk_dmt_supported_freq(priv, mode->clock); clock 640 drivers/gpu/drm/meson/meson_dw_hdmi.c vclk_freq = mode->clock; clock 124 drivers/gpu/drm/mgag200/mgag200_drv.h int data, clock; clock 73 drivers/gpu/drm/mgag200/mgag200_i2c.c mga_i2c_set(mdev, i2c->clock, state); clock 87 drivers/gpu/drm/mgag200/mgag200_i2c.c return (mga_i2c_read_gpio(mdev) & i2c->clock) ? 1 : 0; clock 95 drivers/gpu/drm/mgag200/mgag200_i2c.c int data, clock; clock 108 drivers/gpu/drm/mgag200/mgag200_i2c.c clock = 2; clock 114 drivers/gpu/drm/mgag200/mgag200_i2c.c clock = 1; clock 118 drivers/gpu/drm/mgag200/mgag200_i2c.c clock = 8; clock 127 drivers/gpu/drm/mgag200/mgag200_i2c.c i2c->clock = clock; clock 102 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_g200se_set_plls(struct mga_device *mdev, long clock) clock 121 drivers/gpu/drm/mgag200/mgag200_mode.c permitteddelta = clock * 5 / 1000; clock 124 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testp > vcomax) clock 126 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testp < vcomin) clock 133 drivers/gpu/drm/mgag200/mgag200_mode.c if (computed > clock) clock 134 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = computed - clock; clock 136 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = clock - computed; clock 154 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock < 25000) clock 155 drivers/gpu/drm/mgag200/mgag200_mode.c clock = 25000; clock 157 drivers/gpu/drm/mgag200/mgag200_mode.c clock = clock * 2; clock 161 drivers/gpu/drm/mgag200/mgag200_mode.c permitteddelta = clock * 5 / 1000; clock 166 drivers/gpu/drm/mgag200/mgag200_mode.c if ((clock * testp) > vcomax) clock 168 drivers/gpu/drm/mgag200/mgag200_mode.c if ((clock * testp) < vcomin) clock 175 drivers/gpu/drm/mgag200/mgag200_mode.c if (computed > clock) clock 176 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = computed - clock; clock 178 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = clock - computed; clock 199 drivers/gpu/drm/mgag200/mgag200_mode.c clock = clock / 2; clock 221 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) clock 246 drivers/gpu/drm/mgag200/mgag200_mode.c if ((clock * testp * testp2) > vcomax) clock 248 drivers/gpu/drm/mgag200/mgag200_mode.c if ((clock * testp * testp2) < vcomin) clock 254 drivers/gpu/drm/mgag200/mgag200_mode.c if (computed > clock) clock 255 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = computed - clock; clock 257 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = clock - computed; clock 278 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testp > vcomax) clock 280 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testp < vcomin) clock 287 drivers/gpu/drm/mgag200/mgag200_mode.c if (computed > clock) clock 288 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = computed - clock; clock 290 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = clock - computed; clock 400 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) clock 417 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testp > vcomax) clock 419 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testp < vcomin) clock 426 drivers/gpu/drm/mgag200/mgag200_mode.c if (computed > clock) clock 427 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = computed - clock; clock 429 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = clock - computed; clock 493 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) clock 516 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testm > vcomax) clock 518 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testm < vcomin) clock 522 drivers/gpu/drm/mgag200/mgag200_mode.c if (computed > clock) clock 523 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = computed - clock; clock 525 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = clock - computed; clock 547 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testp > vcomax) clock 549 drivers/gpu/drm/mgag200/mgag200_mode.c if (clock * testp < vcomin) clock 556 drivers/gpu/drm/mgag200/mgag200_mode.c if (computed > clock) clock 557 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = computed - clock; clock 559 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = clock - computed; clock 566 drivers/gpu/drm/mgag200/mgag200_mode.c if ((clock * testp) >= 600000) clock 623 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_g200er_set_plls(struct mga_device *mdev, long clock) clock 657 drivers/gpu/drm/mgag200/mgag200_mode.c if (computed > clock) clock 658 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = computed - clock; clock 660 drivers/gpu/drm/mgag200/mgag200_mode.c tmpdelta = clock - computed; clock 703 drivers/gpu/drm/mgag200/mgag200_mode.c static int mga_crtc_set_plls(struct mga_device *mdev, long clock) clock 708 drivers/gpu/drm/mgag200/mgag200_mode.c return mga_g200se_set_plls(mdev, clock); clock 712 drivers/gpu/drm/mgag200/mgag200_mode.c return mga_g200wb_set_plls(mdev, clock); clock 715 drivers/gpu/drm/mgag200/mgag200_mode.c return mga_g200ev_set_plls(mdev, clock); clock 719 drivers/gpu/drm/mgag200/mgag200_mode.c return mga_g200eh_set_plls(mdev, clock); clock 722 drivers/gpu/drm/mgag200/mgag200_mode.c return mga_g200er_set_plls(mdev, clock); clock 1115 drivers/gpu/drm/mgag200/mgag200_mode.c mga_crtc_set_plls(mdev, mode->clock); clock 1176 drivers/gpu/drm/mgag200/mgag200_mode.c mb = (mode->clock * bpp) / 1000; clock 1546 drivers/gpu/drm/mgag200/mgag200_mode.c if (!mode->htotal || !mode->vtotal || !mode->clock) clock 1552 drivers/gpu/drm/mgag200/mgag200_mode.c pixels_per_second = active_area * mode->clock * 1000; clock 1654 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c pclk_rate = mode->clock; /* pixel clock in kHz */ clock 98 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->pixclock = mode->clock * 1000; clock 269 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c mdp4_lcdc_encoder->pixclock = mode->clock * 1000; clock 72 drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_connector.c requested = 1000 * mode->clock; clock 513 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->mode->clock, msm_host->byte_clk_rate); clock 581 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->mode->clock, msm_host->byte_clk_rate, clock 666 drivers/gpu/drm/msm/dsi/dsi_host.c pclk_rate = mode->clock * 1000; clock 350 drivers/gpu/drm/msm/dsi/dsi_manager.c requested = 1000 * mode->clock; clock 67 drivers/gpu/drm/msm/edp/edp_connector.c requested = 1000 * mode->clock; clock 76 drivers/gpu/drm/msm/edp/edp_connector.c edp->ctrl, mode->clock, NULL, NULL)) clock 1270 drivers/gpu/drm/msm/edp/edp_ctrl.c ctrl->pixel_rate = mode->clock; clock 212 drivers/gpu/drm/msm/hdmi/hdmi_bridge.c hdmi->pixclock = mode->clock * 1000; clock 388 drivers/gpu/drm/msm/hdmi/hdmi_connector.c requested = 1000 * mode->clock; clock 657 drivers/gpu/drm/msm/msm_gpu.c u64 elapsed, clock = 0; clock 667 drivers/gpu/drm/msm/msm_gpu.c clock = (stats->cpcycles_end - stats->cpcycles_start) * 1000; clock 668 drivers/gpu/drm/msm/msm_gpu.c do_div(clock, elapsed); clock 671 drivers/gpu/drm/msm/msm_gpu.c trace_msm_gpu_submit_retired(submit, elapsed, clock, clock 57 drivers/gpu/drm/msm/msm_gpu_trace.h TP_PROTO(struct msm_gem_submit *submit, u64 elapsed, u64 clock, clock 59 drivers/gpu/drm/msm/msm_gpu_trace.h TP_ARGS(submit, elapsed, clock, start, end), clock 66 drivers/gpu/drm/msm/msm_gpu_trace.h __field(u64, clock) clock 76 drivers/gpu/drm/msm/msm_gpu_trace.h __entry->clock = clock; clock 82 drivers/gpu/drm/msm/msm_gpu_trace.h __entry->elapsed, __entry->clock, clock 655 drivers/gpu/drm/nouveau/dispnv04/crtc.c nv_crtc_calc_state_ext(crtc, mode, adjusted_mode->clock); clock 880 drivers/gpu/drm/nouveau/dispnv04/crtc.c nouveau_calc_arb(dev, crtc->mode.clock, drm_fb->format->cpp[0] * 8, clock 197 drivers/gpu/drm/nouveau/dispnv04/dfp.c adjusted_mode->clock = nv_connector->native_mode->clock; clock 342 drivers/gpu/drm/nouveau/dispnv04/dfp.c output_mode->clock > 165000) clock 350 drivers/gpu/drm/nouveau/dispnv04/dfp.c nouveau_bios_parse_lvds_table(dev, output_mode->clock, clock 357 drivers/gpu/drm/nouveau/dispnv04/dfp.c if (output_mode->clock > 165000) clock 457 drivers/gpu/drm/nouveau/dispnv04/dfp.c run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock); clock 459 drivers/gpu/drm/nouveau/dispnv04/dfp.c call_lvds_script(dev, dcbe, head, LVDS_RESET, nv_encoder->mode.clock); clock 539 drivers/gpu/drm/nouveau/dispnv04/dfp.c LVDS_PANEL_ON, nv_encoder->mode.clock); clock 599 drivers/gpu/drm/nouveau/dispnv04/dfp.c connector->native_mode->clock); clock 602 drivers/gpu/drm/nouveau/dispnv04/dfp.c int clock = nouveau_hw_pllvals_to_clk clock 605 drivers/gpu/drm/nouveau/dispnv04/dfp.c run_tmds_table(dev, nv_encoder->dcb, head, clock); clock 235 drivers/gpu/drm/nouveau/dispnv04/hw.c uint32_t clock; clock 238 drivers/gpu/drm/nouveau/dispnv04/hw.c 0x4c, &clock); clock 239 drivers/gpu/drm/nouveau/dispnv04/hw.c return clock / 1000; clock 212 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c mode->clock = tv_norm->tv_enc_mode.vrefresh * clock 217 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c mode->clock *= 2; clock 312 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (mode->clock > 400000) clock 329 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (mode->clock > 70000) clock 354 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c adjusted_mode->clock = tv_norm->ctv_enc_mode.mode.clock; clock 356 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c adjusted_mode->clock = 90000; clock 33 drivers/gpu/drm/nouveau/dispnv50/atom.h u32 clock; clock 615 drivers/gpu/drm/nouveau/dispnv50/disp.c high_tmds_clock_ratio = mode->clock > 340000; clock 799 drivers/gpu/drm/nouveau/dispnv50/disp.c const int clock = crtc_state->adjusted_mode.clock; clock 809 drivers/gpu/drm/nouveau/dispnv50/disp.c asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3); clock 1492 drivers/gpu/drm/nouveau/dispnv50/disp.c if (mode->clock >= 165000 && clock 1515 drivers/gpu/drm/nouveau/dispnv50/disp.c if (mode->clock >= bios->fp.duallink_transition_clk) { clock 1656 drivers/gpu/drm/nouveau/dispnv50/disp.c crtc_state->adjusted_mode.clock *= 2; clock 285 drivers/gpu/drm/nouveau/dispnv50/head.c m->clock = mode->crtc_clock; clock 293 drivers/gpu/drm/nouveau/dispnv50/head507d.c evo_data(push, 0x00800000 | m->clock); clock 258 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, m->clock * 1000); clock 260 drivers/gpu/drm/nouveau/dispnv50/head907d.c evo_data(push, m->clock * 1000); clock 175 drivers/gpu/drm/nouveau/dispnv50/headc37d.c evo_data(push, m->clock * 1000); clock 177 drivers/gpu/drm/nouveau/dispnv50/headc37d.c evo_data(push, m->clock * 1000); clock 181 drivers/gpu/drm/nouveau/dispnv50/headc57d.c evo_data(push, m->clock * 1000); clock 183 drivers/gpu/drm/nouveau/dispnv50/headc57d.c evo_data(push, m->clock * 1000); clock 463 drivers/gpu/drm/nouveau/nouveau_bios.c mode->clock = ROM16(mode_entry[7]) * 10; clock 896 drivers/gpu/drm/nouveau/nouveau_connector.c duallink = mode->clock >= bios->fp.duallink_transition_clk; clock 1041 drivers/gpu/drm/nouveau/nouveau_connector.c unsigned clock = mode->clock; clock 1066 drivers/gpu/drm/nouveau/nouveau_connector.c clock = clock * (connector->display_info.bpc * 3) / 10; clock 1074 drivers/gpu/drm/nouveau/nouveau_connector.c clock *= 2; clock 1076 drivers/gpu/drm/nouveau/nouveau_connector.c if (clock < min_clock) clock 1079 drivers/gpu/drm/nouveau/nouveau_connector.c if (clock > max_clock) clock 55 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacgf119.c .clock = gf119_dac_clock, clock 106 drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c .clock = nv50_dac_clock, clock 61 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h void (*clock)(struct nvkm_ior *); clock 472 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c ior->func->clock(ior); clock 121 drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c .clock = nv50_pior_clock, clock 28 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg84.c .clock = nv50_sor_clock, clock 264 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c .clock = nv50_sor_clock, clock 162 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c .clock = gf119_sor_clock, clock 28 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgk104.c .clock = gf119_sor_clock, clock 42 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c .clock = gf119_sor_clock, clock 99 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c .clock = gf119_sor_clock, clock 44 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c .clock = nv50_sor_clock, clock 88 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgv100.c .clock = gf119_sor_clock, clock 28 drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp77.c .clock = nv50_sor_clock, clock 28 drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp89.c .clock = nv50_sor_clock, clock 91 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c .clock = nv50_sor_clock, clock 72 drivers/gpu/drm/nouveau/nvkm/engine/disp/sortu102.c .clock = gf119_sor_clock, clock 1566 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c u16 mdata, clock; clock 1580 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c clock = nvbios_rd16(bios, mdata + 4) * 10; clock 1581 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c init_prog_pll(init, 0x680500, clock); clock 1584 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c clock = nvbios_rd16(bios, mdata + 2) * 10; clock 1586 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c clock *= 2; clock 1587 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c init_prog_pll(init, 0x680504, clock); clock 347 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c const struct nvkm_domain *clock = clk->domains - 1; clock 357 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c while ((++clock)->name != nv_clk_src_max) { clock 358 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c u32 lo = pstate->base.domain[clock->name]; clock 363 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_debug(subdev, "%02x: %10d KHz\n", clock->name, lo); clock 365 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c u32 freq = cstate->domain[clock->name]; clock 371 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c if (clock->mname && ++i < ARRAY_SIZE(info)) { clock 372 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c lo /= clock->mdiv; clock 373 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c hi /= clock->mdiv; clock 376 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c clock->mname, lo); clock 379 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c "%s %d-%d MHz", clock->mname, lo, hi); clock 594 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c const struct nvkm_domain *clock = clk->domains; clock 601 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c while (clock->name != nv_clk_src_max) { clock 602 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c ret = nvkm_clk_read(clk, clock->name); clock 604 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c nvkm_error(subdev, "%02x freq unknown\n", clock->name); clock 607 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c clk->bstate.base.domain[clock->name] = ret; clock 608 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c clock++; clock 56 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c u32 clock = 0; clock 73 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clock = ref * N1 / M1; clock 74 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clock = clock / post_div; clock 77 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c return clock; clock 166 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c u32 clock, int *N, int *M, int *P) clock 181 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c return nv04_pll_calc(subdev, &pll, clock, N, M, NULL, NULL, P); clock 210 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c u32 out = 0, clock = 0; clock 219 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clock = calc_pll(clk, 0x4028, (core << 1), &N, &M, &P1); clock 221 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c if (abs(core - out) <= abs(core - (clock >> 1))) { clock 245 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1); clock 250 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c abs(shader - clock) && clock 263 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clock = calc_P(500000, vdec, &P1); clock 264 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c if(abs(vdec - out) <= abs(vdec - clock)) { clock 32 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c nv04_clk_pll_calc(struct nvkm_clk *clock, struct nvbios_pll *info, clock 36 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P); clock 458 drivers/gpu/drm/omapdrm/dss/dpi.c dpi->pixelclock = mode->clock * 1000; clock 476 drivers/gpu/drm/omapdrm/dss/dpi.c if (mode->clock == 0) clock 480 drivers/gpu/drm/omapdrm/dss/dpi.c ok = dpi_pll_clk_calc(dpi, mode->clock * 1000, &ctx); clock 486 drivers/gpu/drm/omapdrm/dss/dpi.c ok = dpi_dss_clk_calc(dpi, mode->clock * 1000, &ctx); clock 498 drivers/gpu/drm/omapdrm/dss/dpi.c mode->clock = pck / 1000; clock 249 drivers/gpu/drm/omapdrm/dss/hdmi4.c dispc_set_tv_pclk(hdmi->dss->dispc, mode->clock * 1000); clock 248 drivers/gpu/drm/omapdrm/dss/hdmi5.c dispc_set_tv_pclk(hdmi->dss->dispc, mode->clock * 1000); clock 202 drivers/gpu/drm/omapdrm/dss/sdi.c sdi->pixelclock = mode->clock * 1000; clock 210 drivers/gpu/drm/omapdrm/dss/sdi.c unsigned long pixelclock = mode->clock * 1000; clock 228 drivers/gpu/drm/omapdrm/dss/sdi.c mode->clock = pck / 1000; clock 268 drivers/gpu/drm/omapdrm/dss/venc.c .clock = 13500, clock 283 drivers/gpu/drm/omapdrm/dss/venc.c .clock = 13500, clock 535 drivers/gpu/drm/omapdrm/dss/venc.c if (mode->clock == omap_dss_pal_mode.clock && clock 540 drivers/gpu/drm/omapdrm/dss/venc.c if (mode->clock == omap_dss_ntsc_mode.clock && clock 526 drivers/gpu/drm/omapdrm/omap_crtc.c uint64_t bandwidth = mode->clock * 1000; clock 137 drivers/gpu/drm/panel/panel-arm-versatile.c .clock = 10000, clock 161 drivers/gpu/drm/panel/panel-arm-versatile.c .clock = 25000, clock 184 drivers/gpu/drm/panel/panel-arm-versatile.c .clock = 62500, clock 208 drivers/gpu/drm/panel/panel-arm-versatile.c .clock = 5400, clock 149 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c .clock = 55000, clock 543 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .clock = 2453500, clock 557 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .clock = 2700000, clock 572 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .clock = 6400000, clock 587 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .clock = 2454000, clock 601 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .clock = 2700000, clock 616 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .clock = 2454000, clock 631 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .clock = 2700000, clock 376 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c .clock = 62000, clock 229 drivers/gpu/drm/panel/panel-innolux-p079zca.c .clock = 56900, clock 263 drivers/gpu/drm/panel/panel-innolux-p079zca.c .clock = 229000, clock 290 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c .clock = 155493, clock 324 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c .clock = 229000, clock 128 drivers/gpu/drm/panel/panel-lg-lb035q02.c .clock = 6500, clock 200 drivers/gpu/drm/panel/panel-lg-lg4573.c .clock = 27000, clock 110 drivers/gpu/drm/panel/panel-nec-nl8048hl11.c .clock = 23800, clock 322 drivers/gpu/drm/panel/panel-novatek-nt39016.c .clock = 6000, clock 167 drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c mode->clock = lcd_mode->pixelclock; clock 75 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c .clock = 29700, clock 102 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c .clock = 164400, clock 157 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c .clock = 164402, clock 205 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c .clock = 25979400 / 1000, clock 212 drivers/gpu/drm/panel/panel-raydium-rm67191.c .clock = 132000, clock 87 drivers/gpu/drm/panel/panel-raydium-rm68200.c .clock = 52582, clock 227 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c .clock = 75276, clock 108 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c .clock = 51206, clock 31 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c .clock = 420160, clock 611 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c .clock = 222372, clock 630 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c .clock = 247856, clock 46 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c .clock = 4649, clock 111 drivers/gpu/drm/panel/panel-samsung-s6e63m0.c .clock = 25628, clock 269 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c .clock = 278000, clock 87 drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c .clock = 19200, clock 201 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c .clock = 41118, clock 516 drivers/gpu/drm/panel/panel-simple.c .clock = 9000, clock 541 drivers/gpu/drm/panel/panel-simple.c .clock = 33333, clock 592 drivers/gpu/drm/panel/panel-simple.c .clock = 51450, clock 637 drivers/gpu/drm/panel/panel-simple.c .clock = 72000, clock 661 drivers/gpu/drm/panel/panel-simple.c .clock = 70589, clock 684 drivers/gpu/drm/panel/panel-simple.c .clock = 69500, clock 707 drivers/gpu/drm/panel/panel-simple.c .clock = 150660, clock 763 drivers/gpu/drm/panel/panel-simple.c .clock = 68930, clock 787 drivers/gpu/drm/panel/panel-simple.c .clock = 40000, clock 896 drivers/gpu/drm/panel/panel-simple.c .clock = 148800, clock 923 drivers/gpu/drm/panel/panel-simple.c .clock = 51200, clock 951 drivers/gpu/drm/panel/panel-simple.c .clock = 30000, clock 973 drivers/gpu/drm/panel/panel-simple.c .clock = 42105, clock 996 drivers/gpu/drm/panel/panel-simple.c .clock = 71900, clock 1008 drivers/gpu/drm/panel/panel-simple.c .clock = 57500, clock 1037 drivers/gpu/drm/panel/panel-simple.c .clock = 9000, clock 1062 drivers/gpu/drm/panel/panel-simple.c .clock = 35000, clock 1086 drivers/gpu/drm/panel/panel-simple.c .clock = 66770, clock 1110 drivers/gpu/drm/panel/panel-simple.c .clock = 72070, clock 1133 drivers/gpu/drm/panel/panel-simple.c .clock = 69300, clock 1156 drivers/gpu/drm/panel/panel-simple.c .clock = 33260, clock 1241 drivers/gpu/drm/panel/panel-simple.c .clock = 6500, clock 1267 drivers/gpu/drm/panel/panel-simple.c .clock = 9000, clock 1291 drivers/gpu/drm/panel/panel-simple.c .clock = 25175, clock 1317 drivers/gpu/drm/panel/panel-simple.c .clock = 33260, clock 1382 drivers/gpu/drm/panel/panel-simple.c .clock = 32260, clock 1406 drivers/gpu/drm/panel/panel-simple.c .clock = 67185, clock 1429 drivers/gpu/drm/panel/panel-simple.c .clock = 9000, clock 1531 drivers/gpu/drm/panel/panel-simple.c .clock = 33333, clock 1558 drivers/gpu/drm/panel/panel-simple.c .clock = 9000, clock 1584 drivers/gpu/drm/panel/panel-simple.c .clock = 33333, clock 1692 drivers/gpu/drm/panel/panel-simple.c .clock = 65000, clock 1754 drivers/gpu/drm/panel/panel-simple.c .clock = 69300, clock 1777 drivers/gpu/drm/panel/panel-simple.c .clock = 206016, clock 1805 drivers/gpu/drm/panel/panel-simple.c .clock = 51501, clock 1899 drivers/gpu/drm/panel/panel-simple.c .clock = 7000, clock 1923 drivers/gpu/drm/panel/panel-simple.c .clock = 33246, clock 1947 drivers/gpu/drm/panel/panel-simple.c .clock = 200000, clock 1970 drivers/gpu/drm/panel/panel-simple.c .clock = 205210, clock 1992 drivers/gpu/drm/panel/panel-simple.c .clock = 162300, clock 2015 drivers/gpu/drm/panel/panel-simple.c .clock = 285250, clock 2038 drivers/gpu/drm/panel/panel-simple.c .clock = 30400, clock 2052 drivers/gpu/drm/panel/panel-simple.c .clock = 9000, clock 2131 drivers/gpu/drm/panel/panel-simple.c .clock = 10870, clock 2157 drivers/gpu/drm/panel/panel-simple.c .clock = 66000, clock 2180 drivers/gpu/drm/panel/panel-simple.c .clock = 9000, clock 2233 drivers/gpu/drm/panel/panel-simple.c .clock = 29500, clock 2286 drivers/gpu/drm/panel/panel-simple.c .clock = 9000, clock 2314 drivers/gpu/drm/panel/panel-simple.c .clock = 29500, clock 2343 drivers/gpu/drm/panel/panel-simple.c .clock = 22153, clock 2370 drivers/gpu/drm/panel/panel-simple.c .clock = 25000, clock 2395 drivers/gpu/drm/panel/panel-simple.c .clock = 33000, clock 2421 drivers/gpu/drm/panel/panel-simple.c .clock = 33300, clock 2445 drivers/gpu/drm/panel/panel-simple.c .clock = 9000, clock 2499 drivers/gpu/drm/panel/panel-simple.c .clock = 271560, clock 2521 drivers/gpu/drm/panel/panel-simple.c .clock = 54030, clock 2544 drivers/gpu/drm/panel/panel-simple.c .clock = 76300, clock 2567 drivers/gpu/drm/panel/panel-simple.c .clock = 168480, clock 2593 drivers/gpu/drm/panel/panel-simple.c .clock = 33260, clock 2620 drivers/gpu/drm/panel/panel-simple.c .clock = 5500, clock 2696 drivers/gpu/drm/panel/panel-simple.c .clock = 71100, clock 2747 drivers/gpu/drm/panel/panel-simple.c .clock = 33300, clock 2770 drivers/gpu/drm/panel/panel-simple.c .clock = 147000, clock 2798 drivers/gpu/drm/panel/panel-simple.c .clock = 30000, clock 2872 drivers/gpu/drm/panel/panel-simple.c .clock = 10000, clock 2900 drivers/gpu/drm/panel/panel-simple.c .clock = 10000, clock 2929 drivers/gpu/drm/panel/panel-simple.c .clock = 79500, clock 2953 drivers/gpu/drm/panel/panel-simple.c .clock = 33260, clock 2976 drivers/gpu/drm/panel/panel-simple.c .clock = 45000, clock 3034 drivers/gpu/drm/panel/panel-simple.c .clock = 33333, clock 3060 drivers/gpu/drm/panel/panel-simple.c .clock = 6410, clock 3086 drivers/gpu/drm/panel/panel-simple.c .clock = 65000, clock 3485 drivers/gpu/drm/panel/panel-simple.c .clock = 154500, clock 3513 drivers/gpu/drm/panel/panel-simple.c .clock = 160000, clock 3543 drivers/gpu/drm/panel/panel-simple.c .clock = 71000, clock 3571 drivers/gpu/drm/panel/panel-simple.c .clock = 67000, clock 3599 drivers/gpu/drm/panel/panel-simple.c .clock = 157200, clock 3628 drivers/gpu/drm/panel/panel-simple.c .clock = 150000, clock 3656 drivers/gpu/drm/panel/panel-simple.c .clock = 154500, clock 300 drivers/gpu/drm/panel/panel-sitronix-st7701.c .clock = 27500, clock 161 drivers/gpu/drm/panel/panel-sitronix-st7789v.c .clock = 7000, clock 508 drivers/gpu/drm/panel/panel-sony-acx565akm.c .clock = 24000, clock 274 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c .clock = 22153, clock 333 drivers/gpu/drm/panel/panel-tpo-td043mtea1.c .clock = 36000, clock 110 drivers/gpu/drm/panel/panel-tpo-tpg110.c .clock = 33200, clock 127 drivers/gpu/drm/panel/panel-tpo-tpg110.c .clock = 25200, clock 144 drivers/gpu/drm/panel/panel-tpo-tpg110.c .clock = 9000, clock 161 drivers/gpu/drm/panel/panel-tpo-tpg110.c .clock = 20500, clock 178 drivers/gpu/drm/panel/panel-tpo-tpg110.c .clock = 8300, clock 531 drivers/gpu/drm/panel/panel-truly-nt35597.c .clock = 268316, clock 52 drivers/gpu/drm/panfrost/panfrost_devfreq.c err = clk_set_rate(pfdev->clock, target_rate); clock 98 drivers/gpu/drm/panfrost/panfrost_devfreq.c status->current_frequency = clk_get_rate(pfdev->clock); clock 149 drivers/gpu/drm/panfrost/panfrost_devfreq.c pfdev->devfreq.cur_freq = clk_get_rate(pfdev->clock); clock 45 drivers/gpu/drm/panfrost/panfrost_device.c pfdev->clock = devm_clk_get(pfdev->dev, NULL); clock 46 drivers/gpu/drm/panfrost/panfrost_device.c if (IS_ERR(pfdev->clock)) { clock 47 drivers/gpu/drm/panfrost/panfrost_device.c dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock)); clock 48 drivers/gpu/drm/panfrost/panfrost_device.c return PTR_ERR(pfdev->clock); clock 51 drivers/gpu/drm/panfrost/panfrost_device.c rate = clk_get_rate(pfdev->clock); clock 54 drivers/gpu/drm/panfrost/panfrost_device.c err = clk_prepare_enable(pfdev->clock); clock 77 drivers/gpu/drm/panfrost/panfrost_device.c clk_disable_unprepare(pfdev->clock); clock 85 drivers/gpu/drm/panfrost/panfrost_device.c clk_disable_unprepare(pfdev->clock); clock 67 drivers/gpu/drm/panfrost/panfrost_device.h struct clk *clock; clock 63 drivers/gpu/drm/pl111/pl111_display.c bw = mode->clock * 1000ULL; /* In Hz */ clock 74 drivers/gpu/drm/pl111/pl111_display.c mode->clock * 1000, cpp, bw); clock 80 drivers/gpu/drm/pl111/pl111_display.c mode->clock * 1000, cpp, bw); clock 138 drivers/gpu/drm/pl111/pl111_display.c ret = clk_set_rate(priv->clk, mode->clock * 1000); clock 142 drivers/gpu/drm/pl111/pl111_display.c mode->clock * 1000, ret); clock 567 drivers/gpu/drm/radeon/atombios_crtc.c u32 adjusted_clock = mode->clock; clock 569 drivers/gpu/drm/radeon/atombios_crtc.c u32 dp_clock = mode->clock; clock 570 drivers/gpu/drm/radeon/atombios_crtc.c u32 clock = mode->clock; clock 572 drivers/gpu/drm/radeon/atombios_crtc.c bool is_duallink = radeon_dig_monitor_is_duallink(encoder, mode->clock); clock 584 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */ clock 598 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE32(rdev) && mode->clock > 165000) clock 603 drivers/gpu/drm/radeon/atombios_crtc.c if (mode->clock > 200000) /* range limits??? */ clock 644 drivers/gpu/drm/radeon/atombios_crtc.c adjusted_clock = mode->clock * 2; clock 663 drivers/gpu/drm/radeon/atombios_crtc.c clock = (clock * 5) / 4; clock 666 drivers/gpu/drm/radeon/atombios_crtc.c clock = (clock * 3) / 2; clock 669 drivers/gpu/drm/radeon/atombios_crtc.c clock = clock * 2; clock 695 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.usPixelClock = cpu_to_le16(clock / 10); clock 707 drivers/gpu/drm/radeon/atombios_crtc.c args.v3.sInput.usPixelClock = cpu_to_le16(clock / 10); clock 828 drivers/gpu/drm/radeon/atombios_crtc.c u32 clock, clock 853 drivers/gpu/drm/radeon/atombios_crtc.c if (clock == ATOM_DISABLE) clock 855 drivers/gpu/drm/radeon/atombios_crtc.c args.v1.usPixelClock = cpu_to_le16(clock / 10); clock 865 drivers/gpu/drm/radeon/atombios_crtc.c args.v2.usPixelClock = cpu_to_le16(clock / 10); clock 875 drivers/gpu/drm/radeon/atombios_crtc.c args.v3.usPixelClock = cpu_to_le16(clock / 10); clock 892 drivers/gpu/drm/radeon/atombios_crtc.c args.v5.usPixelClock = cpu_to_le16(clock / 10); clock 921 drivers/gpu/drm/radeon/atombios_crtc.c args.v6.ulDispEngClkFreq = cpu_to_le32(crtc_id << 24 | clock / 10); clock 989 drivers/gpu/drm/radeon/atombios_crtc.c radeon_connector->pixelclock_for_modeset = mode->clock; clock 1029 drivers/gpu/drm/radeon/atombios_crtc.c mode->clock / 10); clock 1042 drivers/gpu/drm/radeon/atombios_crtc.c mode->clock / 10); clock 1050 drivers/gpu/drm/radeon/atombios_crtc.c mode->clock / 10); clock 1070 drivers/gpu/drm/radeon/atombios_crtc.c u32 pll_clock = mode->clock; clock 1071 drivers/gpu/drm/radeon/atombios_crtc.c u32 clock = mode->clock; clock 1080 drivers/gpu/drm/radeon/atombios_crtc.c clock = radeon_crtc->adjusted_clock; clock 1084 drivers/gpu/drm/radeon/atombios_crtc.c pll = &rdev->clock.p1pll; clock 1087 drivers/gpu/drm/radeon/atombios_crtc.c pll = &rdev->clock.p2pll; clock 1092 drivers/gpu/drm/radeon/atombios_crtc.c pll = &rdev->clock.dcpll; clock 1116 drivers/gpu/drm/radeon/atombios_crtc.c encoder_mode, radeon_encoder->encoder_id, clock, clock 1828 drivers/gpu/drm/radeon/atombios_crtc.c if ((crtc->mode.clock == test_crtc->mode.clock) && clock 1887 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->clock.dp_extclk) clock 1935 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->clock.dp_extclk) clock 1961 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->clock.dp_extclk) clock 1984 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->clock.dp_extclk) clock 2037 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk); clock 2042 drivers/gpu/drm/radeon/atombios_crtc.c rdev->clock.default_dispclk); clock 2046 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk); clock 466 drivers/gpu/drm/radeon/atombios_dp.c mode->clock, clock 484 drivers/gpu/drm/radeon/atombios_dp.c if ((mode->clock > 340000) && clock 493 drivers/gpu/drm/radeon/atombios_dp.c mode->clock, clock 1224 drivers/gpu/drm/radeon/atombios_encoders.c if (is_dp && rdev->clock.dp_extclk) clock 1284 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->clock.dp_extclk) clock 1351 drivers/gpu/drm/radeon/atombios_encoders.c if (is_dp && rdev->clock.dp_extclk) clock 2284 drivers/gpu/drm/radeon/atombios_encoders.c radeon_encoder->pixel_clock = adjusted_mode->clock; clock 1178 drivers/gpu/drm/radeon/btc_dpm.c u32 i, clock = 0; clock 1181 drivers/gpu/drm/radeon/btc_dpm.c *max_clock = clock; clock 1186 drivers/gpu/drm/radeon/btc_dpm.c if (clock < table->entries[i].clk) clock 1187 drivers/gpu/drm/radeon/btc_dpm.c clock = table->entries[i].clk; clock 1189 drivers/gpu/drm/radeon/btc_dpm.c *max_clock = clock; clock 1193 drivers/gpu/drm/radeon/btc_dpm.c u32 clock, u16 max_voltage, u16 *voltage) clock 1201 drivers/gpu/drm/radeon/btc_dpm.c if (clock <= table->entries[i].clk) { clock 2217 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->low.vddc); clock 2226 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->medium.vddc); clock 2235 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->high.vddc); clock 51 drivers/gpu/drm/radeon/btc_dpm.h u32 clock, u16 max_voltage, u16 *voltage); clock 1990 drivers/gpu/drm/radeon/ci_dpm.c u32 ref_clock = rdev->clock.spll.reference_freq; clock 2433 drivers/gpu/drm/radeon/ci_dpm.c u32 clock, u32 *voltage) clock 2441 drivers/gpu/drm/radeon/ci_dpm.c if (allowed_clock_voltage_table->entries[i].clk >= clock) { clock 2831 drivers/gpu/drm/radeon/ci_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; clock 3010 drivers/gpu/drm/radeon/ci_dpm.c table->ACPILevel.SclkFrequency = rdev->clock.spll.reference_freq; clock 3169 drivers/gpu/drm/radeon/ci_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; clock 3798 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->clock.current_dispclk == disp_voltage_table->entries[i].clk) clock 1720 drivers/gpu/drm/radeon/cik.c u32 reference_clock = rdev->clock.spll.reference_freq; clock 9263 drivers/gpu/drm/radeon/cik.c (u32)mode->clock); clock 9265 drivers/gpu/drm/radeon/cik.c (u32)mode->clock); clock 9280 drivers/gpu/drm/radeon/cik.c wm_high.disp_clk = mode->clock; clock 9320 drivers/gpu/drm/radeon/cik.c wm_low.disp_clk = mode->clock; clock 9418 drivers/gpu/drm/radeon/cik.c uint64_t clock; clock 9422 drivers/gpu/drm/radeon/cik.c clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) | clock 9425 drivers/gpu/drm/radeon/cik.c return clock; clock 9428 drivers/gpu/drm/radeon/cik.c static int cik_set_uvd_clock(struct radeon_device *rdev, u32 clock, clock 9436 drivers/gpu/drm/radeon/cik.c clock, false, ÷rs); clock 444 drivers/gpu/drm/radeon/cypress_dpm.c u32 ref_clk = rdev->clock.mpll.reference_freq; clock 560 drivers/gpu/drm/radeon/cypress_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; clock 117 drivers/gpu/drm/radeon/dce3_1_afmt.c struct radeon_crtc *crtc, unsigned int clock) clock 121 drivers/gpu/drm/radeon/dce3_1_afmt.c unsigned int max_ratio = clock / 24000; clock 158 drivers/gpu/drm/radeon/dce3_1_afmt.c WREG32(DCCG_AUDIO_DTO0_MODULE, clock); clock 165 drivers/gpu/drm/radeon/dce3_1_afmt.c WREG32(DCCG_AUDIO_DTO1_MODULE, clock); clock 269 drivers/gpu/drm/radeon/dce6_afmt.c struct radeon_crtc *crtc, unsigned int clock) clock 284 drivers/gpu/drm/radeon/dce6_afmt.c WREG32(DCCG_AUDIO_DTO0_MODULE, clock); clock 288 drivers/gpu/drm/radeon/dce6_afmt.c struct radeon_crtc *crtc, unsigned int clock) clock 310 drivers/gpu/drm/radeon/dce6_afmt.c clock = clock * 100 / div; clock 313 drivers/gpu/drm/radeon/dce6_afmt.c WREG32(DCE8_DCCG_AUDIO_DTO1_MODULE, clock); clock 316 drivers/gpu/drm/radeon/dce6_afmt.c WREG32(DCCG_AUDIO_DTO1_MODULE, clock); clock 1145 drivers/gpu/drm/radeon/evergreen.c static int sumo_set_uvd_clock(struct radeon_device *rdev, u32 clock, clock 1152 drivers/gpu/drm/radeon/evergreen.c clock, false, ÷rs); clock 2171 drivers/gpu/drm/radeon/evergreen.c (u32)mode->clock); clock 2173 drivers/gpu/drm/radeon/evergreen.c (u32)mode->clock); clock 2190 drivers/gpu/drm/radeon/evergreen.c wm_high.disp_clk = mode->clock; clock 2217 drivers/gpu/drm/radeon/evergreen.c wm_low.disp_clk = mode->clock; clock 2256 drivers/gpu/drm/radeon/evergreen.c b.full = dfixed_const(mode->clock); clock 2268 drivers/gpu/drm/radeon/evergreen.c b.full = dfixed_const(mode->clock); clock 228 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_crtc *crtc, unsigned int clock) clock 230 drivers/gpu/drm/radeon/evergreen_hdmi.c unsigned int max_ratio = clock / 24000; clock 267 drivers/gpu/drm/radeon/evergreen_hdmi.c WREG32(DCCG_AUDIO_DTO0_MODULE, clock); clock 271 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_crtc *crtc, unsigned int clock) clock 299 drivers/gpu/drm/radeon/evergreen_hdmi.c clock = 100 * clock / div; clock 303 drivers/gpu/drm/radeon/evergreen_hdmi.c WREG32(DCCG_AUDIO_DTO1_MODULE, clock); clock 885 drivers/gpu/drm/radeon/ni_dpm.c rdev->clock.current_dispclk, clock 2012 drivers/gpu/drm/radeon/ni_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; clock 2242 drivers/gpu/drm/radeon/ni_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; clock 3970 drivers/gpu/drm/radeon/ni_dpm.c pl->mclk = rdev->clock.default_mclk; clock 3971 drivers/gpu/drm/radeon/ni_dpm.c pl->sclk = rdev->clock.default_sclk; clock 3273 drivers/gpu/drm/radeon/r100.c pix_clk.full = dfixed_const(mode1->clock); /* convert to fixed point */ clock 3280 drivers/gpu/drm/radeon/r100.c pix_clk2.full = dfixed_const(mode2->clock); /* convert to fixed point */ clock 200 drivers/gpu/drm/radeon/r600.c return rdev->clock.spll.reference_freq; clock 227 drivers/gpu/drm/radeon/r600.c if (rdev->clock.spll.reference_freq == 10000) clock 4615 drivers/gpu/drm/radeon/r600.c uint64_t clock; clock 4619 drivers/gpu/drm/radeon/r600.c clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) | clock 4622 drivers/gpu/drm/radeon/r600.c return clock; clock 167 drivers/gpu/drm/radeon/r600_dpm.c if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { clock 174 drivers/gpu/drm/radeon/r600_dpm.c vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; clock 193 drivers/gpu/drm/radeon/r600_dpm.c if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { clock 315 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_crtc *crtc, unsigned int clock) clock 331 drivers/gpu/drm/radeon/r600_hdmi.c WREG32(DCCG_AUDIO_DTO0_MODULE, clock * 100); clock 335 drivers/gpu/drm/radeon/r600_hdmi.c WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100); clock 292 drivers/gpu/drm/radeon/radeon.h u32 clock, clock 296 drivers/gpu/drm/radeon/radeon.h u32 clock, clock 2365 drivers/gpu/drm/radeon/radeon.h struct radeon_clock clock; clock 2900 drivers/gpu/drm/radeon/radeon.h u32 clock; clock 2913 drivers/gpu/drm/radeon/radeon.h extern struct radeon_hdmi_acr r600_hdmi_acr(uint32_t clock); clock 400 drivers/gpu/drm/radeon/radeon_asic.h void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock); clock 403 drivers/gpu/drm/radeon/radeon_asic.h void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock); clock 1133 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = clock 1145 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *p1pll = &rdev->clock.p1pll; clock 1146 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *p2pll = &rdev->clock.p2pll; clock 1147 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *dcpll = &rdev->clock.dcpll; clock 1148 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *spll = &rdev->clock.spll; clock 1149 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *mpll = &rdev->clock.mpll; clock 1253 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_sclk = clock 1255 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_mclk = clock 1259 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = clock 1261 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->clock.default_dispclk == 0) { clock 1263 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = 60000; /* 600 Mhz */ clock 1265 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = 54000; /* 540 Mhz */ clock 1267 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = 60000; /* 600 Mhz */ clock 1270 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE6(rdev) && (rdev->clock.default_dispclk < 53900)) { clock 1272 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk / 100); clock 1273 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = 60000; clock 1275 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.dp_extclk = clock 1277 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.current_dispclk = rdev->clock.default_dispclk; clock 1281 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock); clock 1282 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->clock.max_pixel_clock == 0) clock 1283 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.max_pixel_clock = 40000; clock 1290 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = clock 1293 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = rdev->clock.current_dispclk; clock 1297 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = rdev->clock.current_dispclk; clock 1299 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->clock.vco_freq == 0) clock 1300 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = 360000; /* 3.6 GHz */ clock 1520 drivers/gpu/drm/radeon/radeon_atombios.c int id, u32 clock) clock 1554 drivers/gpu/drm/radeon/radeon_atombios.c (clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) { clock 1572 drivers/gpu/drm/radeon/radeon_atombios.c (clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) { clock 1594 drivers/gpu/drm/radeon/radeon_atombios.c (clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) { clock 1653 drivers/gpu/drm/radeon/radeon_atombios.c lvds->native_mode.clock = clock 1847 drivers/gpu/drm/radeon/radeon_atombios.c mode->crtc_clock = mode->clock = clock 1891 drivers/gpu/drm/radeon/radeon_atombios.c mode->crtc_clock = mode->clock = clock 2463 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_mclk; clock 2465 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_sclk; clock 2635 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_mclk; clock 2637 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_sclk; clock 2731 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_mclk; clock 2733 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_sclk; clock 2803 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; clock 2804 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; clock 2839 drivers/gpu/drm/radeon/radeon_atombios.c u32 clock, clock 2857 drivers/gpu/drm/radeon/radeon_atombios.c args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */ clock 2871 drivers/gpu/drm/radeon/radeon_atombios.c args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */ clock 2886 drivers/gpu/drm/radeon/radeon_atombios.c args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); clock 2904 drivers/gpu/drm/radeon/radeon_atombios.c args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); clock 2925 drivers/gpu/drm/radeon/radeon_atombios.c args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ clock 2936 drivers/gpu/drm/radeon/radeon_atombios.c args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ clock 2955 drivers/gpu/drm/radeon/radeon_atombios.c u32 clock, clock 2974 drivers/gpu/drm/radeon/radeon_atombios.c args.ulClock = cpu_to_le32(clock); /* 10 khz */ clock 67 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); clock 69 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); clock 71 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); clock 73 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); clock 75 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); clock 77 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_crtc *crtc, unsigned int clock); clock 495 drivers/gpu/drm/radeon/radeon_audio.c static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) clock 502 drivers/gpu/drm/radeon/radeon_audio.c radeon_encoder->audio->set_dto(rdev, crtc, clock); clock 549 drivers/gpu/drm/radeon/radeon_audio.c static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) clock 556 drivers/gpu/drm/radeon/radeon_audio.c cts = clock * 1000; clock 586 drivers/gpu/drm/radeon/radeon_audio.c static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) clock 608 drivers/gpu/drm/radeon/radeon_audio.c if (hdmi_predefined_acr[i].clock == clock) clock 612 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); clock 613 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); clock 614 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); clock 622 drivers/gpu/drm/radeon/radeon_audio.c static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) clock 624 drivers/gpu/drm/radeon/radeon_audio.c const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); clock 711 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_set_dto(encoder, mode->clock); clock 714 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_update_acr(encoder, mode->clock); clock 749 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10); clock 55 drivers/gpu/drm/radeon/radeon_audio.h struct radeon_crtc *crtc, unsigned int clock); clock 41 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *spll = &rdev->clock.spll; clock 71 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *mpll = &rdev->clock.mpll; clock 108 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *p1pll = &rdev->clock.p1pll; clock 109 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *p2pll = &rdev->clock.p2pll; clock 110 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *spll = &rdev->clock.spll; clock 111 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *mpll = &rdev->clock.mpll; clock 147 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.max_pixel_clock = 35000; clock 156 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_sclk = (*val) / 10; clock 158 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_sclk = clock 163 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_mclk = (*val) / 10; clock 165 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_mclk = clock 182 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *p1pll = &rdev->clock.p1pll; clock 183 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *p2pll = &rdev->clock.p2pll; clock 184 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *dcpll = &rdev->clock.dcpll; clock 185 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *spll = &rdev->clock.spll; clock 186 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *mpll = &rdev->clock.mpll; clock 227 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.max_pixel_clock = 35000; clock 270 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_sclk = clock 272 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_mclk = clock 339 drivers/gpu/drm/radeon/radeon_clocks.c if (!rdev->clock.default_sclk) clock 340 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_sclk = radeon_get_engine_clock(rdev); clock 341 drivers/gpu/drm/radeon/radeon_clocks.c if ((!rdev->clock.default_mclk) && rdev->asic->pm.get_memory_clock) clock 342 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_mclk = radeon_get_memory_clock(rdev); clock 344 drivers/gpu/drm/radeon/radeon_clocks.c rdev->pm.current_sclk = rdev->clock.default_sclk; clock 345 drivers/gpu/drm/radeon/radeon_clocks.c rdev->pm.current_mclk = rdev->clock.default_mclk; clock 354 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *spll = &rdev->clock.spll; clock 736 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_pll *p1pll = &rdev->clock.p1pll; clock 737 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_pll *p2pll = &rdev->clock.p2pll; clock 738 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_pll *spll = &rdev->clock.spll; clock 739 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_pll *mpll = &rdev->clock.mpll; clock 802 drivers/gpu/drm/radeon/radeon_combios.c rdev->clock.default_sclk = sclk; clock 803 drivers/gpu/drm/radeon/radeon_combios.c rdev->clock.default_mclk = mclk; clock 806 drivers/gpu/drm/radeon/radeon_combios.c rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16); clock 808 drivers/gpu/drm/radeon/radeon_combios.c rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */ clock 1279 drivers/gpu/drm/radeon/radeon_combios.c lvds->native_mode.clock = RBIOS16(tmp + 9) * 10; clock 2811 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; clock 2812 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; clock 409 drivers/gpu/drm/radeon/radeon_connectors.c radeon_encoder->native_mode.clock = 0; clock 478 drivers/gpu/drm/radeon/radeon_connectors.c native_mode->clock != 0) { clock 734 drivers/gpu/drm/radeon/radeon_connectors.c (radeon_encoder->native_mode.clock == 0)) clock 789 drivers/gpu/drm/radeon/radeon_connectors.c if (!native_mode->clock) { clock 801 drivers/gpu/drm/radeon/radeon_connectors.c if (!native_mode->clock) { clock 1012 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->clock / 10) > rdev->clock.max_pixel_clock) clock 1490 drivers/gpu/drm/radeon/radeon_connectors.c (mode->clock > 135000)) clock 1493 drivers/gpu/drm/radeon/radeon_connectors.c if (radeon_connector->use_digital && (mode->clock > 165000)) { clock 1500 drivers/gpu/drm/radeon/radeon_connectors.c if (mode->clock > 340000) clock 1510 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->clock / 10) > rdev->clock.max_pixel_clock) clock 1645 drivers/gpu/drm/radeon/radeon_connectors.c (rdev->clock.default_dispclk >= 53900) && clock 1808 drivers/gpu/drm/radeon/radeon_connectors.c if (mode->clock > 340000) clock 1811 drivers/gpu/drm/radeon/radeon_connectors.c if (mode->clock > 165000) clock 219 drivers/gpu/drm/radeon/radeon_dp_mst.c if (mode->clock < 10000) clock 363 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_connector->pixelclock_for_modeset = mode->clock; clock 517 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); clock 336 drivers/gpu/drm/radeon/radeon_encoders.c adjusted_mode->clock = native_mode->clock; clock 211 drivers/gpu/drm/radeon/radeon_i2c.c static void set_clock(void *i2c_priv, int clock) clock 220 drivers/gpu/drm/radeon/radeon_i2c.c val |= clock ? 0 : rec->en_clk_mask; clock 340 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->clock.spll.reference_freq * 10; clock 774 drivers/gpu/drm/radeon/radeon_legacy_crtc.c pll = &rdev->clock.p2pll; clock 776 drivers/gpu/drm/radeon/radeon_legacy_crtc.c pll = &rdev->clock.p1pll; clock 780 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (mode->clock > 200000) /* range limits??? */ clock 818 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_compute_pll_legacy(pll, mode->clock, clock 203 drivers/gpu/drm/radeon/radeon_legacy_encoders.c radeon_encoder->pixel_clock = adjusted_mode->clock; clock 808 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if ((uint32_t)(mode->clock / 10) < tmds->tmds_pll[i].freq) { clock 959 drivers/gpu/drm/radeon/radeon_legacy_encoders.c radeon_encoder->pixel_clock = adjusted_mode->clock; clock 249 drivers/gpu/drm/radeon/radeon_legacy_tv.c pll = &rdev->clock.p2pll; clock 251 drivers/gpu/drm/radeon/radeon_legacy_tv.c pll = &rdev->clock.p1pll; clock 811 drivers/gpu/drm/radeon/radeon_mode.h int id, u32 clock); clock 1309 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.default_sclk = rdev->clock.default_sclk; clock 1310 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.default_mclk = rdev->clock.default_mclk; clock 1311 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_sclk = rdev->clock.default_sclk; clock 1312 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_mclk = rdev->clock.default_mclk; clock 1375 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.default_sclk = rdev->clock.default_sclk; clock 1376 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.default_mclk = rdev->clock.default_mclk; clock 1377 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_sclk = rdev->clock.default_sclk; clock 1378 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_mclk = rdev->clock.default_mclk; clock 969 drivers/gpu/drm/radeon/radeon_uvd.c unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq; clock 86 drivers/gpu/drm/radeon/rs690.c else if (rdev->clock.default_mclk) { clock 87 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); clock 100 drivers/gpu/drm/radeon/rs690.c else if (rdev->clock.default_mclk) clock 101 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); clock 327 drivers/gpu/drm/radeon/rs690.c a.full = dfixed_const(mode->clock); clock 784 drivers/gpu/drm/radeon/rs780_dpm.c ps->sclk_low = rdev->clock.default_sclk; clock 785 drivers/gpu/drm/radeon/rs780_dpm.c ps->sclk_high = rdev->clock.default_sclk; clock 993 drivers/gpu/drm/radeon/rs780_dpm.c u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / clock 1015 drivers/gpu/drm/radeon/rs780_dpm.c u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / clock 1007 drivers/gpu/drm/radeon/rv515.c a.full = dfixed_const(mode->clock); clock 139 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 clock, struct rv6xx_sclk_stepping *step) clock 145 drivers/gpu/drm/radeon/rv6xx_dpm.c clock, false, ÷rs); clock 154 drivers/gpu/drm/radeon/rv6xx_dpm.c step->vco_frequency = clock * step->post_divider; clock 163 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.spll.reference_freq; clock 297 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 clock, u32 index) clock 301 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_convert_clock_to_stepping(rdev, clock, &step); clock 428 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.spll.reference_freq; clock 549 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 clock, enum r600_power_level level) clock 551 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.spll.reference_freq; clock 559 drivers/gpu/drm/radeon/rv6xx_dpm.c if (clock && pi->sclk_ss) { clock 560 drivers/gpu/drm/radeon/rv6xx_dpm.c if (radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, clock, false, ÷rs) == 0) { clock 598 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 entry, u32 clock) clock 602 drivers/gpu/drm/radeon/rv6xx_dpm.c if (radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, clock, false, ÷rs)) clock 655 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.mpll.reference_freq; clock 840 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.spll.reference_freq; clock 1866 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->mclk = rdev->clock.default_mclk; clock 1867 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->sclk = rdev->clock.default_sclk; clock 51 drivers/gpu/drm/radeon/rv730_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; clock 171 drivers/gpu/drm/radeon/rv730_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; clock 131 drivers/gpu/drm/radeon/rv740_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; clock 251 drivers/gpu/drm/radeon/rv740_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; clock 796 drivers/gpu/drm/radeon/rv770.c u32 reference_clock = rdev->clock.spll.reference_freq; clock 403 drivers/gpu/drm/radeon/rv770_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; clock 500 drivers/gpu/drm/radeon/rv770_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; clock 2251 drivers/gpu/drm/radeon/rv770_dpm.c pl->mclk = rdev->clock.default_mclk; clock 2252 drivers/gpu/drm/radeon/rv770_dpm.c pl->sclk = rdev->clock.default_sclk; clock 1345 drivers/gpu/drm/radeon/si.c u32 reference_clock = rdev->clock.spll.reference_freq; clock 2316 drivers/gpu/drm/radeon/si.c (u32)mode->clock); clock 2318 drivers/gpu/drm/radeon/si.c (u32)mode->clock); clock 2339 drivers/gpu/drm/radeon/si.c wm_high.disp_clk = mode->clock; clock 2366 drivers/gpu/drm/radeon/si.c wm_low.disp_clk = mode->clock; clock 2407 drivers/gpu/drm/radeon/si.c b.full = dfixed_const(mode->clock); clock 2419 drivers/gpu/drm/radeon/si.c b.full = dfixed_const(mode->clock); clock 6987 drivers/gpu/drm/radeon/si.c uint64_t clock; clock 6991 drivers/gpu/drm/radeon/si.c clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) | clock 6994 drivers/gpu/drm/radeon/si.c return clock; clock 3165 drivers/gpu/drm/radeon/si_dpm.c rdev->clock.current_dispclk, clock 4796 drivers/gpu/drm/radeon/si_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; clock 4918 drivers/gpu/drm/radeon/si_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; clock 5161 drivers/gpu/drm/radeon/si_dpm.c if (rdev->clock.current_dispclk <= clock 6792 drivers/gpu/drm/radeon/si_dpm.c pl->mclk = rdev->clock.default_mclk; clock 6793 drivers/gpu/drm/radeon/si_dpm.c pl->sclk = rdev->clock.default_sclk; clock 1639 drivers/gpu/drm/radeon/trinity_dpm.c u64 disp_clk = rdev->clock.default_dispclk / 100; clock 215 drivers/gpu/drm/rcar-du/rcar_du_crtc.c unsigned long mode_clock = mode->clock * 1000; clock 273 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_escr_divider(rcrtc->clock, mode_clock, clock 280 drivers/gpu/drm/rcar-du/rcar_du_crtc.c mode_clock, params.clk == rcrtc->clock ? "cpg" : "ext", clock 513 drivers/gpu/drm/rcar-du/rcar_du_crtc.c ret = clk_prepare_enable(rcrtc->clock); clock 533 drivers/gpu/drm/rcar-du/rcar_du_crtc.c clk_disable_unprepare(rcrtc->clock); clock 542 drivers/gpu/drm/rcar-du/rcar_du_crtc.c clk_disable_unprepare(rcrtc->clock); clock 685 drivers/gpu/drm/rcar-du/rcar_du_crtc.c mode->clock * 1000); clock 1153 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->clock = devm_clk_get(rcdu->dev, name); clock 1154 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (IS_ERR(rcrtc->clock)) { clock 1156 drivers/gpu/drm/rcar-du/rcar_du_crtc.c return PTR_ERR(rcrtc->clock); clock 50 drivers/gpu/drm/rcar-du/rcar_du_crtc.h struct clk *clock; clock 279 drivers/gpu/drm/rcar-du/rcar_du_group.c ret = clk_prepare_enable(crtc->clock); clock 285 drivers/gpu/drm/rcar-du/rcar_du_group.c clk_disable_unprepare(crtc->clock); clock 48 drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c if (mode->clock > 297000) clock 456 drivers/gpu/drm/rcar-du/rcar_lvds.c lvds->info->pll_setup(lvds, mode->clock * 1000); clock 556 drivers/gpu/drm/rcar-du/rcar_lvds.c adjusted_mode->clock = clamp(adjusted_mode->clock, min_freq, 148500); clock 301 drivers/gpu/drm/rockchip/cdn-dp-core.c requested = mode->clock * bpc * 3 / 1000; clock 319 drivers/gpu/drm/rockchip/cdn-dp-core.c requested, actual, mode->clock); clock 968 drivers/gpu/drm/rockchip/cdn-dp-core.c if (mode->clock && clock 661 drivers/gpu/drm/rockchip/cdn-dp-reg.c symbol = tu_size_reg * mode->clock * bit_per_pix; clock 668 drivers/gpu/drm/rockchip/cdn-dp-reg.c mode->clock, dp->link.num_lanes, clock 682 drivers/gpu/drm/rockchip/cdn-dp-reg.c val = div_u64(mode->clock * (symbol + 1), 1000) + link_rate; clock 496 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC); clock 226 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c int pclk = mode->clock * 1000; clock 262 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c clk_set_rate(hdmi->vpll_clk, adj_mode->clock * 1000); clock 471 drivers/gpu/drm/rockchip/inno_hdmi.c hdmi->tmds_rate = mode->clock * 1000; clock 330 drivers/gpu/drm/rockchip/rk3066_hdmi.c hdmi->tmdsclk = mode->clock * 1000; clock 1076 drivers/gpu/drm/rockchip/rockchip_drm_vop.c rate = clk_round_rate(vop->dclk, adjusted_mode->clock * 1000 + 999); clock 1077 drivers/gpu/drm/rockchip/rockchip_drm_vop.c adjusted_mode->clock = DIV_ROUND_UP(rate, 1000); clock 1193 drivers/gpu/drm/rockchip/rockchip_drm_vop.c clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); clock 41 drivers/gpu/drm/shmobile/shmob_drm_crtc.c if (sdev->clock) { clock 42 drivers/gpu/drm/shmobile/shmob_drm_crtc.c ret = clk_prepare_enable(sdev->clock); clock 52 drivers/gpu/drm/shmobile/shmob_drm_crtc.c if (sdev->clock) clock 53 drivers/gpu/drm/shmobile/shmob_drm_crtc.c clk_disable_unprepare(sdev->clock); clock 606 drivers/gpu/drm/shmobile/shmob_drm_crtc.c mode->clock = sdev->pdata->panel.mode.clock; clock 97 drivers/gpu/drm/shmobile/shmob_drm_drv.c sdev->clock = clk; clock 28 drivers/gpu/drm/shmobile/shmob_drm_drv.h struct clk *clock; clock 56 drivers/gpu/drm/sti/sti_crtc.c int rate = mode->clock * 1000; clock 284 drivers/gpu/drm/sti/sti_dvo.c int rate = mode->clock * 1000; clock 351 drivers/gpu/drm/sti/sti_dvo.c int target = mode->clock * 1000; clock 660 drivers/gpu/drm/sti/sti_gdp.c if (mode->clock && gdp->clk_pix) { clock 662 drivers/gpu/drm/sti/sti_gdp.c int rate = mode->clock * 1000; clock 535 drivers/gpu/drm/sti/sti_hda.c hddac_rate = mode->clock * 1000 * 2; clock 539 drivers/gpu/drm/sti/sti_hda.c hddac_rate = mode->clock * 1000 * 4; clock 553 drivers/gpu/drm/sti/sti_hda.c ret = clk_set_rate(hda->clk_pix, mode->clock * 1000); clock 556 drivers/gpu/drm/sti/sti_hda.c mode->clock * 1000); clock 606 drivers/gpu/drm/sti/sti_hda.c int target = mode->clock * 1000; clock 842 drivers/gpu/drm/sti/sti_hdmi.c params->sample_rate, hdmi->mode.clock * 1000, n); clock 939 drivers/gpu/drm/sti/sti_hdmi.c ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000); clock 942 drivers/gpu/drm/sti/sti_hdmi.c mode->clock * 1000); clock 945 drivers/gpu/drm/sti/sti_hdmi.c ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000); clock 948 drivers/gpu/drm/sti/sti_hdmi.c mode->clock * 1000); clock 1002 drivers/gpu/drm/sti/sti_hdmi.c int target = mode->clock * 1000; clock 78 drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c u32 ckpxpll = hdmi->mode.clock * 1000; clock 741 drivers/gpu/drm/sti/sti_hqvdp.c lfw /= max(src_w, dst_w) * mode->clock / 1000; clock 1047 drivers/gpu/drm/sti/sti_hqvdp.c if (mode->clock && !sti_hqvdp_check_hw_scaling(hqvdp, mode, clock 262 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c pll_out_khz = mode->clock * bpp / lanes; clock 474 drivers/gpu/drm/stm/ltdc.c int target = mode->clock * 1000; clock 514 drivers/gpu/drm/stm/ltdc.c int rate = mode->clock * 1000; clock 528 drivers/gpu/drm/stm/ltdc.c adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000; clock 539 drivers/gpu/drm/stm/ltdc.c mode->clock, adjusted_mode->clock); clock 184 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c unsigned long rate = mode->clock * 1000; clock 67 drivers/gpu/drm/sun4i/sun4i_rgb.c unsigned long long rate = mode->clock * 1000; clock 327 drivers/gpu/drm/sun4i/sun4i_tv.c mode->clock = 13500; clock 317 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c bool clock, u8 data, clock 325 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c (clock ? SUN6I_DSI_INST_FUNC_LANE_CEN : 0) | clock 463 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c delay = (hsync_porch / ((mode->clock / 1000) * 8)); clock 743 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c phy_mipi_dphy_get_default_config(mode->clock * 1000, clock 40 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c if (mode->clock > 297000) clock 56 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c if (mode->clock > 340000) clock 145 drivers/gpu/drm/sun4i/sun8i_vi_layer.c fps = (mode->clock * 1000) / (mode->vtotal * mode->htotal); clock 957 drivers/gpu/drm/tegra/dsi.c state->pclk = crtc_state->mode.clock * 1000; clock 1119 drivers/gpu/drm/tegra/hdmi.c unsigned long pclk = mode->clock * 1000; clock 1199 drivers/gpu/drm/tegra/hdmi.c hdmi->pixel_clock = mode->clock * 1000; clock 1405 drivers/gpu/drm/tegra/hdmi.c unsigned long pclk = crtc_state->mode.clock * 1000; clock 174 drivers/gpu/drm/tegra/rgb.c unsigned long pclk = crtc_state->mode.clock * 1000; clock 909 drivers/gpu/drm/tegra/sor.c const u64 pclk = mode->clock * 1000; clock 1992 drivers/gpu/drm/tegra/sor.c unsigned long pclk = crtc_state->mode.clock * 1000; clock 2373 drivers/gpu/drm/tegra/sor.c if (mode->clock >= 340000 && scdc->supported) { clock 2437 drivers/gpu/drm/tegra/sor.c pclk = mode->clock * 1000; clock 2513 drivers/gpu/drm/tegra/sor.c if (mode->clock < 340000) { clock 2578 drivers/gpu/drm/tegra/sor.c if (mode->clock >= 340000) clock 2589 drivers/gpu/drm/tegra/sor.c if (mode->clock < 75000) clock 2639 drivers/gpu/drm/tegra/sor.c settings = tegra_sor_hdmi_find_settings(sor, mode->clock * 1000); clock 2642 drivers/gpu/drm/tegra/sor.c mode->clock * 1000); clock 216 drivers/gpu/drm/tilcdc/tilcdc_crtc.c req_rate = crtc->mode.clock * 1000; clock 256 drivers/gpu/drm/tilcdc/tilcdc_crtc.c tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv); clock 271 drivers/gpu/drm/tilcdc/tilcdc_crtc.c mode->clock); clock 753 drivers/gpu/drm/tilcdc/tilcdc_crtc.c drm_mode_vrefresh(mode), mode->clock); clock 796 drivers/gpu/drm/tilcdc/tilcdc_crtc.c if (mode->clock > priv->max_pixelclock) { clock 209 drivers/gpu/drm/udl/udl_modeset.c mode->clock / 5); clock 711 drivers/gpu/drm/vboxvideo/vbox_mode.c int clock = (width + 6) * (height + 6) * 60 / 10000; clock 718 drivers/gpu/drm/vboxvideo/vbox_mode.c edid[54] = clock & 0xff; clock 719 drivers/gpu/drm/vboxvideo/vbox_mode.c edid[55] = clock >> 8; clock 200 drivers/gpu/drm/vc4/vc4_dpi.c ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000); clock 787 drivers/gpu/drm/vc4/vc4_dsi.c unsigned long pixel_clock_hz = mode->clock * 1000; clock 807 drivers/gpu/drm/vc4/vc4_dsi.c adjusted_mode->clock = pixel_clock_hz / 1000; clock 810 drivers/gpu/drm/vc4/vc4_dsi.c adjusted_mode->htotal = adjusted_mode->clock * mode->htotal / clock 811 drivers/gpu/drm/vc4/vc4_dsi.c mode->clock; clock 829 drivers/gpu/drm/vc4/vc4_dsi.c unsigned long pixel_clock_hz = mode->clock * 1000; clock 504 drivers/gpu/drm/vc4/vc4_hdmi.c mode->clock * 1000 * clock 700 drivers/gpu/drm/vc4/vc4_hdmi.c if (mode->clock > HSM_CLOCK_FREQ / (1000 * 101 / 100)) clock 744 drivers/gpu/drm/vc4/vc4_hdmi.c tmp = (u64)(mode->clock * 1000) * n; clock 165 drivers/gpu/drm/vc4/vc4_vec.c struct clk *clock; clock 394 drivers/gpu/drm/vc4/vc4_vec.c clk_disable_unprepare(vec->clock); clock 422 drivers/gpu/drm/vc4/vc4_vec.c ret = clk_set_rate(vec->clock, 108000000); clock 428 drivers/gpu/drm/vc4/vc4_vec.c ret = clk_prepare_enable(vec->clock); clock 559 drivers/gpu/drm/vc4/vc4_vec.c vec->clock = devm_clk_get(dev, NULL); clock 560 drivers/gpu/drm/vc4/vc4_vec.c if (IS_ERR(vec->clock)) { clock 561 drivers/gpu/drm/vc4/vc4_vec.c ret = PTR_ERR(vec->clock); clock 548 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c new_state->adjusted_mode.crtc_clock = new_state->mode.clock; clock 2228 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6; clock 67 drivers/gpu/drm/zte/zx_tvenc.c .clock = 13500 * TVENC_CLOCK_MULTIPLIER, clock 98 drivers/gpu/drm/zte/zx_tvenc.c .clock = 13500 * TVENC_CLOCK_MULTIPLIER, clock 446 drivers/gpu/drm/zte/zx_vou.c ret = clk_set_rate(zcrtc->pixclk, mode->clock * 1000); clock 249 drivers/hwmon/f71805f.c unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL; clock 254 drivers/hwmon/f71805f.c return clock / (reg << 8); clock 41 drivers/hwmon/max6650.c static int clock = 254000; clock 45 drivers/hwmon/max6650.c module_param(clock, int, 0444); clock 279 drivers/hwmon/max6650.c ktach = ((clock * kscale) / (256 * rpm / 60)) - 1; clock 575 drivers/hwmon/max6650.c *val = 60 * DIV_FROM_REG(data->config) * clock / clock 308 drivers/hwmon/w83627hf.c unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL; clock 314 drivers/hwmon/w83627hf.c return clock / (reg << 8); clock 384 drivers/i2c/algos/i2c-algo-pca.c int clock; clock 427 drivers/i2c/algos/i2c-algo-pca.c clock = pca_clock(pca_data); clock 429 drivers/i2c/algos/i2c-algo-pca.c adap->name, freqs[clock]); clock 431 drivers/i2c/algos/i2c-algo-pca.c pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock); clock 433 drivers/i2c/algos/i2c-algo-pca.c int clock; clock 460 drivers/i2c/algos/i2c-algo-pca.c clock = pca_clock(pca_data) / 100; clock 488 drivers/i2c/algos/i2c-algo-pca.c if (clock < 648) { clock 490 drivers/i2c/algos/i2c-algo-pca.c thi = 1000000 - clock * raise_fall_time; clock 491 drivers/i2c/algos/i2c-algo-pca.c thi /= (I2C_PCA_OSC_PER * clock) - tlow; clock 493 drivers/i2c/algos/i2c-algo-pca.c tlow = (1000000 - clock * raise_fall_time) * min_tlow; clock 494 drivers/i2c/algos/i2c-algo-pca.c tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow); clock 501 drivers/i2c/algos/i2c-algo-pca.c "%s: Clock frequency is %dHz\n", adap->name, clock * 100); clock 41 drivers/i2c/busses/i2c-elektor.c static int clock = 0x1c; clock 92 drivers/i2c/busses/i2c-elektor.c return (clock); clock 232 drivers/i2c/busses/i2c-elektor.c clock = I2C_PCF_CLK | I2C_PCF_TRNS90; clock 321 drivers/i2c/busses/i2c-elektor.c module_param(clock, int, 0); clock 81 drivers/i2c/busses/i2c-mpc.c void (*setup)(struct device_node *node, struct mpc_i2c *i2c, u32 clock); clock 201 drivers/i2c/busses/i2c-mpc.c static int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, clock 209 drivers/i2c/busses/i2c-mpc.c if (clock == MPC_I2C_CLOCK_LEGACY) { clock 216 drivers/i2c/busses/i2c-mpc.c divider = mpc5xxx_get_bus_frequency(node) / clock; clock 237 drivers/i2c/busses/i2c-mpc.c u32 clock) clock 241 drivers/i2c/busses/i2c-mpc.c if (clock == MPC_I2C_CLOCK_PRESERVE) { clock 247 drivers/i2c/busses/i2c-mpc.c ret = mpc_i2c_get_fdr_52xx(node, clock, &i2c->real_clk); clock 259 drivers/i2c/busses/i2c-mpc.c u32 clock) clock 267 drivers/i2c/busses/i2c-mpc.c u32 clock) clock 290 drivers/i2c/busses/i2c-mpc.c mpc_i2c_setup_52xx(node, i2c, clock); clock 295 drivers/i2c/busses/i2c-mpc.c u32 clock) clock 388 drivers/i2c/busses/i2c-mpc.c static int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, clock 396 drivers/i2c/busses/i2c-mpc.c if (clock == MPC_I2C_CLOCK_LEGACY) { clock 402 drivers/i2c/busses/i2c-mpc.c divider = fsl_get_sys_freq() / clock / prescaler; clock 405 drivers/i2c/busses/i2c-mpc.c fsl_get_sys_freq(), clock, divider); clock 423 drivers/i2c/busses/i2c-mpc.c u32 clock) clock 427 drivers/i2c/busses/i2c-mpc.c if (clock == MPC_I2C_CLOCK_PRESERVE) { clock 434 drivers/i2c/busses/i2c-mpc.c ret = mpc_i2c_get_fdr_8xxx(node, clock, &i2c->real_clk); clock 448 drivers/i2c/busses/i2c-mpc.c u32 clock) clock 657 drivers/i2c/busses/i2c-mpc.c u32 clock = MPC_I2C_CLOCK_LEGACY; clock 709 drivers/i2c/busses/i2c-mpc.c clock = MPC_I2C_CLOCK_PRESERVE; clock 714 drivers/i2c/busses/i2c-mpc.c clock = *prop; clock 719 drivers/i2c/busses/i2c-mpc.c data->setup(op->dev.of_node, i2c, clock); clock 723 drivers/i2c/busses/i2c-mpc.c mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock); clock 114 drivers/i2c/busses/i2c-mv64xxx.c u8 clock; clock 158 drivers/i2c/busses/i2c-mv64xxx.c .clock = 0x0c, clock 168 drivers/i2c/busses/i2c-mv64xxx.c .clock = 0x14, clock 216 drivers/i2c/busses/i2c-mv64xxx.c drv_data->reg_base + drv_data->reg_offsets.clock); clock 32 drivers/i2c/busses/i2c-pca-isa.c static int clock = 59000; clock 147 drivers/i2c/busses/i2c-pca-isa.c pca_isa_data.i2c_clock = clock; clock 195 drivers/i2c/busses/i2c-pca-isa.c module_param(clock, int, 0); clock 196 drivers/i2c/busses/i2c-pca-isa.c MODULE_PARM_DESC(clock, "Clock rate in hertz.\n\t\t" clock 82 drivers/i2c/busses/i2c-pmcmsp.c u16 clock; /* Bits 9:0, default = 0x001f */ clock 123 drivers/i2c/busses/i2c-pmcmsp.c .clock = 0x1f, clock 127 drivers/i2c/busses/i2c-pmcmsp.c .clock = 0x1f, clock 146 drivers/i2c/busses/i2c-pmcmsp.c const struct pmcmsptwi_clock *clock) clock 148 drivers/i2c/busses/i2c-pmcmsp.c return ((clock->filter & 0xf) << 12) | (clock->clock & 0x03ff); clock 403 drivers/ide/hpt366.c u8 clock; /* ATA clock selected */ clock 625 drivers/ide/hpt366.c return info->timings->clock_table[info->clock][i]; clock 913 drivers/ide/hpt366.c enum ata_clock clock; clock 1034 drivers/ide/hpt366.c clock = ATA_CLOCK_25MHZ; clock 1038 drivers/ide/hpt366.c clock = ATA_CLOCK_33MHZ; clock 1041 drivers/ide/hpt366.c clock = ATA_CLOCK_40MHZ; clock 1044 drivers/ide/hpt366.c clock = ATA_CLOCK_50MHZ; clock 1047 drivers/ide/hpt366.c clock = ATA_CLOCK_66MHZ; clock 1059 drivers/ide/hpt366.c if (chip_type >= HPT374 || info->timings->clock_table[clock] == NULL) { clock 1069 drivers/ide/hpt366.c clock = ATA_CLOCK_66MHZ; clock 1072 drivers/ide/hpt366.c clock = ATA_CLOCK_50MHZ; clock 1075 drivers/ide/hpt366.c if (info->timings->clock_table[clock] == NULL) { clock 1121 drivers/ide/hpt366.c info->clock = clock; clock 1142 drivers/ide/hpt366.c if (chip_type == HPT371N && clock == ATA_CLOCK_66MHZ) clock 174 drivers/ide/it821x.c int clock, altclock, sel = 0; clock 178 drivers/ide/it821x.c clock = itdev->want[0][1]; clock 181 drivers/ide/it821x.c clock = itdev->want[1][1]; clock 189 drivers/ide/it821x.c if (clock == ATA_ANY) clock 190 drivers/ide/it821x.c clock = altclock; clock 193 drivers/ide/it821x.c if(clock == ATA_ANY) clock 196 drivers/ide/it821x.c if(clock == itdev->clock_mode) clock 200 drivers/ide/it821x.c if(clock == ATA_66) clock 129 drivers/ide/pdc202xx_old.c u8 clock = inb(clock_reg); clock 131 drivers/ide/pdc202xx_old.c outb(clock | (hwif->channel ? 0x08 : 0x02), clock_reg); clock 137 drivers/ide/pdc202xx_old.c u8 clock = inb(clock_reg); clock 139 drivers/ide/pdc202xx_old.c outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg); clock 157 drivers/ide/pdc202xx_old.c u8 clock = inb(high_16 + 0x11); clock 159 drivers/ide/pdc202xx_old.c outb(clock | (hwif->channel ? 0x08 : 0x02), high_16 + 0x11); clock 175 drivers/ide/pdc202xx_old.c u8 clock = 0; clock 178 drivers/ide/pdc202xx_old.c clock = inb(high_16 + 0x11); clock 179 drivers/ide/pdc202xx_old.c outb(clock & ~(hwif->channel ? 0x08:0x02), high_16 + 0x11); clock 29 drivers/ide/tx4938ide.c unsigned int clock = gbus_clock / (4 - sp); clock 30 drivers/ide/tx4938ide.c unsigned int cycle = 1000000000 / clock; clock 324 drivers/input/keyboard/lm8323.c int clock = (CLK_SLOWCLKEN | CLK_RCPWM_EXTERNAL); clock 336 drivers/input/keyboard/lm8323.c lm8323_write(lm, 2, LM8323_CMD_WRITE_CLOCK, clock); clock 66 drivers/input/touchscreen/s3c2410_ts.c struct clk *clock; clock 248 drivers/input/touchscreen/s3c2410_ts.c ts.clock = clk_get(dev, "adc"); clock 249 drivers/input/touchscreen/s3c2410_ts.c if (IS_ERR(ts.clock)) { clock 254 drivers/input/touchscreen/s3c2410_ts.c ret = clk_prepare_enable(ts.clock); clock 347 drivers/input/touchscreen/s3c2410_ts.c clk_disable_unprepare(ts.clock); clock 350 drivers/input/touchscreen/s3c2410_ts.c clk_put(ts.clock); clock 365 drivers/input/touchscreen/s3c2410_ts.c clk_disable_unprepare(ts.clock); clock 366 drivers/input/touchscreen/s3c2410_ts.c clk_put(ts.clock); clock 379 drivers/input/touchscreen/s3c2410_ts.c clk_disable(ts.clock); clock 389 drivers/input/touchscreen/s3c2410_ts.c clk_enable(ts.clock); clock 211 drivers/isdn/hardware/mISDN/hfcmulti.c static int clock; clock 228 drivers/isdn/hardware/mISDN/hfcmulti.c module_param(clock, int, S_IRUGO | S_IWUSR); clock 5233 drivers/isdn/hardware/mISDN/hfcmulti.c if (clock == HFC_cnt + 1) clock 5522 drivers/isdn/hardware/mISDN/hfcmulti.c if (!clock) clock 5523 drivers/isdn/hardware/mISDN/hfcmulti.c clock = 1; clock 77 drivers/mailbox/mtk-cmdq-mailbox.c struct clk *clock; clock 110 drivers/mailbox/mtk-cmdq-mailbox.c WARN_ON(clk_enable(cmdq->clock) < 0); clock 114 drivers/mailbox/mtk-cmdq-mailbox.c clk_disable(cmdq->clock); clock 283 drivers/mailbox/mtk-cmdq-mailbox.c clk_disable(cmdq->clock); clock 328 drivers/mailbox/mtk-cmdq-mailbox.c clk_unprepare(cmdq->clock); clock 337 drivers/mailbox/mtk-cmdq-mailbox.c WARN_ON(clk_prepare(cmdq->clock) < 0); clock 346 drivers/mailbox/mtk-cmdq-mailbox.c clk_unprepare(cmdq->clock); clock 373 drivers/mailbox/mtk-cmdq-mailbox.c WARN_ON(clk_enable(cmdq->clock) < 0); clock 494 drivers/mailbox/mtk-cmdq-mailbox.c cmdq->clock = devm_clk_get(dev, "gce"); clock 495 drivers/mailbox/mtk-cmdq-mailbox.c if (IS_ERR(cmdq->clock)) { clock 497 drivers/mailbox/mtk-cmdq-mailbox.c return PTR_ERR(cmdq->clock); clock 533 drivers/mailbox/mtk-cmdq-mailbox.c WARN_ON(clk_prepare(cmdq->clock) < 0); clock 128 drivers/media/dvb-frontends/af9013.c if (coeff_lut[i].clock == state->clk && clock 31 drivers/media/dvb-frontends/af9013_priv.h u32 clock; clock 109 drivers/media/dvb-frontends/af9033.c utmp = div_u64((u64)dev->cfg.clock * 0x80000, 1000000); clock 118 drivers/media/dvb-frontends/af9033.c dev_dbg(&client->dev, "clk=%u clk_cw=%08x\n", dev->cfg.clock, utmp); clock 122 drivers/media/dvb-frontends/af9033.c if (clock_adc_lut[i].clock == dev->cfg.clock) clock 127 drivers/media/dvb-frontends/af9033.c dev->cfg.clock); clock 391 drivers/media/dvb-frontends/af9033.c if (coeff_lut[i].clock == dev->cfg.clock && clock 399 drivers/media/dvb-frontends/af9033.c dev->cfg.clock); clock 413 drivers/media/dvb-frontends/af9033.c if (clock_adc_lut[i].clock == dev->cfg.clock) clock 419 drivers/media/dvb-frontends/af9033.c dev->cfg.clock); clock 1086 drivers/media/dvb-frontends/af9033.c if (dev->cfg.clock != 12000000) { clock 1090 drivers/media/dvb-frontends/af9033.c dev->cfg.clock); clock 21 drivers/media/dvb-frontends/af9033.h u32 clock; clock 31 drivers/media/dvb-frontends/af9033_priv.h u32 clock; clock 37 drivers/media/dvb-frontends/af9033_priv.h u32 clock; clock 23 drivers/media/dvb-frontends/drxd.h u32 clock; clock 2450 drivers/media/dvb-frontends/drxd_hard.c u32 ulClock = state->config.clock; clock 1262 drivers/media/dvb-frontends/m88ds3103.c pdata.clk = cfg->clock; clock 1367 drivers/media/dvb-frontends/m88ds3103.c dev->config.clock = pdata->clk; clock 114 drivers/media/dvb-frontends/m88ds3103.h u32 clock; clock 59 drivers/media/dvb-frontends/mxl5xx.c u32 clock; clock 910 drivers/media/dvb-frontends/stv0367.c enum stv0367_clk_pol clock) clock 918 drivers/media/dvb-frontends/stv0367.c switch (clock) { clock 1375 drivers/media/i2c/s5c73m3/s5c73m3-core.c ret = clk_set_rate(state->clock, state->mclk_frequency); clock 1379 drivers/media/i2c/s5c73m3/s5c73m3-core.c ret = clk_prepare_enable(state->clock); clock 1384 drivers/media/i2c/s5c73m3/s5c73m3-core.c clk_get_rate(state->clock)); clock 1410 drivers/media/i2c/s5c73m3/s5c73m3-core.c clk_disable_unprepare(state->clock); clock 1430 drivers/media/i2c/s5c73m3/s5c73m3-core.c clk_prepare_enable(state->clock); clock 1613 drivers/media/i2c/s5c73m3/s5c73m3-core.c state->clock = devm_clk_get(dev, S5C73M3_CLK_NAME); clock 1614 drivers/media/i2c/s5c73m3/s5c73m3-core.c if (IS_ERR(state->clock)) clock 1615 drivers/media/i2c/s5c73m3/s5c73m3-core.c return PTR_ERR(state->clock); clock 388 drivers/media/i2c/s5c73m3/s5c73m3.h struct clk *clock; clock 293 drivers/media/i2c/s5k5baf.c struct clk *clock; clock 960 drivers/media/i2c/s5k5baf.c ret = clk_set_rate(state->clock, state->mclk_frequency); clock 964 drivers/media/i2c/s5k5baf.c ret = clk_prepare_enable(state->clock); clock 969 drivers/media/i2c/s5k5baf.c clk_get_rate(state->clock)); clock 994 drivers/media/i2c/s5k5baf.c if (!IS_ERR(state->clock)) clock 995 drivers/media/i2c/s5k5baf.c clk_disable_unprepare(state->clock); clock 1979 drivers/media/i2c/s5k5baf.c state->clock = devm_clk_get(state->sd.dev, S5K5BAF_CLK_NAME); clock 1980 drivers/media/i2c/s5k5baf.c if (IS_ERR(state->clock)) { clock 65 drivers/media/i2c/s5k6a3.c struct clk *clock; clock 194 drivers/media/i2c/s5k6a3.c ret = clk_set_rate(sensor->clock, sensor->clock_frequency); clock 206 drivers/media/i2c/s5k6a3.c ret = clk_prepare_enable(sensor->clock); clock 243 drivers/media/i2c/s5k6a3.c clk_disable_unprepare(sensor->clock); clock 291 drivers/media/i2c/s5k6a3.c sensor->clock = ERR_PTR(-EINVAL); clock 294 drivers/media/i2c/s5k6a3.c sensor->clock = devm_clk_get(sensor->dev, S5K6A3_CLK_NAME); clock 295 drivers/media/i2c/s5k6a3.c if (IS_ERR(sensor->clock)) clock 296 drivers/media/i2c/s5k6a3.c return PTR_ERR(sensor->clock); clock 888 drivers/media/pci/cx23885/cx23885-dvb.c .clock = 27000000, clock 901 drivers/media/pci/cx23885/cx23885-dvb.c .clock = 27000000, clock 914 drivers/media/pci/cx23885/cx23885-dvb.c .clock = 27000000, clock 1128 drivers/media/pci/ngene/ngene-cards.c .clock = 20000, clock 1139 drivers/media/pci/ngene/ngene-cards.c .clock = 20000, clock 160 drivers/media/pci/ngene/ngene-dvb.c void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags) clock 253 drivers/media/pci/ngene/ngene-dvb.c void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags) clock 911 drivers/media/pci/ngene/ngene.h void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags); clock 912 drivers/media/pci/ngene/ngene.h void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags); clock 1037 drivers/media/pci/pt1/pt1.c int clock, int data, int next_addr) clock 1040 drivers/media/pci/pt1/pt1.c !clock << 11 | !data << 10 | next_addr); clock 968 drivers/media/pci/saa7134/saa7134-tvaudio.c int clock = saa7134_boards[dev->board].audio_clock; clock 971 drivers/media/pci/saa7134/saa7134-tvaudio.c clock = audio_clock_override; clock 982 drivers/media/pci/saa7134/saa7134-tvaudio.c saa_writeb(SAA7134_AUDIO_CLOCK0, clock & 0xff); clock 983 drivers/media/pci/saa7134/saa7134-tvaudio.c saa_writeb(SAA7134_AUDIO_CLOCK1, (clock >> 8) & 0xff); clock 984 drivers/media/pci/saa7134/saa7134-tvaudio.c saa_writeb(SAA7134_AUDIO_CLOCK2, (clock >> 16) & 0xff); clock 992 drivers/media/pci/saa7134/saa7134-tvaudio.c saa_writel(0x598 >> 2, clock); clock 510 drivers/media/pci/smipcie/smipcie-main.c .clock = 27000000, clock 566 drivers/media/pci/smipcie/smipcie-main.c .clock = 27000000, clock 1152 drivers/media/platform/exynos-gsc/gsc-core.c gsc->clock[i] = devm_clk_get(dev, drv_data->clk_names[i]); clock 1153 drivers/media/platform/exynos-gsc/gsc-core.c if (IS_ERR(gsc->clock[i])) { clock 1156 drivers/media/platform/exynos-gsc/gsc-core.c return PTR_ERR(gsc->clock[i]); clock 1161 drivers/media/platform/exynos-gsc/gsc-core.c ret = clk_prepare_enable(gsc->clock[i]); clock 1166 drivers/media/platform/exynos-gsc/gsc-core.c clk_disable_unprepare(gsc->clock[i]); clock 1204 drivers/media/platform/exynos-gsc/gsc-core.c clk_disable_unprepare(gsc->clock[i]); clock 1220 drivers/media/platform/exynos-gsc/gsc-core.c clk_disable_unprepare(gsc->clock[i]); clock 1276 drivers/media/platform/exynos-gsc/gsc-core.c ret = clk_prepare_enable(gsc->clock[i]); clock 1279 drivers/media/platform/exynos-gsc/gsc-core.c clk_disable_unprepare(gsc->clock[i]); clock 1302 drivers/media/platform/exynos-gsc/gsc-core.c clk_disable_unprepare(gsc->clock[i]); clock 333 drivers/media/platform/exynos-gsc/gsc-core.h struct clk *clock[GSC_MAX_CLOCKS]; clock 785 drivers/media/platform/exynos4-is/fimc-core.c if (IS_ERR(fimc->clock[i])) clock 787 drivers/media/platform/exynos4-is/fimc-core.c clk_unprepare(fimc->clock[i]); clock 788 drivers/media/platform/exynos4-is/fimc-core.c clk_put(fimc->clock[i]); clock 789 drivers/media/platform/exynos4-is/fimc-core.c fimc->clock[i] = ERR_PTR(-EINVAL); clock 798 drivers/media/platform/exynos4-is/fimc-core.c fimc->clock[i] = ERR_PTR(-EINVAL); clock 801 drivers/media/platform/exynos4-is/fimc-core.c fimc->clock[i] = clk_get(&fimc->pdev->dev, fimc_clocks[i]); clock 802 drivers/media/platform/exynos4-is/fimc-core.c if (IS_ERR(fimc->clock[i])) { clock 803 drivers/media/platform/exynos4-is/fimc-core.c ret = PTR_ERR(fimc->clock[i]); clock 806 drivers/media/platform/exynos4-is/fimc-core.c ret = clk_prepare(fimc->clock[i]); clock 808 drivers/media/platform/exynos4-is/fimc-core.c clk_put(fimc->clock[i]); clock 809 drivers/media/platform/exynos4-is/fimc-core.c fimc->clock[i] = ERR_PTR(-EINVAL); clock 979 drivers/media/platform/exynos4-is/fimc-core.c ret = clk_set_rate(fimc->clock[CLK_BUS], lclk_freq); clock 983 drivers/media/platform/exynos4-is/fimc-core.c ret = clk_enable(fimc->clock[CLK_BUS]); clock 1002 drivers/media/platform/exynos4-is/fimc-core.c ret = clk_enable(fimc->clock[CLK_GATE]); clock 1015 drivers/media/platform/exynos4-is/fimc-core.c clk_disable(fimc->clock[CLK_BUS]); clock 1028 drivers/media/platform/exynos4-is/fimc-core.c clk_enable(fimc->clock[CLK_GATE]); clock 1048 drivers/media/platform/exynos4-is/fimc-core.c clk_disable(fimc->clock[CLK_GATE]); clock 1100 drivers/media/platform/exynos4-is/fimc-core.c clk_disable(fimc->clock[CLK_GATE]); clock 1106 drivers/media/platform/exynos4-is/fimc-core.c clk_disable(fimc->clock[CLK_BUS]); clock 427 drivers/media/platform/exynos4-is/fimc-core.h struct clk *clock[MAX_FIMC_CLOCKS]; clock 20 drivers/media/platform/exynos4-is/fimc-is-i2c.c struct clk *clock; clock 48 drivers/media/platform/exynos4-is/fimc-is-i2c.c isp_i2c->clock = devm_clk_get(&pdev->dev, "i2c_isp"); clock 49 drivers/media/platform/exynos4-is/fimc-is-i2c.c if (IS_ERR(isp_i2c->clock)) { clock 51 drivers/media/platform/exynos4-is/fimc-is-i2c.c return PTR_ERR(isp_i2c->clock); clock 100 drivers/media/platform/exynos4-is/fimc-is-i2c.c clk_disable_unprepare(isp_i2c->clock); clock 108 drivers/media/platform/exynos4-is/fimc-is-i2c.c return clk_prepare_enable(isp_i2c->clock); clock 1442 drivers/media/platform/exynos4-is/fimc-lite.c if (IS_ERR(fimc->clock)) clock 1445 drivers/media/platform/exynos4-is/fimc-lite.c clk_put(fimc->clock); clock 1446 drivers/media/platform/exynos4-is/fimc-lite.c fimc->clock = ERR_PTR(-EINVAL); clock 1451 drivers/media/platform/exynos4-is/fimc-lite.c fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME); clock 1452 drivers/media/platform/exynos4-is/fimc-lite.c return PTR_ERR_OR_ZERO(fimc->clock); clock 1522 drivers/media/platform/exynos4-is/fimc-lite.c ret = clk_prepare_enable(fimc->clock); clock 1547 drivers/media/platform/exynos4-is/fimc-lite.c clk_prepare_enable(fimc->clock); clock 1555 drivers/media/platform/exynos4-is/fimc-lite.c clk_disable_unprepare(fimc->clock); clock 158 drivers/media/platform/exynos4-is/fimc-lite.h struct clk *clock; clock 1041 drivers/media/platform/exynos4-is/media-dev.c if (IS_ERR(fmd->camclk[i].clock)) clock 1043 drivers/media/platform/exynos4-is/media-dev.c clk_put(fmd->camclk[i].clock); clock 1044 drivers/media/platform/exynos4-is/media-dev.c fmd->camclk[i].clock = ERR_PTR(-EINVAL); clock 1060 drivers/media/platform/exynos4-is/media-dev.c struct clk *clock; clock 1064 drivers/media/platform/exynos4-is/media-dev.c fmd->camclk[i].clock = ERR_PTR(-EINVAL); clock 1068 drivers/media/platform/exynos4-is/media-dev.c clock = clk_get(dev, clk_name); clock 1070 drivers/media/platform/exynos4-is/media-dev.c if (IS_ERR(clock)) { clock 1072 drivers/media/platform/exynos4-is/media-dev.c ret = PTR_ERR(clock); clock 1075 drivers/media/platform/exynos4-is/media-dev.c fmd->camclk[i].clock = clock; clock 1090 drivers/media/platform/exynos4-is/media-dev.c clock = clk_get(dev, clk_name); clock 1091 drivers/media/platform/exynos4-is/media-dev.c if (IS_ERR(clock)) { clock 1094 drivers/media/platform/exynos4-is/media-dev.c ret = PTR_ERR(clock); clock 1097 drivers/media/platform/exynos4-is/media-dev.c fmd->wbclk[i] = clock; clock 1331 drivers/media/platform/exynos4-is/media-dev.c p_name = __clk_get_name(fmd->camclk[i].clock); clock 72 drivers/media/platform/exynos4-is/media-dev.h struct clk *clock; clock 209 drivers/media/platform/exynos4-is/mipi-csis.c struct clk *clock[NUM_CSIS_CLOCKS]; clock 387 drivers/media/platform/exynos4-is/mipi-csis.c if (IS_ERR(state->clock[i])) clock 389 drivers/media/platform/exynos4-is/mipi-csis.c clk_unprepare(state->clock[i]); clock 390 drivers/media/platform/exynos4-is/mipi-csis.c clk_put(state->clock[i]); clock 391 drivers/media/platform/exynos4-is/mipi-csis.c state->clock[i] = ERR_PTR(-EINVAL); clock 401 drivers/media/platform/exynos4-is/mipi-csis.c state->clock[i] = ERR_PTR(-EINVAL); clock 404 drivers/media/platform/exynos4-is/mipi-csis.c state->clock[i] = clk_get(dev, csi_clock_name[i]); clock 405 drivers/media/platform/exynos4-is/mipi-csis.c if (IS_ERR(state->clock[i])) { clock 406 drivers/media/platform/exynos4-is/mipi-csis.c ret = PTR_ERR(state->clock[i]); clock 409 drivers/media/platform/exynos4-is/mipi-csis.c ret = clk_prepare(state->clock[i]); clock 411 drivers/media/platform/exynos4-is/mipi-csis.c clk_put(state->clock[i]); clock 412 drivers/media/platform/exynos4-is/mipi-csis.c state->clock[i] = ERR_PTR(-EINVAL); clock 822 drivers/media/platform/exynos4-is/mipi-csis.c ret = clk_set_rate(state->clock[CSIS_CLK_MUX], clock 829 drivers/media/platform/exynos4-is/mipi-csis.c ret = clk_enable(state->clock[CSIS_CLK_MUX]); clock 881 drivers/media/platform/exynos4-is/mipi-csis.c clk_disable(state->clock[CSIS_CLK_MUX]); clock 906 drivers/media/platform/exynos4-is/mipi-csis.c clk_disable(state->clock[CSIS_CLK_GATE]); clock 942 drivers/media/platform/exynos4-is/mipi-csis.c clk_enable(state->clock[CSIS_CLK_GATE]); clock 984 drivers/media/platform/exynos4-is/mipi-csis.c clk_disable(state->clock[CSIS_CLK_MUX]); clock 1319 drivers/media/platform/omap3isp/isp.c r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]); clock 1324 drivers/media/platform/omap3isp/isp.c r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ); clock 1329 drivers/media/platform/omap3isp/isp.c r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]); clock 1334 drivers/media/platform/omap3isp/isp.c rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]); clock 1339 drivers/media/platform/omap3isp/isp.c r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]); clock 1347 drivers/media/platform/omap3isp/isp.c clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]); clock 1349 drivers/media/platform/omap3isp/isp.c clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]); clock 1360 drivers/media/platform/omap3isp/isp.c clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]); clock 1361 drivers/media/platform/omap3isp/isp.c clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]); clock 1362 drivers/media/platform/omap3isp/isp.c clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]); clock 1384 drivers/media/platform/omap3isp/isp.c isp->clock[i] = clk; clock 2341 drivers/media/platform/omap3isp/isp.c ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]); clock 2349 drivers/media/platform/omap3isp/isp.c clk_disable(isp->clock[ISP_CLK_CAM_ICK]); clock 202 drivers/media/platform/omap3isp/isp.h struct clk *clock[4]; clock 503 drivers/media/platform/omap3isp/ispresizer.c unsigned long clock; clock 505 drivers/media/platform/omap3isp/ispresizer.c clock = div_u64((u64)limit * res->crop.active.height, ofmt->height); clock 506 drivers/media/platform/omap3isp/ispresizer.c clock = min(clock, limit / 2); clock 507 drivers/media/platform/omap3isp/ispresizer.c *max_rate = div_u64((u64)clock * res->crop.active.width, ofmt->width); clock 1105 drivers/media/platform/omap3isp/ispvideo.c pipe->l3_ick = clk_get_rate(video->isp->clock[ISP_CLK_L3_ICK]); clock 473 drivers/media/platform/qcom/camss/camss-csid.c struct camss_clock *clock = &csid->clock[i]; clock 475 drivers/media/platform/qcom/camss/camss-csid.c if (!strcmp(clock->name, "csi0") || clock 476 drivers/media/platform/qcom/camss/camss-csid.c !strcmp(clock->name, "csi1") || clock 477 drivers/media/platform/qcom/camss/camss-csid.c !strcmp(clock->name, "csi2") || clock 478 drivers/media/platform/qcom/camss/camss-csid.c !strcmp(clock->name, "csi3")) { clock 490 drivers/media/platform/qcom/camss/camss-csid.c for (j = 0; j < clock->nfreqs; j++) clock 491 drivers/media/platform/qcom/camss/camss-csid.c if (min_rate < clock->freq[j]) clock 494 drivers/media/platform/qcom/camss/camss-csid.c if (j == clock->nfreqs) { clock 503 drivers/media/platform/qcom/camss/camss-csid.c j = clock->nfreqs - 1; clock 505 drivers/media/platform/qcom/camss/camss-csid.c rate = clk_round_rate(clock->clk, clock->freq[j]); clock 512 drivers/media/platform/qcom/camss/camss-csid.c ret = clk_set_rate(clock->clk, rate); clock 581 drivers/media/platform/qcom/camss/camss-csid.c ret = camss_enable_clocks(csid->nclocks, csid->clock, dev); clock 593 drivers/media/platform/qcom/camss/camss-csid.c camss_disable_clocks(csid->nclocks, csid->clock); clock 603 drivers/media/platform/qcom/camss/camss-csid.c camss_disable_clocks(csid->nclocks, csid->clock); clock 1140 drivers/media/platform/qcom/camss/camss-csid.c while (res->clock[csid->nclocks]) clock 1143 drivers/media/platform/qcom/camss/camss-csid.c csid->clock = devm_kcalloc(dev, csid->nclocks, sizeof(*csid->clock), clock 1145 drivers/media/platform/qcom/camss/camss-csid.c if (!csid->clock) clock 1149 drivers/media/platform/qcom/camss/camss-csid.c struct camss_clock *clock = &csid->clock[i]; clock 1151 drivers/media/platform/qcom/camss/camss-csid.c clock->clk = devm_clk_get(dev, res->clock[i]); clock 1152 drivers/media/platform/qcom/camss/camss-csid.c if (IS_ERR(clock->clk)) clock 1153 drivers/media/platform/qcom/camss/camss-csid.c return PTR_ERR(clock->clk); clock 1155 drivers/media/platform/qcom/camss/camss-csid.c clock->name = res->clock[i]; clock 1157 drivers/media/platform/qcom/camss/camss-csid.c clock->nfreqs = 0; clock 1158 drivers/media/platform/qcom/camss/camss-csid.c while (res->clock_rate[i][clock->nfreqs]) clock 1159 drivers/media/platform/qcom/camss/camss-csid.c clock->nfreqs++; clock 1161 drivers/media/platform/qcom/camss/camss-csid.c if (!clock->nfreqs) { clock 1162 drivers/media/platform/qcom/camss/camss-csid.c clock->freq = NULL; clock 1166 drivers/media/platform/qcom/camss/camss-csid.c clock->freq = devm_kcalloc(dev, clock 1167 drivers/media/platform/qcom/camss/camss-csid.c clock->nfreqs, clock 1168 drivers/media/platform/qcom/camss/camss-csid.c sizeof(*clock->freq), clock 1170 drivers/media/platform/qcom/camss/camss-csid.c if (!clock->freq) clock 1173 drivers/media/platform/qcom/camss/camss-csid.c for (j = 0; j < clock->nfreqs; j++) clock 1174 drivers/media/platform/qcom/camss/camss-csid.c clock->freq[j] = res->clock_rate[i][j]; clock 52 drivers/media/platform/qcom/camss/camss-csid.h struct camss_clock *clock; clock 114 drivers/media/platform/qcom/camss/camss-csiphy.c struct camss_clock *clock = &csiphy->clock[i]; clock 116 drivers/media/platform/qcom/camss/camss-csiphy.c if (!strcmp(clock->name, "csiphy0_timer") || clock 117 drivers/media/platform/qcom/camss/camss-csiphy.c !strcmp(clock->name, "csiphy1_timer") || clock 118 drivers/media/platform/qcom/camss/camss-csiphy.c !strcmp(clock->name, "csiphy2_timer")) { clock 128 drivers/media/platform/qcom/camss/camss-csiphy.c for (j = 0; j < clock->nfreqs; j++) clock 129 drivers/media/platform/qcom/camss/camss-csiphy.c if (min_rate < clock->freq[j]) clock 132 drivers/media/platform/qcom/camss/camss-csiphy.c if (j == clock->nfreqs) { clock 141 drivers/media/platform/qcom/camss/camss-csiphy.c j = clock->nfreqs - 1; clock 143 drivers/media/platform/qcom/camss/camss-csiphy.c round_rate = clk_round_rate(clock->clk, clock->freq[j]); clock 152 drivers/media/platform/qcom/camss/camss-csiphy.c ret = clk_set_rate(clock->clk, csiphy->timer_clk_rate); clock 188 drivers/media/platform/qcom/camss/camss-csiphy.c ret = camss_enable_clocks(csiphy->nclocks, csiphy->clock, dev); clock 202 drivers/media/platform/qcom/camss/camss-csiphy.c camss_disable_clocks(csiphy->nclocks, csiphy->clock); clock 604 drivers/media/platform/qcom/camss/camss-csiphy.c while (res->clock[csiphy->nclocks]) clock 607 drivers/media/platform/qcom/camss/camss-csiphy.c csiphy->clock = devm_kcalloc(dev, clock 608 drivers/media/platform/qcom/camss/camss-csiphy.c csiphy->nclocks, sizeof(*csiphy->clock), clock 610 drivers/media/platform/qcom/camss/camss-csiphy.c if (!csiphy->clock) clock 614 drivers/media/platform/qcom/camss/camss-csiphy.c struct camss_clock *clock = &csiphy->clock[i]; clock 616 drivers/media/platform/qcom/camss/camss-csiphy.c clock->clk = devm_clk_get(dev, res->clock[i]); clock 617 drivers/media/platform/qcom/camss/camss-csiphy.c if (IS_ERR(clock->clk)) clock 618 drivers/media/platform/qcom/camss/camss-csiphy.c return PTR_ERR(clock->clk); clock 620 drivers/media/platform/qcom/camss/camss-csiphy.c clock->name = res->clock[i]; clock 622 drivers/media/platform/qcom/camss/camss-csiphy.c clock->nfreqs = 0; clock 623 drivers/media/platform/qcom/camss/camss-csiphy.c while (res->clock_rate[i][clock->nfreqs]) clock 624 drivers/media/platform/qcom/camss/camss-csiphy.c clock->nfreqs++; clock 626 drivers/media/platform/qcom/camss/camss-csiphy.c if (!clock->nfreqs) { clock 627 drivers/media/platform/qcom/camss/camss-csiphy.c clock->freq = NULL; clock 631 drivers/media/platform/qcom/camss/camss-csiphy.c clock->freq = devm_kcalloc(dev, clock 632 drivers/media/platform/qcom/camss/camss-csiphy.c clock->nfreqs, clock 633 drivers/media/platform/qcom/camss/camss-csiphy.c sizeof(*clock->freq), clock 635 drivers/media/platform/qcom/camss/camss-csiphy.c if (!clock->freq) clock 638 drivers/media/platform/qcom/camss/camss-csiphy.c for (j = 0; j < clock->nfreqs; j++) clock 639 drivers/media/platform/qcom/camss/camss-csiphy.c clock->freq[j] = res->clock_rate[i][j]; clock 68 drivers/media/platform/qcom/camss/camss-csiphy.h struct camss_clock *clock; clock 350 drivers/media/platform/qcom/camss/camss-ispif.c ret = camss_enable_clocks(ispif->nclocks, ispif->clock, dev); clock 359 drivers/media/platform/qcom/camss/camss-ispif.c camss_disable_clocks(ispif->nclocks, ispif->clock); clock 372 drivers/media/platform/qcom/camss/camss-ispif.c camss_disable_clocks(ispif->nclocks, ispif->clock); clock 1146 drivers/media/platform/qcom/camss/camss-ispif.c while (res->clock[ispif->nclocks]) clock 1149 drivers/media/platform/qcom/camss/camss-ispif.c ispif->clock = devm_kcalloc(dev, clock 1150 drivers/media/platform/qcom/camss/camss-ispif.c ispif->nclocks, sizeof(*ispif->clock), clock 1152 drivers/media/platform/qcom/camss/camss-ispif.c if (!ispif->clock) clock 1156 drivers/media/platform/qcom/camss/camss-ispif.c struct camss_clock *clock = &ispif->clock[i]; clock 1158 drivers/media/platform/qcom/camss/camss-ispif.c clock->clk = devm_clk_get(dev, res->clock[i]); clock 1159 drivers/media/platform/qcom/camss/camss-ispif.c if (IS_ERR(clock->clk)) clock 1160 drivers/media/platform/qcom/camss/camss-ispif.c return PTR_ERR(clock->clk); clock 1162 drivers/media/platform/qcom/camss/camss-ispif.c clock->freq = NULL; clock 1163 drivers/media/platform/qcom/camss/camss-ispif.c clock->nfreqs = 0; clock 1178 drivers/media/platform/qcom/camss/camss-ispif.c struct camss_clock *clock = &ispif->clock_for_reset[i]; clock 1180 drivers/media/platform/qcom/camss/camss-ispif.c clock->clk = devm_clk_get(dev, res->clock_for_reset[i]); clock 1181 drivers/media/platform/qcom/camss/camss-ispif.c if (IS_ERR(clock->clk)) clock 1182 drivers/media/platform/qcom/camss/camss-ispif.c return PTR_ERR(clock->clk); clock 1184 drivers/media/platform/qcom/camss/camss-ispif.c clock->freq = NULL; clock 1185 drivers/media/platform/qcom/camss/camss-ispif.c clock->nfreqs = 0; clock 55 drivers/media/platform/qcom/camss/camss-ispif.h struct camss_clock *clock; clock 1126 drivers/media/platform/qcom/camss/camss-vfe.c struct camss_clock *clock = &vfe->clock[i]; clock 1128 drivers/media/platform/qcom/camss/camss-vfe.c if (!strcmp(clock->name, "vfe0") || clock 1129 drivers/media/platform/qcom/camss/camss-vfe.c !strcmp(clock->name, "vfe1")) { clock 1154 drivers/media/platform/qcom/camss/camss-vfe.c for (j = 0; j < clock->nfreqs; j++) clock 1155 drivers/media/platform/qcom/camss/camss-vfe.c if (min_rate < clock->freq[j]) clock 1158 drivers/media/platform/qcom/camss/camss-vfe.c if (j == clock->nfreqs) { clock 1167 drivers/media/platform/qcom/camss/camss-vfe.c j = clock->nfreqs - 1; clock 1169 drivers/media/platform/qcom/camss/camss-vfe.c rate = clk_round_rate(clock->clk, clock->freq[j]); clock 1176 drivers/media/platform/qcom/camss/camss-vfe.c ret = clk_set_rate(clock->clk, rate); clock 1208 drivers/media/platform/qcom/camss/camss-vfe.c struct camss_clock *clock = &vfe->clock[i]; clock 1210 drivers/media/platform/qcom/camss/camss-vfe.c if (!strcmp(clock->name, "vfe0") || clock 1211 drivers/media/platform/qcom/camss/camss-vfe.c !strcmp(clock->name, "vfe1")) { clock 1236 drivers/media/platform/qcom/camss/camss-vfe.c rate = clk_get_rate(clock->clk); clock 1270 drivers/media/platform/qcom/camss/camss-vfe.c ret = camss_enable_clocks(vfe->nclocks, vfe->clock, clock 1294 drivers/media/platform/qcom/camss/camss-vfe.c camss_disable_clocks(vfe->nclocks, vfe->clock); clock 1324 drivers/media/platform/qcom/camss/camss-vfe.c camss_disable_clocks(vfe->nclocks, vfe->clock); clock 2034 drivers/media/platform/qcom/camss/camss-vfe.c while (res->clock[vfe->nclocks]) clock 2037 drivers/media/platform/qcom/camss/camss-vfe.c vfe->clock = devm_kcalloc(dev, vfe->nclocks, sizeof(*vfe->clock), clock 2039 drivers/media/platform/qcom/camss/camss-vfe.c if (!vfe->clock) clock 2043 drivers/media/platform/qcom/camss/camss-vfe.c struct camss_clock *clock = &vfe->clock[i]; clock 2045 drivers/media/platform/qcom/camss/camss-vfe.c clock->clk = devm_clk_get(dev, res->clock[i]); clock 2046 drivers/media/platform/qcom/camss/camss-vfe.c if (IS_ERR(clock->clk)) clock 2047 drivers/media/platform/qcom/camss/camss-vfe.c return PTR_ERR(clock->clk); clock 2049 drivers/media/platform/qcom/camss/camss-vfe.c clock->name = res->clock[i]; clock 2051 drivers/media/platform/qcom/camss/camss-vfe.c clock->nfreqs = 0; clock 2052 drivers/media/platform/qcom/camss/camss-vfe.c while (res->clock_rate[i][clock->nfreqs]) clock 2053 drivers/media/platform/qcom/camss/camss-vfe.c clock->nfreqs++; clock 2055 drivers/media/platform/qcom/camss/camss-vfe.c if (!clock->nfreqs) { clock 2056 drivers/media/platform/qcom/camss/camss-vfe.c clock->freq = NULL; clock 2060 drivers/media/platform/qcom/camss/camss-vfe.c clock->freq = devm_kcalloc(dev, clock 2061 drivers/media/platform/qcom/camss/camss-vfe.c clock->nfreqs, clock 2062 drivers/media/platform/qcom/camss/camss-vfe.c sizeof(*clock->freq), clock 2064 drivers/media/platform/qcom/camss/camss-vfe.c if (!clock->freq) clock 2067 drivers/media/platform/qcom/camss/camss-vfe.c for (j = 0; j < clock->nfreqs; j++) clock 2068 drivers/media/platform/qcom/camss/camss-vfe.c clock->freq[j] = res->clock_rate[i][j]; clock 151 drivers/media/platform/qcom/camss/camss-vfe.h struct camss_clock *clock; clock 37 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" }, clock 49 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" }, clock 63 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb", clock 80 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb", clock 97 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ahb", "ispif_ahb", clock 110 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "vfe0", "csi_vfe0", clock 132 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" }, clock 144 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" }, clock 156 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy2_timer" }, clock 170 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb", clock 187 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb", clock 204 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb", clock 221 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ispif_ahb", "csi3_ahb", "ahb", clock 238 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ahb", "ispif_ahb", clock 252 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ahb", "vfe0", "csi_vfe0", "vfe_ahb", clock 270 drivers/media/platform/qcom/camss/camss.c .clock = { "top_ahb", "ahb", "vfe1", "csi_vfe1", "vfe_ahb", clock 307 drivers/media/platform/qcom/camss/camss.c int camss_enable_clocks(int nclocks, struct camss_clock *clock, clock 314 drivers/media/platform/qcom/camss/camss.c ret = clk_prepare_enable(clock[i].clk); clock 325 drivers/media/platform/qcom/camss/camss.c clk_disable_unprepare(clock[i].clk); clock 335 drivers/media/platform/qcom/camss/camss.c void camss_disable_clocks(int nclocks, struct camss_clock *clock) clock 340 drivers/media/platform/qcom/camss/camss.c clk_disable_unprepare(clock[i].clk); clock 46 drivers/media/platform/qcom/camss/camss.h char *clock[CAMSS_RES_MAX]; clock 53 drivers/media/platform/qcom/camss/camss.h char *clock[CAMSS_RES_MAX]; clock 106 drivers/media/platform/qcom/camss/camss.h int camss_enable_clocks(int nclocks, struct camss_clock *clock, clock 108 drivers/media/platform/qcom/camss/camss.h void camss_disable_clocks(int nclocks, struct camss_clock *clock); clock 331 drivers/media/platform/s3c-camif/camif-core.c if (IS_ERR(camif->clock[i])) clock 333 drivers/media/platform/s3c-camif/camif-core.c clk_unprepare(camif->clock[i]); clock 334 drivers/media/platform/s3c-camif/camif-core.c clk_put(camif->clock[i]); clock 335 drivers/media/platform/s3c-camif/camif-core.c camif->clock[i] = ERR_PTR(-EINVAL); clock 344 drivers/media/platform/s3c-camif/camif-core.c camif->clock[i] = ERR_PTR(-EINVAL); clock 347 drivers/media/platform/s3c-camif/camif-core.c camif->clock[i] = clk_get(camif->dev, camif_clocks[i]); clock 348 drivers/media/platform/s3c-camif/camif-core.c if (IS_ERR(camif->clock[i])) { clock 349 drivers/media/platform/s3c-camif/camif-core.c ret = PTR_ERR(camif->clock[i]); clock 352 drivers/media/platform/s3c-camif/camif-core.c ret = clk_prepare(camif->clock[i]); clock 354 drivers/media/platform/s3c-camif/camif-core.c clk_put(camif->clock[i]); clock 355 drivers/media/platform/s3c-camif/camif-core.c camif->clock[i] = NULL; clock 447 drivers/media/platform/s3c-camif/camif-core.c clk_set_rate(camif->clock[CLK_CAM], clock 451 drivers/media/platform/s3c-camif/camif-core.c clk_get_rate(camif->clock[CLK_CAM])); clock 534 drivers/media/platform/s3c-camif/camif-core.c clk_enable(camif->clock[CLK_GATE]); clock 536 drivers/media/platform/s3c-camif/camif-core.c clk_enable(camif->clock[CLK_CAM]); clock 545 drivers/media/platform/s3c-camif/camif-core.c clk_disable(camif->clock[CLK_CAM]); clock 547 drivers/media/platform/s3c-camif/camif-core.c clk_disable(camif->clock[CLK_GATE]); clock 293 drivers/media/platform/s3c-camif/camif-core.h struct clk *clock[CLK_MAX_NUM]; clock 1207 drivers/media/platform/sti/bdisp/bdisp-v4l2.c int ret = clk_enable(bdisp->clock); clock 1221 drivers/media/platform/sti/bdisp/bdisp-v4l2.c clk_disable(bdisp->clock); clock 1274 drivers/media/platform/sti/bdisp/bdisp-v4l2.c if (!IS_ERR(bdisp->clock)) clock 1275 drivers/media/platform/sti/bdisp/bdisp-v4l2.c clk_unprepare(bdisp->clock); clock 1323 drivers/media/platform/sti/bdisp/bdisp-v4l2.c bdisp->clock = devm_clk_get(dev, BDISP_NAME); clock 1324 drivers/media/platform/sti/bdisp/bdisp-v4l2.c if (IS_ERR(bdisp->clock)) { clock 1326 drivers/media/platform/sti/bdisp/bdisp-v4l2.c return PTR_ERR(bdisp->clock); clock 1329 drivers/media/platform/sti/bdisp/bdisp-v4l2.c ret = clk_prepare(bdisp->clock); clock 1332 drivers/media/platform/sti/bdisp/bdisp-v4l2.c bdisp->clock = ERR_PTR(-EINVAL); clock 1403 drivers/media/platform/sti/bdisp/bdisp-v4l2.c if (!IS_ERR(bdisp->clock)) clock 1404 drivers/media/platform/sti/bdisp/bdisp-v4l2.c clk_unprepare(bdisp->clock); clock 195 drivers/media/platform/sti/bdisp/bdisp.h struct clk *clock; clock 67 drivers/media/rc/ir-hix5hd2.c struct clk *clock; clock 88 drivers/media/rc/ir-hix5hd2.c ret = clk_prepare_enable(dev->clock); clock 90 drivers/media/rc/ir-hix5hd2.c clk_disable_unprepare(dev->clock); clock 242 drivers/media/rc/ir-hix5hd2.c priv->clock = devm_clk_get(dev, NULL); clock 243 drivers/media/rc/ir-hix5hd2.c if (IS_ERR(priv->clock)) { clock 245 drivers/media/rc/ir-hix5hd2.c ret = PTR_ERR(priv->clock); clock 248 drivers/media/rc/ir-hix5hd2.c ret = clk_prepare_enable(priv->clock); clock 251 drivers/media/rc/ir-hix5hd2.c priv->rate = clk_get_rate(priv->clock); clock 290 drivers/media/rc/ir-hix5hd2.c clk_disable_unprepare(priv->clock); clock 301 drivers/media/rc/ir-hix5hd2.c clk_disable_unprepare(priv->clock); clock 311 drivers/media/rc/ir-hix5hd2.c clk_disable_unprepare(priv->clock); clock 326 drivers/media/rc/ir-hix5hd2.c ret = clk_prepare_enable(priv->clock); clock 383 drivers/media/rc/ir-mce_kbd-decoder.c .clock = MCIR2_UNIT, clock 174 drivers/media/rc/ir-rc5-decoder.c .clock = RC5_UNIT, clock 181 drivers/media/rc/ir-rc5-decoder.c .clock = RC5_UNIT, clock 185 drivers/media/rc/ir-rc5-decoder.c .clock = RC5_UNIT, clock 192 drivers/media/rc/ir-rc5-decoder.c .clock = RC5_UNIT, clock 282 drivers/media/rc/ir-rc6-decoder.c .clock = RC6_UNIT, clock 286 drivers/media/rc/ir-rc6-decoder.c .clock = RC6_UNIT * 2, clock 290 drivers/media/rc/ir-rc6-decoder.c .clock = RC6_UNIT, clock 203 drivers/media/rc/rc-core-priv.h unsigned int clock; clock 349 drivers/media/rc/rc-ir-raw.c (*ev)->duration += timings->clock; clock 354 drivers/media/rc/rc-ir-raw.c timings->clock); clock 360 drivers/media/rc/rc-ir-raw.c timings->clock); clock 631 drivers/media/tuners/e4000.c dev->clk = cfg->clock; clock 26 drivers/media/tuners/e4000.h u32 clock; clock 978 drivers/media/usb/dvb-usb-v2/af9035.c state->af9033_config[i].clock = clock_lut_it9135[tmp]; clock 980 drivers/media/usb/dvb-usb-v2/af9035.c state->af9033_config[i].clock = clock_lut_af9035[tmp]; clock 1212 drivers/media/usb/dvb-usb-v2/rtl28xxu.c .clock = 28800000, clock 479 drivers/media/usb/dvb-usb/m920x.c u8 clock[] = { CLOCK_CTL, 0x30 }; clock 491 drivers/media/usb/dvb-usb/m920x.c if ((ret = mt352_write(fe, clock, ARRAY_SIZE(clock))) != 0) clock 397 drivers/media/usb/em28xx/em28xx-dvb.c .clock = 12000, clock 3167 drivers/media/usb/gspca/ov519.c u8 clock; clock 3204 drivers/media/usb/gspca/ov519.c clock = fr_tb[sd->gspca_dev.curr_mode][fr][2]; clock 3206 drivers/media/usb/gspca/ov519.c clock |= 0x80; /* enable double clock */ clock 3207 drivers/media/usb/gspca/ov519.c ov518_i2c_w(sd, OV7670_R11_CLKRC, clock); clock 2379 drivers/media/usb/uvc/uvc_driver.c module_param_call(clock, uvc_clock_param_set, uvc_clock_param_get, clock 2381 drivers/media/usb/uvc/uvc_driver.c MODULE_PARM_DESC(clock, "Video buffers timestamp clock"); clock 480 drivers/media/usb/uvc/uvc_video.c if (dev_sof == stream->clock.last_sof) clock 483 drivers/media/usb/uvc/uvc_video.c stream->clock.last_sof = dev_sof; clock 507 drivers/media/usb/uvc/uvc_video.c if (stream->clock.sof_offset == (u16)-1) { clock 510 drivers/media/usb/uvc/uvc_video.c stream->clock.sof_offset = delta_sof; clock 512 drivers/media/usb/uvc/uvc_video.c stream->clock.sof_offset = 0; clock 515 drivers/media/usb/uvc/uvc_video.c dev_sof = (dev_sof + stream->clock.sof_offset) & 2047; clock 517 drivers/media/usb/uvc/uvc_video.c spin_lock_irqsave(&stream->clock.lock, flags); clock 519 drivers/media/usb/uvc/uvc_video.c sample = &stream->clock.samples[stream->clock.head]; clock 526 drivers/media/usb/uvc/uvc_video.c stream->clock.head = (stream->clock.head + 1) % stream->clock.size; clock 528 drivers/media/usb/uvc/uvc_video.c if (stream->clock.count < stream->clock.size) clock 529 drivers/media/usb/uvc/uvc_video.c stream->clock.count++; clock 531 drivers/media/usb/uvc/uvc_video.c spin_unlock_irqrestore(&stream->clock.lock, flags); clock 536 drivers/media/usb/uvc/uvc_video.c struct uvc_clock *clock = &stream->clock; clock 538 drivers/media/usb/uvc/uvc_video.c clock->head = 0; clock 539 drivers/media/usb/uvc/uvc_video.c clock->count = 0; clock 540 drivers/media/usb/uvc/uvc_video.c clock->last_sof = -1; clock 541 drivers/media/usb/uvc/uvc_video.c clock->sof_offset = -1; clock 546 drivers/media/usb/uvc/uvc_video.c struct uvc_clock *clock = &stream->clock; clock 548 drivers/media/usb/uvc/uvc_video.c spin_lock_init(&clock->lock); clock 549 drivers/media/usb/uvc/uvc_video.c clock->size = 32; clock 551 drivers/media/usb/uvc/uvc_video.c clock->samples = kmalloc_array(clock->size, sizeof(*clock->samples), clock 553 drivers/media/usb/uvc/uvc_video.c if (clock->samples == NULL) clock 563 drivers/media/usb/uvc/uvc_video.c kfree(stream->clock.samples); clock 564 drivers/media/usb/uvc/uvc_video.c stream->clock.samples = NULL; clock 659 drivers/media/usb/uvc/uvc_video.c struct uvc_clock *clock = &stream->clock; clock 679 drivers/media/usb/uvc/uvc_video.c if (!clock->samples) clock 682 drivers/media/usb/uvc/uvc_video.c spin_lock_irqsave(&clock->lock, flags); clock 684 drivers/media/usb/uvc/uvc_video.c if (clock->count < clock->size) clock 687 drivers/media/usb/uvc/uvc_video.c first = &clock->samples[clock->head]; clock 688 drivers/media/usb/uvc/uvc_video.c last = &clock->samples[(clock->head - 1) % clock->size]; clock 713 drivers/media/usb/uvc/uvc_video.c x1, x2, y1, y2, clock->sof_offset); clock 755 drivers/media/usb/uvc/uvc_video.c spin_unlock_irqrestore(&clock->lock, flags); clock 1265 drivers/media/usb/uvc/uvc_video.c !memcmp(scr, stream->clock.last_scr, 6))) clock 1277 drivers/media/usb/uvc/uvc_video.c memcpy(stream->clock.last_scr, scr, 6); clock 616 drivers/media/usb/uvc/uvcvideo.h } clock; clock 28 drivers/memstick/host/rtsx_pci_ms.c unsigned int clock; clock 401 drivers/memstick/host/rtsx_pci_ms.c rtsx_pci_switch_clock(host->pcr, host->clock, host->ssc_depth, clock 437 drivers/memstick/host/rtsx_pci_ms.c unsigned int clock = 0; clock 460 drivers/memstick/host/rtsx_pci_ms.c clock = 19000000; clock 468 drivers/memstick/host/rtsx_pci_ms.c clock = 39000000; clock 479 drivers/memstick/host/rtsx_pci_ms.c err = rtsx_pci_switch_clock(pcr, clock, clock 485 drivers/memstick/host/rtsx_pci_ms.c host->clock = clock; clock 35 drivers/memstick/host/rtsx_usb_ms.c unsigned int clock; clock 556 drivers/memstick/host/rtsx_usb_ms.c unsigned int clock = 0; clock 592 drivers/memstick/host/rtsx_usb_ms.c clock = 19000000; clock 599 drivers/memstick/host/rtsx_usb_ms.c clock = 39000000; clock 612 drivers/memstick/host/rtsx_usb_ms.c err = rtsx_usb_switch_clock(ucr, clock, clock 620 drivers/memstick/host/rtsx_usb_ms.c host->clock = clock; clock 1121 drivers/mfd/db8500-prcmu.c static int request_pll(u8 clock, bool enable) clock 1125 drivers/mfd/db8500-prcmu.c if (clock == PRCMU_PLLSOC0) clock 1126 drivers/mfd/db8500-prcmu.c clock = (enable ? PLL_SOC0_ON : PLL_SOC0_OFF); clock 1127 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_PLLSOC1) clock 1128 drivers/mfd/db8500-prcmu.c clock = (enable ? PLL_SOC1_ON : PLL_SOC1_OFF); clock 1138 drivers/mfd/db8500-prcmu.c writeb(clock, (tcdm_base + PRCM_REQ_MB1_PLL_ON_OFF)); clock 1320 drivers/mfd/db8500-prcmu.c static int request_clock(u8 clock, bool enable) clock 1331 drivers/mfd/db8500-prcmu.c val = readl(prcmu_base + clk_mgt[clock].offset); clock 1333 drivers/mfd/db8500-prcmu.c val |= (PRCM_CLK_MGT_CLKEN | clk_mgt[clock].pllsw); clock 1335 drivers/mfd/db8500-prcmu.c clk_mgt[clock].pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK); clock 1338 drivers/mfd/db8500-prcmu.c writel(val, prcmu_base + clk_mgt[clock].offset); clock 1348 drivers/mfd/db8500-prcmu.c static int request_sga_clock(u8 clock, bool enable) clock 1358 drivers/mfd/db8500-prcmu.c ret = request_clock(clock, enable); clock 1448 drivers/mfd/db8500-prcmu.c int db8500_prcmu_request_clock(u8 clock, bool enable) clock 1450 drivers/mfd/db8500-prcmu.c if (clock == PRCMU_SGACLK) clock 1451 drivers/mfd/db8500-prcmu.c return request_sga_clock(clock, enable); clock 1452 drivers/mfd/db8500-prcmu.c else if (clock < PRCMU_NUM_REG_CLOCKS) clock 1453 drivers/mfd/db8500-prcmu.c return request_clock(clock, enable); clock 1454 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_TIMCLK) clock 1456 drivers/mfd/db8500-prcmu.c else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) clock 1457 drivers/mfd/db8500-prcmu.c return request_dsiclk((clock - PRCMU_DSI0CLK), enable); clock 1458 drivers/mfd/db8500-prcmu.c else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) clock 1459 drivers/mfd/db8500-prcmu.c return request_dsiescclk((clock - PRCMU_DSI0ESCCLK), enable); clock 1460 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_PLLDSI) clock 1462 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_SYSCLK) clock 1464 drivers/mfd/db8500-prcmu.c else if ((clock == PRCMU_PLLSOC0) || (clock == PRCMU_PLLSOC1)) clock 1465 drivers/mfd/db8500-prcmu.c return request_pll(clock, enable); clock 1508 drivers/mfd/db8500-prcmu.c static unsigned long clock_rate(u8 clock) clock 1514 drivers/mfd/db8500-prcmu.c val = readl(prcmu_base + clk_mgt[clock].offset); clock 1517 drivers/mfd/db8500-prcmu.c if (clk_mgt[clock].clk38div && (val & PRCM_CLK_MGT_CLK38DIV)) clock 1522 drivers/mfd/db8500-prcmu.c val |= clk_mgt[clock].pllsw; clock 1526 drivers/mfd/db8500-prcmu.c rate = pll_rate(PRCM_PLLSOC0_FREQ, rate, clk_mgt[clock].branch); clock 1528 drivers/mfd/db8500-prcmu.c rate = pll_rate(PRCM_PLLSOC1_FREQ, rate, clk_mgt[clock].branch); clock 1530 drivers/mfd/db8500-prcmu.c rate = pll_rate(PRCM_PLLDDR_FREQ, rate, clk_mgt[clock].branch); clock 1534 drivers/mfd/db8500-prcmu.c if ((clock == PRCMU_SGACLK) && clock 1613 drivers/mfd/db8500-prcmu.c unsigned long prcmu_clock_rate(u8 clock) clock 1615 drivers/mfd/db8500-prcmu.c if (clock < PRCMU_NUM_REG_CLOCKS) clock 1616 drivers/mfd/db8500-prcmu.c return clock_rate(clock); clock 1617 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_TIMCLK) clock 1619 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_SYSCLK) clock 1621 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_PLLSOC0) clock 1623 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_PLLSOC1) clock 1625 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_ARMSS) clock 1627 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_PLLDDR) clock 1629 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_PLLDSI) clock 1632 drivers/mfd/db8500-prcmu.c else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) clock 1633 drivers/mfd/db8500-prcmu.c return dsiclk_rate(clock - PRCMU_DSI0CLK); clock 1634 drivers/mfd/db8500-prcmu.c else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) clock 1635 drivers/mfd/db8500-prcmu.c return dsiescclk_rate(clock - PRCMU_DSI0ESCCLK); clock 1667 drivers/mfd/db8500-prcmu.c static long round_clock_rate(u8 clock, unsigned long rate) clock 1674 drivers/mfd/db8500-prcmu.c val = readl(prcmu_base + clk_mgt[clock].offset); clock 1675 drivers/mfd/db8500-prcmu.c src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), clock 1676 drivers/mfd/db8500-prcmu.c clk_mgt[clock].branch); clock 1679 drivers/mfd/db8500-prcmu.c if (clk_mgt[clock].clk38div) { clock 1685 drivers/mfd/db8500-prcmu.c } else if ((clock == PRCMU_SGACLK) && (div == 3)) { clock 1807 drivers/mfd/db8500-prcmu.c long prcmu_round_clock_rate(u8 clock, unsigned long rate) clock 1809 drivers/mfd/db8500-prcmu.c if (clock < PRCMU_NUM_REG_CLOCKS) clock 1810 drivers/mfd/db8500-prcmu.c return round_clock_rate(clock, rate); clock 1811 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_ARMSS) clock 1813 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_PLLDSI) clock 1815 drivers/mfd/db8500-prcmu.c else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) clock 1817 drivers/mfd/db8500-prcmu.c else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) clock 1820 drivers/mfd/db8500-prcmu.c return (long)prcmu_clock_rate(clock); clock 1823 drivers/mfd/db8500-prcmu.c static void set_clock_rate(u8 clock, unsigned long rate) clock 1836 drivers/mfd/db8500-prcmu.c val = readl(prcmu_base + clk_mgt[clock].offset); clock 1837 drivers/mfd/db8500-prcmu.c src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), clock 1838 drivers/mfd/db8500-prcmu.c clk_mgt[clock].branch); clock 1841 drivers/mfd/db8500-prcmu.c if (clk_mgt[clock].clk38div) { clock 1847 drivers/mfd/db8500-prcmu.c } else if (clock == PRCMU_SGACLK) { clock 1864 drivers/mfd/db8500-prcmu.c writel(val, prcmu_base + clk_mgt[clock].offset); clock 1979 drivers/mfd/db8500-prcmu.c int prcmu_set_clock_rate(u8 clock, unsigned long rate) clock 1981 drivers/mfd/db8500-prcmu.c if (clock < PRCMU_NUM_REG_CLOCKS) clock 1982 drivers/mfd/db8500-prcmu.c set_clock_rate(clock, rate); clock 1983 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_ARMSS) clock 1985 drivers/mfd/db8500-prcmu.c else if (clock == PRCMU_PLLDSI) clock 1987 drivers/mfd/db8500-prcmu.c else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) clock 1988 drivers/mfd/db8500-prcmu.c set_dsiclk_rate((clock - PRCMU_DSI0CLK), rate); clock 1989 drivers/mfd/db8500-prcmu.c else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) clock 1990 drivers/mfd/db8500-prcmu.c set_dsiescclk_rate((clock - PRCMU_DSI0ESCCLK), rate); clock 76 drivers/mfd/intel-lpss.c struct clk_lookup *clock; clock 351 drivers/mfd/intel-lpss.c lpss->clock = clkdev_create(clk, lpss->info->clk_con_id, "%s", devname); clock 352 drivers/mfd/intel-lpss.c if (!lpss->clock) clock 370 drivers/mfd/intel-lpss.c clkdev_drop(lpss->clock); clock 320 drivers/mfd/sm501.c unsigned long clock; clock 326 drivers/mfd/sm501.c clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK); clock 359 drivers/mfd/sm501.c smc501_writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK); clock 365 drivers/mfd/sm501.c smc501_writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK); clock 378 drivers/mfd/sm501.c gate, clock, mode); clock 405 drivers/mfd/sm501.c struct sm501_clock *clock, clock 430 drivers/mfd/sm501.c clock->mclk = mclk; clock 431 drivers/mfd/sm501.c clock->divider = divider; clock 432 drivers/mfd/sm501.c clock->shift = shift; clock 449 drivers/mfd/sm501.c struct sm501_clock *clock, clock 465 drivers/mfd/sm501.c if (sm501_calc_clock(freq, clock, max_div, clock 467 drivers/mfd/sm501.c clock->m = m; clock 468 drivers/mfd/sm501.c clock->n = n; clock 469 drivers/mfd/sm501.c clock->k = k; clock 476 drivers/mfd/sm501.c return clock->mclk / (clock->divider << clock->shift); clock 487 drivers/mfd/sm501.c struct sm501_clock *clock, clock 495 drivers/mfd/sm501.c sm501_calc_clock(freq, clock, max_div, mclk, &best_diff); clock 499 drivers/mfd/sm501.c return clock->mclk / (clock->divider << clock->shift); clock 515 drivers/mfd/sm501.c unsigned long clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK); clock 588 drivers/mfd/sm501.c clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK); clock 590 drivers/mfd/sm501.c clock = clock & ~(0xFF << clksrc); clock 591 drivers/mfd/sm501.c clock |= reg<<clksrc; clock 598 drivers/mfd/sm501.c smc501_writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK); clock 604 drivers/mfd/sm501.c smc501_writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK); clock 622 drivers/mfd/sm501.c gate, clock, mode); clock 991 drivers/mfd/twl-core.c struct twl4030_clock_init_data *clock) clock 1021 drivers/mfd/twl-core.c if (clock && clock->ck32k_lowpwr_enable) clock 1168 drivers/mfd/twl-core.c clocks_init(&client->dev, pdata ? pdata->clock : NULL); clock 966 drivers/mmc/core/block.c if (host->ios.clock) clock 967 drivers/mmc/core/block.c return host->ios.clock / 2000; clock 700 drivers/mmc/core/core.c if (card->host->ios.clock) clock 702 drivers/mmc/core/core.c (card->host->ios.clock / 1000); clock 906 drivers/mmc/core/core.c mmc_hostname(host), ios->clock, ios->bus_mode, clock 933 drivers/mmc/core/core.c host->ios.clock = hz; clock 1182 drivers/mmc/core/core.c u32 clock; clock 1188 drivers/mmc/core/core.c clock = host->ios.clock; clock 1189 drivers/mmc/core/core.c host->ios.clock = 0; clock 1197 drivers/mmc/core/core.c host->ios.clock = clock; clock 1352 drivers/mmc/core/core.c host->ios.clock = host->f_init; clock 1371 drivers/mmc/core/core.c host->ios.clock = 0; clock 1582 drivers/mmc/core/core.c (card->host->ios.clock / 1000); clock 58 drivers/mmc/core/debugfs.c seq_printf(s, "clock:\t\t%u Hz\n", ios->clock); clock 202 drivers/mmc/core/debugfs.c *val = host->ios.clock; clock 876 drivers/mmc/core/mmc.c if (host->ios.clock <= MMC_HIGH_26_MAX_DTR) clock 878 drivers/mmc/core/mmc.c else if (host->ios.clock <= MMC_HIGH_52_MAX_DTR) clock 882 drivers/mmc/core/mmc.c else if (host->ios.clock <= MMC_HS200_MAX_DTR) clock 894 drivers/mmc/core/mmc.c if (host->ios.clock <= MMC_HIGH_26_MAX_DTR) clock 896 drivers/mmc/core/mmc.c else if (host->ios.clock <= MMC_HIGH_52_MAX_DTR) clock 900 drivers/mmc/core/mmc.c else if (host->ios.clock <= MMC_HS200_MAX_DTR) clock 652 drivers/mmc/host/alcor.c static void alcor_set_clock(struct alcor_sdmmc_host *host, unsigned int clock) clock 659 drivers/mmc/host/alcor.c if (clock == 0) { clock 668 drivers/mmc/host/alcor.c tmp_div = DIV_ROUND_UP(cfg->clk_src_freq, clock); clock 673 drivers/mmc/host/alcor.c tmp_diff = abs(clock - tmp_clock); clock 686 drivers/mmc/host/alcor.c clock, tmp_clock, clk_div, clk_src); clock 852 drivers/mmc/host/alcor.c alcor_set_clock(host, ios->clock); clock 880 drivers/mmc/host/alcor.c alcor_set_clock(host, ios->clock); clock 887 drivers/mmc/host/alcor.c alcor_set_clock(host, ios->clock); clock 921 drivers/mmc/host/alcor.c alcor_set_clock(host, ios->clock); clock 382 drivers/mmc/host/atmel-mci.c unsigned int clock; clock 1391 drivers/mmc/host/atmel-mci.c if (ios->clock) { clock 1407 drivers/mmc/host/atmel-mci.c slot->clock = ios->clock; clock 1409 drivers/mmc/host/atmel-mci.c if (host->slot[i] && host->slot[i]->clock clock 1410 drivers/mmc/host/atmel-mci.c && host->slot[i]->clock < clock_min) clock 1411 drivers/mmc/host/atmel-mci.c clock_min = host->slot[i]->clock; clock 1470 drivers/mmc/host/atmel-mci.c slot->clock = 0; clock 1472 drivers/mmc/host/atmel-mci.c if (host->slot[i] && host->slot[i]->clock) { clock 94 drivers/mmc/host/au1xmmc.c u32 clock; clock 767 drivers/mmc/host/au1xmmc.c if (ios->clock && ios->clock != host->clock) { clock 768 drivers/mmc/host/au1xmmc.c au1xmmc_set_clock(host, ios->clock); clock 769 drivers/mmc/host/au1xmmc.c host->clock = ios->clock; clock 153 drivers/mmc/host/bcm2835.c int clock; /* Current clock speed */ clock 266 drivers/mmc/host/bcm2835.c host->clock = 0; clock 1100 drivers/mmc/host/bcm2835.c static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) clock 1126 drivers/mmc/host/bcm2835.c if (clock < 100000) { clock 1135 drivers/mmc/host/bcm2835.c div = host->max_clk / clock; clock 1138 drivers/mmc/host/bcm2835.c if ((host->max_clk / div) > clock) clock 1145 drivers/mmc/host/bcm2835.c clock = host->max_clk / (div + 2); clock 1146 drivers/mmc/host/bcm2835.c mmc->actual_clock = clock; clock 1150 drivers/mmc/host/bcm2835.c host->ns_per_fifo_word = (1000000000 / clock) * clock 1239 drivers/mmc/host/bcm2835.c if (!ios->clock || ios->clock != host->clock) { clock 1240 drivers/mmc/host/bcm2835.c bcm2835_set_clock(host, ios->clock); clock 1241 drivers/mmc/host/bcm2835.c host->clock = ios->clock; clock 240 drivers/mmc/host/cavium.c if (!slot->clock) clock 244 drivers/mmc/host/cavium.c timeout = (slot->clock * ns) / NSEC_PER_SEC; clock 246 drivers/mmc/host/cavium.c timeout = (slot->clock * 850ull) / 1000ull; clock 829 drivers/mmc/host/cavium.c u64 clock, emm_switch; clock 873 drivers/mmc/host/cavium.c clock = ios->clock; clock 874 drivers/mmc/host/cavium.c if (clock > 52000000) clock 875 drivers/mmc/host/cavium.c clock = 52000000; clock 876 drivers/mmc/host/cavium.c slot->clock = clock; clock 878 drivers/mmc/host/cavium.c if (clock) clock 879 drivers/mmc/host/cavium.c clk_period = (host->sys_freq + clock - 1) / (2 * clock); clock 906 drivers/mmc/host/cavium.c static void cvm_mmc_set_clock(struct cvm_mmc_slot *slot, unsigned int clock) clock 910 drivers/mmc/host/cavium.c clock = min(clock, mmc->f_max); clock 911 drivers/mmc/host/cavium.c clock = max(clock, mmc->f_min); clock 912 drivers/mmc/host/cavium.c slot->clock = clock; clock 929 drivers/mmc/host/cavium.c (host->sys_freq / slot->clock) / 2); clock 931 drivers/mmc/host/cavium.c (host->sys_freq / slot->clock) / 2); clock 1058 drivers/mmc/host/cavium.c slot->clock = mmc->f_min; clock 98 drivers/mmc/host/cavium.h u64 clock; clock 564 drivers/mmc/host/cb710-mmc.c cb710_mmc_select_clock_divider(mmc, ios->clock); clock 666 drivers/mmc/host/davinci_mmc.c mmc_push_pull_freq = calculate_freq_for_card(host, ios->clock); clock 694 drivers/mmc/host/davinci_mmc.c ios->clock, ios->bus_mode, ios->power_mode, clock 297 drivers/mmc/host/dw_mmc-exynos.c unsigned int wanted = ios->clock; clock 506 drivers/mmc/host/dw_mmc-exynos.c dw_mci_exynos_adjust_clock(host, (ios->clock) << 1); clock 106 drivers/mmc/host/dw_mmc-k3.c ret = clk_set_rate(host->ciu_clk, ios->clock); clock 108 drivers/mmc/host/dw_mmc-k3.c dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock); clock 191 drivers/mmc/host/dw_mmc-k3.c unsigned int clock; clock 193 drivers/mmc/host/dw_mmc-k3.c clock = (ios->clock <= 25000000) ? 25000000 : ios->clock; clock 195 drivers/mmc/host/dw_mmc-k3.c ret = clk_set_rate(host->biu_clk, clock); clock 197 drivers/mmc/host/dw_mmc-k3.c dev_warn(host->dev, "failed to set rate %uHz\n", clock); clock 304 drivers/mmc/host/dw_mmc-k3.c if (!ios->clock || ios->clock == priv->cur_speed) clock 307 drivers/mmc/host/dw_mmc-k3.c wanted = ios->clock * (GENCLK_DIV + 1); clock 34 drivers/mmc/host/dw_mmc-rockchip.c if (ios->clock == 0) clock 48 drivers/mmc/host/dw_mmc-rockchip.c cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; clock 50 drivers/mmc/host/dw_mmc-rockchip.c cclkin = ios->clock * RK3288_CLKGEN_DIV; clock 54 drivers/mmc/host/dw_mmc-rockchip.c dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock); clock 1199 drivers/mmc/host/dw_mmc.c unsigned int clock = slot->clock; clock 1210 drivers/mmc/host/dw_mmc.c if (!clock) { clock 1213 drivers/mmc/host/dw_mmc.c } else if (clock != host->current_speed || force_clkinit) { clock 1214 drivers/mmc/host/dw_mmc.c div = host->bus_hz / clock; clock 1215 drivers/mmc/host/dw_mmc.c if (host->bus_hz % clock && host->bus_hz > clock) clock 1222 drivers/mmc/host/dw_mmc.c div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; clock 1224 drivers/mmc/host/dw_mmc.c if ((clock != slot->__clk_old && clock 1231 drivers/mmc/host/dw_mmc.c slot->id, host->bus_hz, clock, clock 1240 drivers/mmc/host/dw_mmc.c slot->mmc->f_min == clock) clock 1267 drivers/mmc/host/dw_mmc.c slot->__clk_old = clock; clock 1272 drivers/mmc/host/dw_mmc.c host->current_speed = clock; clock 1439 drivers/mmc/host/dw_mmc.c slot->clock = ios->clock; clock 1504 drivers/mmc/host/dw_mmc.c if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) clock 529 drivers/mmc/host/dw_mmc.h unsigned int clock; clock 876 drivers/mmc/host/jz4740_mmc.c if (ios->clock) clock 877 drivers/mmc/host/jz4740_mmc.c jz4740_mmc_set_clock_rate(host, ios->clock); clock 563 drivers/mmc/host/meson-gx-mmc.c return meson_mmc_clk_set(host, ios->clock, ddr); clock 259 drivers/mmc/host/meson-mx-sdio.c unsigned long clk_rate = ios->clock; clock 281 drivers/mmc/host/meson-mx-sdio.c host->error = clk_set_rate(host->cfg_div_clk, ios->clock); clock 1248 drivers/mmc/host/mmc_spi.c if (host->spi->max_speed_hz != ios->clock && ios->clock != 0) { clock 1251 drivers/mmc/host/mmc_spi.c host->spi->max_speed_hz = ios->clock; clock 1669 drivers/mmc/host/mmci.c if (!ios->clock && variant->pwrreg_clkgate) clock 1673 drivers/mmc/host/mmci.c ios->clock != host->clock_cache) { clock 1674 drivers/mmc/host/mmci.c ret = clk_set_rate(host->clk, ios->clock); clock 1681 drivers/mmc/host/mmci.c host->clock_cache = ios->clock; clock 1686 drivers/mmc/host/mmci.c host->ops->set_clkreg(host, ios->clock); clock 1688 drivers/mmc/host/mmci.c mmci_set_clkreg(host, ios->clock); clock 501 drivers/mmc/host/moxart-mmc.c if (ios->clock) { clock 503 drivers/mmc/host/moxart-mmc.c if (ios->clock >= host->sysclk / (2 * (div + 1))) clock 1697 drivers/mmc/host/mtk-sd.c if (host->mclk != ios->clock || host->timing != ios->timing) clock 1698 drivers/mmc/host/mtk-sd.c msdc_set_mclk(host, ios->timing, ios->clock); clock 45 drivers/mmc/host/mvsdio.c unsigned int clock; clock 607 drivers/mmc/host/mvsdio.c if (ios->clock == 0) { clock 610 drivers/mmc/host/mvsdio.c host->clock = 0; clock 612 drivers/mmc/host/mvsdio.c } else if (ios->clock != host->clock) { clock 613 drivers/mmc/host/mvsdio.c u32 m = DIV_ROUND_UP(host->base_clock, ios->clock) - 1; clock 617 drivers/mmc/host/mvsdio.c host->clock = ios->clock; clock 620 drivers/mmc/host/mvsdio.c ios->clock, host->base_clock / (m+1), m); clock 146 drivers/mmc/host/mxcmmc.c int clock; clock 537 drivers/mmc/host/mxcmmc.c mxcmci_set_clk_rate(host, host->clock); clock 878 drivers/mmc/host/mxcmmc.c if (ios->clock) { clock 879 drivers/mmc/host/mxcmmc.c mxcmci_set_clk_rate(host, ios->clock); clock 885 drivers/mmc/host/mxcmmc.c host->clock = ios->clock; clock 506 drivers/mmc/host/mxs-mmc.c if (ios->clock) clock 507 drivers/mmc/host/mxs-mmc.c mxs_ssp_set_clk_rate(&host->ssp, ios->clock); clock 1132 drivers/mmc/host/omap.c if (ios->clock == 0) clock 1135 drivers/mmc/host/omap.c dsor = func_clk_rate / ios->clock; clock 1139 drivers/mmc/host/omap.c if (func_clk_rate / dsor > ios->clock) clock 524 drivers/mmc/host/omap_hsmmc.c if (ios->clock) { clock 525 drivers/mmc/host/omap_hsmmc.c dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); clock 540 drivers/mmc/host/omap_hsmmc.c dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); clock 445 drivers/mmc/host/pxamci.c if (ios->clock) { clock 447 drivers/mmc/host/pxamci.c unsigned int clk = rate / ios->clock; clock 452 drivers/mmc/host/pxamci.c if (ios->clock == 26000000) { clock 465 drivers/mmc/host/pxamci.c if (rate / clk > ios->clock) clock 164 drivers/mmc/host/renesas_sdhi_core.c u32 clk = 0, clock; clock 175 drivers/mmc/host/renesas_sdhi_core.c clock = host->mmc->actual_clock / 512; clock 177 drivers/mmc/host/renesas_sdhi_core.c for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1) clock 178 drivers/mmc/host/renesas_sdhi_core.c clock <<= 1; clock 35 drivers/mmc/host/rtsx_pci_sdmmc.c unsigned int clock; clock 815 drivers/mmc/host/rtsx_pci_sdmmc.c rtsx_pci_switch_clock(pcr, host->clock, host->ssc_depth, clock 1076 drivers/mmc/host/rtsx_pci_sdmmc.c host->initial_mode = (ios->clock <= 1000000) ? true : false; clock 1078 drivers/mmc/host/rtsx_pci_sdmmc.c host->clock = ios->clock; clock 1079 drivers/mmc/host/rtsx_pci_sdmmc.c rtsx_pci_switch_clock(pcr, ios->clock, host->ssc_depth, clock 42 drivers/mmc/host/rtsx_usb_sdmmc.c unsigned int clock; clock 1142 drivers/mmc/host/rtsx_usb_sdmmc.c host->initial_mode = (ios->clock <= 1000000) ? true : false; clock 1143 drivers/mmc/host/rtsx_usb_sdmmc.c host->clock = ios->clock; clock 1145 drivers/mmc/host/rtsx_usb_sdmmc.c rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth, clock 1189 drivers/mmc/host/s3cmci.c if (host->real_rate <= ios->clock) clock 1200 drivers/mmc/host/s3cmci.c if (ios->clock == 0) clock 1246 drivers/mmc/host/s3cmci.c if (ios->clock) clock 1256 drivers/mmc/host/s3cmci.c host->real_rate/1000, ios->clock/1000); clock 1348 drivers/mmc/host/s3cmci.c mmc->ios.clock != 0) clock 23 drivers/mmc/host/sdhci-cns3xxx.c static void sdhci_cns3xxx_set_clock(struct sdhci_host *host, unsigned int clock) clock 34 drivers/mmc/host/sdhci-cns3xxx.c if (clock == 0) clock 37 drivers/mmc/host/sdhci-cns3xxx.c while (host->max_clk / div > clock) { clock 51 drivers/mmc/host/sdhci-cns3xxx.c clock, host->max_clk / div); clock 727 drivers/mmc/host/sdhci-esdhc-imx.c return pltfm_host->clock; clock 734 drivers/mmc/host/sdhci-esdhc-imx.c return pltfm_host->clock / 256 / 16; clock 738 drivers/mmc/host/sdhci-esdhc-imx.c unsigned int clock) clock 742 drivers/mmc/host/sdhci-esdhc-imx.c unsigned int host_clock = pltfm_host->clock; clock 754 drivers/mmc/host/sdhci-esdhc-imx.c if (clock == 0) { clock 783 drivers/mmc/host/sdhci-esdhc-imx.c clock = min(clock, max_clock); clock 786 drivers/mmc/host/sdhci-esdhc-imx.c while (host_clock / (16 * pre_div * ddr_pre_div) > clock && clock 790 drivers/mmc/host/sdhci-esdhc-imx.c while (host_clock / (div * pre_div * ddr_pre_div) > clock && div < 16) clock 795 drivers/mmc/host/sdhci-esdhc-imx.c clock, host->mmc->actual_clock); clock 1083 drivers/mmc/host/sdhci-esdhc-imx.c host->ops->set_clock(host, host->clock); clock 1479 drivers/mmc/host/sdhci-esdhc-imx.c pltfm_host->clock = clk_get_rate(pltfm_host->clk); clock 87 drivers/mmc/host/sdhci-iproc.c if (host->clock <= 400000) { clock 89 drivers/mmc/host/sdhci-iproc.c if (host->clock) clock 90 drivers/mmc/host/sdhci-iproc.c udelay((4 * 1000000 + host->clock - 1) / host->clock); clock 173 drivers/mmc/host/sdhci-iproc.c return pltfm_host->clock; clock 303 drivers/mmc/host/sdhci-msm.c unsigned int clock) clock 316 drivers/mmc/host/sdhci-msm.c clock *= 2; clock 317 drivers/mmc/host/sdhci-msm.c return clock; clock 321 drivers/mmc/host/sdhci-msm.c unsigned int clock) clock 329 drivers/mmc/host/sdhci-msm.c clock = msm_get_clock_rate_for_bus_mode(host, clock); clock 330 drivers/mmc/host/sdhci-msm.c rc = clk_set_rate(core_clk, clock); clock 333 drivers/mmc/host/sdhci-msm.c mmc_hostname(host->mmc), clock, clock 337 drivers/mmc/host/sdhci-msm.c msm_host->clk_rate = clock; clock 550 drivers/mmc/host/sdhci-msm.c if (host->clock <= 112000000) clock 552 drivers/mmc/host/sdhci-msm.c else if (host->clock <= 125000000) clock 554 drivers/mmc/host/sdhci-msm.c else if (host->clock <= 137000000) clock 556 drivers/mmc/host/sdhci-msm.c else if (host->clock <= 150000000) clock 558 drivers/mmc/host/sdhci-msm.c else if (host->clock <= 162000000) clock 560 drivers/mmc/host/sdhci-msm.c else if (host->clock <= 175000000) clock 562 drivers/mmc/host/sdhci-msm.c else if (host->clock <= 187000000) clock 564 drivers/mmc/host/sdhci-msm.c else if (host->clock <= 200000000) clock 634 drivers/mmc/host/sdhci-msm.c mclk_freq = DIV_ROUND_CLOSEST_ULL((host->clock * 8), clock 637 drivers/mmc/host/sdhci-msm.c mclk_freq = DIV_ROUND_CLOSEST_ULL((host->clock * 4), clock 1041 drivers/mmc/host/sdhci-msm.c if (host->clock <= CORE_FREQ_100MHZ || clock 1128 drivers/mmc/host/sdhci-msm.c msm_set_clock_rate_for_bus_mode(host, ios.clock); clock 1198 drivers/mmc/host/sdhci-msm.c if (host->clock > CORE_FREQ_100MHZ && clock 1251 drivers/mmc/host/sdhci-msm.c if (host->clock <= CORE_FREQ_100MHZ) { clock 1280 drivers/mmc/host/sdhci-msm.c mmc_hostname(host->mmc), host->clock, uhs, ctrl_2); clock 1533 drivers/mmc/host/sdhci-msm.c static void __sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) clock 1546 drivers/mmc/host/sdhci-msm.c if (clock == 0) clock 1559 drivers/mmc/host/sdhci-msm.c static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) clock 1564 drivers/mmc/host/sdhci-msm.c if (!clock) { clock 1565 drivers/mmc/host/sdhci-msm.c msm_host->clk_rate = clock; clock 1571 drivers/mmc/host/sdhci-msm.c msm_set_clock_rate_for_bus_mode(host, clock); clock 1573 drivers/mmc/host/sdhci-msm.c __sdhci_msm_set_clock(host, clock); clock 173 drivers/mmc/host/sdhci-of-arasan.c static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock) clock 180 drivers/mmc/host/sdhci-of-arasan.c if (!sdhci_arasan->is_phy_on && clock <= PHY_CLK_TOO_SLOW_HZ) { clock 203 drivers/mmc/host/sdhci-of-arasan.c } else if (clock > PHY_CLK_TOO_SLOW_HZ) { clock 218 drivers/mmc/host/sdhci-of-arasan.c sdhci_set_clock(host, clock); clock 53 drivers/mmc/host/sdhci-of-aspeed.c static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) clock 65 drivers/mmc/host/sdhci-of-aspeed.c if (clock == 0) clock 68 drivers/mmc/host/sdhci-of-aspeed.c if (WARN_ON(clock > host->max_clk)) clock 69 drivers/mmc/host/sdhci-of-aspeed.c clock = host->max_clk; clock 72 drivers/mmc/host/sdhci-of-aspeed.c if ((parent / div) <= clock) clock 49 drivers/mmc/host/sdhci-of-at91.c static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) clock 68 drivers/mmc/host/sdhci-of-at91.c if (clock == 0) clock 71 drivers/mmc/host/sdhci-of-at91.c clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); clock 547 drivers/mmc/host/sdhci-of-esdhc.c return pltfm_host->clock; clock 554 drivers/mmc/host/sdhci-of-esdhc.c unsigned int clock; clock 557 drivers/mmc/host/sdhci-of-esdhc.c clock = esdhc->peripheral_clock; clock 559 drivers/mmc/host/sdhci-of-esdhc.c clock = pltfm_host->clock; clock 560 drivers/mmc/host/sdhci-of-esdhc.c return clock / 256 / 16; clock 594 drivers/mmc/host/sdhci-of-esdhc.c static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock) clock 607 drivers/mmc/host/sdhci-of-esdhc.c if (clock == 0) { clock 622 drivers/mmc/host/sdhci-of-esdhc.c if (fixup && clock > fixup) clock 623 drivers/mmc/host/sdhci-of-esdhc.c clock = fixup; clock 630 drivers/mmc/host/sdhci-of-esdhc.c while (host->max_clk / pre_div / 16 > clock && pre_div < 256) clock 633 drivers/mmc/host/sdhci-of-esdhc.c while (host->max_clk / pre_div / div > clock && div < 16) clock 637 drivers/mmc/host/sdhci-of-esdhc.c clock == MMC_HS200_MAX_DTR && clock 657 drivers/mmc/host/sdhci-of-esdhc.c clock, host->max_clk / pre_div / div); clock 670 drivers/mmc/host/sdhci-of-esdhc.c clock == MMC_HS200_MAX_DTR) { clock 1001 drivers/mmc/host/sdhci-of-esdhc.c if (host->clock > clk) clock 1011 drivers/mmc/host/sdhci-of-esdhc.c esdhc_of_set_clock(host, host->clock); clock 298 drivers/mmc/host/sdhci-omap.c if (ios->clock <= 52000000) clock 626 drivers/mmc/host/sdhci-omap.c unsigned int clock) clock 630 drivers/mmc/host/sdhci-omap.c dsor = DIV_ROUND_UP(clk_get_rate(host->clk), clock); clock 655 drivers/mmc/host/sdhci-omap.c static void sdhci_omap_set_clock(struct sdhci_host *host, unsigned int clock) clock 663 drivers/mmc/host/sdhci-omap.c if (!clock) clock 666 drivers/mmc/host/sdhci-omap.c clkdiv = sdhci_omap_calc_divisor(pltfm_host, clock); clock 250 drivers/mmc/host/sdhci-pci-arasan.c if (arasan_host->chg_clk == host->mmc->ios.clock) clock 253 drivers/mmc/host/sdhci-pci-arasan.c arasan_host->chg_clk = host->mmc->ios.clock; clock 254 drivers/mmc/host/sdhci-pci-arasan.c if (host->mmc->ios.clock == 200000000) clock 256 drivers/mmc/host/sdhci-pci-arasan.c else if (host->mmc->ios.clock == 100000000) clock 258 drivers/mmc/host/sdhci-pci-arasan.c else if (host->mmc->ios.clock == 50000000) clock 311 drivers/mmc/host/sdhci-pci-arasan.c static void arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) clock 313 drivers/mmc/host/sdhci-pci-arasan.c sdhci_set_clock(host, clock); clock 31 drivers/mmc/host/sdhci-pci-dwc-mshc.c static void sdhci_snps_set_clock(struct sdhci_host *host, unsigned int clock) clock 43 drivers/mmc/host/sdhci-pci-dwc-mshc.c if (clock <= 52000000) { clock 44 drivers/mmc/host/sdhci-pci-dwc-mshc.c sdhci_set_clock(host, clock); clock 52 drivers/mmc/host/sdhci-pci-dwc-mshc.c if (clock == 100000000) { clock 497 drivers/mmc/host/sdhci-pci-o2micro.c void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock) clock 505 drivers/mmc/host/sdhci-pci-o2micro.c if (clock == 0) clock 508 drivers/mmc/host/sdhci-pci-o2micro.c clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); clock 105 drivers/mmc/host/sdhci-pltfm.c device_property_read_u32(dev, "clock-frequency", &pltfm_host->clock); clock 25 drivers/mmc/host/sdhci-pltfm.h unsigned int clock; clock 222 drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) clock 234 drivers/mmc/host/sdhci-s3c.c if (clock == 0) { clock 235 drivers/mmc/host/sdhci-s3c.c sdhci_set_clock(host, clock); clock 240 drivers/mmc/host/sdhci-s3c.c delta = sdhci_s3c_consider_clock(ourhost, src, clock); clock 249 drivers/mmc/host/sdhci-s3c.c best_src, clock, best); clock 286 drivers/mmc/host/sdhci-s3c.c if (clock < 25 * 1000000) clock 290 drivers/mmc/host/sdhci-s3c.c sdhci_set_clock(host, clock); clock 364 drivers/mmc/host/sdhci-s3c.c static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock) clock 375 drivers/mmc/host/sdhci-s3c.c if (clock == 0) { clock 380 drivers/mmc/host/sdhci-s3c.c sdhci_s3c_set_clock(host, clock); clock 387 drivers/mmc/host/sdhci-s3c.c ret = clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock); clock 390 drivers/mmc/host/sdhci-s3c.c mmc_hostname(host->mmc), clock); clock 260 drivers/mmc/host/sdhci-sprd.c static void sdhci_sprd_set_clock(struct sdhci_host *host, unsigned int clock) clock 264 drivers/mmc/host/sdhci-sprd.c if (clock == 0) { clock 266 drivers/mmc/host/sdhci-sprd.c } else if (clock != host->clock) { clock 268 drivers/mmc/host/sdhci-sprd.c _sdhci_sprd_set_clock(host, clock); clock 270 drivers/mmc/host/sdhci-sprd.c if (clock <= 400000) clock 276 drivers/mmc/host/sdhci-sprd.c _sdhci_sprd_set_clock(host, clock); clock 285 drivers/mmc/host/sdhci-sprd.c if (clk_changed && clock > SDHCI_SPRD_PHY_DLL_CLK) clock 248 drivers/mmc/host/sdhci-st.c if (host->clock > CLK_TO_CHECK_DLL_LOCK) { clock 727 drivers/mmc/host/sdhci-tegra.c static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) clock 733 drivers/mmc/host/sdhci-tegra.c if (!clock) clock 734 drivers/mmc/host/sdhci-tegra.c return sdhci_set_clock(host, clock); clock 748 drivers/mmc/host/sdhci-tegra.c host_clk = tegra_host->ddr_signaling ? clock * 2 : clock; clock 756 drivers/mmc/host/sdhci-tegra.c sdhci_set_clock(host, clock); clock 230 drivers/mmc/host/sdhci-xenon-phy.c u32 wait, clock; clock 255 drivers/mmc/host/sdhci-xenon-phy.c clock = host->clock; clock 256 drivers/mmc/host/sdhci-xenon-phy.c if (!clock) clock 258 drivers/mmc/host/sdhci-xenon-phy.c clock = XENON_LOWEST_SDCLK_FREQ; clock 260 drivers/mmc/host/sdhci-xenon-phy.c wait /= clock; clock 328 drivers/mmc/host/sdhci-xenon-phy.c if (WARN_ON(host->clock <= MMC_HIGH_52_MAX_DTR)) clock 384 drivers/mmc/host/sdhci-xenon-phy.c if (host->clock <= MMC_HIGH_52_MAX_DTR) clock 446 drivers/mmc/host/sdhci-xenon-phy.c if (host->clock <= MMC_HIGH_52_MAX_DTR) clock 499 drivers/mmc/host/sdhci-xenon-phy.c if (host->clock > MMC_HIGH_52_MAX_DTR) clock 739 drivers/mmc/host/sdhci-xenon-phy.c if (WARN_ON(host->clock <= XENON_DEFAULT_SDCLK_FREQ)) clock 782 drivers/mmc/host/sdhci-xenon-phy.c if (!host->clock) { clock 783 drivers/mmc/host/sdhci-xenon-phy.c priv->clock = 0; clock 792 drivers/mmc/host/sdhci-xenon-phy.c if ((host->clock == priv->clock) && clock 803 drivers/mmc/host/sdhci-xenon-phy.c priv->clock = host->clock; clock 809 drivers/mmc/host/sdhci-xenon-phy.c if (host->clock > XENON_DEFAULT_SDCLK_FREQ) clock 301 drivers/mmc/host/sdhci-xenon.c if (host->clock > XENON_DEFAULT_SDCLK_FREQ) clock 627 drivers/mmc/host/sdhci-xenon.c priv->clock = 0; clock 82 drivers/mmc/host/sdhci-xenon.h unsigned int clock; clock 205 drivers/mmc/host/sdhci.c host->clock = 0; clock 333 drivers/mmc/host/sdhci.c host->clock = 0; clock 853 drivers/mmc/host/sdhci.c if (host->clock && data->timeout_clks) { clock 862 drivers/mmc/host/sdhci.c if (do_div(val, host->clock)) clock 888 drivers/mmc/host/sdhci.c freq = host->mmc->actual_clock ? : host->clock; clock 1541 drivers/mmc/host/sdhci.c u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, clock 1575 drivers/mmc/host/sdhci.c <= clock) clock 1578 drivers/mmc/host/sdhci.c if ((host->max_clk * host->clk_mul / div) <= clock) { clock 1598 drivers/mmc/host/sdhci.c if (host->max_clk <= clock) clock 1603 drivers/mmc/host/sdhci.c if ((host->max_clk / div) <= clock) clock 1616 drivers/mmc/host/sdhci.c if ((host->max_clk / div) <= clock) clock 1686 drivers/mmc/host/sdhci.c void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) clock 1694 drivers/mmc/host/sdhci.c if (clock == 0) clock 1697 drivers/mmc/host/sdhci.c clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); clock 1919 drivers/mmc/host/sdhci.c if (!ios->clock || ios->clock != host->clock) { clock 1920 drivers/mmc/host/sdhci.c host->ops->set_clock(host, ios->clock); clock 1921 drivers/mmc/host/sdhci.c host->clock = ios->clock; clock 1924 drivers/mmc/host/sdhci.c host->clock) { clock 1927 drivers/mmc/host/sdhci.c host->clock / 1000; clock 2005 drivers/mmc/host/sdhci.c host->ops->set_clock(host, host->clock); clock 2032 drivers/mmc/host/sdhci.c host->ops->set_clock(host, host->clock); clock 2719 drivers/mmc/host/sdhci.c host->ops->set_clock(host, host->clock); clock 3303 drivers/mmc/host/sdhci.c host->clock = 0; clock 3365 drivers/mmc/host/sdhci.c host->clock = 0; clock 529 drivers/mmc/host/sdhci.h unsigned int clock; /* Current clock (MHz) */ clock 621 drivers/mmc/host/sdhci.h void (*set_clock)(struct sdhci_host *host, unsigned int clock); clock 758 drivers/mmc/host/sdhci.h u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, clock 760 drivers/mmc/host/sdhci.h void sdhci_set_clock(struct sdhci_host *host, unsigned int clock); clock 97 drivers/mmc/host/sdhci_am654.c static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock) clock 111 drivers/mmc/host/sdhci_am654.c sdhci_set_clock(host, clock); clock 113 drivers/mmc/host/sdhci_am654.c if (clock > CLOCK_TOO_SLOW_HZ) { clock 132 drivers/mmc/host/sdhci_am654.c switch (clock) { clock 152 drivers/mmc/host/sdhci_am654.c switch (clock) { clock 193 drivers/mmc/host/sdhci_am654.c unsigned int clock) clock 204 drivers/mmc/host/sdhci_am654.c sdhci_set_clock(host, clock); clock 1062 drivers/mmc/host/sh_mmcif.c sh_mmcif_clock_control(host, ios->clock); clock 760 drivers/mmc/host/sunxi-mmc.c u32 rval, clock = ios->clock, div = 1; clock 770 drivers/mmc/host/sunxi-mmc.c if (!ios->clock) clock 786 drivers/mmc/host/sunxi-mmc.c clock <<= 1; clock 798 drivers/mmc/host/sunxi-mmc.c rate = clk_round_rate(host->clk_mmc, clock); clock 801 drivers/mmc/host/sunxi-mmc.c clock, rate); clock 805 drivers/mmc/host/sunxi-mmc.c clock, rate); clock 805 drivers/mmc/host/tifm_sd.c ios->clock, ios->vdd, ios->bus_mode, ios->chip_select, clock 817 drivers/mmc/host/tifm_sd.c if (ios->clock) { clock 818 drivers/mmc/host/tifm_sd.c clk_div1 = 20000000 / ios->clock; clock 822 drivers/mmc/host/tifm_sd.c clk_div2 = 24000000 / ios->clock; clock 826 drivers/mmc/host/tifm_sd.c if ((20000000 / clk_div1) > ios->clock) clock 828 drivers/mmc/host/tifm_sd.c if ((24000000 / clk_div2) > ios->clock) clock 171 drivers/mmc/host/tmio_mmc.h void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock); clock 948 drivers/mmc/host/tmio_mmc_core.c ios->clock, ios->power_mode); clock 974 drivers/mmc/host/tmio_mmc_core.c host->set_clock(host, ios->clock); clock 978 drivers/mmc/host/tmio_mmc_core.c host->set_clock(host, ios->clock); clock 989 drivers/mmc/host/tmio_mmc_core.c ios->clock, ios->power_mode); clock 992 drivers/mmc/host/tmio_mmc_core.c host->clk_cache = ios->clock; clock 82 drivers/mmc/host/toshsd.c if (ios->clock) { clock 86 drivers/mmc/host/toshsd.c while (ios->clock < HCLK / div) clock 426 drivers/mmc/host/uniphier-sd.c unsigned int clock) clock 438 drivers/mmc/host/uniphier-sd.c if (clock == 0) clock 445 drivers/mmc/host/uniphier-sd.c divisor = priv->clk_rate / clock; clock 724 drivers/mmc/host/usdhi6rol0.c unsigned long rate = ios->clock; clock 820 drivers/mmc/host/usdhi6rol0.c ios->clock, ios->vdd, ios->power_mode, ios->bus_width, ios->timing); clock 862 drivers/mmc/host/usdhi6rol0.c if (host->rate != ios->clock) clock 377 drivers/mmc/host/ushc.c ushc_set_bus_freq(ushc, ios->clock, ios->timing == MMC_TIMING_SD_HS); clock 720 drivers/mmc/host/via-sdmmc.c u8 clock; clock 748 drivers/mmc/host/via-sdmmc.c if (ios->clock >= 48000000) clock 749 drivers/mmc/host/via-sdmmc.c clock = PCI_CLK_48M; clock 750 drivers/mmc/host/via-sdmmc.c else if (ios->clock >= 33000000) clock 751 drivers/mmc/host/via-sdmmc.c clock = PCI_CLK_33M; clock 752 drivers/mmc/host/via-sdmmc.c else if (ios->clock >= 24000000) clock 753 drivers/mmc/host/via-sdmmc.c clock = PCI_CLK_24M; clock 754 drivers/mmc/host/via-sdmmc.c else if (ios->clock >= 16000000) clock 755 drivers/mmc/host/via-sdmmc.c clock = PCI_CLK_16M; clock 756 drivers/mmc/host/via-sdmmc.c else if (ios->clock >= 12000000) clock 757 drivers/mmc/host/via-sdmmc.c clock = PCI_CLK_12M; clock 758 drivers/mmc/host/via-sdmmc.c else if (ios->clock >= 8000000) clock 759 drivers/mmc/host/via-sdmmc.c clock = PCI_CLK_8M; clock 761 drivers/mmc/host/via-sdmmc.c clock = PCI_CLK_375K; clock 764 drivers/mmc/host/via-sdmmc.c if (readb(addrbase + VIA_CRDR_PCISDCCLK) != clock) clock 765 drivers/mmc/host/via-sdmmc.c writeb(clock, addrbase + VIA_CRDR_PCISDCCLK); clock 1970 drivers/mmc/host/vub300.c if (ios->clock >= 48000000) clock 1972 drivers/mmc/host/vub300.c else if (ios->clock >= 24000000) clock 1974 drivers/mmc/host/vub300.c else if (ios->clock >= 20000000) clock 1976 drivers/mmc/host/vub300.c else if (ios->clock >= 15000000) clock 1978 drivers/mmc/host/vub300.c else if (ios->clock >= 200000) clock 849 drivers/mmc/host/wbsd.c if (ios->clock >= 24000000) clock 851 drivers/mmc/host/wbsd.c else if (ios->clock >= 16000000) clock 853 drivers/mmc/host/wbsd.c else if (ios->clock >= 12000000) clock 685 drivers/mmc/host/wmt-sdmmc.c if (ios->clock != 0) clock 686 drivers/mmc/host/wmt-sdmmc.c clk_set_rate(priv->clk_sdmmc, ios->clock); clock 38 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c static inline u8 bcm47xxnflash_ops_bcm4706_ns_to_cycle(u16 ns, u16 clock) clock 40 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c return ((ns * 1000 * clock) / 1000000) + 1; clock 375 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c u16 clock; clock 410 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c clock = freq / 1000000; clock 411 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c w0 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(15, clock); clock 412 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c w1 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(20, clock); clock 413 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c w2 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(10, clock); clock 414 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c w3 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(10, clock); clock 415 drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c w4 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(100, clock); clock 126 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c clk = this->resources.clock[i]; clock 142 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c clk_disable_unprepare(this->resources.clock[i - 1]); clock 716 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c clk_set_rate(r->clock[0], hw->clk_rate); clock 1180 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c r->clock[i] = clk; clock 1190 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c clk_set_rate(r->clock[0], 22000000); clock 22 drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h struct clk *clock[GPMI_CLK_MAX]; clock 1323 drivers/net/can/at91_can.c priv->can.clock.freq = clk_get_rate(clk); clock 171 drivers/net/can/c_can/c_can_pci.c priv->can.clock.freq = c_can_pci_data->freq; clock 381 drivers/net/can/c_can/c_can_platform.c priv->can.clock.freq = clk_get_rate(clk); clock 226 drivers/net/can/cc770/cc770_isa.c priv->can.clock.freq = clktmp; clock 244 drivers/net/can/cc770/cc770_isa.c priv->can.clock.freq /= 2; clock 84 drivers/net/can/cc770/cc770_platform.c priv->can.clock.freq = clkext; clock 87 drivers/net/can/cc770/cc770_platform.c if (priv->can.clock.freq > 10000000) { clock 89 drivers/net/can/cc770/cc770_platform.c priv->can.clock.freq /= 2; clock 93 drivers/net/can/cc770/cc770_platform.c if (priv->can.clock.freq > 8000000) clock 149 drivers/net/can/cc770/cc770_platform.c priv->can.clock.freq = pdata->osc_freq; clock 151 drivers/net/can/cc770/cc770_platform.c priv->can.clock.freq /= 2; clock 208 drivers/net/can/cc770/cc770_platform.c priv->reg_base, dev->irq, priv->can.clock.freq, clock 151 drivers/net/can/dev.c brp = priv->clock.freq / (tsegall * bt->bitrate) + tseg % 2; clock 158 drivers/net/can/dev.c bitrate = priv->clock.freq / (brp * tsegall); clock 204 drivers/net/can/dev.c do_div(v64, priv->clock.freq); clock 225 drivers/net/can/dev.c bt->bitrate = priv->clock.freq / clock 259 drivers/net/can/dev.c brp64 = (u64)priv->clock.freq * (u64)bt->tq; clock 272 drivers/net/can/dev.c bt->bitrate = priv->clock.freq / (bt->brp * alltseg); clock 1143 drivers/net/can/dev.c nla_put(skb, IFLA_CAN_CLOCK, sizeof(priv->clock), &priv->clock) || clock 1615 drivers/net/can/flexcan.c priv->can.clock.freq = clock_freq; clock 1608 drivers/net/can/grcan.c priv->can.clock.freq = ambafreq; clock 1633 drivers/net/can/grcan.c priv->regs, dev->irq, priv->can.clock.freq); clock 985 drivers/net/can/ifi_canfd/ifi_canfd.c priv->can.clock.freq = readl(addr + IFI_CANFD_CANCLOCK); clock 1014 drivers/net/can/ifi_canfd/ifi_canfd.c priv->base, ndev->irq, priv->can.clock.freq); clock 1928 drivers/net/can/janz-ican3.c mod->can.clock.freq = ICAN3_CAN_CLOCK; clock 961 drivers/net/can/kvaser_pciefd.c can->can.clock.freq = pcie->freq; clock 1049 drivers/net/can/m_can/m_can.c tdco = (cdev->can.clock.freq / 1000) * clock 103 drivers/net/can/m_can/m_can_platform.c mcan_class->can.clock.freq = clk_get_rate(mcan_class->cclk); clock 448 drivers/net/can/m_can/tcan4x5x.c mcan_class->can.clock.freq = freq; clock 324 drivers/net/can/mscan/mpc5xxx_can.c priv->can.clock.freq = data->get_clock(ofdev, clock_name, clock 326 drivers/net/can/mscan/mpc5xxx_can.c if (!priv->can.clock.freq) { clock 339 drivers/net/can/mscan/mpc5xxx_can.c priv->reg_base, dev->irq, priv->can.clock.freq); clock 1219 drivers/net/can/pch_can.c priv->can.clock.freq = PCH_CAN_CLK; /* Hz */ clock 645 drivers/net/can/peak_canfd/peak_pciefd_main.c priv->ucan.can.clock.freq = 20 * 1000 * 1000; clock 648 drivers/net/can/peak_canfd/peak_pciefd_main.c priv->ucan.can.clock.freq = 24 * 1000 * 1000; clock 651 drivers/net/can/peak_canfd/peak_pciefd_main.c priv->ucan.can.clock.freq = 30 * 1000 * 1000; clock 654 drivers/net/can/peak_canfd/peak_pciefd_main.c priv->ucan.can.clock.freq = 40 * 1000 * 1000; clock 657 drivers/net/can/peak_canfd/peak_pciefd_main.c priv->ucan.can.clock.freq = 60 * 1000 * 1000; clock 665 drivers/net/can/peak_canfd/peak_pciefd_main.c priv->ucan.can.clock.freq = 80 * 1000 * 1000; clock 804 drivers/net/can/rcar/rcar_can.c priv->can.clock.freq = clk_get_rate(priv->can_clk); clock 1577 drivers/net/can/rcar/rcar_canfd.c priv->can.clock.freq = fcan_freq; clock 1578 drivers/net/can/rcar/rcar_canfd.c dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq); clock 310 drivers/net/can/sja1000/ems_pci.c priv->can.clock.freq = EMS_PCI_CAN_CLOCK; clock 217 drivers/net/can/sja1000/ems_pcmcia.c priv->can.clock.freq = EMS_PCMCIA_CAN_CLOCK; clock 165 drivers/net/can/sja1000/f81601.c priv->can.clock.freq = 24000000 / 2; clock 167 drivers/net/can/sja1000/f81601.c priv->can.clock.freq = external_clk / 2; clock 247 drivers/net/can/sja1000/kvaser_pci.c priv->can.clock.freq = KVASER_PCI_CAN_CLOCK; clock 626 drivers/net/can/sja1000/peak_pci.c priv->can.clock.freq = PEAK_PCI_CAN_CLOCK; clock 560 drivers/net/can/sja1000/peak_pcmcia.c priv->can.clock.freq = PCC_CAN_CLOCK; clock 702 drivers/net/can/sja1000/plx_pci.c priv->can.clock.freq = ci->can_clock; clock 177 drivers/net/can/sja1000/sja1000_isa.c priv->can.clock.freq = clk[idx] / 2; clock 179 drivers/net/can/sja1000/sja1000_isa.c priv->can.clock.freq = clk[0] / 2; clock 181 drivers/net/can/sja1000/sja1000_isa.c priv->can.clock.freq = CLK_DEFAULT / 2; clock 114 drivers/net/can/sja1000/sja1000_platform.c priv->can.clock.freq = pdata->osc_freq / 2; clock 161 drivers/net/can/sja1000/sja1000_platform.c priv->can.clock.freq = prop / 2; clock 163 drivers/net/can/sja1000/sja1000_platform.c priv->can.clock.freq = SP_CAN_CLOCK; /* default */ clock 179 drivers/net/can/sja1000/sja1000_platform.c u32 divider = priv->can.clock.freq * 2 / prop; clock 127 drivers/net/can/sja1000/tscan1.c priv->can.clock.freq = TSCAN1_SJA1000_XTAL / 2; clock 644 drivers/net/can/softing/softing_main.c priv->can.clock.freq = 8000000; clock 867 drivers/net/can/spi/hi311x.c priv->can.clock.freq = freq / 2; clock 1022 drivers/net/can/spi/mcp251x.c priv->can.clock.freq = freq / 2; clock 814 drivers/net/can/sun4i_can.c priv->can.clock.freq = clk_get_rate(clk); clock 934 drivers/net/can/ti_hecc.c priv->can.clock.freq = clk_get_rate(priv->clk); clock 979 drivers/net/can/usb/ems_usb.c dev->can.clock.freq = EMS_USB_ARM7_CLOCK; clock 995 drivers/net/can/usb/esd_usb2.c priv->can.clock.freq = ESD_USBM_CAN_CLOCK; clock 997 drivers/net/can/usb/esd_usb2.c priv->can.clock.freq = ESD_USB2_CAN_CLOCK; clock 857 drivers/net/can/usb/gs_usb.c dev->can.clock.freq = bt_const->fclk_can; clock 170 drivers/net/can/usb/kvaser_usb/kvaser_usb.h const struct can_clock clock; clock 668 drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c priv->can.clock.freq = dev->cfg->clock.freq; clock 2014 drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c .clock = { clock 2023 drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c .clock = { clock 1353 drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c .clock = { clock 877 drivers/net/can/usb/peak_usb/pcan_usb.c .clock = { clock 768 drivers/net/can/usb/peak_usb/pcan_usb_core.c dev->can.clock = peak_usb_adapter->clock; clock 44 drivers/net/can/usb/peak_usb/pcan_usb_core.h struct can_clock clock; clock 912 drivers/net/can/usb/peak_usb/pcan_usb_fd.c if (dev->adapter->clock.freq == pcan_usb_fd_clk_freq[i]) clock 1014 drivers/net/can/usb/peak_usb/pcan_usb_fd.c .clock = { clock 1086 drivers/net/can/usb/peak_usb/pcan_usb_fd.c .clock = { clock 1158 drivers/net/can/usb/peak_usb/pcan_usb_fd.c .clock = { clock 1230 drivers/net/can/usb/peak_usb/pcan_usb_fd.c .clock = { clock 1015 drivers/net/can/usb/peak_usb/pcan_usb_pro.c .clock = { clock 452 drivers/net/can/usb/ucan.c up->can.clock.freq = le32_to_cpu(device_info->freq); clock 925 drivers/net/can/usb/usb_8dev.c priv->can.clock.freq = USB_8DEV_ABP_CLOCK; clock 1794 drivers/net/can/xilinx_can.c priv->can.clock.freq = clk_get_rate(priv->can_clk); clock 1814 drivers/net/can/xilinx_can.c priv->reg_base, ndev->irq, priv->can.clock.freq, clock 95 drivers/net/dsa/sja1105/sja1105.h struct ptp_clock *clock; clock 67 drivers/net/dsa/sja1105/sja1105_ptp.c if (!priv->clock) clock 77 drivers/net/dsa/sja1105/sja1105_ptp.c info->phc_index = ptp_clock_index(priv->clock); clock 374 drivers/net/dsa/sja1105/sja1105_ptp.c priv->clock = ptp_clock_register(&priv->ptp_caps, ds->dev); clock 375 drivers/net/dsa/sja1105/sja1105_ptp.c if (IS_ERR_OR_NULL(priv->clock)) clock 376 drivers/net/dsa/sja1105/sja1105_ptp.c return PTR_ERR(priv->clock); clock 386 drivers/net/dsa/sja1105/sja1105_ptp.c if (IS_ERR_OR_NULL(priv->clock)) clock 390 drivers/net/dsa/sja1105/sja1105_ptp.c ptp_clock_unregister(priv->clock); clock 391 drivers/net/dsa/sja1105/sja1105_ptp.c priv->clock = NULL; clock 230 drivers/net/ethernet/amd/xgbe/xgbe-ptp.c struct ptp_clock *clock; clock 244 drivers/net/ethernet/amd/xgbe/xgbe-ptp.c clock = ptp_clock_register(info, pdata->dev); clock 245 drivers/net/ethernet/amd/xgbe/xgbe-ptp.c if (IS_ERR(clock)) { clock 250 drivers/net/ethernet/amd/xgbe/xgbe-ptp.c pdata->ptp_clock = clock; clock 92 drivers/net/ethernet/cavium/common/cavium_ptp.c struct cavium_ptp *clock = clock 119 drivers/net/ethernet/cavium/common/cavium_ptp.c comp = ((u64)1000000000ull << 32) / clock->clock_rate; clock 125 drivers/net/ethernet/cavium/common/cavium_ptp.c spin_lock_irqsave(&clock->spin_lock, flags); clock 126 drivers/net/ethernet/cavium/common/cavium_ptp.c writeq(comp, clock->reg_base + PTP_CLOCK_COMP); clock 127 drivers/net/ethernet/cavium/common/cavium_ptp.c spin_unlock_irqrestore(&clock->spin_lock, flags); clock 139 drivers/net/ethernet/cavium/common/cavium_ptp.c struct cavium_ptp *clock = clock 143 drivers/net/ethernet/cavium/common/cavium_ptp.c spin_lock_irqsave(&clock->spin_lock, flags); clock 144 drivers/net/ethernet/cavium/common/cavium_ptp.c timecounter_adjtime(&clock->time_counter, delta); clock 145 drivers/net/ethernet/cavium/common/cavium_ptp.c spin_unlock_irqrestore(&clock->spin_lock, flags); clock 161 drivers/net/ethernet/cavium/common/cavium_ptp.c struct cavium_ptp *clock = clock 166 drivers/net/ethernet/cavium/common/cavium_ptp.c spin_lock_irqsave(&clock->spin_lock, flags); clock 167 drivers/net/ethernet/cavium/common/cavium_ptp.c nsec = timecounter_read(&clock->time_counter); clock 168 drivers/net/ethernet/cavium/common/cavium_ptp.c spin_unlock_irqrestore(&clock->spin_lock, flags); clock 183 drivers/net/ethernet/cavium/common/cavium_ptp.c struct cavium_ptp *clock = clock 190 drivers/net/ethernet/cavium/common/cavium_ptp.c spin_lock_irqsave(&clock->spin_lock, flags); clock 191 drivers/net/ethernet/cavium/common/cavium_ptp.c timecounter_init(&clock->time_counter, &clock->cycle_counter, nsec); clock 192 drivers/net/ethernet/cavium/common/cavium_ptp.c spin_unlock_irqrestore(&clock->spin_lock, flags); clock 211 drivers/net/ethernet/cavium/common/cavium_ptp.c struct cavium_ptp *clock = clock 214 drivers/net/ethernet/cavium/common/cavium_ptp.c return readq(clock->reg_base + PTP_CLOCK_HI); clock 221 drivers/net/ethernet/cavium/common/cavium_ptp.c struct cavium_ptp *clock; clock 227 drivers/net/ethernet/cavium/common/cavium_ptp.c clock = devm_kzalloc(dev, sizeof(*clock), GFP_KERNEL); clock 228 drivers/net/ethernet/cavium/common/cavium_ptp.c if (!clock) { clock 233 drivers/net/ethernet/cavium/common/cavium_ptp.c clock->pdev = pdev; clock 243 drivers/net/ethernet/cavium/common/cavium_ptp.c clock->reg_base = pcim_iomap_table(pdev)[PCI_PTP_BAR_NO]; clock 245 drivers/net/ethernet/cavium/common/cavium_ptp.c spin_lock_init(&clock->spin_lock); clock 247 drivers/net/ethernet/cavium/common/cavium_ptp.c cc = &clock->cycle_counter; clock 253 drivers/net/ethernet/cavium/common/cavium_ptp.c timecounter_init(&clock->time_counter, &clock->cycle_counter, clock 256 drivers/net/ethernet/cavium/common/cavium_ptp.c clock->clock_rate = ptp_cavium_clock_get(); clock 258 drivers/net/ethernet/cavium/common/cavium_ptp.c clock->ptp_info = (struct ptp_clock_info) { clock 272 drivers/net/ethernet/cavium/common/cavium_ptp.c clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); clock 274 drivers/net/ethernet/cavium/common/cavium_ptp.c writeq(clock_cfg, clock->reg_base + PTP_CLOCK_CFG); clock 276 drivers/net/ethernet/cavium/common/cavium_ptp.c clock_comp = ((u64)1000000000ull << 32) / clock->clock_rate; clock 277 drivers/net/ethernet/cavium/common/cavium_ptp.c writeq(clock_comp, clock->reg_base + PTP_CLOCK_COMP); clock 279 drivers/net/ethernet/cavium/common/cavium_ptp.c clock->ptp_clock = ptp_clock_register(&clock->ptp_info, dev); clock 280 drivers/net/ethernet/cavium/common/cavium_ptp.c if (IS_ERR(clock->ptp_clock)) { clock 281 drivers/net/ethernet/cavium/common/cavium_ptp.c err = PTR_ERR(clock->ptp_clock); clock 285 drivers/net/ethernet/cavium/common/cavium_ptp.c pci_set_drvdata(pdev, clock); clock 289 drivers/net/ethernet/cavium/common/cavium_ptp.c clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); clock 291 drivers/net/ethernet/cavium/common/cavium_ptp.c writeq(clock_cfg, clock->reg_base + PTP_CLOCK_CFG); clock 295 drivers/net/ethernet/cavium/common/cavium_ptp.c devm_kfree(dev, clock); clock 310 drivers/net/ethernet/cavium/common/cavium_ptp.c struct cavium_ptp *clock = pci_get_drvdata(pdev); clock 313 drivers/net/ethernet/cavium/common/cavium_ptp.c if (IS_ERR_OR_NULL(clock)) clock 316 drivers/net/ethernet/cavium/common/cavium_ptp.c ptp_clock_unregister(clock->ptp_clock); clock 318 drivers/net/ethernet/cavium/common/cavium_ptp.c clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); clock 320 drivers/net/ethernet/cavium/common/cavium_ptp.c writeq(clock_cfg, clock->reg_base + PTP_CLOCK_CFG); clock 44 drivers/net/ethernet/cavium/common/cavium_ptp.h static inline int cavium_ptp_clock_index(struct cavium_ptp *clock) clock 46 drivers/net/ethernet/cavium/common/cavium_ptp.h return ptp_clock_index(clock->ptp_clock); clock 63 drivers/net/ethernet/cavium/common/cavium_ptp.h static inline int cavium_ptp_clock_index(struct cavium_ptp *clock) clock 96 drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.c ptp_clock_event(ptp_qoriq->clock, &event); clock 106 drivers/net/ethernet/freescale/fs_enet/mii-fec.c int ret = -ENOMEM, clock, speed; clock 139 drivers/net/ethernet/freescale/fs_enet/mii-fec.c clock = get_bus_freq(ofdev->dev.of_node); clock 140 drivers/net/ethernet/freescale/fs_enet/mii-fec.c if (!clock) { clock 143 drivers/net/ethernet/freescale/fs_enet/mii-fec.c clock = 0x3F * 5000000; clock 146 drivers/net/ethernet/freescale/fs_enet/mii-fec.c clock = ppc_proc_freq; clock 152 drivers/net/ethernet/freescale/fs_enet/mii-fec.c speed = (clock + 4999999) / 5000000; clock 157 drivers/net/ethernet/freescale/fs_enet/mii-fec.c clock / speed); clock 70 drivers/net/ethernet/mellanox/mlx4/en_clock.c nsec = timecounter_cyc2time(&mdev->clock, timestamp); clock 107 drivers/net/ethernet/mellanox/mlx4/en_clock.c timecounter_read(&mdev->clock); clock 140 drivers/net/ethernet/mellanox/mlx4/en_clock.c timecounter_read(&mdev->clock); clock 161 drivers/net/ethernet/mellanox/mlx4/en_clock.c timecounter_adjtime(&mdev->clock, delta); clock 184 drivers/net/ethernet/mellanox/mlx4/en_clock.c ns = timecounter_read(&mdev->clock); clock 210 drivers/net/ethernet/mellanox/mlx4/en_clock.c timecounter_init(&mdev->clock, &mdev->cycles, ns); clock 286 drivers/net/ethernet/mellanox/mlx4/en_clock.c timecounter_init(&mdev->clock, &mdev->cycles, clock 434 drivers/net/ethernet/mellanox/mlx4/mlx4_en.h struct timecounter clock; clock 417 drivers/net/ethernet/mellanox/mlx5/core/en.h struct mlx5_clock *clock; clock 666 drivers/net/ethernet/mellanox/mlx5/core/en.h struct mlx5_clock *clock; clock 397 drivers/net/ethernet/mellanox/mlx5/core/en_main.c rq->clock = &mdev->clock; clock 1144 drivers/net/ethernet/mellanox/mlx5/core/en_main.c sq->clock = &mdev->clock; clock 1004 drivers/net/ethernet/mellanox/mlx5/core/en_rx.c mlx5_timecounter_cyc2time(rq->clock, get_cqe_ts(cqe)); clock 1493 drivers/net/ethernet/mellanox/mlx5/core/en_rx.c mlx5_timecounter_cyc2time(rq->clock, get_cqe_ts(cqe)); clock 495 drivers/net/ethernet/mellanox/mlx5/core/en_tx.c mlx5_timecounter_cyc2time(sq->clock, clock 71 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = container_of(cc, struct mlx5_clock, cycles); clock 72 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev, clock 73 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock); clock 81 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = &mdev->clock; clock 91 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock_info->cycles = clock->tc.cycle_last; clock 92 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock_info->mult = clock->cycles.mult; clock 93 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock_info->nsec = clock->tc.nsec; clock 94 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock_info->frac = clock->tc.frac; clock 104 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = container_of(pps_info, struct mlx5_clock, clock 106 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev, clock 107 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock); clock 112 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c for (i = 0; i < clock->ptp_info.n_pins; i++) { clock 115 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_seqlock_irqsave(&clock->lock, flags); clock 116 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c tstart = clock->pps_info.start[i]; clock 117 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.start[i] = 0; clock 118 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_sequnlock_irqrestore(&clock->lock, flags); clock 132 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = container_of(dwork, struct mlx5_clock, clock 136 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_seqlock_irqsave(&clock->lock, flags); clock 137 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c timecounter_read(&clock->tc); clock 138 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mlx5_update_clock_info_page(clock->mdev); clock 139 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_sequnlock_irqrestore(&clock->lock, flags); clock 140 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c schedule_delayed_work(&clock->overflow_work, clock->overflow_period); clock 146 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, clock 151 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_seqlock_irqsave(&clock->lock, flags); clock 152 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c timecounter_init(&clock->tc, &clock->cycles, ns); clock 153 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mlx5_update_clock_info_page(clock->mdev); clock 154 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_sequnlock_irqrestore(&clock->lock, flags); clock 162 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, clock 164 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev, clock 165 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock); clock 169 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_seqlock_irqsave(&clock->lock, flags); clock 171 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c ns = timecounter_cyc2time(&clock->tc, cycles); clock 172 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_sequnlock_irqrestore(&clock->lock, flags); clock 181 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, clock 185 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_seqlock_irqsave(&clock->lock, flags); clock 186 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c timecounter_adjtime(&clock->tc, delta); clock 187 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mlx5_update_clock_info_page(clock->mdev); clock 188 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_sequnlock_irqrestore(&clock->lock, flags); clock 199 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, clock 207 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c adj = clock->nominal_c_mult; clock 211 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_seqlock_irqsave(&clock->lock, flags); clock 212 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c timecounter_read(&clock->tc); clock 213 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.mult = neg_adj ? clock->nominal_c_mult - diff : clock 214 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->nominal_c_mult + diff; clock 215 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mlx5_update_clock_info_page(clock->mdev); clock 216 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_sequnlock_irqrestore(&clock->lock, flags); clock 225 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = clock 228 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c container_of(clock, struct mlx5_core_dev, clock); clock 252 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c if (rq->extts.index >= clock->ptp_info.n_pins) clock 256 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c pin = ptp_find_pin(clock->ptp, PTP_PF_EXTTS, rq->extts.index); clock 287 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = clock 290 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c container_of(clock, struct mlx5_core_dev, clock); clock 310 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c if (rq->perout.index >= clock->ptp_info.n_pins) clock 314 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c pin = ptp_find_pin(clock->ptp, PTP_PF_PEROUT, clock 332 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_seqlock_irqsave(&clock->lock, flags); clock 333 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c nsec_now = timecounter_cyc2time(&clock->tc, cycles_now); clock 335 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c cycles_delta = div64_u64(nsec_delta << clock->cycles.shift, clock 336 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.mult); clock 337 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_sequnlock_irqrestore(&clock->lock, flags); clock 367 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = clock 370 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.enabled = !!on; clock 414 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c static int mlx5_init_pin_config(struct mlx5_clock *clock) clock 418 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.pin_config = clock 419 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c kcalloc(clock->ptp_info.n_pins, clock 420 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c sizeof(*clock->ptp_info.pin_config), clock 422 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c if (!clock->ptp_info.pin_config) clock 424 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.enable = mlx5_ptp_enable; clock 425 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.verify = mlx5_ptp_verify; clock 426 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.pps = 1; clock 428 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c for (i = 0; i < clock->ptp_info.n_pins; i++) { clock 429 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c snprintf(clock->ptp_info.pin_config[i].name, clock 430 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c sizeof(clock->ptp_info.pin_config[i].name), clock 432 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.pin_config[i].index = i; clock 433 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.pin_config[i].func = PTP_PF_NONE; clock 434 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.pin_config[i].chan = i; clock 442 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = &mdev->clock; clock 447 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.n_pins = MLX5_GET(mtpps_reg, out, clock 449 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.n_ext_ts = MLX5_GET(mtpps_reg, out, clock 451 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.n_per_out = MLX5_GET(mtpps_reg, out, clock 454 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.pin_caps[0] = MLX5_GET(mtpps_reg, out, cap_pin_0_mode); clock 455 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.pin_caps[1] = MLX5_GET(mtpps_reg, out, cap_pin_1_mode); clock 456 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.pin_caps[2] = MLX5_GET(mtpps_reg, out, cap_pin_2_mode); clock 457 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.pin_caps[3] = MLX5_GET(mtpps_reg, out, cap_pin_3_mode); clock 458 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.pin_caps[4] = MLX5_GET(mtpps_reg, out, cap_pin_4_mode); clock 459 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.pin_caps[5] = MLX5_GET(mtpps_reg, out, cap_pin_5_mode); clock 460 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.pin_caps[6] = MLX5_GET(mtpps_reg, out, cap_pin_6_mode); clock 461 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.pin_caps[7] = MLX5_GET(mtpps_reg, out, cap_pin_7_mode); clock 467 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = mlx5_nb_cof(nb, struct mlx5_clock, pps_nb); clock 468 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_core_dev *mdev = clock->mdev; clock 477 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c switch (clock->ptp_info.pin_config[pin].func) { clock 480 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c ptp_event.timestamp = timecounter_cyc2time(&clock->tc, clock 482 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c if (clock->pps_info.enabled) { clock 490 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c ptp_clock_event(clock->ptp, &ptp_event); clock 493 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mlx5_ptp_gettimex(&clock->ptp_info, &ts, NULL); clock 498 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_seqlock_irqsave(&clock->lock, flags); clock 499 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c nsec_now = timecounter_cyc2time(&clock->tc, cycles_now); clock 501 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c cycles_delta = div64_u64(nsec_delta << clock->cycles.shift, clock 502 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.mult); clock 503 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->pps_info.start[pin] = cycles_now + cycles_delta; clock 504 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c schedule_work(&clock->pps_info.out_work); clock 505 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c write_sequnlock_irqrestore(&clock->lock, flags); clock 509 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info.pin_config[pin].func); clock 517 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = &mdev->clock; clock 528 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c seqlock_init(&clock->lock); clock 529 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.read = read_internal_timer; clock 530 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.shift = MLX5_CYCLES_SHIFT; clock 531 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.mult = clocksource_khz2mult(dev_freq, clock 532 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.shift); clock 533 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->nominal_c_mult = clock->cycles.mult; clock 534 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->cycles.mask = CLOCKSOURCE_MASK(41); clock 535 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->mdev = mdev; clock 537 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c timecounter_init(&clock->tc, &clock->cycles, clock 547 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c overflow_cycles = div64_u64(~0ULL >> 1, clock->cycles.mult); clock 548 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c overflow_cycles = min(overflow_cycles, div_u64(clock->cycles.mask, 3)); clock 550 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c ns = cyclecounter_cyc2ns(&clock->cycles, overflow_cycles, clock 553 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->overflow_period = ns; clock 558 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mdev->clock_info->nsec = clock->tc.nsec; clock 559 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mdev->clock_info->cycles = clock->tc.cycle_last; clock 560 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mdev->clock_info->mask = clock->cycles.mask; clock 561 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mdev->clock_info->mult = clock->nominal_c_mult; clock 562 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mdev->clock_info->shift = clock->cycles.shift; clock 563 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mdev->clock_info->frac = clock->tc.frac; clock 564 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mdev->clock_info->overflow_period = clock->overflow_period; clock 567 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c INIT_WORK(&clock->pps_info.out_work, mlx5_pps_out); clock 568 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c INIT_DELAYED_WORK(&clock->overflow_work, mlx5_timestamp_overflow); clock 569 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c if (clock->overflow_period) clock 570 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c schedule_delayed_work(&clock->overflow_work, 0); clock 575 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp_info = mlx5_ptp_clock_info; clock 580 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c if (clock->ptp_info.n_pins) clock 581 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mlx5_init_pin_config(clock); clock 583 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp = ptp_clock_register(&clock->ptp_info, clock 585 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c if (IS_ERR(clock->ptp)) { clock 587 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c PTR_ERR(clock->ptp)); clock 588 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp = NULL; clock 591 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c MLX5_NB_INIT(&clock->pps_nb, mlx5_pps_event, PPS_EVENT); clock 592 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mlx5_eq_notifier_register(mdev, &clock->pps_nb); clock 597 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c struct mlx5_clock *clock = &mdev->clock; clock 602 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c mlx5_eq_notifier_unregister(mdev, &clock->pps_nb); clock 603 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c if (clock->ptp) { clock 604 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c ptp_clock_unregister(clock->ptp); clock 605 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c clock->ptp = NULL; clock 608 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c cancel_work_sync(&clock->pps_info.out_work); clock 609 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c cancel_delayed_work_sync(&clock->overflow_work); clock 616 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c kfree(clock->ptp_info.pin_config); clock 42 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h return mdev->clock.ptp ? ptp_clock_index(mdev->clock.ptp) : -1; clock 45 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h static inline ktime_t mlx5_timecounter_cyc2time(struct mlx5_clock *clock, clock 52 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h seq = read_seqbegin(&clock->lock); clock 53 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h nsec = timecounter_cyc2time(&clock->tc, timestamp); clock 54 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h } while (read_seqretry(&clock->lock, seq)); clock 67 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h static inline ktime_t mlx5_timecounter_cyc2time(struct mlx5_clock *clock, clock 154 drivers/net/ethernet/mellanox/mlxsw/spectrum.c void (*clock_fini)(struct mlxsw_sp_ptp_clock *clock); clock 4864 drivers/net/ethernet/mellanox/mlxsw/spectrum.c mlxsw_sp->clock = clock 4867 drivers/net/ethernet/mellanox/mlxsw/spectrum.c if (IS_ERR(mlxsw_sp->clock)) { clock 4868 drivers/net/ethernet/mellanox/mlxsw/spectrum.c err = PTR_ERR(mlxsw_sp->clock); clock 4874 drivers/net/ethernet/mellanox/mlxsw/spectrum.c if (mlxsw_sp->clock) { clock 4914 drivers/net/ethernet/mellanox/mlxsw/spectrum.c if (mlxsw_sp->clock) clock 4917 drivers/net/ethernet/mellanox/mlxsw/spectrum.c if (mlxsw_sp->clock) clock 4918 drivers/net/ethernet/mellanox/mlxsw/spectrum.c mlxsw_sp->ptp_ops->clock_fini(mlxsw_sp->clock); clock 4999 drivers/net/ethernet/mellanox/mlxsw/spectrum.c if (mlxsw_sp->clock) { clock 5001 drivers/net/ethernet/mellanox/mlxsw/spectrum.c mlxsw_sp->ptp_ops->clock_fini(mlxsw_sp->clock); clock 160 drivers/net/ethernet/mellanox/mlxsw/spectrum.h struct mlxsw_sp_ptp_clock *clock; clock 73 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c static u64 __mlxsw_sp1_ptp_read_frc(struct mlxsw_sp_ptp_clock *clock, clock 76 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_core *mlxsw_core = clock->core; clock 97 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_sp_ptp_clock *clock = clock 100 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c return __mlxsw_sp1_ptp_read_frc(clock, NULL) & cc->mask; clock 104 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c mlxsw_sp1_ptp_phc_adjfreq(struct mlxsw_sp_ptp_clock *clock, int freq_adj) clock 106 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_core *mlxsw_core = clock->core; clock 125 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c mlxsw_sp1_ptp_phc_settime(struct mlxsw_sp_ptp_clock *clock, u64 nsec) clock 127 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_core *mlxsw_core = clock->core; clock 136 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_lock_bh(&clock->lock); clock 137 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c cycles = mlxsw_sp1_ptp_ns2cycles(&clock->tc, next_sec_in_nsec); clock 138 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_unlock_bh(&clock->lock); clock 153 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_sp_ptp_clock *clock = clock 167 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c adj = clock->nominal_c_mult; clock 171 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_lock_bh(&clock->lock); clock 172 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c timecounter_read(&clock->tc); clock 173 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->cycles.mult = neg_adj ? clock->nominal_c_mult - diff : clock 174 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->nominal_c_mult + diff; clock 175 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_unlock_bh(&clock->lock); clock 177 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c return mlxsw_sp1_ptp_phc_adjfreq(clock, neg_adj ? -ppb : ppb); clock 182 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_sp_ptp_clock *clock = clock 186 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_lock_bh(&clock->lock); clock 187 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c timecounter_adjtime(&clock->tc, delta); clock 188 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c nsec = timecounter_read(&clock->tc); clock 189 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_unlock_bh(&clock->lock); clock 191 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c return mlxsw_sp1_ptp_phc_settime(clock, nsec); clock 198 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_sp_ptp_clock *clock = clock 202 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_lock_bh(&clock->lock); clock 203 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c cycles = __mlxsw_sp1_ptp_read_frc(clock, sts); clock 204 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c nsec = timecounter_cyc2time(&clock->tc, cycles); clock 205 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_unlock_bh(&clock->lock); clock 215 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_sp_ptp_clock *clock = clock 219 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_lock_bh(&clock->lock); clock 220 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c timecounter_init(&clock->tc, &clock->cycles, nsec); clock 221 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c nsec = timecounter_read(&clock->tc); clock 222 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_unlock_bh(&clock->lock); clock 224 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c return mlxsw_sp1_ptp_phc_settime(clock, nsec); clock 240 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_sp_ptp_clock *clock; clock 242 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock = container_of(dwork, struct mlxsw_sp_ptp_clock, overflow_work); clock 244 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_lock_bh(&clock->lock); clock 245 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c timecounter_read(&clock->tc); clock 246 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_unlock_bh(&clock->lock); clock 247 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c mlxsw_core_schedule_dw(&clock->overflow_work, clock->overflow_period); clock 254 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c struct mlxsw_sp_ptp_clock *clock; clock 257 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock = kzalloc(sizeof(*clock), GFP_KERNEL); clock 258 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c if (!clock) clock 261 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_lock_init(&clock->lock); clock 262 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->cycles.read = mlxsw_sp1_ptp_read_frc; clock 263 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->cycles.shift = MLXSW_SP1_PTP_CLOCK_CYCLES_SHIFT; clock 264 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->cycles.mult = clocksource_khz2mult(MLXSW_SP1_PTP_CLOCK_FREQ_KHZ, clock 265 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->cycles.shift); clock 266 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->nominal_c_mult = clock->cycles.mult; clock 267 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->cycles.mask = CLOCKSOURCE_MASK(MLXSW_SP1_PTP_CLOCK_MASK); clock 268 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->core = mlxsw_sp->core; clock 270 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c timecounter_init(&clock->tc, &clock->cycles, clock 280 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c overflow_cycles = div64_u64(~0ULL >> 1, clock->cycles.mult); clock 281 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c overflow_cycles = min(overflow_cycles, div_u64(clock->cycles.mask, 3)); clock 283 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c nsec = cyclecounter_cyc2ns(&clock->cycles, overflow_cycles, 0, &frac); clock 284 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->overflow_period = nsecs_to_jiffies(nsec); clock 286 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c INIT_DELAYED_WORK(&clock->overflow_work, mlxsw_sp1_ptp_clock_overflow); clock 287 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c mlxsw_core_schedule_dw(&clock->overflow_work, 0); clock 289 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->ptp_info = mlxsw_sp1_ptp_clock_info; clock 290 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c clock->ptp = ptp_clock_register(&clock->ptp_info, dev); clock 291 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c if (IS_ERR(clock->ptp)) { clock 292 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c err = PTR_ERR(clock->ptp); clock 297 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c return clock; clock 300 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c cancel_delayed_work_sync(&clock->overflow_work); clock 301 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c kfree(clock); clock 305 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c void mlxsw_sp1_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock) clock 307 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c ptp_clock_unregister(clock->ptp); clock 308 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c cancel_delayed_work_sync(&clock->overflow_work); clock 309 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c kfree(clock); clock 462 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_lock_bh(&mlxsw_sp->clock->lock); clock 463 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c nsec = timecounter_cyc2time(&mlxsw_sp->clock->tc, timestamp); clock 464 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c spin_unlock_bh(&mlxsw_sp->clock->lock); clock 1100 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c info->phc_index = ptp_clock_index(mlxsw_sp->clock->ptp); clock 34 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h void mlxsw_sp1_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock); clock 75 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h static inline void mlxsw_sp1_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock) clock 154 drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h static inline void mlxsw_sp2_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock) clock 40 drivers/net/ethernet/qlogic/qede/qede_ptp.c struct ptp_clock *clock; clock 370 drivers/net/ethernet/qlogic/qede/qede_ptp.c if (ptp->clock) clock 371 drivers/net/ethernet/qlogic/qede/qede_ptp.c info->phc_index = ptp_clock_index(ptp->clock); clock 402 drivers/net/ethernet/qlogic/qede/qede_ptp.c if (ptp->clock) { clock 403 drivers/net/ethernet/qlogic/qede/qede_ptp.c ptp_clock_unregister(ptp->clock); clock 404 drivers/net/ethernet/qlogic/qede/qede_ptp.c ptp->clock = NULL; clock 505 drivers/net/ethernet/qlogic/qede/qede_ptp.c ptp->clock = ptp_clock_register(&ptp->clock_info, &edev->pdev->dev); clock 506 drivers/net/ethernet/qlogic/qede/qede_ptp.c if (IS_ERR(ptp->clock)) { clock 979 drivers/net/ethernet/renesas/ravb.h struct ptp_clock *clock; clock 1278 drivers/net/ethernet/renesas/ravb_main.c info->phc_index = ptp_clock_index(priv->ptp.clock); clock 316 drivers/net/ethernet/renesas/ravb_ptp.c ptp_clock_event(priv->ptp.clock, &event); clock 345 drivers/net/ethernet/renesas/ravb_ptp.c priv->ptp.clock = ptp_clock_register(&priv->ptp.info, &pdev->dev); clock 355 drivers/net/ethernet/renesas/ravb_ptp.c ptp_clock_unregister(priv->ptp.clock); clock 410 drivers/net/ethernet/ti/cpts.c ptp_schedule_worker(cpts->clock, 0); clock 464 drivers/net/ethernet/ti/cpts.c cpts->clock = ptp_clock_register(&cpts->info, cpts->dev); clock 465 drivers/net/ethernet/ti/cpts.c if (IS_ERR(cpts->clock)) { clock 466 drivers/net/ethernet/ti/cpts.c err = PTR_ERR(cpts->clock); clock 467 drivers/net/ethernet/ti/cpts.c cpts->clock = NULL; clock 470 drivers/net/ethernet/ti/cpts.c cpts->phc_index = ptp_clock_index(cpts->clock); clock 472 drivers/net/ethernet/ti/cpts.c ptp_schedule_worker(cpts->clock, cpts->ov_check_period); clock 483 drivers/net/ethernet/ti/cpts.c if (WARN_ON(!cpts->clock)) clock 486 drivers/net/ethernet/ti/cpts.c ptp_clock_unregister(cpts->clock); clock 487 drivers/net/ethernet/ti/cpts.c cpts->clock = NULL; clock 105 drivers/net/ethernet/ti/cpts.h struct ptp_clock *clock; clock 733 drivers/net/hamradio/scc.c set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2); clock 909 drivers/net/hamradio/scc.c time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2; clock 1755 drivers/net/hamradio/scc.c if (hwcfg.clock == 0) clock 1756 drivers/net/hamradio/scc.c hwcfg.clock = SCC_DEFAULT_CLOCK; clock 1798 drivers/net/hamradio/scc.c SCC_Info[2*Nchips+chan].clock = hwcfg.clock; clock 2037 drivers/net/hamradio/scc.c scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand, clock 99 drivers/net/phy/dp83640.c struct dp83640_clock *clock; clock 222 drivers/net/phy/dp83640.c if (dp83640->clock->page != page) { clock 224 drivers/net/phy/dp83640.c dp83640->clock->page = page; clock 237 drivers/net/phy/dp83640.c if (dp83640->clock->page != page) { clock 239 drivers/net/phy/dp83640.c dp83640->clock->page = page; clock 294 drivers/net/phy/dp83640.c static int periodic_output(struct dp83640_clock *clock, clock 298 drivers/net/phy/dp83640.c struct dp83640_private *dp83640 = clock->chosen; clock 304 drivers/net/phy/dp83640.c gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PEROUT, clock 322 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 325 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 335 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 359 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 367 drivers/net/phy/dp83640.c struct dp83640_clock *clock = clock 369 drivers/net/phy/dp83640.c struct phy_device *phydev = clock->chosen->phydev; clock 388 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 393 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 400 drivers/net/phy/dp83640.c struct dp83640_clock *clock = clock 402 drivers/net/phy/dp83640.c struct phy_device *phydev = clock->chosen->phydev; clock 410 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 414 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 422 drivers/net/phy/dp83640.c struct dp83640_clock *clock = clock 424 drivers/net/phy/dp83640.c struct phy_device *phydev = clock->chosen->phydev; clock 427 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 436 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 447 drivers/net/phy/dp83640.c struct dp83640_clock *clock = clock 449 drivers/net/phy/dp83640.c struct phy_device *phydev = clock->chosen->phydev; clock 452 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 456 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 464 drivers/net/phy/dp83640.c struct dp83640_clock *clock = clock 466 drivers/net/phy/dp83640.c struct phy_device *phydev = clock->chosen->phydev; clock 491 drivers/net/phy/dp83640.c gpio_num = 1 + ptp_find_pin(clock->ptp_clock, clock 501 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 503 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 512 drivers/net/phy/dp83640.c return periodic_output(clock, rq, on, rq->perout.index); clock 524 drivers/net/phy/dp83640.c struct dp83640_clock *clock = clock 527 drivers/net/phy/dp83640.c if (clock->caps.pin_config[pin].func == PTP_PF_PHYSYNC && clock 528 drivers/net/phy/dp83640.c !list_empty(&clock->phylist)) clock 543 drivers/net/phy/dp83640.c struct dp83640_clock *clock = dp83640->clock; clock 551 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 556 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 619 drivers/net/phy/dp83640.c static void recalibrate(struct dp83640_clock *clock) clock 626 drivers/net/phy/dp83640.c struct phy_device *master = clock->chosen->phydev; clock 630 drivers/net/phy/dp83640.c cal_gpio = 1 + ptp_find_pin(clock->ptp_clock, PTP_PF_PHYSYNC, 0); clock 636 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 641 drivers/net/phy/dp83640.c list_for_each(this, &clock->phylist) { clock 643 drivers/net/phy/dp83640.c enable_broadcast(tmp->phydev, clock->page, 1); clock 648 drivers/net/phy/dp83640.c enable_broadcast(master, clock->page, 1); clock 660 drivers/net/phy/dp83640.c list_for_each(this, &clock->phylist) { clock 702 drivers/net/phy/dp83640.c list_for_each(this, &clock->phylist) { clock 723 drivers/net/phy/dp83640.c list_for_each(this, &clock->phylist) { clock 729 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 793 drivers/net/phy/dp83640.c ptp_clock_event(dp83640->clock->ptp_clock, &event); clock 1016 drivers/net/phy/dp83640.c struct dp83640_clock *clock; clock 1022 drivers/net/phy/dp83640.c clock = list_entry(this, struct dp83640_clock, list); clock 1023 drivers/net/phy/dp83640.c if (!list_empty(&clock->phylist)) { clock 1027 drivers/net/phy/dp83640.c list_del(&clock->list); clock 1028 drivers/net/phy/dp83640.c mutex_destroy(&clock->extreg_lock); clock 1029 drivers/net/phy/dp83640.c mutex_destroy(&clock->clock_lock); clock 1030 drivers/net/phy/dp83640.c put_device(&clock->bus->dev); clock 1031 drivers/net/phy/dp83640.c kfree(clock->caps.pin_config); clock 1032 drivers/net/phy/dp83640.c kfree(clock); clock 1038 drivers/net/phy/dp83640.c static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus) clock 1040 drivers/net/phy/dp83640.c INIT_LIST_HEAD(&clock->list); clock 1041 drivers/net/phy/dp83640.c clock->bus = bus; clock 1042 drivers/net/phy/dp83640.c mutex_init(&clock->extreg_lock); clock 1043 drivers/net/phy/dp83640.c mutex_init(&clock->clock_lock); clock 1044 drivers/net/phy/dp83640.c INIT_LIST_HEAD(&clock->phylist); clock 1045 drivers/net/phy/dp83640.c clock->caps.owner = THIS_MODULE; clock 1046 drivers/net/phy/dp83640.c sprintf(clock->caps.name, "dp83640 timer"); clock 1047 drivers/net/phy/dp83640.c clock->caps.max_adj = 1953124; clock 1048 drivers/net/phy/dp83640.c clock->caps.n_alarm = 0; clock 1049 drivers/net/phy/dp83640.c clock->caps.n_ext_ts = N_EXT_TS; clock 1050 drivers/net/phy/dp83640.c clock->caps.n_per_out = N_PER_OUT; clock 1051 drivers/net/phy/dp83640.c clock->caps.n_pins = DP83640_N_PINS; clock 1052 drivers/net/phy/dp83640.c clock->caps.pps = 0; clock 1053 drivers/net/phy/dp83640.c clock->caps.adjfine = ptp_dp83640_adjfine; clock 1054 drivers/net/phy/dp83640.c clock->caps.adjtime = ptp_dp83640_adjtime; clock 1055 drivers/net/phy/dp83640.c clock->caps.gettime64 = ptp_dp83640_gettime; clock 1056 drivers/net/phy/dp83640.c clock->caps.settime64 = ptp_dp83640_settime; clock 1057 drivers/net/phy/dp83640.c clock->caps.enable = ptp_dp83640_enable; clock 1058 drivers/net/phy/dp83640.c clock->caps.verify = ptp_dp83640_verify; clock 1062 drivers/net/phy/dp83640.c dp83640_gpio_defaults(clock->caps.pin_config); clock 1069 drivers/net/phy/dp83640.c static int choose_this_phy(struct dp83640_clock *clock, clock 1072 drivers/net/phy/dp83640.c if (chosen_phy == -1 && !clock->chosen) clock 1081 drivers/net/phy/dp83640.c static struct dp83640_clock *dp83640_clock_get(struct dp83640_clock *clock) clock 1083 drivers/net/phy/dp83640.c if (clock) clock 1084 drivers/net/phy/dp83640.c mutex_lock(&clock->clock_lock); clock 1085 drivers/net/phy/dp83640.c return clock; clock 1094 drivers/net/phy/dp83640.c struct dp83640_clock *clock = NULL, *tmp; clock 1102 drivers/net/phy/dp83640.c clock = tmp; clock 1106 drivers/net/phy/dp83640.c if (clock) clock 1109 drivers/net/phy/dp83640.c clock = kzalloc(sizeof(struct dp83640_clock), GFP_KERNEL); clock 1110 drivers/net/phy/dp83640.c if (!clock) clock 1113 drivers/net/phy/dp83640.c clock->caps.pin_config = kcalloc(DP83640_N_PINS, clock 1116 drivers/net/phy/dp83640.c if (!clock->caps.pin_config) { clock 1117 drivers/net/phy/dp83640.c kfree(clock); clock 1118 drivers/net/phy/dp83640.c clock = NULL; clock 1121 drivers/net/phy/dp83640.c dp83640_clock_init(clock, bus); clock 1122 drivers/net/phy/dp83640.c list_add_tail(&clock->list, &phyter_clocks); clock 1126 drivers/net/phy/dp83640.c return dp83640_clock_get(clock); clock 1129 drivers/net/phy/dp83640.c static void dp83640_clock_put(struct dp83640_clock *clock) clock 1131 drivers/net/phy/dp83640.c mutex_unlock(&clock->clock_lock); clock 1136 drivers/net/phy/dp83640.c struct dp83640_clock *clock; clock 1143 drivers/net/phy/dp83640.c clock = dp83640_clock_get_bus(phydev->mdio.bus); clock 1144 drivers/net/phy/dp83640.c if (!clock) clock 1165 drivers/net/phy/dp83640.c dp83640->clock = clock; clock 1167 drivers/net/phy/dp83640.c if (choose_this_phy(clock, phydev)) { clock 1168 drivers/net/phy/dp83640.c clock->chosen = dp83640; clock 1169 drivers/net/phy/dp83640.c clock->ptp_clock = ptp_clock_register(&clock->caps, clock 1171 drivers/net/phy/dp83640.c if (IS_ERR(clock->ptp_clock)) { clock 1172 drivers/net/phy/dp83640.c err = PTR_ERR(clock->ptp_clock); clock 1176 drivers/net/phy/dp83640.c list_add_tail(&dp83640->list, &clock->phylist); clock 1178 drivers/net/phy/dp83640.c dp83640_clock_put(clock); clock 1182 drivers/net/phy/dp83640.c clock->chosen = NULL; clock 1185 drivers/net/phy/dp83640.c dp83640_clock_put(clock); clock 1192 drivers/net/phy/dp83640.c struct dp83640_clock *clock; clock 1205 drivers/net/phy/dp83640.c clock = dp83640_clock_get(dp83640->clock); clock 1207 drivers/net/phy/dp83640.c if (dp83640 == clock->chosen) { clock 1208 drivers/net/phy/dp83640.c ptp_clock_unregister(clock->ptp_clock); clock 1209 drivers/net/phy/dp83640.c clock->chosen = NULL; clock 1211 drivers/net/phy/dp83640.c list_for_each_safe(this, next, &clock->phylist) { clock 1220 drivers/net/phy/dp83640.c dp83640_clock_put(clock); clock 1244 drivers/net/phy/dp83640.c struct dp83640_clock *clock = dp83640->clock; clock 1246 drivers/net/phy/dp83640.c if (clock->chosen && !list_empty(&clock->phylist)) clock 1247 drivers/net/phy/dp83640.c recalibrate(clock); clock 1249 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 1250 drivers/net/phy/dp83640.c enable_broadcast(phydev, clock->page, 1); clock 1251 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 1256 drivers/net/phy/dp83640.c mutex_lock(&clock->extreg_lock); clock 1258 drivers/net/phy/dp83640.c mutex_unlock(&clock->extreg_lock); clock 1398 drivers/net/phy/dp83640.c mutex_lock(&dp83640->clock->extreg_lock); clock 1403 drivers/net/phy/dp83640.c mutex_unlock(&dp83640->clock->extreg_lock); clock 1515 drivers/net/phy/dp83640.c info->phc_index = ptp_clock_index(dp83640->clock->ptp_clock); clock 1504 drivers/net/wireless/ath/ath5k/ath5k.h unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock); clock 290 drivers/net/wireless/ath/ath5k/phy.c ds_coef_exp, ds_coef_man, clock; clock 301 drivers/net/wireless/ath/ath5k/phy.c clock = 40 * 2; clock 304 drivers/net/wireless/ath/ath5k/phy.c clock = 40 / 2; clock 307 drivers/net/wireless/ath/ath5k/phy.c clock = 40 / 4; clock 310 drivers/net/wireless/ath/ath5k/phy.c clock = 40; clock 313 drivers/net/wireless/ath/ath5k/phy.c coef_scaled = ((5 * (clock << 24)) / 2) / channel->center_freq; clock 1261 drivers/net/wireless/ath/ath5k/phy.c u32 data0, data1, clock; clock 1283 drivers/net/wireless/ath/ath5k/phy.c clock = 1; clock 1285 drivers/net/wireless/ath/ath5k/phy.c (clock << 1) | (1 << 10) | 1; clock 1287 drivers/net/wireless/ath/ath5k/phy.c clock = 0; clock 1289 drivers/net/wireless/ath/ath5k/phy.c << 2) | (clock << 1) | (1 << 10) | 1; clock 118 drivers/net/wireless/ath/ath5k/reset.c ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock) clock 121 drivers/net/wireless/ath/ath5k/reset.c return clock / common->clockrate; clock 136 drivers/net/wireless/ath/ath5k/reset.c u32 usec_reg, txlat, rxlat, usec, clock, sclock, txf2txs; clock 143 drivers/net/wireless/ath/ath5k/reset.c clock = 40; clock 146 drivers/net/wireless/ath/ath5k/reset.c clock = 22; clock 150 drivers/net/wireless/ath/ath5k/reset.c clock = 44; clock 158 drivers/net/wireless/ath/ath5k/reset.c clock *= 2; clock 161 drivers/net/wireless/ath/ath5k/reset.c clock /= 2; clock 164 drivers/net/wireless/ath/ath5k/reset.c clock /= 4; clock 170 drivers/net/wireless/ath/ath5k/reset.c common->clockrate = clock; clock 176 drivers/net/wireless/ath/ath5k/reset.c usec = clock - 1; clock 183 drivers/net/wireless/ath/ath5k/reset.c clock); clock 672 drivers/net/wireless/ath/ath5k/reset.c u32 turbo, mode, clock, bus_flags; clock 677 drivers/net/wireless/ath/ath5k/reset.c clock = 0; clock 749 drivers/net/wireless/ath/ath5k/reset.c clock = AR5K_PHY_PLL_RF5112; clock 752 drivers/net/wireless/ath/ath5k/reset.c clock = AR5K_PHY_PLL_RF5111; /*Zero*/ clock 757 drivers/net/wireless/ath/ath5k/reset.c clock |= AR5K_PHY_PLL_44MHZ; clock 780 drivers/net/wireless/ath/ath5k/reset.c clock = AR5K_PHY_PLL_40MHZ_5413; clock 782 drivers/net/wireless/ath/ath5k/reset.c clock |= AR5K_PHY_PLL_40MHZ; clock 801 drivers/net/wireless/ath/ath5k/reset.c clock |= (ah->ah_bwmode == AR5K_BWMODE_10MHZ) ? clock 818 drivers/net/wireless/ath/ath5k/reset.c if (ath5k_hw_reg_read(ah, AR5K_PHY_PLL) != clock) { clock 819 drivers/net/wireless/ath/ath5k/reset.c ath5k_hw_reg_write(ah, clock, AR5K_PHY_PLL); clock 247 drivers/net/wireless/intersil/prism54/islpci_eth.c u32 clock = le32_to_cpu(hdr->clock); clock 272 drivers/net/wireless/intersil/prism54/islpci_eth.c avs->mactime = cpu_to_be64(clock); clock 15 drivers/net/wireless/intersil/prism54/islpci_eth.h __le32 clock; /* 1MHz clock */ clock 174 drivers/net/wireless/rsi/rsi_91x_sdio.c u32 clock, resp, i; clock 205 drivers/net/wireless/rsi/rsi_91x_sdio.c host->ios.clock = host->f_min; clock 310 drivers/net/wireless/rsi/rsi_91x_sdio.c clock = 50000000; clock 312 drivers/net/wireless/rsi/rsi_91x_sdio.c clock = card->cis.max_dtr; clock 314 drivers/net/wireless/rsi/rsi_91x_sdio.c if (clock > host->f_max) clock 315 drivers/net/wireless/rsi/rsi_91x_sdio.c clock = host->f_max; clock 317 drivers/net/wireless/rsi/rsi_91x_sdio.c host->ios.clock = clock; clock 348 drivers/net/wireless/rsi/rsi_91x_sdio.c u32 clock; clock 350 drivers/net/wireless/rsi/rsi_91x_sdio.c clock = freq * 1000; clock 351 drivers/net/wireless/rsi/rsi_91x_sdio.c if (clock > host->f_max) clock 352 drivers/net/wireless/rsi/rsi_91x_sdio.c clock = host->f_max; clock 353 drivers/net/wireless/rsi/rsi_91x_sdio.c host->ios.clock = clock; clock 116 drivers/pcmcia/pxa2xx_base.c static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) clock 120 drivers/pcmcia/pxa2xx_base.c val = ((pxa2xx_mcxx_setup(speed, clock) clock 122 drivers/pcmcia/pxa2xx_base.c | ((pxa2xx_mcxx_asst(speed, clock) clock 124 drivers/pcmcia/pxa2xx_base.c | ((pxa2xx_mcxx_hold(speed, clock) clock 132 drivers/pcmcia/pxa2xx_base.c static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) clock 136 drivers/pcmcia/pxa2xx_base.c val = ((pxa2xx_mcxx_setup(speed, clock) clock 138 drivers/pcmcia/pxa2xx_base.c | ((pxa2xx_mcxx_asst(speed, clock) clock 140 drivers/pcmcia/pxa2xx_base.c | ((pxa2xx_mcxx_hold(speed, clock) clock 148 drivers/pcmcia/pxa2xx_base.c static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) clock 152 drivers/pcmcia/pxa2xx_base.c val = ((pxa2xx_mcxx_setup(speed, clock) clock 154 drivers/pcmcia/pxa2xx_base.c | ((pxa2xx_mcxx_asst(speed, clock) clock 156 drivers/pcmcia/pxa2xx_base.c | ((pxa2xx_mcxx_hold(speed, clock) clock 147 drivers/pcmcia/sa11xx_base.c unsigned int clock = clk_get_rate(skt->clk) / 1000; clock 154 drivers/pcmcia/sa11xx_base.c sa1100_pcmcia_cmd_time(clock, MECR_BSIO_GET(mecr, skt->nr))); clock 157 drivers/pcmcia/sa11xx_base.c sa1100_pcmcia_cmd_time(clock, MECR_BSA_GET(mecr, skt->nr))); clock 160 drivers/pcmcia/sa11xx_base.c sa1100_pcmcia_cmd_time(clock, MECR_BSM_GET(mecr, skt->nr))); clock 42 drivers/pinctrl/pinctrl-at91.c struct clk *clock; /* associated clock */ clock 1654 drivers/pinctrl/pinctrl-at91.c clk_disable_unprepare(gpio_chips[i]->clock); clock 1674 drivers/pinctrl/pinctrl-at91.c clk_prepare_enable(gpio_chips[i]->clock); clock 1855 drivers/pinctrl/pinctrl-at91.c at91_chip->clock = devm_clk_get(&pdev->dev, NULL); clock 1856 drivers/pinctrl/pinctrl-at91.c if (IS_ERR(at91_chip->clock)) { clock 1858 drivers/pinctrl/pinctrl-at91.c ret = PTR_ERR(at91_chip->clock); clock 1862 drivers/pinctrl/pinctrl-at91.c ret = clk_prepare_enable(at91_chip->clock); clock 1925 drivers/pinctrl/pinctrl-at91.c clk_disable_unprepare(at91_chip->clock); clock 1297 drivers/pinctrl/sunxi/pinctrl-sunxi.c unsigned long clock = clk_get_rate(clk); clock 1301 drivers/pinctrl/sunxi/pinctrl-sunxi.c best_diff = abs(freq - clock); clock 1305 drivers/pinctrl/sunxi/pinctrl-sunxi.c int cur_diff = abs(freq - (clock >> i)); clock 111 drivers/ptp/ptp_chardev.c struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); clock 390 drivers/ptp/ptp_chardev.c struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); clock 402 drivers/ptp/ptp_chardev.c struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); clock 98 drivers/ptp/ptp_clock.c struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); clock 105 drivers/ptp/ptp_clock.c struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); clock 117 drivers/ptp/ptp_clock.c struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock); clock 216 drivers/ptp/ptp_clock.c ptp->clock.ops = ptp_clock_ops; clock 265 drivers/ptp/ptp_clock.c err = posix_clock_register(&ptp->clock, &ptp->dev); clock 306 drivers/ptp/ptp_clock.c posix_clock_unregister(&ptp->clock); clock 30 drivers/ptp/ptp_private.h struct posix_clock clock; clock 111 drivers/ptp/ptp_qoriq.c ptp_clock_event(ptp_qoriq->clock, &event); clock 157 drivers/ptp/ptp_qoriq.c ptp_clock_event(ptp_qoriq->clock, &event); clock 180 drivers/ptp/ptp_qoriq.c ptp_clock_event(ptp_qoriq->clock, &event); clock 533 drivers/ptp/ptp_qoriq.c ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev); clock 534 drivers/ptp/ptp_qoriq.c if (IS_ERR(ptp_qoriq->clock)) clock 535 drivers/ptp/ptp_qoriq.c return PTR_ERR(ptp_qoriq->clock); clock 537 drivers/ptp/ptp_qoriq.c ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock); clock 551 drivers/ptp/ptp_qoriq.c ptp_clock_unregister(ptp_qoriq->clock); clock 290 drivers/sbus/char/bbc_i2c.c writeb(bp->clock, bp->i2c_control_regs + 0x1); clock 342 drivers/sbus/char/bbc_i2c.c bp->clock = readb(bp->i2c_control_regs + 0x01); clock 345 drivers/sbus/char/bbc_i2c.c bp->index, bp->i2c_control_regs, entry, bp->own, bp->clock); clock 60 drivers/sbus/char/bbc_i2c.h unsigned char own, clock; clock 690 drivers/scsi/53c700.c if(hostdata->clock > 75) { clock 691 drivers/scsi/53c700.c printk(KERN_ERR "53c700: Clock speed %dMHz is too high: 75Mhz is the maximum this chip can be driven at\n", hostdata->clock); clock 697 drivers/scsi/53c700.c hostdata->sync_clock = hostdata->clock/2; clock 698 drivers/scsi/53c700.c } else if(hostdata->clock > 50 && hostdata->clock <= 75) { clock 703 drivers/scsi/53c700.c hostdata->sync_clock = hostdata->clock*2; clock 706 drivers/scsi/53c700.c } else if(hostdata->clock > 37 && hostdata->clock <= 50) { clock 711 drivers/scsi/53c700.c hostdata->sync_clock = hostdata->clock; clock 712 drivers/scsi/53c700.c } else if(hostdata->clock > 25 && hostdata->clock <=37) { clock 717 drivers/scsi/53c700.c hostdata->sync_clock = hostdata->clock; clock 723 drivers/scsi/53c700.c hostdata->sync_clock = hostdata->clock; clock 198 drivers/scsi/53c700.h int clock; /* board clock speed in MHz */ clock 61 drivers/scsi/a4000t.c hostdata->clock = 50; clock 1354 drivers/scsi/aacraid/aacraid.h __le32 clock; clock 2639 drivers/scsi/arm/fas216.c unsigned int clock = ((info->ifcfg.clockrate - 1) / 5 + 1) & 7; clock 2640 drivers/scsi/arm/fas216.c fas216_writeb(info, REG_CLKF, clock); clock 56 drivers/scsi/bvme6000_scsi.c hostdata->clock = 40; /* XXX - depends on the CPU clock! */ clock 105 drivers/scsi/lasi700.c hostdata->clock = LASI700_CLOCK; clock 108 drivers/scsi/lasi700.c hostdata->clock = LASI710_CLOCK; clock 61 drivers/scsi/mvme16x_scsi.c hostdata->clock = 50; /* XXX - depends on the CPU clock! */ clock 1083 drivers/scsi/nsp32.c nsp32_index_write1(base, CLOCK_DIV, data->clock); clock 2593 drivers/scsi/nsp32.c data->clock = CLOCK_4; clock 2598 drivers/scsi/nsp32.c switch (data->clock) { clock 2618 drivers/scsi/nsp32.c data->clock = CLOCK_4; clock 584 drivers/scsi/nsp32.h int clock; /* clock dividing flag */ clock 622 drivers/scsi/qlogicpti.c param[1] = qpti->clock; clock 809 drivers/scsi/qlogicpti.c qpti->clock = (cfreq + 500000)/1000000; clock 810 drivers/scsi/qlogicpti.c if (qpti->clock == 0) /* bullshit */ clock 811 drivers/scsi/qlogicpti.c qpti->clock = 40; clock 368 drivers/scsi/qlogicpti.h char differential, ultra, clock; clock 85 drivers/scsi/sim710.c int irq, int clock, int differential, clock 94 drivers/scsi/sim710.c irq, clock, base_addr, scsi_id); clock 110 drivers/scsi/sim710.c hostdata->clock = clock; clock 77 drivers/scsi/sni_53c710.c hostdata->clock = SNIRM710_CLOCK; clock 66 drivers/scsi/zalon.c int clock, status; clock 70 drivers/scsi/zalon.c clock = (int) pdc_result[16]; clock 73 drivers/scsi/zalon.c clock = defaultclock; clock 76 drivers/scsi/zalon.c printk(KERN_DEBUG "%s: SCSI clock %d\n", __func__, clock); clock 77 drivers/scsi/zalon.c return clock; clock 110 drivers/scsi/zorro7xx.c hostdata->clock = 50; clock 119 drivers/soc/fsl/qe/ucc.c int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock, clock 139 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 154 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 169 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 185 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 216 drivers/soc/fsl/qe/ucc.c static int ucc_get_tdm_common_clk(u32 tdm_num, enum qe_clock clock) clock 231 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 252 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 276 drivers/soc/fsl/qe/ucc.c static int ucc_get_tdm_rx_clk(u32 tdm_num, enum qe_clock clock) clock 282 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 294 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 306 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 318 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 330 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 342 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 354 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 366 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 382 drivers/soc/fsl/qe/ucc.c static int ucc_get_tdm_tx_clk(u32 tdm_num, enum qe_clock clock) clock 388 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 400 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 412 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 424 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 436 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 448 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 460 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 472 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 490 drivers/soc/fsl/qe/ucc.c enum qe_clock clock) clock 494 drivers/soc/fsl/qe/ucc.c clock_bits = ucc_get_tdm_common_clk(tdm_num, clock); clock 498 drivers/soc/fsl/qe/ucc.c clock_bits = ucc_get_tdm_rx_clk(tdm_num, clock); clock 500 drivers/soc/fsl/qe/ucc.c clock_bits = ucc_get_tdm_tx_clk(tdm_num, clock); clock 517 drivers/soc/fsl/qe/ucc.c int ucc_set_tdm_rxtx_clk(u32 tdm_num, enum qe_clock clock, clock 534 drivers/soc/fsl/qe/ucc.c clock_bits = ucc_get_tdm_rxtx_clk(mode, tdm_num, clock); clock 549 drivers/soc/fsl/qe/ucc.c static int ucc_get_tdm_sync_source(u32 tdm_num, enum qe_clock clock, clock 554 drivers/soc/fsl/qe/ucc.c if (mode == COMM_DIR_RX && clock == QE_RSYNC_PIN) { clock 558 drivers/soc/fsl/qe/ucc.c if (mode == COMM_DIR_TX && clock == QE_TSYNC_PIN) { clock 566 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 579 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 592 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 605 drivers/soc/fsl/qe/ucc.c switch (clock) { clock 631 drivers/soc/fsl/qe/ucc.c int ucc_set_tdm_rxtx_sync(u32 tdm_num, enum qe_clock clock, clock 647 drivers/soc/fsl/qe/ucc.c source = ucc_get_tdm_sync_source(tdm_num, clock, mode); clock 844 drivers/ssb/main.c u32 n1, n2, clock, m1, m2, m3, mc; clock 876 drivers/ssb/main.c clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2; clock 879 drivers/ssb/main.c clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2; clock 881 drivers/ssb/main.c if (!clock) clock 904 drivers/ssb/main.c return clock; clock 906 drivers/ssb/main.c return (clock / m1); clock 908 drivers/ssb/main.c return (clock / (m1 * m2)); clock 910 drivers/ssb/main.c return (clock / (m1 * m2 * m3)); clock 912 drivers/ssb/main.c return (clock / (m1 * m3)); clock 924 drivers/ssb/main.c clock /= m1; clock 926 drivers/ssb/main.c clock /= m2; clock 928 drivers/ssb/main.c clock /= m3; clock 929 drivers/ssb/main.c return clock; clock 713 drivers/staging/comedi/drivers/amplc_dio200_common.c unsigned int clock; clock 715 drivers/staging/comedi/drivers/amplc_dio200_common.c clock = dio200_read32(dev, DIO200_TS_CONFIG) & TS_CONFIG_CLK_SRC_MASK; clock 716 drivers/staging/comedi/drivers/amplc_dio200_common.c dio200_write32(dev, DIO200_TS_CONFIG, clock | TS_CONFIG_RESET); clock 717 drivers/staging/comedi/drivers/amplc_dio200_common.c dio200_write32(dev, DIO200_TS_CONFIG, clock); clock 95 drivers/staging/comedi/drivers/ni_at_a2150.c int clock[4]; /* master clock periods, in nanoseconds */ clock 112 drivers/staging/comedi/drivers/ni_at_a2150.c .clock = {31250, 22676, 20833, 19531}, clock 118 drivers/staging/comedi/drivers/ni_at_a2150.c .clock = {62500, 50000, 41667, 0}, clock 257 drivers/staging/comedi/drivers/ni_at_a2150.c lub = board->clock[lub_index] * (1 << lub_divisor_shift); clock 260 drivers/staging/comedi/drivers/ni_at_a2150.c glb = board->clock[glb_index] * (1 << glb_divisor_shift); clock 273 drivers/staging/comedi/drivers/ni_at_a2150.c temp = board->clock[j] * (1 << i); clock 599 drivers/staging/greybus/sdio.c request.clock = cpu_to_le32(ios->clock); clock 513 drivers/staging/qlge/qlge_dbg.c static unsigned int *ql_get_probe(struct ql_adapter *qdev, u32 clock, clock 522 drivers/staging/qlge/qlge_dbg.c probe = clock clock 209 drivers/staging/sm750fb/ddk750_mode.c int ddk750_setModeTiming(struct mode_parameter *parm, enum clock_type clock) clock 215 drivers/staging/sm750fb/ddk750_mode.c pll.clockType = clock; clock 36 drivers/staging/sm750fb/ddk750_mode.h int ddk750_setModeTiming(struct mode_parameter *parm, enum clock_type clock); clock 257 drivers/staging/sm750fb/sm750_hw.c enum clock_type clock; clock 303 drivers/staging/sm750fb/sm750_hw.c clock = PRIMARY_PLL; clock 305 drivers/staging/sm750fb/sm750_hw.c clock = SECONDARY_PLL; clock 308 drivers/staging/sm750fb/sm750_hw.c ret = ddk750_setModeTiming(&modparm, clock); clock 1671 drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c component->clock[idx].type = MMAL_PORT_TYPE_CLOCK; clock 1672 drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c component->clock[idx].index = idx; clock 1673 drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c component->clock[idx].component = component; clock 1674 drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c spin_lock_init(&component->clock[idx].slock); clock 1675 drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c INIT_LIST_HEAD(&component->clock[idx].buffers); clock 1676 drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ret = port_info_get(instance, &component->clock[idx]); clock 93 drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.h struct vchiq_mmal_port clock[MAX_PORT_COUNT]; /* clock ports */ clock 79 drivers/thunderbolt/eeprom.c ctl->clock = 1; clock 88 drivers/thunderbolt/eeprom.c ctl->clock = 0; clock 119 drivers/thunderbolt/tb_regs.h bool clock:1; /* send pulse to transfer one bit */ clock 1732 drivers/tty/moxa.c unsigned int clock, val; clock 1740 drivers/tty/moxa.c clock = 921600; clock 1741 drivers/tty/moxa.c val = clock / baud; clock 1743 drivers/tty/moxa.c baud = clock / val; clock 1234 drivers/tty/serial/8250/8250_pci.c unsigned long clock; clock 1244 drivers/tty/serial/8250/8250_pci.c clock = 1843200; clock 1250 drivers/tty/serial/8250/8250_pci.c clock = 1843200; clock 1255 drivers/tty/serial/8250/8250_pci.c clock = 3685400; clock 1258 drivers/tty/serial/8250/8250_pci.c clock = 7372800; clock 1261 drivers/tty/serial/8250/8250_pci.c clock = 14745600; clock 1264 drivers/tty/serial/8250/8250_pci.c clock = 1843200; clock 1272 drivers/tty/serial/8250/8250_pci.c return clock; clock 109 drivers/tty/serial/mpc52xx_uart.c int (*clock)(struct uart_port *port, int enable); clock 988 drivers/tty/serial/mpc52xx_uart.c .clock = mpc512x_psc_endis_clock, clock 1023 drivers/tty/serial/mpc52xx_uart.c .clock = mpc512x_psc_endis_clock, clock 1119 drivers/tty/serial/mpc52xx_uart.c if (psc_ops->clock) { clock 1120 drivers/tty/serial/mpc52xx_uart.c ret = psc_ops->clock(port, 1); clock 1163 drivers/tty/serial/mpc52xx_uart.c if (psc_ops->clock) clock 1164 drivers/tty/serial/mpc52xx_uart.c psc_ops->clock(port, 0); clock 365 drivers/usb/dwc2/hcd.c int clock = 60; /* default value */ clock 372 drivers/usb/dwc2/hcd.c clock = 60; clock 375 drivers/usb/dwc2/hcd.c clock = 48; clock 378 drivers/usb/dwc2/hcd.c clock = 30; clock 381 drivers/usb/dwc2/hcd.c clock = 60; clock 384 drivers/usb/dwc2/hcd.c clock = 48; clock 387 drivers/usb/dwc2/hcd.c clock = 48; clock 390 drivers/usb/dwc2/hcd.c clock = 48; clock 394 drivers/usb/dwc2/hcd.c return 125 * clock - 1; clock 397 drivers/usb/dwc2/hcd.c return 1000 * clock - 1; clock 614 drivers/usb/gadget/udc/m66592-udc.c unsigned int clock, vif, irq_sense; clock 628 drivers/usb/gadget/udc/m66592-udc.c clock = M66592_XTAL12; clock 631 drivers/usb/gadget/udc/m66592-udc.c clock = M66592_XTAL24; clock 634 drivers/usb/gadget/udc/m66592-udc.c clock = M66592_XTAL48; clock 638 drivers/usb/gadget/udc/m66592-udc.c clock = 0; clock 657 drivers/usb/gadget/udc/m66592-udc.c m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, clock 237 drivers/usb/gadget/udc/r8a66597-udc.h u16 clock = 0; clock 241 drivers/usb/gadget/udc/r8a66597-udc.h clock = XTAL12; clock 244 drivers/usb/gadget/udc/r8a66597-udc.h clock = XTAL24; clock 247 drivers/usb/gadget/udc/r8a66597-udc.h clock = XTAL48; clock 254 drivers/usb/gadget/udc/r8a66597-udc.h return clock; clock 2328 drivers/usb/host/isp1362-hcd.c if (isp1362_hcd->board->clock) clock 2329 drivers/usb/host/isp1362-hcd.c isp1362_hcd->board->clock(hcd->self.controller, 1); clock 2380 drivers/usb/host/isp1362-hcd.c if (isp1362_hcd->board && isp1362_hcd->board->clock) clock 2381 drivers/usb/host/isp1362-hcd.c isp1362_hcd->board->clock(hcd->self.controller, 0); clock 2675 drivers/usb/host/oxu210hp-hcd.c unsigned frame, clock, now_uframe, mod; clock 2687 drivers/usb/host/oxu210hp-hcd.c clock = readl(&oxu->regs->frame_index); clock 2689 drivers/usb/host/oxu210hp-hcd.c clock = now_uframe + mod - 1; clock 2690 drivers/usb/host/oxu210hp-hcd.c clock %= mod; clock 2698 drivers/usb/host/oxu210hp-hcd.c if (frame != (clock >> 3)) { clock 2747 drivers/usb/host/oxu210hp-hcd.c if (now_uframe == clock) { clock 2758 drivers/usb/host/oxu210hp-hcd.c clock = now; clock 300 drivers/usb/host/r8a66597.h u16 clock = 0; clock 304 drivers/usb/host/r8a66597.h clock = XTAL12; clock 307 drivers/usb/host/r8a66597.h clock = XTAL24; clock 310 drivers/usb/host/r8a66597.h clock = XTAL48; clock 317 drivers/usb/host/r8a66597.h return clock; clock 92 drivers/video/fbdev/acornfb.h u_int clock; clock 380 drivers/video/fbdev/aty/mach64_ct.c u8 tmp, clock; clock 382 drivers/video/fbdev/aty/mach64_ct.c clock = aty_ld_8(CLOCK_CNTL, par) & 0x03U; clock 383 drivers/video/fbdev/aty/mach64_ct.c tmp = clock << 1; clock 387 drivers/video/fbdev/aty/mach64_ct.c pll->ct.vclk_fb_div = aty_ld_pll_ct(VCLK0_FB_DIV + clock, par) & 0xFFU; clock 1704 drivers/video/fbdev/aty/radeon_base.c pixClock = 100000000 / rinfo->panel_info.clock; clock 225 drivers/video/fbdev/aty/radeon_monitor.c rinfo->panel_info.clock = BIOS_IN16(tmp0+9); clock 241 drivers/video/fbdev/aty/radeon_monitor.c pr_debug(" clock: %d\n", rinfo->panel_info.clock); clock 692 drivers/video/fbdev/aty/radeon_monitor.c rinfo->panel_info.clock = 100000000 / var->pixclock; clock 809 drivers/video/fbdev/aty/radeon_monitor.c var->pixclock = 100000000 / rinfo->panel_info.clock; clock 258 drivers/video/fbdev/aty/radeonfb.h int clock; clock 937 drivers/video/fbdev/intelfb/intelfbhw.c static int calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, clock 947 drivers/video/fbdev/intelfb/intelfbhw.c DBG_MSG("Clock is %d\n", clock); clock 949 drivers/video/fbdev/intelfb/intelfbhw.c div_max = pll->max_vco / clock; clock 951 drivers/video/fbdev/intelfb/intelfbhw.c p_inc = (clock <= pll->p_transition_clk) ? pll->p_inc_lo : pll->p_inc_hi; clock 969 drivers/video/fbdev/intelfb/intelfbhw.c f_vco = clock * p; clock 984 drivers/video/fbdev/intelfb/intelfbhw.c if (clock > f_out) clock 985 drivers/video/fbdev/intelfb/intelfbhw.c f_err = clock - f_out; clock 987 drivers/video/fbdev/intelfb/intelfbhw.c f_err = f_out - clock + 1; clock 997 drivers/video/fbdev/intelfb/intelfbhw.c } while ((n <= pll->max_n) && (f_out >= clock)); clock 1002 drivers/video/fbdev/intelfb/intelfbhw.c WRN_MSG("cannot find parameters for clock %d\n", clock); clock 1046 drivers/video/fbdev/intelfb/intelfbhw.c u32 m1, m2, n, p1, p2, clock_target, clock; clock 1116 drivers/video/fbdev/intelfb/intelfbhw.c &n, &p1, &p2, &clock)) { clock 79 drivers/video/fbdev/matrox/i2c-matroxfb.c matroxfb_i2c_set(b->minfo, b->mask.clock, state); clock 89 drivers/video/fbdev/matrox/i2c-matroxfb.c return (matroxfb_read_gpio(b->minfo) & b->mask.clock) ? 1 : 0; clock 103 drivers/video/fbdev/matrox/i2c-matroxfb.c unsigned int data, unsigned int clock, const char *name, clock 110 drivers/video/fbdev/matrox/i2c-matroxfb.c b->mask.clock = clock; clock 17 drivers/video/fbdev/matrox/matroxfb_maven.h unsigned int clock; clock 12 drivers/video/fbdev/mbx/mbxdebugfs.c struct dentry *clock; clock 210 drivers/video/fbdev/savage/savagefb.h int clock[4]; clock 1513 drivers/video/fbdev/savage/savagefb_driver.c par->dacSpeedBpp = par->clock[3]; clock 1515 drivers/video/fbdev/savage/savagefb_driver.c par->dacSpeedBpp = par->clock[2]; clock 1517 drivers/video/fbdev/savage/savagefb_driver.c par->dacSpeedBpp = par->clock[1]; clock 1519 drivers/video/fbdev/savage/savagefb_driver.c par->dacSpeedBpp = par->clock[0]; clock 1917 drivers/video/fbdev/savage/savagefb_driver.c par->clock[0] = 250000; clock 1918 drivers/video/fbdev/savage/savagefb_driver.c par->clock[1] = 250000; clock 1919 drivers/video/fbdev/savage/savagefb_driver.c par->clock[2] = 220000; clock 1920 drivers/video/fbdev/savage/savagefb_driver.c par->clock[3] = 220000; clock 209 drivers/video/fbdev/simplefb.c struct clk *clock; clock 224 drivers/video/fbdev/simplefb.c clock = of_clk_get(np, i); clock 225 drivers/video/fbdev/simplefb.c if (IS_ERR(clock)) { clock 226 drivers/video/fbdev/simplefb.c if (PTR_ERR(clock) == -EPROBE_DEFER) { clock 235 drivers/video/fbdev/simplefb.c __func__, i, PTR_ERR(clock)); clock 238 drivers/video/fbdev/simplefb.c par->clks[i] = clock; clock 967 drivers/video/fbdev/sstfb.c const struct pll_timing *t, const int clock) clock 994 drivers/video/fbdev/sstfb.c switch (clock) { clock 1009 drivers/video/fbdev/sstfb.c __func__, clock); clock 1021 drivers/video/fbdev/sstfb.c const struct pll_timing *t, const int clock) clock 1028 drivers/video/fbdev/sstfb.c switch(clock) { clock 1051 drivers/video/fbdev/sstfb.c __func__, clock); clock 86 drivers/video/fbdev/vermilion/cr_pll.c static int crvml_nearest_index(const struct vml_sys *sys, int clock) clock 93 drivers/video/fbdev/vermilion/cr_pll.c cur_diff = clock - crvml_clocks[0]; clock 96 drivers/video/fbdev/vermilion/cr_pll.c diff = clock - crvml_clocks[i]; clock 106 drivers/video/fbdev/vermilion/cr_pll.c static int crvml_nearest_clock(const struct vml_sys *sys, int clock) clock 108 drivers/video/fbdev/vermilion/cr_pll.c return crvml_clocks[crvml_nearest_index(sys, clock)]; clock 111 drivers/video/fbdev/vermilion/cr_pll.c static int crvml_set_clock(struct vml_sys *sys, int clock) clock 117 drivers/video/fbdev/vermilion/cr_pll.c index = crvml_nearest_index(sys, clock); clock 119 drivers/video/fbdev/vermilion/cr_pll.c if (crvml_clocks[index] != clock) clock 561 drivers/video/fbdev/vermilion/vermilion.c static int vml_nearest_clock(int clock) clock 570 drivers/video/fbdev/vermilion/vermilion.c cur_diff = clock - vml_clocks[0]; clock 573 drivers/video/fbdev/vermilion/vermilion.c diff = clock - vml_clocks[i]; clock 589 drivers/video/fbdev/vermilion/vermilion.c int clock; clock 594 drivers/video/fbdev/vermilion/vermilion.c clock = PICOS2KHZ(var->pixclock); clock 597 drivers/video/fbdev/vermilion/vermilion.c nearest_clock = subsys->nearest_clock(subsys, clock); clock 599 drivers/video/fbdev/vermilion/vermilion.c nearest_clock = vml_nearest_clock(clock); clock 606 drivers/video/fbdev/vermilion/vermilion.c clock_diff = nearest_clock - clock; clock 608 drivers/video/fbdev/vermilion/vermilion.c if (clock_diff > clock / 5) { clock 610 drivers/video/fbdev/vermilion/vermilion.c printk(KERN_DEBUG MODULE_NAME ": Diff failure. %d %d\n",clock_diff,clock); clock 770 drivers/video/fbdev/vermilion/vermilion.c int clock; clock 796 drivers/video/fbdev/vermilion/vermilion.c clock = PICOS2KHZ(var->pixclock); clock 799 drivers/video/fbdev/vermilion/vermilion.c clock = subsys->nearest_clock(subsys, clock); clock 801 drivers/video/fbdev/vermilion/vermilion.c clock = vml_nearest_clock(clock); clock 804 drivers/video/fbdev/vermilion/vermilion.c ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal, clock 805 drivers/video/fbdev/vermilion/vermilion.c ((clock / htotal) * 1000) / vtotal); clock 825 drivers/video/fbdev/vermilion/vermilion.c subsys->set_clock(subsys, clock); clock 233 drivers/video/fbdev/vermilion/vermilion.h int (*set_clock) (struct vml_sys * sys, int clock); clock 234 drivers/video/fbdev/vermilion/vermilion.h int (*nearest_clock) (const struct vml_sys * sys, int clock); clock 450 drivers/video/fbdev/via/hw.c static struct via_clock clock; clock 1447 drivers/video/fbdev/via/hw.c clock.set_primary_pll(config); clock 1449 drivers/video/fbdev/via/hw.c clock.set_secondary_pll(config); clock 1497 drivers/video/fbdev/via/hw.c via_clock_init(&clock, chip_type); clock 1966 drivers/video/fbdev/via/hw.c clock.set_engine_pll_state(VIA_STATE_ON); clock 1967 drivers/video/fbdev/via/hw.c clock.set_primary_clock_source(VIA_CLKSRC_X1, true); clock 1968 drivers/video/fbdev/via/hw.c clock.set_secondary_clock_source(VIA_CLKSRC_X1, true); clock 1971 drivers/video/fbdev/via/hw.c clock.set_primary_pll_state(VIA_STATE_ON); clock 1972 drivers/video/fbdev/via/hw.c clock.set_primary_clock_state(VIA_STATE_ON); clock 1973 drivers/video/fbdev/via/hw.c clock.set_secondary_pll_state(VIA_STATE_ON); clock 1974 drivers/video/fbdev/via/hw.c clock.set_secondary_clock_state(VIA_STATE_ON); clock 1977 drivers/video/fbdev/via/hw.c clock.set_primary_pll_state(VIA_STATE_ON); clock 1978 drivers/video/fbdev/via/hw.c clock.set_primary_clock_state(VIA_STATE_ON); clock 1980 drivers/video/fbdev/via/hw.c clock.set_primary_pll_state(VIA_STATE_OFF); clock 1981 drivers/video/fbdev/via/hw.c clock.set_primary_clock_state(VIA_STATE_OFF); clock 1985 drivers/video/fbdev/via/hw.c clock.set_secondary_pll_state(VIA_STATE_ON); clock 1986 drivers/video/fbdev/via/hw.c clock.set_secondary_clock_state(VIA_STATE_ON); clock 1988 drivers/video/fbdev/via/hw.c clock.set_secondary_pll_state(VIA_STATE_OFF); clock 1989 drivers/video/fbdev/via/hw.c clock.set_secondary_clock_state(VIA_STATE_OFF); clock 537 drivers/video/fbdev/via/lcd.c u32 clock; clock 551 drivers/video/fbdev/via/lcd.c clock = PICOS2KHZ(panel_crt_table->pixclock) * 1000; clock 552 drivers/video/fbdev/via/lcd.c plvds_setting_info->vclk = clock; clock 579 drivers/video/fbdev/via/lcd.c viafb_set_vclock(clock, set_iga); clock 282 drivers/video/fbdev/via/via_clock.c void via_clock_init(struct via_clock *clock, int gfx_chip) clock 287 drivers/video/fbdev/via/via_clock.c clock->set_primary_clock_state = dummy_set_clock_state; clock 288 drivers/video/fbdev/via/via_clock.c clock->set_primary_clock_source = dummy_set_clock_source; clock 289 drivers/video/fbdev/via/via_clock.c clock->set_primary_pll_state = dummy_set_pll_state; clock 290 drivers/video/fbdev/via/via_clock.c clock->set_primary_pll = cle266_set_primary_pll; clock 292 drivers/video/fbdev/via/via_clock.c clock->set_secondary_clock_state = dummy_set_clock_state; clock 293 drivers/video/fbdev/via/via_clock.c clock->set_secondary_clock_source = dummy_set_clock_source; clock 294 drivers/video/fbdev/via/via_clock.c clock->set_secondary_pll_state = dummy_set_pll_state; clock 295 drivers/video/fbdev/via/via_clock.c clock->set_secondary_pll = cle266_set_secondary_pll; clock 297 drivers/video/fbdev/via/via_clock.c clock->set_engine_pll_state = dummy_set_pll_state; clock 298 drivers/video/fbdev/via/via_clock.c clock->set_engine_pll = dummy_set_pll; clock 309 drivers/video/fbdev/via/via_clock.c clock->set_primary_clock_state = set_primary_clock_state; clock 310 drivers/video/fbdev/via/via_clock.c clock->set_primary_clock_source = set_primary_clock_source; clock 311 drivers/video/fbdev/via/via_clock.c clock->set_primary_pll_state = set_primary_pll_state; clock 312 drivers/video/fbdev/via/via_clock.c clock->set_primary_pll = k800_set_primary_pll; clock 314 drivers/video/fbdev/via/via_clock.c clock->set_secondary_clock_state = set_secondary_clock_state; clock 315 drivers/video/fbdev/via/via_clock.c clock->set_secondary_clock_source = set_secondary_clock_source; clock 316 drivers/video/fbdev/via/via_clock.c clock->set_secondary_pll_state = set_secondary_pll_state; clock 317 drivers/video/fbdev/via/via_clock.c clock->set_secondary_pll = k800_set_secondary_pll; clock 319 drivers/video/fbdev/via/via_clock.c clock->set_engine_pll_state = set_engine_pll_state; clock 320 drivers/video/fbdev/via/via_clock.c clock->set_engine_pll = k800_set_engine_pll; clock 324 drivers/video/fbdev/via/via_clock.c clock->set_primary_clock_state = set_primary_clock_state; clock 325 drivers/video/fbdev/via/via_clock.c clock->set_primary_clock_source = set_primary_clock_source; clock 326 drivers/video/fbdev/via/via_clock.c clock->set_primary_pll_state = set_primary_pll_state; clock 327 drivers/video/fbdev/via/via_clock.c clock->set_primary_pll = vx855_set_primary_pll; clock 329 drivers/video/fbdev/via/via_clock.c clock->set_secondary_clock_state = set_secondary_clock_state; clock 330 drivers/video/fbdev/via/via_clock.c clock->set_secondary_clock_source = set_secondary_clock_source; clock 331 drivers/video/fbdev/via/via_clock.c clock->set_secondary_pll_state = set_secondary_pll_state; clock 332 drivers/video/fbdev/via/via_clock.c clock->set_secondary_pll = vx855_set_secondary_pll; clock 334 drivers/video/fbdev/via/via_clock.c clock->set_engine_pll_state = set_engine_pll_state; clock 335 drivers/video/fbdev/via/via_clock.c clock->set_engine_pll = vx855_set_engine_pll; clock 350 drivers/video/fbdev/via/via_clock.c clock->set_primary_clock_state = noop_set_clock_state; clock 351 drivers/video/fbdev/via/via_clock.c clock->set_secondary_clock_state = noop_set_clock_state; clock 59 drivers/video/fbdev/via/via_clock.h void via_clock_init(struct via_clock *clock, int gfx_chip); clock 98 drivers/watchdog/ie6xx_wdt.c u64 clock; clock 102 drivers/watchdog/ie6xx_wdt.c clock = 33000000; clock 104 drivers/watchdog/ie6xx_wdt.c preload = (t * clock) >> 15; clock 112 drivers/watchdog/s3c2410_wdt.c struct clk *clock; clock 190 drivers/watchdog/s3c2410_wdt.c static inline unsigned int s3c2410wdt_max_timeout(struct clk *clock) clock 192 drivers/watchdog/s3c2410_wdt.c unsigned long freq = clk_get_rate(clock); clock 303 drivers/watchdog/s3c2410_wdt.c unsigned long freq = clk_get_rate(wdt->clock); clock 553 drivers/watchdog/s3c2410_wdt.c wdt->clock = devm_clk_get(dev, "watchdog"); clock 554 drivers/watchdog/s3c2410_wdt.c if (IS_ERR(wdt->clock)) { clock 556 drivers/watchdog/s3c2410_wdt.c ret = PTR_ERR(wdt->clock); clock 560 drivers/watchdog/s3c2410_wdt.c ret = clk_prepare_enable(wdt->clock); clock 567 drivers/watchdog/s3c2410_wdt.c wdt->wdt_device.max_timeout = s3c2410wdt_max_timeout(wdt->clock); clock 647 drivers/watchdog/s3c2410_wdt.c clk_disable_unprepare(wdt->clock); clock 666 drivers/watchdog/s3c2410_wdt.c clk_disable_unprepare(wdt->clock); clock 51 drivers/watchdog/zx2967_wdt.c struct clk *clock; clock 221 drivers/watchdog/zx2967_wdt.c wdt->clock = devm_clk_get(dev, NULL); clock 222 drivers/watchdog/zx2967_wdt.c if (IS_ERR(wdt->clock)) { clock 224 drivers/watchdog/zx2967_wdt.c return PTR_ERR(wdt->clock); clock 227 drivers/watchdog/zx2967_wdt.c ret = clk_prepare_enable(wdt->clock); clock 233 drivers/watchdog/zx2967_wdt.c wdt->clock); clock 236 drivers/watchdog/zx2967_wdt.c clk_set_rate(wdt->clock, ZX2967_WDT_CLK_FREQ); clock 613 include/drm/drm_dp_mst_helper.h int drm_dp_calc_pbn_mode(int clock, int bpp); clock 135 include/drm/drm_modes.h .name = nm, .status = 0, .type = (t), .clock = (c), \ clock 152 include/drm/drm_modes.h .type = DRM_MODE_TYPE_DRIVER, .clock = 1 /* pass validation */, \ clock 280 include/drm/drm_modes.h int clock; /* in kHz */ clock 441 include/drm/drm_modes.h (m)->name, (m)->vrefresh, (m)->clock, \ clock 51 include/linux/can/dev.h struct can_clock clock; clock 250 include/linux/clocksource.h extern int timekeeping_notify(struct clocksource *clock); clock 144 include/linux/fsl/ptp_qoriq.h struct ptp_clock *clock; clock 1438 include/linux/greybus/greybus_protocols.h __le32 clock; clock 504 include/linux/mfd/db8500-prcmu.h int prcmu_set_clock_divider(u8 clock, u8 divider); clock 527 include/linux/mfd/db8500-prcmu.h int db8500_prcmu_request_clock(u8 clock, bool enable); clock 616 include/linux/mfd/db8500-prcmu.h static inline int prcmu_set_clock_divider(u8 clock, u8 divider) clock 680 include/linux/mfd/db8500-prcmu.h static inline int db8500_prcmu_request_clock(u8 clock, bool enable) clock 262 include/linux/mfd/dbx500-prcmu.h static inline int prcmu_request_clock(u8 clock, bool enable) clock 264 include/linux/mfd/dbx500-prcmu.h return db8500_prcmu_request_clock(clock, enable); clock 267 include/linux/mfd/dbx500-prcmu.h unsigned long prcmu_clock_rate(u8 clock); clock 268 include/linux/mfd/dbx500-prcmu.h long prcmu_round_clock_rate(u8 clock, unsigned long rate); clock 269 include/linux/mfd/dbx500-prcmu.h int prcmu_set_clock_rate(u8 clock, unsigned long rate); clock 442 include/linux/mfd/dbx500-prcmu.h static inline int prcmu_request_clock(u8 clock, bool enable) clock 447 include/linux/mfd/dbx500-prcmu.h static inline long prcmu_round_clock_rate(u8 clock, unsigned long rate) clock 452 include/linux/mfd/dbx500-prcmu.h static inline int prcmu_set_clock_rate(u8 clock, unsigned long rate) clock 457 include/linux/mfd/dbx500-prcmu.h static inline unsigned long prcmu_clock_rate(u8 clock) clock 694 include/linux/mfd/twl.h struct twl4030_clock_init_data *clock; clock 717 include/linux/mlx5/driver.h struct mlx5_clock clock; clock 20 include/linux/mmc/host.h unsigned int clock; /* clock rate */ clock 704 include/linux/perf_event.h u64 (*clock)(void); clock 24 include/linux/posix-timers.h #define CPUCLOCK_PID(clock) ((pid_t) ~((clock) >> 3)) clock 25 include/linux/posix-timers.h #define CPUCLOCK_PERTHREAD(clock) \ clock 26 include/linux/posix-timers.h (((clock) & (clockid_t) CPUCLOCK_PERTHREAD_MASK) != 0) clock 29 include/linux/posix-timers.h #define CPUCLOCK_WHICH(clock) ((clock) & (clockid_t) CPUCLOCK_CLOCK_MASK) clock 39 include/linux/posix-timers.h const clockid_t clock) clock 41 include/linux/posix-timers.h return ((~pid) << 3) | clock; clock 44 include/linux/posix-timers.h const clockid_t clock) clock 46 include/linux/posix-timers.h return make_process_cpuclock(tid, clock | CPUCLOCK_PERTHREAD_MASK); clock 186 include/linux/ring_buffer.h u64 (*clock)(void)); clock 56 include/linux/scc.h long clock; /* used clock */ clock 35 include/linux/timekeeper_internal.h struct clocksource *clock; clock 36 include/linux/usb/isp1362.h void (*clock) (struct device *dev, int start); clock 85 include/linux/usb/musb.h const char *clock; clock 1285 include/net/bluetooth/hci.h __le32 clock; clock 284 include/net/bluetooth/hci_core.h __u32 clock; clock 501 include/net/bluetooth/hci_core.h __u32 clock; clock 38 include/soc/fsl/qe/ucc.h int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock, clock 40 include/soc/fsl/qe/ucc.h int ucc_set_tdm_rxtx_clk(unsigned int tdm_num, enum qe_clock clock, clock 42 include/soc/fsl/qe/ucc.h int ucc_set_tdm_rxtx_sync(unsigned int tdm_num, enum qe_clock clock, clock 209 include/sound/ac97_codec.h unsigned int clock; /* AC'97 base clock (usually 48000Hz) */ clock 26 include/sound/i2c.h void (*direction)(struct snd_i2c_bus *bus, int clock, int data); /* set line direction (0 = write, 1 = read) */ clock 27 include/sound/i2c.h void (*setlines)(struct snd_i2c_bus *bus, int clock, int data); clock 286 include/trace/events/power.h DECLARE_EVENT_CLASS(clock, clock 308 include/trace/events/power.h DEFINE_EVENT(clock, clock_enable, clock 315 include/trace/events/power.h DEFINE_EVENT(clock, clock_disable, clock 322 include/trace/events/power.h DEFINE_EVENT(clock, clock_set_rate, clock 222 include/uapi/drm/drm_mode.h __u32 clock; clock 1111 include/uapi/linux/kvm.h __u64 clock; clock 153 include/uapi/linux/scc.h long clock; /* clock */ clock 327 include/video/sstfb.h int (*set_pll) (struct fb_info *info, const struct pll_timing *t, const int clock); clock 588 kernel/events/core.c return event->clock(); clock 10492 kernel/events/core.c event->clock = &local_clock; clock 10494 kernel/events/core.c event->clock = parent_event->clock; clock 10774 kernel/events/core.c if (output_event->clock != event->clock) clock 10829 kernel/events/core.c event->clock = &ktime_get_mono_fast_ns; clock 10834 kernel/events/core.c event->clock = &ktime_get_raw_fast_ns; clock 10839 kernel/events/core.c event->clock = &ktime_get_real_ns; clock 10843 kernel/events/core.c event->clock = &ktime_get_boottime_ns; clock 10847 kernel/events/core.c event->clock = &ktime_get_clocktai_ns; clock 11093 kernel/events/core.c if (group_leader->clock != event->clock) clock 93 kernel/sched/clock.c u64 clock; clock 163 kernel/sched/clock.c scd->clock = scd->tick_gtod + __gtod_offset; clock 267 kernel/sched/clock.c u64 now, clock, old_clock, min_clock, max_clock, gtod; clock 276 kernel/sched/clock.c old_clock = scd->clock; clock 285 kernel/sched/clock.c clock = gtod + delta; clock 289 kernel/sched/clock.c clock = wrap_max(clock, min_clock); clock 290 kernel/sched/clock.c clock = wrap_min(clock, max_clock); clock 292 kernel/sched/clock.c if (cmpxchg64(&scd->clock, old_clock, clock) != old_clock) clock 295 kernel/sched/clock.c return clock; clock 323 kernel/sched/clock.c remote_clock = cmpxchg64(&scd->clock, 0, 0); clock 331 kernel/sched/clock.c this_clock = my_scd->clock; clock 332 kernel/sched/clock.c remote_clock = scd->clock; clock 342 kernel/sched/clock.c ptr = &scd->clock; clock 349 kernel/sched/clock.c ptr = &my_scd->clock; clock 368 kernel/sched/clock.c u64 clock; clock 380 kernel/sched/clock.c clock = sched_clock_remote(scd); clock 382 kernel/sched/clock.c clock = sched_clock_local(scd); clock 385 kernel/sched/clock.c return clock; clock 214 kernel/sched/core.c delta = sched_clock_cpu(cpu_of(rq)) - rq->clock; clock 217 kernel/sched/core.c rq->clock += delta; clock 686 kernel/sched/cputime.c unsigned long long clock; clock 688 kernel/sched/cputime.c clock = sched_clock(); clock 689 kernel/sched/cputime.c if (clock < vtime->starttime) clock 692 kernel/sched/cputime.c return clock - vtime->starttime; clock 647 kernel/sched/debug.c PN(clock); clock 389 kernel/sched/pelt.c ret = ___update_load_sum(rq->clock - running, &rq->avg_irq, clock 393 kernel/sched/pelt.c ret += ___update_load_sum(rq->clock, &rq->avg_irq, clock 912 kernel/sched/sched.h u64 clock; clock 1061 kernel/sched/sched.h return READ_ONCE(rq->clock); clock 1105 kernel/sched/sched.h return rq->clock; clock 88 kernel/time/posix-cpu-timers.c static struct task_struct *__get_task_for_clock(const clockid_t clock, clock 91 kernel/time/posix-cpu-timers.c const bool thread = !!CPUCLOCK_PERTHREAD(clock); clock 92 kernel/time/posix-cpu-timers.c const pid_t pid = CPUCLOCK_PID(clock); clock 95 kernel/time/posix-cpu-timers.c if (CPUCLOCK_WHICH(clock) >= CPUCLOCK_MAX) clock 106 kernel/time/posix-cpu-timers.c static inline struct task_struct *get_task_for_clock(const clockid_t clock) clock 108 kernel/time/posix-cpu-timers.c return __get_task_for_clock(clock, true, false); clock 111 kernel/time/posix-cpu-timers.c static inline struct task_struct *get_task_for_clock_get(const clockid_t clock) clock 113 kernel/time/posix-cpu-timers.c return __get_task_for_clock(clock, true, true); clock 116 kernel/time/posix-cpu-timers.c static inline int validate_clock_permissions(const clockid_t clock) clock 118 kernel/time/posix-cpu-timers.c return __get_task_for_clock(clock, false, false) ? 0 : -EINVAL; clock 183 kernel/time/posix-cpu-timers.c posix_cpu_clock_set(const clockid_t clock, const struct timespec64 *tp) clock 185 kernel/time/posix-cpu-timers.c int error = validate_clock_permissions(clock); clock 362 kernel/time/posix-cpu-timers.c static int posix_cpu_clock_get(const clockid_t clock, struct timespec64 *tp) clock 364 kernel/time/posix-cpu-timers.c const clockid_t clkid = CPUCLOCK_WHICH(clock); clock 368 kernel/time/posix-cpu-timers.c tsk = get_task_for_clock_get(clock); clock 372 kernel/time/posix-cpu-timers.c if (CPUCLOCK_PERTHREAD(clock)) clock 83 kernel/time/timekeeping.c .base[0] = { .clock = &dummy_clock, }, clock 84 kernel/time/timekeeping.c .base[1] = { .clock = &dummy_clock, }, clock 88 kernel/time/timekeeping.c .base[0] = { .clock = &dummy_clock, }, clock 89 kernel/time/timekeeping.c .base[1] = { .clock = &dummy_clock, }, clock 171 kernel/time/timekeeping.c struct clocksource *clock = READ_ONCE(tkr->clock); clock 173 kernel/time/timekeeping.c return clock->read(clock); clock 182 kernel/time/timekeeping.c u64 max_cycles = tk->tkr_mono.clock->max_cycles; clock 183 kernel/time/timekeeping.c const char *name = tk->tkr_mono.clock->name; clock 236 kernel/time/timekeeping.c max = tkr->clock->max_cycles; clock 253 kernel/time/timekeeping.c delta = tkr->clock->max_cycles; clock 287 kernel/time/timekeeping.c static void tk_setup_internals(struct timekeeper *tk, struct clocksource *clock) clock 294 kernel/time/timekeeping.c old_clock = tk->tkr_mono.clock; clock 295 kernel/time/timekeeping.c tk->tkr_mono.clock = clock; clock 296 kernel/time/timekeeping.c tk->tkr_mono.mask = clock->mask; clock 299 kernel/time/timekeeping.c tk->tkr_raw.clock = clock; clock 300 kernel/time/timekeeping.c tk->tkr_raw.mask = clock->mask; clock 305 kernel/time/timekeeping.c tmp <<= clock->shift; clock 307 kernel/time/timekeeping.c tmp += clock->mult/2; clock 308 kernel/time/timekeeping.c do_div(tmp, clock->mult); clock 316 kernel/time/timekeeping.c tk->xtime_interval = interval * clock->mult; clock 318 kernel/time/timekeeping.c tk->raw_interval = interval * clock->mult; clock 322 kernel/time/timekeeping.c int shift_change = clock->shift - old_clock->shift; clock 332 kernel/time/timekeeping.c tk->tkr_mono.shift = clock->shift; clock 333 kernel/time/timekeeping.c tk->tkr_raw.shift = clock->shift; clock 336 kernel/time/timekeeping.c tk->ntp_error_shift = NTP_SCALE_SHIFT - clock->shift; clock 344 kernel/time/timekeeping.c tk->tkr_mono.mult = clock->mult; clock 345 kernel/time/timekeeping.c tk->tkr_raw.mult = clock->mult; clock 564 kernel/time/timekeeping.c tkr_dummy.clock = &dummy_clock; clock 570 kernel/time/timekeeping.c tkr_dummy.clock = &dummy_clock; clock 1151 kernel/time/timekeeping.c if (tk->tkr_mono.clock != system_counterval.cs) clock 1378 kernel/time/timekeeping.c old = tk->tkr_mono.clock; clock 1402 kernel/time/timekeeping.c int timekeeping_notify(struct clocksource *clock) clock 1406 kernel/time/timekeeping.c if (tk->tkr_mono.clock == clock) clock 1408 kernel/time/timekeeping.c stop_machine(change_clocksource, clock, NULL); clock 1410 kernel/time/timekeeping.c return tk->tkr_mono.clock == clock ? 0 : -1; clock 1450 kernel/time/timekeeping.c ret = tk->tkr_mono.clock->flags & CLOCK_SOURCE_VALID_FOR_HRES; clock 1469 kernel/time/timekeeping.c ret = tk->tkr_mono.clock->max_idle_ns; clock 1536 kernel/time/timekeeping.c struct clocksource *clock; clock 1561 kernel/time/timekeeping.c clock = clocksource_default_clock(); clock 1562 kernel/time/timekeeping.c if (clock->enable) clock 1563 kernel/time/timekeeping.c clock->enable(clock); clock 1564 kernel/time/timekeeping.c tk_setup_internals(tk, clock); clock 1679 kernel/time/timekeeping.c struct clocksource *clock = tk->tkr_mono.clock; clock 1706 kernel/time/timekeeping.c nsec = clocksource_stop_suspend_timing(clock, cycle_now); clock 1767 kernel/time/timekeeping.c curr_clock = tk->tkr_mono.clock; clock 1926 kernel/time/timekeeping.c if (unlikely(tk->tkr_mono.clock->maxadj && clock 1927 kernel/time/timekeeping.c (abs(tk->tkr_mono.mult - tk->tkr_mono.clock->mult) clock 1928 kernel/time/timekeeping.c > tk->tkr_mono.clock->maxadj))) { clock 1931 kernel/time/timekeeping.c tk->tkr_mono.clock->name, (long)tk->tkr_mono.mult, clock 1932 kernel/time/timekeeping.c (long)tk->tkr_mono.clock->mult + tk->tkr_mono.clock->maxadj); clock 499 kernel/trace/ring_buffer.c u64 (*clock)(void); clock 748 kernel/trace/ring_buffer.c return buffer->clock() << DEBUG_SHIFT; clock 1397 kernel/trace/ring_buffer.c buffer->clock = trace_clock_local; clock 1467 kernel/trace/ring_buffer.c u64 (*clock)(void)) clock 1469 kernel/trace/ring_buffer.c buffer->clock = clock; clock 34 kernel/trace/trace_clock.c u64 clock; clock 42 kernel/trace/trace_clock.c clock = sched_clock(); clock 45 kernel/trace/trace_clock.c return clock; clock 321 kernel/trace/trace_events_hist.c char *clock; clock 2097 kernel/trace/trace_events_hist.c kfree(attrs->clock); clock 2158 kernel/trace/trace_events_hist.c attrs->clock = kstrdup(str, GFP_KERNEL); clock 2159 kernel/trace/trace_events_hist.c if (!attrs->clock) { clock 2234 kernel/trace/trace_events_hist.c if (!attrs->clock) { clock 2235 kernel/trace/trace_events_hist.c attrs->clock = kstrdup("global", GFP_KERNEL); clock 2236 kernel/trace/trace_events_hist.c if (!attrs->clock) { clock 5750 kernel/trace/trace_events_hist.c seq_printf(m, ":clock=%s", hist_data->attrs->clock); clock 6036 kernel/trace/trace_events_hist.c char *clock = hist_data->attrs->clock; clock 6038 kernel/trace/trace_events_hist.c ret = tracing_set_clock(file->tr, hist_data->attrs->clock); clock 6040 kernel/trace/trace_events_hist.c hist_err(tr, HIST_ERR_SET_CLOCK_FAIL, errpos(clock)); clock 85 lib/vdso/gettimeofday.c __cvdso_clock_gettime_common(clockid_t clock, struct __kernel_timespec *ts) clock 91 lib/vdso/gettimeofday.c if (unlikely((u32) clock >= MAX_CLOCKS)) clock 98 lib/vdso/gettimeofday.c msk = 1U << clock; clock 100 lib/vdso/gettimeofday.c return do_hres(&vd[CS_HRES_COARSE], clock, ts); clock 102 lib/vdso/gettimeofday.c do_coarse(&vd[CS_HRES_COARSE], clock, ts); clock 105 lib/vdso/gettimeofday.c return do_hres(&vd[CS_RAW], clock, ts); clock 111 lib/vdso/gettimeofday.c __cvdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts) clock 113 lib/vdso/gettimeofday.c int ret = __cvdso_clock_gettime_common(clock, ts); clock 116 lib/vdso/gettimeofday.c return clock_gettime_fallback(clock, ts); clock 121 lib/vdso/gettimeofday.c __cvdso_clock_gettime32(clockid_t clock, struct old_timespec32 *res) clock 126 lib/vdso/gettimeofday.c ret = __cvdso_clock_gettime_common(clock, &ts); clock 130 lib/vdso/gettimeofday.c return clock_gettime32_fallback(clock, res); clock 133 lib/vdso/gettimeofday.c ret = clock_gettime_fallback(clock, &ts); clock 181 lib/vdso/gettimeofday.c int __cvdso_clock_getres_common(clockid_t clock, struct __kernel_timespec *res) clock 189 lib/vdso/gettimeofday.c if (unlikely((u32) clock >= MAX_CLOCKS)) clock 197 lib/vdso/gettimeofday.c msk = 1U << clock; clock 224 lib/vdso/gettimeofday.c int __cvdso_clock_getres(clockid_t clock, struct __kernel_timespec *res) clock 226 lib/vdso/gettimeofday.c int ret = __cvdso_clock_getres_common(clock, res); clock 229 lib/vdso/gettimeofday.c return clock_getres_fallback(clock, res); clock 234 lib/vdso/gettimeofday.c __cvdso_clock_getres_time32(clockid_t clock, struct old_timespec32 *res) clock 239 lib/vdso/gettimeofday.c ret = __cvdso_clock_getres_common(clock, &ts); clock 243 lib/vdso/gettimeofday.c return clock_getres32_fallback(clock, res); clock 246 lib/vdso/gettimeofday.c ret = clock_getres_fallback(clock, &ts); clock 2183 lib/vsprintf.c return clock(buf, end, ptr, spec, fmt); clock 855 net/bluetooth/hci_event.c hdev->clock = le32_to_cpu(rp->clock); clock 861 net/bluetooth/hci_event.c conn->clock = le32_to_cpu(rp->clock); clock 5392 net/bluetooth/mgmt.c rp.local_clock = cpu_to_le32(hdev->clock); clock 5397 net/bluetooth/mgmt.c rp.piconet_clock = cpu_to_le32(conn->clock); clock 815 net/core/rtnetlink.c unsigned long clock; clock 817 net/core/rtnetlink.c clock = jiffies_to_clock_t(abs(expires)); clock 818 net/core/rtnetlink.c clock = min_t(unsigned long, clock, INT_MAX); clock 819 net/core/rtnetlink.c ci.rta_expires = (expires > 0) ? clock : -clock; clock 714 sound/aoa/codecs/tas.c static int tas_switch_clock(struct codec_info_item *cii, enum clock_switch clock) clock 718 sound/aoa/codecs/tas.c switch(clock) { clock 84 sound/aoa/soundbus/soundbus.h enum clock_switch clock); clock 855 sound/arm/aaci.c ac97_bus->clock = 48000; clock 195 sound/drivers/vx/vx_uer.c int clock; clock 198 sound/drivers/vx/vx_uer.c clock = vx_calc_clock_from_freq(chip, freq); clock 199 sound/drivers/vx/vx_uer.c snd_printdd(KERN_DEBUG "set internal clock to 0x%x from freq %d\n", clock, freq); clock 202 sound/drivers/vx/vx_uer.c vx_outb(chip, HIFREQ, (clock >> 8) & 0x0f); clock 203 sound/drivers/vx/vx_uer.c vx_outb(chip, LOFREQ, clock & 0xff); clock 205 sound/drivers/vx/vx_uer.c vx_outl(chip, HIFREQ, (clock >> 8) & 0x0f); clock 206 sound/drivers/vx/vx_uer.c vx_outl(chip, LOFREQ, clock & 0xff); clock 368 sound/firewire/bebob/bebob.c .clock = NULL, clock 73 sound/firewire/bebob/bebob.h const struct snd_bebob_clock_spec *clock; clock 188 sound/firewire/bebob/bebob_focusrite.c if (bebob->spec->clock->types == saffirepro_10_clk_src_types) clock 276 sound/firewire/bebob/bebob_focusrite.c .clock = &saffirepro_26_clk_spec, clock 287 sound/firewire/bebob/bebob_focusrite.c .clock = &saffirepro_10_clk_spec, clock 308 sound/firewire/bebob/bebob_focusrite.c .clock = &saffire_both_clk_spec, clock 319 sound/firewire/bebob/bebob_focusrite.c .clock = &saffire_both_clk_spec, clock 730 sound/firewire/bebob/bebob_maudio.c .clock = &special_clk_spec, clock 746 sound/firewire/bebob/bebob_maudio.c .clock = NULL, clock 758 sound/firewire/bebob/bebob_maudio.c .clock = NULL, clock 770 sound/firewire/bebob/bebob_maudio.c .clock = NULL, clock 782 sound/firewire/bebob/bebob_maudio.c .clock = NULL, clock 794 sound/firewire/bebob/bebob_maudio.c .clock = NULL, clock 141 sound/firewire/bebob/bebob_proc.c const struct snd_bebob_clock_spec *clk_spec = bebob->spec->clock; clock 123 sound/firewire/bebob/bebob_stream.c const struct snd_bebob_clock_spec *clk_spec = bebob->spec->clock; clock 870 sound/firewire/bebob/bebob_stream.c const struct snd_bebob_clock_spec *clk_spec = bebob->spec->clock; clock 50 sound/firewire/bebob/bebob_terratec.c .clock = &phase88_rack_clk, clock 61 sound/firewire/bebob/bebob_yamaha_terratec.c .clock = &clock_spec, clock 103 sound/firewire/digi00x/digi00x-pcm.c enum snd_dg00x_clock clock; clock 117 sound/firewire/digi00x/digi00x-pcm.c err = snd_dg00x_stream_get_clock(dg00x, &clock); clock 120 sound/firewire/digi00x/digi00x-pcm.c if (clock != SND_DG00X_CLOCK_INTERNAL) { clock 130 sound/firewire/digi00x/digi00x-pcm.c if ((clock != SND_DG00X_CLOCK_INTERNAL) || clock 41 sound/firewire/digi00x/digi00x-proc.c enum snd_dg00x_clock clock; clock 48 sound/firewire/digi00x/digi00x-proc.c if (snd_dg00x_stream_get_clock(dg00x, &clock) < 0) clock 53 sound/firewire/digi00x/digi00x-proc.c snd_iprintf(buf, "Clock Source: %s\n", source_name[clock]); clock 55 sound/firewire/digi00x/digi00x-proc.c if (clock == SND_DG00X_CLOCK_INTERNAL) clock 70 sound/firewire/digi00x/digi00x-stream.c enum snd_dg00x_clock *clock) clock 81 sound/firewire/digi00x/digi00x-stream.c *clock = be32_to_cpu(reg) & 0x0f; clock 82 sound/firewire/digi00x/digi00x-stream.c if (*clock >= SND_DG00X_CLOCK_COUNT) clock 140 sound/firewire/digi00x/digi00x.h enum snd_dg00x_clock *clock); clock 274 sound/firewire/fireworks/fireworks_command.c command_get_clock(struct snd_efw *efw, struct efc_clock *clock) clock 281 sound/firewire/fireworks/fireworks_command.c (__be32 *)clock, sizeof(struct efc_clock)); clock 283 sound/firewire/fireworks/fireworks_command.c be32_to_cpus(&clock->source); clock 284 sound/firewire/fireworks/fireworks_command.c be32_to_cpus(&clock->sampling_rate); clock 285 sound/firewire/fireworks/fireworks_command.c be32_to_cpus(&clock->index); clock 296 sound/firewire/fireworks/fireworks_command.c struct efc_clock clock = {0}; clock 306 sound/firewire/fireworks/fireworks_command.c err = command_get_clock(efw, &clock); clock 311 sound/firewire/fireworks/fireworks_command.c if ((clock.source == source) && (clock.sampling_rate == rate)) clock 315 sound/firewire/fireworks/fireworks_command.c if ((source != UINT_MAX) && (clock.source != source)) clock 316 sound/firewire/fireworks/fireworks_command.c clock.source = source; clock 317 sound/firewire/fireworks/fireworks_command.c if ((rate != UINT_MAX) && (clock.sampling_rate != rate)) clock 318 sound/firewire/fireworks/fireworks_command.c clock.sampling_rate = rate; clock 319 sound/firewire/fireworks/fireworks_command.c clock.index = 0; clock 321 sound/firewire/fireworks/fireworks_command.c cpu_to_be32s(&clock.source); clock 322 sound/firewire/fireworks/fireworks_command.c cpu_to_be32s(&clock.sampling_rate); clock 323 sound/firewire/fireworks/fireworks_command.c cpu_to_be32s(&clock.index); clock 327 sound/firewire/fireworks/fireworks_command.c (__be32 *)&clock, sizeof(struct efc_clock), clock 346 sound/firewire/fireworks/fireworks_command.c struct efc_clock clock = {0}; clock 348 sound/firewire/fireworks/fireworks_command.c err = command_get_clock(efw, &clock); clock 350 sound/firewire/fireworks/fireworks_command.c *source = clock.source; clock 358 sound/firewire/fireworks/fireworks_command.c struct efc_clock clock = {0}; clock 360 sound/firewire/fireworks/fireworks_command.c err = command_get_clock(efw, &clock); clock 362 sound/firewire/fireworks/fireworks_command.c *rate = clock.sampling_rate; clock 46 sound/firewire/tascam/tascam-pcm.c enum snd_tscm_clock clock; clock 58 sound/firewire/tascam/tascam-pcm.c err = snd_tscm_stream_get_clock(tscm, &clock); clock 62 sound/firewire/tascam/tascam-pcm.c if (clock != SND_TSCM_CLOCK_INTERNAL || clock 45 sound/firewire/tascam/tascam-stream.c enum snd_tscm_clock clock) clock 74 sound/firewire/tascam/tascam-stream.c if (clock != INT_MAX) { clock 76 sound/firewire/tascam/tascam-stream.c data |= clock + 1; clock 125 sound/firewire/tascam/tascam-stream.c int snd_tscm_stream_get_clock(struct snd_tscm *tscm, enum snd_tscm_clock *clock) clock 134 sound/firewire/tascam/tascam-stream.c *clock = ((data & 0x00ff0000) >> 16) - 1; clock 135 sound/firewire/tascam/tascam-stream.c if (*clock < 0 || *clock > SND_TSCM_CLOCK_ADAT) clock 167 sound/firewire/tascam/tascam.h enum snd_tscm_clock *clock); clock 169 sound/i2c/i2c.c static void snd_i2c_bit_direction(struct snd_i2c_bus *bus, int clock, int data) clock 172 sound/i2c/i2c.c bus->hw_ops.bit->direction(bus, clock, data); clock 175 sound/i2c/i2c.c static void snd_i2c_bit_set(struct snd_i2c_bus *bus, int clock, int data) clock 177 sound/i2c/i2c.c bus->hw_ops.bit->setlines(bus, clock, data); clock 550 sound/isa/gus/gus_pcm.c static const struct snd_ratnum clock = { clock 559 sound/isa/gus/gus_pcm.c .rats = &clock, clock 35 sound/isa/sb/sb8_main.c static const struct snd_ratnum clock = { clock 44 sound/isa/sb/sb8_main.c .rats = &clock, clock 1684 sound/pci/ac97/ac97_codec.c tmp = ((unsigned int)rate * ac97->bus->clock) / 48000; clock 1915 sound/pci/ac97/ac97_codec.c bus->clock = 48000; clock 285 sound/pci/ac97/ac97_pcm.c tmp = (rate * ac97->bus->clock) / 48000; clock 1408 sound/pci/atiixp.c static int snd_atiixp_mixer_new(struct atiixp *chip, int clock, clock 1430 sound/pci/atiixp.c pbus->clock = clock; clock 1050 sound/pci/atiixp_modem.c static int snd_atiixp_mixer_new(struct atiixp_modem *chip, int clock) clock 1071 sound/pci/atiixp_modem.c pbus->clock = clock; clock 99 sound/pci/echoaudio/darla24_dsp.c u8 clock; clock 103 sound/pci/echoaudio/darla24_dsp.c clock = GD24_96000; clock 106 sound/pci/echoaudio/darla24_dsp.c clock = GD24_88200; clock 109 sound/pci/echoaudio/darla24_dsp.c clock = GD24_48000; clock 112 sound/pci/echoaudio/darla24_dsp.c clock = GD24_44100; clock 115 sound/pci/echoaudio/darla24_dsp.c clock = GD24_32000; clock 118 sound/pci/echoaudio/darla24_dsp.c clock = GD24_22050; clock 121 sound/pci/echoaudio/darla24_dsp.c clock = GD24_16000; clock 124 sound/pci/echoaudio/darla24_dsp.c clock = GD24_11025; clock 127 sound/pci/echoaudio/darla24_dsp.c clock = GD24_8000; clock 140 sound/pci/echoaudio/darla24_dsp.c "set_sample_rate: %d clock %d\n", rate, clock); clock 145 sound/pci/echoaudio/darla24_dsp.c clock = GD24_EXT_SYNC; clock 148 sound/pci/echoaudio/darla24_dsp.c chip->comm_page->gd_clock_state = clock; clock 155 sound/pci/echoaudio/darla24_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock) clock 157 sound/pci/echoaudio/darla24_dsp.c if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL && clock 158 sound/pci/echoaudio/darla24_dsp.c clock != ECHO_CLOCK_ESYNC)) clock 160 sound/pci/echoaudio/darla24_dsp.c chip->input_clock = clock; clock 36 sound/pci/echoaudio/echo3g_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock); clock 1549 sound/pci/echoaudio/echoaudio.c int i, clock; clock 1552 sound/pci/echoaudio/echoaudio.c clock = chip->input_clock; clock 1555 sound/pci/echoaudio/echoaudio.c if (clock == chip->clock_source_list[i]) clock 260 sound/pci/echoaudio/echoaudio_3g.c u32 control_reg, clock, base_rate, frq_reg; clock 277 sound/pci/echoaudio/echoaudio_3g.c clock = 0; clock 283 sound/pci/echoaudio/echoaudio_3g.c clock = E3G_96KHZ; clock 286 sound/pci/echoaudio/echoaudio_3g.c clock = E3G_88KHZ; clock 289 sound/pci/echoaudio/echoaudio_3g.c clock = E3G_48KHZ; clock 292 sound/pci/echoaudio/echoaudio_3g.c clock = E3G_44KHZ; clock 295 sound/pci/echoaudio/echoaudio_3g.c clock = E3G_32KHZ; clock 298 sound/pci/echoaudio/echoaudio_3g.c clock = E3G_CONTINUOUS_CLOCK; clock 300 sound/pci/echoaudio/echoaudio_3g.c clock |= E3G_DOUBLE_SPEED_MODE; clock 304 sound/pci/echoaudio/echoaudio_3g.c control_reg |= clock; clock 329 sound/pci/echoaudio/echoaudio_3g.c static int set_input_clock(struct echoaudio *chip, u16 clock) clock 339 sound/pci/echoaudio/echoaudio_3g.c switch (clock) { clock 367 sound/pci/echoaudio/echoaudio_3g.c "Input clock 0x%x not supported for Echo3G\n", clock); clock 371 sound/pci/echoaudio/echoaudio_3g.c chip->input_clock = clock; clock 149 sound/pci/echoaudio/gina20_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock) clock 152 sound/pci/echoaudio/gina20_dsp.c switch (clock) { clock 158 sound/pci/echoaudio/gina20_dsp.c chip->input_clock = clock; clock 166 sound/pci/echoaudio/gina20_dsp.c chip->input_clock = clock; clock 33 sound/pci/echoaudio/gina24_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock); clock 164 sound/pci/echoaudio/gina24_dsp.c u32 control_reg, clock; clock 180 sound/pci/echoaudio/gina24_dsp.c clock = 0; clock 187 sound/pci/echoaudio/gina24_dsp.c clock = GML_96KHZ; clock 190 sound/pci/echoaudio/gina24_dsp.c clock = GML_88KHZ; clock 193 sound/pci/echoaudio/gina24_dsp.c clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1; clock 196 sound/pci/echoaudio/gina24_dsp.c clock = GML_44KHZ; clock 199 sound/pci/echoaudio/gina24_dsp.c clock |= GML_SPDIF_SAMPLE_RATE0; clock 202 sound/pci/echoaudio/gina24_dsp.c clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 | clock 206 sound/pci/echoaudio/gina24_dsp.c clock = GML_22KHZ; clock 209 sound/pci/echoaudio/gina24_dsp.c clock = GML_16KHZ; clock 212 sound/pci/echoaudio/gina24_dsp.c clock = GML_11KHZ; clock 215 sound/pci/echoaudio/gina24_dsp.c clock = GML_8KHZ; clock 223 sound/pci/echoaudio/gina24_dsp.c control_reg |= clock; clock 227 sound/pci/echoaudio/gina24_dsp.c dev_dbg(chip->card->dev, "set_sample_rate: %d clock %d\n", rate, clock); clock 234 sound/pci/echoaudio/gina24_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock) clock 244 sound/pci/echoaudio/gina24_dsp.c switch (clock) { clock 272 sound/pci/echoaudio/gina24_dsp.c "Input clock 0x%x not supported for Gina24\n", clock); clock 276 sound/pci/echoaudio/gina24_dsp.c chip->input_clock = clock; clock 31 sound/pci/echoaudio/indigo_express_dsp.c u32 clock, control_reg, old_control_reg; clock 41 sound/pci/echoaudio/indigo_express_dsp.c clock = INDIGO_EXPRESS_32000; clock 44 sound/pci/echoaudio/indigo_express_dsp.c clock = INDIGO_EXPRESS_44100; clock 47 sound/pci/echoaudio/indigo_express_dsp.c clock = INDIGO_EXPRESS_48000; clock 50 sound/pci/echoaudio/indigo_express_dsp.c clock = INDIGO_EXPRESS_32000|INDIGO_EXPRESS_DOUBLE_SPEED; clock 53 sound/pci/echoaudio/indigo_express_dsp.c clock = INDIGO_EXPRESS_44100|INDIGO_EXPRESS_DOUBLE_SPEED; clock 56 sound/pci/echoaudio/indigo_express_dsp.c clock = INDIGO_EXPRESS_48000|INDIGO_EXPRESS_DOUBLE_SPEED; clock 62 sound/pci/echoaudio/indigo_express_dsp.c control_reg |= clock; clock 65 sound/pci/echoaudio/indigo_express_dsp.c "set_sample_rate: %d clock %d\n", rate, clock); clock 188 sound/pci/echoaudio/layla20_dsp.c u16 clock; clock 195 sound/pci/echoaudio/layla20_dsp.c clock = LAYLA20_CLOCK_INTERNAL; clock 198 sound/pci/echoaudio/layla20_dsp.c clock = LAYLA20_CLOCK_SPDIF; clock 201 sound/pci/echoaudio/layla20_dsp.c clock = LAYLA20_CLOCK_WORD; clock 204 sound/pci/echoaudio/layla20_dsp.c clock = LAYLA20_CLOCK_SUPER; clock 214 sound/pci/echoaudio/layla20_dsp.c chip->comm_page->input_clock = cpu_to_le16(clock); clock 226 sound/pci/echoaudio/layla20_dsp.c static int set_output_clock(struct echoaudio *chip, u16 clock) clock 228 sound/pci/echoaudio/layla20_dsp.c switch (clock) { clock 230 sound/pci/echoaudio/layla20_dsp.c clock = LAYLA20_OUTPUT_CLOCK_SUPER; clock 233 sound/pci/echoaudio/layla20_dsp.c clock = LAYLA20_OUTPUT_CLOCK_WORD; clock 243 sound/pci/echoaudio/layla20_dsp.c chip->comm_page->output_clock = cpu_to_le16(clock); clock 244 sound/pci/echoaudio/layla20_dsp.c chip->output_clock = clock; clock 32 sound/pci/echoaudio/layla24_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock); clock 159 sound/pci/echoaudio/layla24_dsp.c u32 control_reg, clock, base_rate; clock 179 sound/pci/echoaudio/layla24_dsp.c clock = 0; clock 183 sound/pci/echoaudio/layla24_dsp.c clock = GML_96KHZ; clock 186 sound/pci/echoaudio/layla24_dsp.c clock = GML_88KHZ; clock 189 sound/pci/echoaudio/layla24_dsp.c clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1; clock 192 sound/pci/echoaudio/layla24_dsp.c clock = GML_44KHZ; clock 195 sound/pci/echoaudio/layla24_dsp.c clock |= GML_SPDIF_SAMPLE_RATE0; clock 198 sound/pci/echoaudio/layla24_dsp.c clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 | clock 202 sound/pci/echoaudio/layla24_dsp.c clock = GML_22KHZ; clock 205 sound/pci/echoaudio/layla24_dsp.c clock = GML_16KHZ; clock 208 sound/pci/echoaudio/layla24_dsp.c clock = GML_11KHZ; clock 211 sound/pci/echoaudio/layla24_dsp.c clock = GML_8KHZ; clock 216 sound/pci/echoaudio/layla24_dsp.c clock = LAYLA24_CONTINUOUS_CLOCK; clock 237 sound/pci/echoaudio/layla24_dsp.c control_reg |= clock; clock 249 sound/pci/echoaudio/layla24_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock) clock 259 sound/pci/echoaudio/layla24_dsp.c switch (clock) { clock 285 sound/pci/echoaudio/layla24_dsp.c "Input clock 0x%x not supported for Layla24\n", clock); clock 289 sound/pci/echoaudio/layla24_dsp.c chip->input_clock = clock; clock 32 sound/pci/echoaudio/mia_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock); clock 154 sound/pci/echoaudio/mia_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock) clock 156 sound/pci/echoaudio/mia_dsp.c dev_dbg(chip->card->dev, "set_input_clock(%d)\n", clock); clock 157 sound/pci/echoaudio/mia_dsp.c if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL && clock 158 sound/pci/echoaudio/mia_dsp.c clock != ECHO_CLOCK_SPDIF)) clock 161 sound/pci/echoaudio/mia_dsp.c chip->input_clock = clock; clock 33 sound/pci/echoaudio/mona_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock); clock 198 sound/pci/echoaudio/mona_dsp.c u32 control_reg, clock; clock 243 sound/pci/echoaudio/mona_dsp.c clock = 0; clock 250 sound/pci/echoaudio/mona_dsp.c clock = GML_96KHZ; clock 253 sound/pci/echoaudio/mona_dsp.c clock = GML_88KHZ; clock 256 sound/pci/echoaudio/mona_dsp.c clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1; clock 259 sound/pci/echoaudio/mona_dsp.c clock = GML_44KHZ; clock 262 sound/pci/echoaudio/mona_dsp.c clock |= GML_SPDIF_SAMPLE_RATE0; clock 265 sound/pci/echoaudio/mona_dsp.c clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 | clock 269 sound/pci/echoaudio/mona_dsp.c clock = GML_22KHZ; clock 272 sound/pci/echoaudio/mona_dsp.c clock = GML_16KHZ; clock 275 sound/pci/echoaudio/mona_dsp.c clock = GML_11KHZ; clock 278 sound/pci/echoaudio/mona_dsp.c clock = GML_8KHZ; clock 286 sound/pci/echoaudio/mona_dsp.c control_reg |= clock; clock 291 sound/pci/echoaudio/mona_dsp.c "set_sample_rate: %d clock %d\n", rate, clock); clock 298 sound/pci/echoaudio/mona_dsp.c static int set_input_clock(struct echoaudio *chip, u16 clock) clock 313 sound/pci/echoaudio/mona_dsp.c switch (clock) { clock 354 sound/pci/echoaudio/mona_dsp.c "Input clock 0x%x not supported for Mona\n", clock); clock 358 sound/pci/echoaudio/mona_dsp.c chip->input_clock = clock; clock 125 sound/pci/es1968.c static int clock[SNDRV_CARDS]; clock 145 sound/pci/es1968.c module_param_array(clock, int, NULL, 0444); clock 146 sound/pci/es1968.c MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard. (0 = auto-detect)"); clock 491 sound/pci/es1968.c unsigned int clock; /* clock */ clock 897 sound/pci/es1968.c u32 rate = (freq << 16) / chip->clock; clock 1702 sound/pci/es1968.c if (chip->clock == 0) clock 1703 sound/pci/es1968.c chip->clock = 48000; /* default clock value */ clock 1713 sound/pci/es1968.c chip->clock); clock 1743 sound/pci/es1968.c snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */ clock 1776 sound/pci/es1968.c chip->clock = (chip->clock * offset) / 48000; clock 1778 sound/pci/es1968.c dev_info(chip->card->dev, "clocking to %d\n", chip->clock); clock 2888 sound/pci/es1968.c chip->clock = clock[dev]; clock 2889 sound/pci/es1968.c if (! chip->clock) clock 102 sound/pci/ice1712/ews.c static void ewx_i2c_direction(struct snd_i2c_bus *bus, int clock, int data) clock 107 sound/pci/ice1712/ews.c if (clock) clock 93 sound/pci/ice1712/revo.c static void revo_i2c_direction(struct snd_i2c_bus *bus, int clock, int data) clock 99 sound/pci/ice1712/revo.c if (clock) clock 2228 sound/pci/intel8x0.c pbus->clock = ac97_clock; clock 2680 sound/pci/intel8x0.c if (chip->ac97_bus->clock != 48000) clock 2698 sound/pci/intel8x0.c chip->ac97_bus->clock); clock 2779 sound/pci/intel8x0.c chip->ac97_bus->clock = 41000; clock 2782 sound/pci/intel8x0.c chip->ac97_bus->clock = 44100; clock 2785 sound/pci/intel8x0.c chip->ac97_bus->clock = (chip->ac97_bus->clock * 48000) / pos; clock 2787 sound/pci/intel8x0.c dev_info(chip->card->dev, "clocking to %d\n", chip->ac97_bus->clock); clock 2811 sound/pci/intel8x0.c chip->ac97_bus->clock = wl->value; clock 839 sound/pci/intel8x0m.c pbus->clock = ac97_clock; clock 424 sound/pci/lola/lola.c lola_set_clock_index(chip, chip->clock.cur_index); clock 347 sound/pci/lola/lola.h struct lola_clock_widget clock; clock 89 sound/pci/lola/lola_clock.c chip->clock.cur_freq)) clock 127 sound/pci/lola/lola_clock.c chip->clock.nid = nid; clock 128 sound/pci/lola/lola_clock.c chip->clock.items = val & 0xff; clock 130 sound/pci/lola/lola_clock.c chip->clock.items); clock 131 sound/pci/lola/lola_clock.c if (chip->clock.items > MAX_SAMPLE_CLOCK_COUNT) { clock 133 sound/pci/lola/lola_clock.c chip->clock.items); clock 137 sound/pci/lola/lola_clock.c nitems = chip->clock.items; clock 167 sound/pci/lola/lola_clock.c chip->clock.cur_index = idx_list; clock 168 sound/pci/lola/lola_clock.c chip->clock.cur_freq = 48000; clock 169 sound/pci/lola/lola_clock.c chip->clock.cur_valid = true; clock 183 sound/pci/lola/lola_clock.c sc = &chip->clock.sample_clock[idx_list]; clock 188 sound/pci/lola/lola_clock.c chip->clock.idx_lookup[idx_list] = idx; clock 191 sound/pci/lola/lola_clock.c chip->clock.items--; clock 206 sound/pci/lola/lola_clock.c err = lola_codec_read(chip, chip->clock.nid, clock 225 sound/pci/lola/lola_clock.c err = lola_codec_read(chip, chip->clock.nid, clock 227 sound/pci/lola/lola_clock.c chip->clock.idx_lookup[idx], clock 252 sound/pci/lola/lola_clock.c if (chip->clock.sample_clock[chip->clock.cur_index].type != clock 254 sound/pci/lola/lola_clock.c chip->clock.cur_freq = lola_sample_rate_convert(val & 0x7f); clock 255 sound/pci/lola/lola_clock.c chip->clock.cur_valid = (val & 0x100) != 0; clock 265 sound/pci/lola/lola_clock.c if (idx == chip->clock.cur_index) { clock 267 sound/pci/lola/lola_clock.c freq = chip->clock.cur_freq; clock 268 sound/pci/lola/lola_clock.c valid = chip->clock.cur_valid; clock 269 sound/pci/lola/lola_clock.c } else if (chip->clock.sample_clock[idx].type == clock 272 sound/pci/lola/lola_clock.c freq = chip->clock.sample_clock[idx].freq; clock 282 sound/pci/lola/lola_clock.c if (idx != chip->clock.cur_index) { clock 287 sound/pci/lola/lola_clock.c chip->clock.cur_index = idx; clock 288 sound/pci/lola/lola_clock.c chip->clock.cur_freq = freq; clock 289 sound/pci/lola/lola_clock.c chip->clock.cur_valid = true; clock 298 sound/pci/lola/lola_clock.c if (chip->clock.cur_freq == rate && chip->clock.cur_valid) clock 301 sound/pci/lola/lola_clock.c for (i = 0; i < chip->clock.items; i++) { clock 302 sound/pci/lola/lola_clock.c if (chip->clock.sample_clock[i].type == LOLA_CLOCK_TYPE_INTERNAL && clock 303 sound/pci/lola/lola_clock.c chip->clock.sample_clock[i].freq == rate) clock 306 sound/pci/lola/lola_clock.c if (i >= chip->clock.items) clock 101 sound/pci/mixart/mixart_core.h u32 clock; clock 526 sound/pci/sonicvibes.c unsigned char clock; clock 532 sound/pci/sonicvibes.c clock = 0x10; clock 534 sound/pci/sonicvibes.c clock = 0x00; clock 539 sound/pci/sonicvibes.c snd_sonicvibes_out1(sonic, SV_IREG_ADC_CLOCK, clock); clock 1899 sound/pci/via82xx.c chip->ac97_bus->clock = chip->ac97_clock; clock 892 sound/pci/via82xx_modem.c chip->ac97_bus->clock = chip->ac97_clock; clock 258 sound/soc/codecs/max98925.c int rate, int clock, int *value, int *n, int *m) clock 266 sound/soc/codecs/max98925.c *n = rate_table[i].divisors[clock][0]; clock 267 sound/soc/codecs/max98925.c *m = rate_table[i].divisors[clock][1]; clock 352 sound/soc/codecs/max98925.c unsigned int dai_sr = 0, clock, mdll, n, m; clock 380 sound/soc/codecs/max98925.c clock = 0; clock 384 sound/soc/codecs/max98925.c clock = 1; clock 388 sound/soc/codecs/max98925.c clock = 0; clock 392 sound/soc/codecs/max98925.c clock = 2; clock 401 sound/soc/codecs/max98925.c if (max98925_rate_value(component, rate, clock, &dai_sr, &n, &m)) clock 1190 sound/soc/codecs/wm8753.c u16 clock; clock 1193 sound/soc/codecs/wm8753.c clock = snd_soc_component_read32(component, WM8753_CLOCK) & 0xfffb; clock 1194 sound/soc/codecs/wm8753.c snd_soc_component_write(component, WM8753_CLOCK, clock); clock 1208 sound/soc/codecs/wm8753.c u16 clock; clock 1211 sound/soc/codecs/wm8753.c clock = snd_soc_component_read32(component, WM8753_CLOCK) & 0xfffb; clock 1212 sound/soc/codecs/wm8753.c snd_soc_component_write(component, WM8753_CLOCK, clock); clock 1220 sound/soc/codecs/wm8753.c u16 clock; clock 1223 sound/soc/codecs/wm8753.c clock = snd_soc_component_read32(component, WM8753_CLOCK) & 0xfffb; clock 1224 sound/soc/codecs/wm8753.c snd_soc_component_write(component, WM8753_CLOCK, clock | 0x4); clock 255 sound/soc/sh/fsi.c struct fsi_clk clock; clock 735 sound/soc/sh/fsi.c struct fsi_clk *clock = &fsi->clock; clock 738 sound/soc/sh/fsi.c clock->xck = NULL; clock 739 sound/soc/sh/fsi.c clock->ick = NULL; clock 740 sound/soc/sh/fsi.c clock->div = NULL; clock 741 sound/soc/sh/fsi.c clock->rate = 0; clock 742 sound/soc/sh/fsi.c clock->count = 0; clock 743 sound/soc/sh/fsi.c clock->set_rate = set_rate; clock 745 sound/soc/sh/fsi.c clock->own = devm_clk_get(dev, NULL); clock 746 sound/soc/sh/fsi.c if (IS_ERR(clock->own)) clock 751 sound/soc/sh/fsi.c clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb"); clock 752 sound/soc/sh/fsi.c if (IS_ERR(clock->xck)) { clock 756 sound/soc/sh/fsi.c if (clock->xck == clock->own) { clock 764 sound/soc/sh/fsi.c clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb"); clock 765 sound/soc/sh/fsi.c if (IS_ERR(clock->ick)) { clock 769 sound/soc/sh/fsi.c if (clock->ick == clock->own) { clock 777 sound/soc/sh/fsi.c clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb"); clock 778 sound/soc/sh/fsi.c if (IS_ERR(clock->div)) { clock 782 sound/soc/sh/fsi.c if (clock->div == clock->own) { clock 794 sound/soc/sh/fsi.c fsi->clock.rate = rate; clock 799 sound/soc/sh/fsi.c return fsi->clock.set_rate && clock 800 sound/soc/sh/fsi.c fsi->clock.rate; clock 806 sound/soc/sh/fsi.c struct fsi_clk *clock = &fsi->clock; clock 812 sound/soc/sh/fsi.c if (0 == clock->count) { clock 813 sound/soc/sh/fsi.c ret = clock->set_rate(dev, fsi); clock 819 sound/soc/sh/fsi.c clk_enable(clock->xck); clock 820 sound/soc/sh/fsi.c clk_enable(clock->ick); clock 821 sound/soc/sh/fsi.c clk_enable(clock->div); clock 823 sound/soc/sh/fsi.c clock->count++; clock 832 sound/soc/sh/fsi.c struct fsi_clk *clock = &fsi->clock; clock 837 sound/soc/sh/fsi.c if (1 == clock->count--) { clock 838 sound/soc/sh/fsi.c clk_disable(clock->xck); clock 839 sound/soc/sh/fsi.c clk_disable(clock->ick); clock 840 sound/soc/sh/fsi.c clk_disable(clock->div); clock 916 sound/soc/sh/fsi.c struct clk *xck = fsi->clock.xck; clock 917 sound/soc/sh/fsi.c struct clk *ick = fsi->clock.ick; clock 918 sound/soc/sh/fsi.c unsigned long rate = fsi->clock.rate; clock 948 sound/soc/sh/fsi.c struct clk *ick = fsi->clock.ick; clock 949 sound/soc/sh/fsi.c struct clk *div = fsi->clock.div; clock 950 sound/soc/sh/fsi.c unsigned long rate = fsi->clock.rate; clock 32 sound/usb/card.h unsigned char clock; /* associated clock */ clock 172 sound/usb/clock.c (fmt->clock & 0xff) == cs_desc->bClockID && clock 437 sound/usb/clock.c return __uac_clock_find_source(chip, fmt, fmt->clock, visited, clock 440 sound/usb/clock.c return __uac3_clock_find_source(chip, fmt, fmt->clock, visited, clock 506 sound/usb/clock.c int altsetting, int clock) clock 515 sound/usb/clock.c snd_usb_ctrl_intf(chip) | (clock << 8), clock 533 sound/usb/clock.c int clock; clock 541 sound/usb/clock.c clock = snd_usb_clock_find_source(chip, fmt, true); clock 542 sound/usb/clock.c if (clock < 0) { clock 549 sound/usb/clock.c clock = snd_usb_clock_find_source(chip, fmt, false); clock 550 sound/usb/clock.c if (clock < 0) clock 551 sound/usb/clock.c return clock; clock 554 sound/usb/clock.c prev_rate = get_sample_rate_v2v3(chip, iface, fmt->altsetting, clock); clock 561 sound/usb/clock.c cs_desc = snd_usb_find_clock_source_v3(chip->ctrl_intf, clock); clock 566 sound/usb/clock.c cs_desc = snd_usb_find_clock_source(chip->ctrl_intf, clock); clock 577 sound/usb/clock.c snd_usb_ctrl_intf(chip) | (clock << 8), clock 587 sound/usb/clock.c fmt->altsetting, clock); clock 615 sound/usb/clock.c if (!uac_clock_source_is_valid(chip, fmt, clock)) clock 380 sound/usb/format.c int clock = snd_usb_clock_find_source(chip, fp, false); clock 382 sound/usb/format.c if (clock < 0) { clock 385 sound/usb/format.c __func__, clock); clock 393 sound/usb/format.c snd_usb_ctrl_intf(chip) | (clock << 8), clock 403 sound/usb/format.c __func__, clock); clock 409 sound/usb/format.c __func__, clock); clock 428 sound/usb/format.c snd_usb_ctrl_intf(chip) | (clock << 8), clock 434 sound/usb/format.c __func__, clock); clock 2133 sound/usb/quirks-table.h .clock = 0x80, clock 2159 sound/usb/quirks-table.h .clock = 0x80, clock 2204 sound/usb/quirks-table.h .clock = 0x80, clock 2230 sound/usb/quirks-table.h .clock = 0x80, clock 2819 sound/usb/quirks-table.h .clock = 41 clock 2850 sound/usb/quirks-table.h .clock = 41 clock 674 sound/usb/stream.c int altno, int num_channels, int clock) clock 694 sound/usb/stream.c fp->clock = clock; clock 710 sound/usb/stream.c int clock = 0; clock 776 sound/usb/stream.c clock = input_term->bCSourceID; clock 786 sound/usb/stream.c clock = output_term->bCSourceID; clock 827 sound/usb/stream.c altset_idx, altno, num_channels, clock); clock 873 sound/usb/stream.c int clock = 0; clock 922 sound/usb/stream.c clock = UAC3_BADD_CS_ID9; clock 1011 sound/usb/stream.c clock = input_term->bCSourceID; clock 1019 sound/usb/stream.c clock = output_term->bCSourceID; clock 1030 sound/usb/stream.c altset_idx, altno, num_channels, clock); clock 1111 tools/include/uapi/linux/kvm.h __u64 clock; clock 61 tools/perf/util/data-convert-bt.c struct bt_ctf_clock *clock; clock 818 tools/perf/util/data-convert-bt.c bt_ctf_clock_set_time(cw->clock, sample->time); clock 885 tools/perf/util/data-convert-bt.c bt_ctf_clock_set_time(cw->clock, sample->time); \ clock 1386 tools/perf/util/data-convert-bt.c struct bt_ctf_clock *clock = cw->clock; clock 1388 tools/perf/util/data-convert-bt.c bt_ctf_clock_set_description(clock, "perf clock"); clock 1392 tools/perf/util/data-convert-bt.c if (bt_ctf_clock_set_##__n(clock, __v)) \ clock 1475 tools/perf/util/data-convert-bt.c bt_ctf_clock_put(cw->clock); clock 1488 tools/perf/util/data-convert-bt.c struct bt_ctf_clock *clock; clock 1500 tools/perf/util/data-convert-bt.c clock = bt_ctf_clock_create("perf_clock"); clock 1501 tools/perf/util/data-convert-bt.c if (!clock) { clock 1506 tools/perf/util/data-convert-bt.c cw->clock = clock; clock 1523 tools/perf/util/data-convert-bt.c if (bt_ctf_stream_class_set_clock(stream_class, clock)) { clock 1542 tools/perf/util/data-convert-bt.c if (bt_ctf_writer_add_clock(writer, clock)) { clock 348 tools/testing/selftests/mqueue/mq_perf_tests.c clock_gettime(clock, &start); \ clock 351 tools/testing/selftests/mqueue/mq_perf_tests.c clock_gettime(clock, &middle); \ clock 354 tools/testing/selftests/mqueue/mq_perf_tests.c clock_gettime(clock, &end); \ clock 427 tools/testing/selftests/mqueue/mq_perf_tests.c clockid_t clock; clock 439 tools/testing/selftests/mqueue/mq_perf_tests.c if (pthread_getcpuclockid(cpu_threads[0], &clock) != 0) clock 442 tools/testing/selftests/mqueue/mq_perf_tests.c if (clock_getres(clock, &res)) clock 482 tools/testing/selftests/mqueue/mq_perf_tests.c clock_gettime(clock, &start); clock 487 tools/testing/selftests/mqueue/mq_perf_tests.c clock_gettime(clock, &end); clock 511 tools/testing/selftests/mqueue/mq_perf_tests.c clock_gettime(clock, &start); clock 513 tools/testing/selftests/mqueue/mq_perf_tests.c clock_gettime(clock, &end); clock 603 tools/testing/selftests/seccomp/seccomp_bpf.c clock_t clock = times(&timebuf); clock 612 tools/testing/selftests/seccomp/seccomp_bpf.c EXPECT_LE(clock, syscall(__NR_times, &timebuf)); clock 217 tools/testing/selftests/x86/test_vdso.c static void test_one_clock_gettime(int clock, const char *name) clock 222 tools/testing/selftests/x86/test_vdso.c printf("[RUN]\tTesting clock_gettime for clock %s (%d)...\n", name, clock); clock 224 tools/testing/selftests/x86/test_vdso.c if (sys_clock_gettime(clock, &start) < 0) { clock 226 tools/testing/selftests/x86/test_vdso.c vdso_ret = vdso_clock_gettime(clock, &vdso); clock 234 tools/testing/selftests/x86/test_vdso.c printf("[WARN]\t clock_gettime(%d) syscall returned error %d\n", clock, errno); clock 239 tools/testing/selftests/x86/test_vdso.c vdso_ret = vdso_clock_gettime(clock, &vdso); clock 240 tools/testing/selftests/x86/test_vdso.c end_ret = sys_clock_gettime(clock, &end); clock 262 tools/testing/selftests/x86/test_vdso.c for (int clock = 0; clock < sizeof(clocknames) / sizeof(clocknames[0]); clock 263 tools/testing/selftests/x86/test_vdso.c clock++) { clock 264 tools/testing/selftests/x86/test_vdso.c test_one_clock_gettime(clock, clocknames[clock]);