clk_src           162 drivers/clk/clk-nomadik.c #define to_src(_hw) container_of(_hw, struct clk_src, hw)
clk_src           302 drivers/clk/clk-nomadik.c 	struct clk_src *sclk = to_src(hw);
clk_src           315 drivers/clk/clk-nomadik.c 	struct clk_src *sclk = to_src(hw);
clk_src           327 drivers/clk/clk-nomadik.c 	struct clk_src *sclk = to_src(hw);
clk_src           353 drivers/clk/clk-nomadik.c 	struct clk_src *sclk;
clk_src            42 drivers/clk/socfpga/clk-periph-a10.c 	u32 clk_src;
clk_src            45 drivers/clk/socfpga/clk-periph-a10.c 	clk_src = readl(socfpgaclk->hw.reg);
clk_src            49 drivers/clk/socfpga/clk-periph-a10.c 		return (clk_src >> CLK_MGR_FREE_SHIFT) &
clk_src            51 drivers/clk/socfpga/clk-periph-s10.c 	u32 clk_src, mask;
clk_src            59 drivers/clk/socfpga/clk-periph-s10.c 		clk_src = readl(socfpgaclk->hw.reg);
clk_src            60 drivers/clk/socfpga/clk-periph-s10.c 		parent = (clk_src >> CLK_MGR_FREE_SHIFT) &
clk_src            39 drivers/clk/socfpga/clk-periph.c 	u32 clk_src;
clk_src            41 drivers/clk/socfpga/clk-periph.c 	clk_src = readl(clk_mgr_base_addr + CLKMGR_DBCTRL);
clk_src            42 drivers/clk/socfpga/clk-periph.c 	return clk_src & 0x1;
clk_src           527 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c 				       u32 freq, u8 clk_type, u8 clk_src)
clk_src           547 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c 			args.v2_1.asParam.ucDCEClkSrc = clk_src;
clk_src            41 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h 				       u32 freq, u8 clk_type, u8 clk_src);
clk_src            43 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	(clk_src->regs->reg)
clk_src            46 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->base.ctx
clk_src            52 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->cs_shift->field_name, clk_src->cs_mask->field_name
clk_src            61 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct dce110_clk_src *clk_src,
clk_src            74 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		ss_parm = clk_src->dvi_ss_params;
clk_src            75 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		entrys_num = clk_src->dvi_ss_params_cnt;
clk_src            79 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		ss_parm = clk_src->hdmi_ss_params;
clk_src            80 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		entrys_num = clk_src->hdmi_ss_params_cnt;
clk_src            84 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		ss_parm = clk_src->lvds_ss_params;
clk_src            85 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		entrys_num = clk_src->lvds_ss_params_cnt;
clk_src            92 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		ss_parm = clk_src->dp_ss_params;
clk_src            93 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		entrys_num = clk_src->dp_ss_params_cnt;
clk_src           396 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct dce110_clk_src *clk_src,
clk_src           446 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_result = clk_src->bios->funcs->adjust_pixel_clock(
clk_src           447 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			clk_src->bios, &bp_adjust_pixel_clock_params);
clk_src           475 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct dce110_clk_src *clk_src,
clk_src           496 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 					clk_src,
clk_src           505 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (!pll_adjust_pix_clk(clk_src, pix_clk_params, pll_settings)) {
clk_src           524 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 					&clk_src->calc_pll_hdmi,
clk_src           530 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 					&clk_src->calc_pll,
clk_src           537 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct dce110_clk_src *clk_src,
clk_src           570 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(cs);
clk_src           585 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		pll_settings->adjusted_pix_clk_100hz = clk_src->ext_clk_khz * 10;
clk_src           586 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		pll_settings->calculated_pix_clk_100hz = clk_src->ext_clk_khz * 10;
clk_src           592 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	pll_calc_error = dce110_get_pix_clk_dividers_helper(clk_src,
clk_src           603 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(cs);
clk_src           617 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		pll_settings->adjusted_pix_clk_100hz = clk_src->ext_clk_khz * 10;
clk_src           618 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		pll_settings->calculated_pix_clk_100hz = clk_src->ext_clk_khz * 10;
clk_src           624 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	dce112_get_pix_clk_dividers_helper(clk_src,
clk_src           630 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c static bool disable_spread_spectrum(struct dce110_clk_src *clk_src)
clk_src           635 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_ss_params.pll_id = clk_src->base.id;
clk_src           638 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	result = clk_src->bios->funcs->enable_spread_spectrum_on_ppll(
clk_src           639 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			clk_src->bios,
clk_src           712 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct dce110_clk_src *clk_src,
clk_src           720 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			clk_src,
clk_src           737 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			bp_params.pll_id = clk_src->base.id;
clk_src           745 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				clk_src->bios->funcs->
clk_src           747 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 							clk_src->bios,
clk_src           758 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct dce110_clk_src *clk_src,
clk_src           796 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct dce110_clk_src *clk_src,
clk_src           831 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (clk_src->cs_mask->PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE)
clk_src           846 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);
clk_src           856 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		disable_spread_spectrum(clk_src);
clk_src           874 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (clk_src->bios->funcs->set_pixel_clock(
clk_src           875 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			clk_src->bios, &bp_pc_params) != BP_RESULT_OK)
clk_src           886 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			if (!enable_spread_spectrum(clk_src,
clk_src           892 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		dce110_program_pixel_clk_resync(clk_src,
clk_src           905 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);
clk_src           930 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		disable_spread_spectrum(clk_src);
clk_src           948 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (clk_src->bios->funcs->set_pixel_clock(
clk_src           949 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			clk_src->bios, &bp_pc_params) != BP_RESULT_OK)
clk_src           953 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		dce112_program_pixel_clk_resync(clk_src,
clk_src           963 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct clock_source *clk_src)
clk_src           965 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *dce110_clk_src = TO_DCE110_CLK_SRC(clk_src);
clk_src           969 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (clk_src->dp_clk_src)
clk_src           974 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_pixel_clock_params.pll_id = clk_src->id;
clk_src           990 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);
clk_src          1088 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct dce110_clk_src *clk_src,
clk_src          1114 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	*ss_entries_num = clk_src->bios->funcs->get_ss_entry_number(
clk_src          1115 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			clk_src->bios,
clk_src          1138 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		bp_result = clk_src->bios->funcs->get_spread_spectrum_info(
clk_src          1139 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				clk_src->bios,
clk_src          1209 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *clk_src)
clk_src          1212 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		clk_src,
clk_src          1214 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		&clk_src->dp_ss_params,
clk_src          1215 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		&clk_src->dp_ss_params_cnt);
clk_src          1217 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		clk_src,
clk_src          1219 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		&clk_src->hdmi_ss_params,
clk_src          1220 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		&clk_src->hdmi_ss_params_cnt);
clk_src          1222 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		clk_src,
clk_src          1224 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		&clk_src->dvi_ss_params,
clk_src          1225 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		&clk_src->dvi_ss_params_cnt);
clk_src          1227 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		clk_src,
clk_src          1229 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		&clk_src->lvds_ss_params,
clk_src          1230 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		&clk_src->lvds_ss_params_cnt);
clk_src          1311 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *clk_src,
clk_src          1322 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->base.ctx = ctx;
clk_src          1323 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->bios = bios;
clk_src          1324 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->base.id = id;
clk_src          1325 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->base.funcs = &dce110_clk_src_funcs;
clk_src          1327 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->regs = regs;
clk_src          1328 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->cs_shift = cs_shift;
clk_src          1329 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->cs_mask = cs_mask;
clk_src          1331 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (!clk_src->bios->fw_info_valid) {
clk_src          1336 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->ext_clk_khz = clk_src->bios->fw_info.external_clock_source_frequency_for_dp;
clk_src          1342 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			clk_src->cs_mask->PLL_POST_DIV_PIXCLK;
clk_src          1344 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs_init_data.max_pll_ref_divider =	clk_src->cs_mask->PLL_REF_DIV;
clk_src          1361 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			clk_src->cs_mask->PLL_POST_DIV_PIXCLK;
clk_src          1363 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs_init_data_hdmi.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV;
clk_src          1376 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->ref_freq_khz = clk_src->bios->fw_info.pll_info.crystal_frequency;
clk_src          1378 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (clk_src->base.id == CLOCK_SOURCE_ID_EXTERNAL)
clk_src          1382 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	ss_info_from_atombios_create(clk_src);
clk_src          1385 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			&clk_src->calc_pll,
clk_src          1393 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			min_override_input_pxl_clk_pll_freq_khz = clk_src->ref_freq_khz/2;
clk_src          1395 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			max_override_input_pxl_clk_pll_freq_khz = clk_src->ref_freq_khz;
clk_src          1399 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			&clk_src->calc_pll_hdmi, &calc_pll_cs_init_data_hdmi)) {
clk_src          1411 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *clk_src,
clk_src          1419 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->base.ctx = ctx;
clk_src          1420 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->bios = bios;
clk_src          1421 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->base.id = id;
clk_src          1422 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->base.funcs = &dce112_clk_src_funcs;
clk_src          1424 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->regs = regs;
clk_src          1425 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->cs_shift = cs_shift;
clk_src          1426 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->cs_mask = cs_mask;
clk_src          1428 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (!clk_src->bios->fw_info_valid) {
clk_src          1433 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->ext_clk_khz = clk_src->bios->fw_info.external_clock_source_frequency_for_dp;
clk_src          1440 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct dce110_clk_src *clk_src,
clk_src          1448 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bool ret = dce112_clk_src_construct(clk_src, ctx, bios, id, regs, cs_shift, cs_mask);
clk_src          1450 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	clk_src->base.funcs = &dcn20_clk_src_funcs;
clk_src            30 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h #define TO_DCE110_CLK_SRC(clk_src)\
clk_src            31 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	container_of(clk_src, struct dce110_clk_src, base)
clk_src           187 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	struct dce110_clk_src *clk_src,
clk_src           196 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	struct dce110_clk_src *clk_src,
clk_src           206 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	struct dce110_clk_src *clk_src,
clk_src           167 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 		struct clock_source *clk_src,
clk_src           170 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 	if (clk_src->id == CLOCK_SOURCE_ID_DP_DTO || clk_src->dp_clk_src) {
clk_src           174 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 	} else if (clk_src->id >= CLOCK_SOURCE_COMBO_PHY_PLL0) {
clk_src           175 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 		uint32_t rate_source = clk_src->id - CLOCK_SOURCE_COMBO_PHY_PLL0;
clk_src           184 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 	} else if (clk_src->id <= CLOCK_SOURCE_ID_PLL2) {
clk_src           185 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 		uint32_t rate_source = clk_src->id - CLOCK_SOURCE_ID_PLL0;
clk_src           196 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 		       clk_src->id, tg_inst);
clk_src           836 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 		struct clock_source *clk_src,
clk_src           659 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 	struct dce110_clk_src *clk_src =
clk_src           662 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 	if (!clk_src)
clk_src           665 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 	if (dce110_clk_src_construct(clk_src, ctx, bios, id,
clk_src           667 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		clk_src->base.dp_clk_src = dp_clk_src;
clk_src           668 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		return &clk_src->base;
clk_src           671 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 	kfree(clk_src);
clk_src           676 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c void dce100_clock_source_destroy(struct clock_source **clk_src)
clk_src           678 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 	kfree(TO_DCE110_CLK_SRC(*clk_src));
clk_src           679 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 	*clk_src = NULL;
clk_src           705 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	struct dce110_clk_src *clk_src =
clk_src           708 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	if (!clk_src)
clk_src           711 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	if (dce110_clk_src_construct(clk_src, ctx, bios, id,
clk_src           713 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		clk_src->base.dp_clk_src = dp_clk_src;
clk_src           714 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		return &clk_src->base;
clk_src           717 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	kfree(clk_src);
clk_src           722 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c void dce110_clock_source_destroy(struct clock_source **clk_src)
clk_src           726 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	if (!clk_src)
clk_src           729 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	dce110_clk_src = TO_DCE110_CLK_SRC(*clk_src);
clk_src           736 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 	*clk_src = NULL;
clk_src           678 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	struct dce110_clk_src *clk_src =
clk_src           681 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	if (!clk_src)
clk_src           684 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	if (dce112_clk_src_construct(clk_src, ctx, bios, id,
clk_src           686 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		clk_src->base.dp_clk_src = dp_clk_src;
clk_src           687 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		return &clk_src->base;
clk_src           690 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	kfree(clk_src);
clk_src           695 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c void dce112_clock_source_destroy(struct clock_source **clk_src)
clk_src           697 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	kfree(TO_DCE110_CLK_SRC(*clk_src));
clk_src           698 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 	*clk_src = NULL;
clk_src           491 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	struct dce110_clk_src *clk_src =
clk_src           492 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		kzalloc(sizeof(*clk_src), GFP_KERNEL);
clk_src           494 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	if (!clk_src)
clk_src           497 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	if (dce112_clk_src_construct(clk_src, ctx, bios, id,
clk_src           499 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		clk_src->base.dp_clk_src = dp_clk_src;
clk_src           500 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		return &clk_src->base;
clk_src           503 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	kfree(clk_src);
clk_src           508 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c static void dce120_clock_source_destroy(struct clock_source **clk_src)
clk_src           510 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	kfree(TO_DCE110_CLK_SRC(*clk_src));
clk_src           511 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 	*clk_src = NULL;
clk_src           692 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	struct dce110_clk_src *clk_src =
clk_src           695 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	if (!clk_src)
clk_src           698 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	if (dce110_clk_src_construct(clk_src, ctx, bios, id,
clk_src           700 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		clk_src->base.dp_clk_src = dp_clk_src;
clk_src           701 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		return &clk_src->base;
clk_src           704 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	kfree(clk_src);
clk_src           709 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c void dce80_clock_source_destroy(struct clock_source **clk_src)
clk_src           711 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	kfree(TO_DCE110_CLK_SRC(*clk_src));
clk_src           712 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 	*clk_src = NULL;
clk_src           777 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	struct dce110_clk_src *clk_src =
clk_src           780 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	if (!clk_src)
clk_src           783 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	if (dce112_clk_src_construct(clk_src, ctx, bios, id,
clk_src           785 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		clk_src->base.dp_clk_src = dp_clk_src;
clk_src           786 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		return &clk_src->base;
clk_src           789 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	kfree(clk_src);
clk_src           868 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c void dcn10_clock_source_destroy(struct clock_source **clk_src)
clk_src           870 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	kfree(TO_DCE110_CLK_SRC(*clk_src));
clk_src           871 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	*clk_src = NULL;
clk_src          1179 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	struct dce110_clk_src *clk_src =
clk_src          1182 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	if (!clk_src)
clk_src          1185 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	if (dcn20_clk_src_construct(clk_src, ctx, bios, id,
clk_src          1187 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		clk_src->base.dp_clk_src = dp_clk_src;
clk_src          1188 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		return &clk_src->base;
clk_src          1191 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	kfree(clk_src);
clk_src          1273 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c void dcn20_clock_source_destroy(struct clock_source **clk_src)
clk_src          1275 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	kfree(TO_DCE110_CLK_SRC(*clk_src));
clk_src          1276 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	*clk_src = NULL;
clk_src            92 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h void dcn20_clock_source_destroy(struct clock_source **clk_src);
clk_src          1129 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	struct dce110_clk_src *clk_src =
clk_src          1132 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	if (!clk_src)
clk_src          1135 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	if (dcn20_clk_src_construct(clk_src, ctx, bios, id,
clk_src          1137 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 		clk_src->base.dp_clk_src = dp_clk_src;
clk_src          1138 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 		return &clk_src->base;
clk_src            34 drivers/gpu/drm/omapdrm/dss/dpi.c 	enum dss_clk_source clk_src;
clk_src           224 drivers/gpu/drm/omapdrm/dss/dpi.c 	ctx->clkout_idx = dss_pll_get_clkout_idx_for_src(dpi->clk_src);
clk_src           302 drivers/gpu/drm/omapdrm/dss/dpi.c 	dss_select_lcd_clk_source(dpi->dss, channel, dpi->clk_src);
clk_src           525 drivers/gpu/drm/omapdrm/dss/dpi.c 	dpi->clk_src = dpi_get_clk_src(dpi);
clk_src           527 drivers/gpu/drm/omapdrm/dss/dpi.c 	pll = dss_pll_find_by_src(dpi->dss, dpi->clk_src);
clk_src            66 drivers/gpu/drm/omapdrm/dss/dss.c 				 enum dss_clk_source clk_src);
clk_src           177 drivers/gpu/drm/omapdrm/dss/dss.c 					enum dss_clk_source clk_src,
clk_src           189 drivers/gpu/drm/omapdrm/dss/dss.c 		switch (clk_src) {
clk_src           203 drivers/gpu/drm/omapdrm/dss/dss.c 		switch (clk_src) {
clk_src           219 drivers/gpu/drm/omapdrm/dss/dss.c 		switch (clk_src) {
clk_src           330 drivers/gpu/drm/omapdrm/dss/dss.c const char *dss_get_clk_source_name(enum dss_clk_source clk_src)
clk_src           332 drivers/gpu/drm/omapdrm/dss/dss.c 	return dss_generic_clk_source_names[clk_src];
clk_src           405 drivers/gpu/drm/omapdrm/dss/dss.c 					enum dss_clk_source clk_src)
clk_src           413 drivers/gpu/drm/omapdrm/dss/dss.c 	if (WARN_ON(dss->feat->has_lcd_clk_src && clk_src != DSS_CLK_SRC_FCK))
clk_src           416 drivers/gpu/drm/omapdrm/dss/dss.c 	switch (clk_src) {
clk_src           435 drivers/gpu/drm/omapdrm/dss/dss.c 	dss->dispc_clk_source = clk_src;
clk_src           439 drivers/gpu/drm/omapdrm/dss/dss.c 			       enum dss_clk_source clk_src)
clk_src           443 drivers/gpu/drm/omapdrm/dss/dss.c 	switch (clk_src) {
clk_src           463 drivers/gpu/drm/omapdrm/dss/dss.c 	dss->dsi_clk_source[dsi_module] = clk_src;
clk_src           468 drivers/gpu/drm/omapdrm/dss/dss.c 				enum dss_clk_source clk_src)
clk_src           479 drivers/gpu/drm/omapdrm/dss/dss.c 	if (clk_src == DSS_CLK_SRC_FCK) {
clk_src           485 drivers/gpu/drm/omapdrm/dss/dss.c 	r = dss_ctrl_pll_set_control_mux(dss, clk_src, channel);
clk_src           496 drivers/gpu/drm/omapdrm/dss/dss.c 				 enum dss_clk_source clk_src)
clk_src           511 drivers/gpu/drm/omapdrm/dss/dss.c 	if (clk_src == DSS_CLK_SRC_FCK) {
clk_src           517 drivers/gpu/drm/omapdrm/dss/dss.c 	if (WARN_ON(allowed_plls[channel] != clk_src))
clk_src           527 drivers/gpu/drm/omapdrm/dss/dss.c 				 enum dss_clk_source clk_src)
clk_src           540 drivers/gpu/drm/omapdrm/dss/dss.c 	if (clk_src == DSS_CLK_SRC_FCK) {
clk_src           546 drivers/gpu/drm/omapdrm/dss/dss.c 	if (WARN_ON(allowed_plls[channel] != clk_src))
clk_src           556 drivers/gpu/drm/omapdrm/dss/dss.c 			       enum dss_clk_source clk_src)
clk_src           562 drivers/gpu/drm/omapdrm/dss/dss.c 		dss_select_dispc_clk_source(dss, clk_src);
clk_src           563 drivers/gpu/drm/omapdrm/dss/dss.c 		dss->lcd_clk_source[idx] = clk_src;
clk_src           567 drivers/gpu/drm/omapdrm/dss/dss.c 	r = dss->feat->ops->select_lcd_source(dss, channel, clk_src);
clk_src           571 drivers/gpu/drm/omapdrm/dss/dss.c 	dss->lcd_clk_source[idx] = clk_src;
clk_src           313 drivers/gpu/drm/omapdrm/dss/dss.h const char *dss_get_clk_source_name(enum dss_clk_source clk_src);
clk_src           328 drivers/gpu/drm/omapdrm/dss/dss.h 			       enum dss_clk_source clk_src);
clk_src           331 drivers/gpu/drm/omapdrm/dss/dss.h 			       enum dss_clk_source clk_src);
clk_src           439 drivers/i2c/busses/i2c-mt65xx.c static int mtk_i2c_calculate_speed(struct mtk_i2c *i2c, unsigned int clk_src,
clk_src           463 drivers/i2c/busses/i2c-mt65xx.c 	opt_div = DIV_ROUND_UP(clk_src >> 1, target_speed);
clk_src           490 drivers/i2c/busses/i2c-mt65xx.c 	if ((clk_src / (2 * sample_cnt * step_cnt)) > target_speed) {
clk_src           506 drivers/i2c/busses/i2c-mt65xx.c 	unsigned int clk_src;
clk_src           514 drivers/i2c/busses/i2c-mt65xx.c 	clk_src = parent_clk / i2c->clk_src_div;
clk_src           519 drivers/i2c/busses/i2c-mt65xx.c 		ret = mtk_i2c_calculate_speed(i2c, clk_src, MAX_FS_MODE_SPEED,
clk_src           527 drivers/i2c/busses/i2c-mt65xx.c 		ret = mtk_i2c_calculate_speed(i2c, clk_src, target_speed,
clk_src           539 drivers/i2c/busses/i2c-mt65xx.c 		ret = mtk_i2c_calculate_speed(i2c, clk_src, target_speed,
clk_src           135 drivers/iio/adc/stm32-dfsdm-core.c 	unsigned int clk_div = priv->spi_clk_out_div, clk_src;
clk_src           146 drivers/iio/adc/stm32-dfsdm-core.c 		clk_src = priv->aclk ? 1 : 0;
clk_src           149 drivers/iio/adc/stm32-dfsdm-core.c 					 DFSDM_CHCFGR1_CKOUTSRC(clk_src));
clk_src           656 drivers/mmc/host/alcor.c 	u16 clk_src = 0;
clk_src           677 drivers/mmc/host/alcor.c 			clk_src = cfg->clk_src_reg;
clk_src           682 drivers/mmc/host/alcor.c 	clk_src |= ((clk_div - 1) << 8);
clk_src           683 drivers/mmc/host/alcor.c 	clk_src |= AU6601_CLK_ENABLE;
clk_src           686 drivers/mmc/host/alcor.c 			clock, tmp_clock, clk_div, clk_src);
clk_src           688 drivers/mmc/host/alcor.c 	alcor_write16(priv, clk_src, AU6601_CLK_SELECT);
clk_src           278 drivers/net/can/flexcan.c 	u8 clk_src;	/* clock source of CAN Protocol Engine */
clk_src          1400 drivers/net/can/flexcan.c 	if (priv->clk_src)
clk_src          1542 drivers/net/can/flexcan.c 	u8 clk_src = 1;
clk_src          1555 drivers/net/can/flexcan.c 				    "fsl,clk-source", &clk_src);
clk_src          1625 drivers/net/can/flexcan.c 	priv->clk_src = clk_src;
clk_src           359 drivers/ptp/ptp_qoriq.c static u32 ptp_qoriq_nominal_freq(u32 clk_src)
clk_src           363 drivers/ptp/ptp_qoriq.c 	clk_src /= 1000000;
clk_src           364 drivers/ptp/ptp_qoriq.c 	remainder = clk_src % 100;
clk_src           366 drivers/ptp/ptp_qoriq.c 		clk_src -= remainder;
clk_src           367 drivers/ptp/ptp_qoriq.c 		clk_src += 100;
clk_src           371 drivers/ptp/ptp_qoriq.c 		clk_src -= 100;
clk_src           373 drivers/ptp/ptp_qoriq.c 	} while (1000 % clk_src);
clk_src           375 drivers/ptp/ptp_qoriq.c 	return clk_src * 1000000;
clk_src           403 drivers/ptp/ptp_qoriq.c 	u32 clk_src = 0;
clk_src           409 drivers/ptp/ptp_qoriq.c 		clk_src = clk_get_rate(clk);
clk_src           413 drivers/ptp/ptp_qoriq.c 	if (clk_src <= 100000000UL) {
clk_src           418 drivers/ptp/ptp_qoriq.c 	nominal_freq = ptp_qoriq_nominal_freq(clk_src);
clk_src           430 drivers/ptp/ptp_qoriq.c 	freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);
clk_src           441 drivers/ptp/ptp_qoriq.c 	max_adj = 1000000000ULL * (clk_src - nominal_freq);
clk_src            47 drivers/staging/comedi/drivers/addi_apci_1500.c 	unsigned int clk_src;
clk_src           652 drivers/staging/comedi/drivers/addi_apci_1500.c 		devpriv->clk_src = data[1];
clk_src           653 drivers/staging/comedi/drivers/addi_apci_1500.c 		if (devpriv->clk_src == 2)
clk_src           654 drivers/staging/comedi/drivers/addi_apci_1500.c 			devpriv->clk_src = 3;
clk_src           655 drivers/staging/comedi/drivers/addi_apci_1500.c 		outw(devpriv->clk_src, devpriv->addon + APCI1500_CLK_SEL_REG);
clk_src           658 drivers/staging/comedi/drivers/addi_apci_1500.c 		switch (devpriv->clk_src) {
clk_src           662 drivers/staging/comedi/drivers/amplc_pci230.c 	unsigned int clk_src, cnt;
clk_src           664 drivers/staging/comedi/drivers/amplc_pci230.c 	for (clk_src = CLK_10MHZ;; clk_src++) {
clk_src           665 drivers/staging/comedi/drivers/amplc_pci230.c 		cnt = pci230_divide_ns(ns, pci230_timebase[clk_src], flags);
clk_src           666 drivers/staging/comedi/drivers/amplc_pci230.c 		if (cnt <= 65536 || clk_src == CLK_1KHZ)
clk_src           670 drivers/staging/comedi/drivers/amplc_pci230.c 	return clk_src;
clk_src           676 drivers/staging/comedi/drivers/amplc_pci230.c 	unsigned int clk_src;
clk_src           678 drivers/staging/comedi/drivers/amplc_pci230.c 	clk_src = pci230_choose_clk_count(*ns, &count, flags);
clk_src           679 drivers/staging/comedi/drivers/amplc_pci230.c 	*ns = count * pci230_timebase[clk_src];
clk_src           686 drivers/staging/comedi/drivers/amplc_pci230.c 	unsigned int clk_src;
clk_src           692 drivers/staging/comedi/drivers/amplc_pci230.c 	clk_src = pci230_choose_clk_count(ns, &count, flags);
clk_src           694 drivers/staging/comedi/drivers/amplc_pci230.c 	outb(pci230_clk_config(ct, clk_src), dev->iobase + PCI230_ZCLK_SCE);
clk_src           304 drivers/staging/comedi/drivers/ni_tio.c 					unsigned int *clk_src)
clk_src           366 drivers/staging/comedi/drivers/ni_tio.c 	*clk_src = clock_source;
clk_src           371 drivers/staging/comedi/drivers/ni_tio.c 				    unsigned int *clk_src)
clk_src           424 drivers/staging/comedi/drivers/ni_tio.c 	*clk_src = clock_source;
clk_src           429 drivers/staging/comedi/drivers/ni_tio.c 					   unsigned int *clk_src)
clk_src           435 drivers/staging/comedi/drivers/ni_tio.c 		return ni_m_series_clock_src_select(counter, clk_src);
clk_src           437 drivers/staging/comedi/drivers/ni_tio.c 		return ni_660x_clock_src_select(counter, clk_src);
clk_src           450 drivers/staging/comedi/drivers/ni_tio.c 	unsigned int clk_src = 0;
clk_src           482 drivers/staging/comedi/drivers/ni_tio.c 	ret = ni_tio_generic_clock_src_select(counter, &clk_src);
clk_src           485 drivers/staging/comedi/drivers/ni_tio.c 	ret = ni_tio_clock_period_ps(counter, clk_src, &ps);
clk_src           617 drivers/staging/comedi/drivers/ni_tio.c 	unsigned int clk_src = clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK;
clk_src           621 drivers/staging/comedi/drivers/ni_tio.c 	switch (clk_src) {
clk_src           645 drivers/staging/comedi/drivers/ni_tio.c 			if (clk_src == NI_GPCT_RTSI_CLOCK_SRC_BITS(i)) {
clk_src           653 drivers/staging/comedi/drivers/ni_tio.c 			if (clk_src == NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(i)) {
clk_src           668 drivers/staging/comedi/drivers/ni_tio.c 	unsigned int clk_src = clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK;
clk_src           672 drivers/staging/comedi/drivers/ni_tio.c 	switch (clk_src) {
clk_src           702 drivers/staging/comedi/drivers/ni_tio.c 			if (clk_src == NI_GPCT_RTSI_CLOCK_SRC_BITS(i)) {
clk_src           710 drivers/staging/comedi/drivers/ni_tio.c 			if (clk_src == NI_GPCT_PFI_CLOCK_SRC_BITS(i)) {
clk_src           346 drivers/video/fbdev/omap2/omapfb/dss/dss.c const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src)
clk_src           348 drivers/video/fbdev/omap2/omapfb/dss/dss.c 	return dss_generic_clk_source_names[clk_src];
clk_src           395 drivers/video/fbdev/omap2/omapfb/dss/dss.c static void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src)
clk_src           400 drivers/video/fbdev/omap2/omapfb/dss/dss.c 	switch (clk_src) {
clk_src           419 drivers/video/fbdev/omap2/omapfb/dss/dss.c 	dss.dispc_clk_source = clk_src;
clk_src           423 drivers/video/fbdev/omap2/omapfb/dss/dss.c 		enum omap_dss_clk_source clk_src)
clk_src           427 drivers/video/fbdev/omap2/omapfb/dss/dss.c 	switch (clk_src) {
clk_src           447 drivers/video/fbdev/omap2/omapfb/dss/dss.c 	dss.dsi_clk_source[dsi_module] = clk_src;
clk_src           451 drivers/video/fbdev/omap2/omapfb/dss/dss.c 		enum omap_dss_clk_source clk_src)
clk_src           456 drivers/video/fbdev/omap2/omapfb/dss/dss.c 		dss_select_dispc_clk_source(clk_src);
clk_src           460 drivers/video/fbdev/omap2/omapfb/dss/dss.c 	switch (clk_src) {
clk_src           484 drivers/video/fbdev/omap2/omapfb/dss/dss.c 	dss.lcd_clk_source[ix] = clk_src;
clk_src           269 drivers/video/fbdev/omap2/omapfb/dss/dss.h const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
clk_src           294 drivers/video/fbdev/omap2/omapfb/dss/dss.h 		enum omap_dss_clk_source clk_src);
clk_src           296 drivers/video/fbdev/omap2/omapfb/dss/dss.h 		enum omap_dss_clk_source clk_src);
clk_src            80 sound/firewire/bebob/bebob_maudio.c 	unsigned int clk_src;
clk_src           171 sound/firewire/bebob/bebob_maudio.c avc_maudio_set_special_clk(struct snd_bebob *bebob, unsigned int clk_src,
clk_src           193 sound/firewire/bebob/bebob_maudio.c 	buf[6]  = 0xff & clk_src;	/* clock source */
clk_src           213 sound/firewire/bebob/bebob_maudio.c 	params->clk_src		= buf[6];
clk_src           352 sound/firewire/bebob/bebob_maudio.c 	*id = params->clk_src;
clk_src           372 sound/firewire/bebob/bebob_maudio.c 	uval->value.enumerated.item[0] = params->clk_src;
clk_src           500 sound/firewire/bebob/bebob_maudio.c 					 params->clk_src,
clk_src           569 sound/firewire/bebob/bebob_maudio.c 					 params->clk_src,
clk_src            28 sound/soc/codecs/adau1373.c 	unsigned int clk_src;
clk_src           833 sound/soc/codecs/adau1373.c 	if (adau1373->dais[dai].clk_src == ADAU1373_CLK_SRC_PLL1)
clk_src          1172 sound/soc/codecs/adau1373.c 	adau1373_dai->clk_src = clk_id;
clk_src           396 sound/soc/codecs/adau17x1.c 	switch (adau->clk_src) {
clk_src           420 sound/soc/codecs/adau17x1.c 	adau->clk_src = clk_id;
clk_src           467 sound/soc/codecs/adau17x1.c 	switch (adau->clk_src) {
clk_src           958 sound/soc/codecs/adau17x1.c 	if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK)
clk_src          1049 sound/soc/codecs/adau17x1.c 		adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO;
clk_src            39 sound/soc/codecs/adau17x1.h 	enum adau17x1_clk_src clk_src;
clk_src           797 sound/soc/codecs/adau1977.c 	unsigned int clk_src;
clk_src           808 sound/soc/codecs/adau1977.c 		clk_src = 0;
clk_src           811 sound/soc/codecs/adau1977.c 		clk_src = ADAU1977_PLL_CLK_S;
clk_src           835 sound/soc/codecs/adau1977.c 		ADAU1977_PLL_CLK_S, clk_src);
clk_src           144 sound/soc/codecs/adav80x.c 	enum adav80x_clk_src clk_src;
clk_src           218 sound/soc/codecs/adav80x.c 	switch (adav80x->clk_src) {
clk_src           557 sound/soc/codecs/adav80x.c 		if (adav80x->clk_src != clk_id) {
clk_src           560 sound/soc/codecs/adav80x.c 			adav80x->clk_src = clk_id;
clk_src          1344 sound/soc/codecs/da7213.c 	if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq))
clk_src          1368 sound/soc/codecs/da7213.c 	da7213->clk_src = clk_id;
clk_src           529 sound/soc/codecs/da7213.h 	int clk_src;
clk_src          1164 sound/soc/codecs/da7219.c 	if ((da7219->clk_src == clk_id) && (da7219->mclk_rate == freq))
clk_src          1191 sound/soc/codecs/da7219.c 	da7219->clk_src = clk_id;
clk_src           826 sound/soc/codecs/da7219.h 	int clk_src;
clk_src           392 sound/soc/codecs/nau8540.c 		osr_adc_sel[osr].clk_src << NAU8540_CLK_ADC_SRC_SFT);
clk_src           235 sound/soc/codecs/nau8540.h 	unsigned int clk_src;
clk_src          1087 sound/soc/codecs/nau8824.c 			osr_dac_sel[osr].clk_src << NAU8824_CLK_DAC_SRC_SFT);
clk_src          1097 sound/soc/codecs/nau8824.c 			osr_adc_sel[osr].clk_src << NAU8824_CLK_ADC_SRC_SFT);
clk_src           467 sound/soc/codecs/nau8824.h 	unsigned int clk_src;
clk_src           102 sound/soc/codecs/nau8825.c 	unsigned int clk_src;
clk_src          1267 sound/soc/codecs/nau8825.c 			osr_dac_sel[osr].clk_src << NAU8825_CLK_DAC_SRC_SFT);
clk_src          1278 sound/soc/codecs/nau8825.c 			osr_adc_sel[osr].clk_src << NAU8825_CLK_ADC_SRC_SFT);
clk_src           808 sound/soc/codecs/rt274.c 	unsigned int clk_src, mclk_en;
clk_src           815 sound/soc/codecs/rt274.c 		clk_src = RT274_CLK_SRC_MCLK;
clk_src           819 sound/soc/codecs/rt274.c 		clk_src = RT274_CLK_SRC_MCLK;
clk_src           823 sound/soc/codecs/rt274.c 		clk_src = RT274_CLK_SRC_PLL2;
clk_src           827 sound/soc/codecs/rt274.c 		clk_src = RT274_CLK_SRC_MCLK;
clk_src           834 sound/soc/codecs/rt274.c 			RT274_CLK_SRC_MASK, clk_src);
clk_src          2027 sound/soc/codecs/rt5640.c 		unsigned int filter_mask, unsigned int clk_src)
clk_src          2033 sound/soc/codecs/rt5640.c 	switch (clk_src) {
clk_src          2048 sound/soc/codecs/rt5640.c 			| (clk_src << RT5640_STO_DAC_M_SFT);
clk_src          2054 sound/soc/codecs/rt5640.c 			| (clk_src << RT5640_MDA_L_M_SFT);
clk_src          2060 sound/soc/codecs/rt5640.c 			| (clk_src << RT5640_MDA_R_M_SFT);
clk_src          2066 sound/soc/codecs/rt5640.c 			| (clk_src << RT5640_ADC_M_SFT);
clk_src          2072 sound/soc/codecs/rt5640.c 			| (clk_src << RT5640_MAD_L_M_SFT);
clk_src          2078 sound/soc/codecs/rt5640.c 			| (clk_src << RT5640_MAD_R_M_SFT);
clk_src          2158 sound/soc/codecs/rt5640.h 		unsigned int filter_mask, unsigned int clk_src);
clk_src           956 sound/soc/codecs/rt5645.c 		unsigned int filter_mask, unsigned int clk_src)
clk_src           963 sound/soc/codecs/rt5645.c 	switch (clk_src) {
clk_src           977 sound/soc/codecs/rt5645.c 			| (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
clk_src           983 sound/soc/codecs/rt5645.c 			| (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
clk_src           989 sound/soc/codecs/rt5645.c 			| (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
clk_src           995 sound/soc/codecs/rt5645.c 			| (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
clk_src          1001 sound/soc/codecs/rt5645.c 			| (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
clk_src          1007 sound/soc/codecs/rt5645.c 			| (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
clk_src          2201 sound/soc/codecs/rt5645.h 		unsigned int filter_mask, unsigned int clk_src);
clk_src          2173 sound/soc/codecs/rt5663.c 		unsigned int filter_mask, unsigned int clk_src)
clk_src          2181 sound/soc/codecs/rt5663.c 	switch (clk_src) {
clk_src          2192 sound/soc/codecs/rt5663.c 		asrc2_value |= clk_src << RT5663_DA_STO1_TRACK_SHIFT;
clk_src          2199 sound/soc/codecs/rt5663.c 			asrc3_value |= clk_src << RT5663_V2_AD_STO1_TRACK_SHIFT;
clk_src          2203 sound/soc/codecs/rt5663.c 			asrc2_value |= clk_src << RT5663_AD_STO1_TRACK_SHIFT;
clk_src          1126 sound/soc/codecs/rt5663.h 	unsigned int filter_mask, unsigned int clk_src);
clk_src          1044 sound/soc/codecs/rt5665.c 		unsigned int filter_mask, unsigned int clk_src)
clk_src          1051 sound/soc/codecs/rt5665.c 	switch (clk_src) {
clk_src          1068 sound/soc/codecs/rt5665.c 			| (clk_src << RT5665_DA_STO1_CLK_SEL_SFT);
clk_src          1074 sound/soc/codecs/rt5665.c 			| (clk_src << RT5665_DA_STO2_CLK_SEL_SFT);
clk_src          1080 sound/soc/codecs/rt5665.c 			| (clk_src << RT5665_DA_MONOL_CLK_SEL_SFT);
clk_src          1086 sound/soc/codecs/rt5665.c 			| (clk_src << RT5665_DA_MONOR_CLK_SEL_SFT);
clk_src          1092 sound/soc/codecs/rt5665.c 			| (clk_src << RT5665_AD_STO1_CLK_SEL_SFT);
clk_src          1098 sound/soc/codecs/rt5665.c 			| (clk_src << RT5665_AD_STO2_CLK_SEL_SFT);
clk_src          1104 sound/soc/codecs/rt5665.c 			| (clk_src << RT5665_AD_MONOL_CLK_SEL_SFT);
clk_src          1110 sound/soc/codecs/rt5665.c 			| (clk_src << RT5665_AD_MONOR_CLK_SEL_SFT);
clk_src          2003 sound/soc/codecs/rt5665.h 		unsigned int filter_mask, unsigned int clk_src);
clk_src           817 sound/soc/codecs/rt5668.c 		unsigned int filter_mask, unsigned int clk_src)
clk_src           820 sound/soc/codecs/rt5668.c 	switch (clk_src) {
clk_src           833 sound/soc/codecs/rt5668.c 			clk_src << RT5668_FILTER_CLK_SEL_SFT);
clk_src           839 sound/soc/codecs/rt5668.c 			clk_src << RT5668_FILTER_CLK_SEL_SFT);
clk_src          1313 sound/soc/codecs/rt5668.h 		unsigned int filter_mask, unsigned int clk_src);
clk_src           806 sound/soc/codecs/rt5670.c 			    unsigned int filter_mask, unsigned int clk_src)
clk_src           811 sound/soc/codecs/rt5670.c 	if (clk_src > RT5670_CLK_SEL_SYS3)
clk_src           817 sound/soc/codecs/rt5670.c 				| (clk_src <<  RT5670_DA_STO_CLK_SEL_SFT);
clk_src           823 sound/soc/codecs/rt5670.c 				| (clk_src <<  RT5670_DA_MONOL_CLK_SEL_SFT);
clk_src           829 sound/soc/codecs/rt5670.c 				| (clk_src <<  RT5670_DA_MONOR_CLK_SEL_SFT);
clk_src           835 sound/soc/codecs/rt5670.c 				| (clk_src <<  RT5670_AD_STO1_CLK_SEL_SFT);
clk_src           841 sound/soc/codecs/rt5670.c 				| (clk_src <<  RT5670_AD_MONOL_CLK_SEL_SFT);
clk_src           847 sound/soc/codecs/rt5670.c 				| (clk_src <<  RT5670_AD_MONOR_CLK_SEL_SFT);
clk_src           853 sound/soc/codecs/rt5670.c 				| (clk_src <<  RT5670_UP_CLK_SEL_SFT);
clk_src           859 sound/soc/codecs/rt5670.c 				| (clk_src <<  RT5670_DOWN_CLK_SEL_SFT);
clk_src          1987 sound/soc/codecs/rt5670.h 			    unsigned int filter_mask, unsigned int clk_src);
clk_src          1057 sound/soc/codecs/rt5677.c 		unsigned int filter_mask, unsigned int clk_src)
clk_src          1067 sound/soc/codecs/rt5677.c 	switch (clk_src) {
clk_src          1091 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_DA_STO_CLK_SEL_SFT);
clk_src          1097 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_DA_MONO2L_CLK_SEL_SFT);
clk_src          1103 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_DA_MONO2R_CLK_SEL_SFT);
clk_src          1114 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_DA_MONO3L_CLK_SEL_SFT);
clk_src          1120 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_DA_MONO3R_CLK_SEL_SFT);
clk_src          1126 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_DA_MONO4L_CLK_SEL_SFT);
clk_src          1132 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_DA_MONO4R_CLK_SEL_SFT);
clk_src          1143 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_AD_STO1_CLK_SEL_SFT);
clk_src          1149 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_AD_STO2_CLK_SEL_SFT);
clk_src          1155 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_AD_STO3_CLK_SEL_SFT);
clk_src          1161 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_AD_STO4_CLK_SEL_SFT);
clk_src          1172 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_AD_MONOL_CLK_SEL_SFT);
clk_src          1178 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_AD_MONOR_CLK_SEL_SFT);
clk_src          1189 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_DSP_OB_0_3_CLK_SEL_SFT);
clk_src          1195 sound/soc/codecs/rt5677.c 			| (clk_src << RT5677_DSP_OB_4_7_CLK_SEL_SFT);
clk_src          1206 sound/soc/codecs/rt5677.c 			| ((clk_src - 1) << RT5677_I2S1_CLK_SEL_SFT);
clk_src          1212 sound/soc/codecs/rt5677.c 			| ((clk_src - 1) << RT5677_I2S2_CLK_SEL_SFT);
clk_src          1218 sound/soc/codecs/rt5677.c 			| ((clk_src - 1) << RT5677_I2S3_CLK_SEL_SFT);
clk_src          1224 sound/soc/codecs/rt5677.c 			| ((clk_src - 1) << RT5677_I2S4_CLK_SEL_SFT);
clk_src          1859 sound/soc/codecs/rt5677.h 		unsigned int filter_mask, unsigned int clk_src);
clk_src           827 sound/soc/codecs/rt5682.c 		unsigned int filter_mask, unsigned int clk_src)
clk_src           830 sound/soc/codecs/rt5682.c 	switch (clk_src) {
clk_src           843 sound/soc/codecs/rt5682.c 			clk_src << RT5682_FILTER_CLK_SEL_SFT);
clk_src           849 sound/soc/codecs/rt5682.c 			clk_src << RT5682_FILTER_CLK_SEL_SFT);
clk_src          1333 sound/soc/codecs/rt5682.h 		unsigned int filter_mask, unsigned int clk_src);
clk_src           206 sound/soc/intel/skylake/skl-nhlt.c 	u8 clk_src;
clk_src           263 sound/soc/intel/skylake/skl-nhlt.c 				clk_src = get_clk_src(i2s_config->mclk,
clk_src           266 sound/soc/intel/skylake/skl-nhlt.c 				clk_src = get_clk_src(i2s_config_ext->mclk,
clk_src           270 sound/soc/intel/skylake/skl-nhlt.c 			parent = skl_get_parent_clk(clk_src);
clk_src           299 sound/soc/intel/skylake/skl-nhlt.c 	u8 clk_src;
clk_src           307 sound/soc/intel/skylake/skl-nhlt.c 		clk_src = get_clk_src(i2s_config->mclk,
clk_src           312 sound/soc/intel/skylake/skl-nhlt.c 		clk_src = get_clk_src(i2s_config_ext->mclk,
clk_src           326 sound/soc/intel/skylake/skl-nhlt.c 	parent = skl_get_parent_clk(clk_src);
clk_src          3250 sound/soc/intel/skylake/skl-topology.c 		astate_table[astate_cfg_idx].clk_src = tkn_elem->value;
clk_src            47 sound/soc/intel/skylake/skl.h 	u32 clk_src;
clk_src           411 sound/soc/qcom/qdsp6/q6afe.c 	u16                  clk_src;
clk_src           962 sound/soc/qcom/qdsp6/q6afe.c 			  int clk_src, int clk_root,
clk_src           980 sound/soc/qcom/qdsp6/q6afe.c 		ccfg.clk_src = clk_src;
clk_src           989 sound/soc/qcom/qdsp6/q6afe.c 		ccfg.clk_src = clk_src;
clk_src          1000 sound/soc/qcom/qdsp6/q6afe.c 		cset.clk_attri = clk_src;
clk_src           209 sound/soc/qcom/qdsp6/q6afe.h 			  int clk_src, int clk_root,
clk_src            77 sound/soc/rockchip/rockchip_pdm.c 				unsigned int *clk_src, unsigned int *clk_out)
clk_src            96 sound/soc/rockchip/rockchip_pdm.c 			*clk_src = clkref[i].clk;
clk_src           103 sound/soc/rockchip/rockchip_pdm.c 		*clk_src = clk;
clk_src           152 sound/soc/rockchip/rockchip_pdm.c 	unsigned int clk_src, clk_out = 0;
clk_src           161 sound/soc/rockchip/rockchip_pdm.c 	clk_rate = get_pdm_clk(pdm, samplerate, &clk_src, &clk_out);
clk_src           165 sound/soc/rockchip/rockchip_pdm.c 	ret = clk_set_rate(pdm->clk, clk_src);
clk_src           170 sound/soc/rockchip/rockchip_pdm.c 		rational_best_approximation(clk_out, clk_src,