clk_mgr_internal 73 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); clk_mgr_internal 148 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 114 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c int dce_adjust_dp_ref_freq_for_ss(struct clk_mgr_internal *clk_mgr_dce, int dp_ref_clk_khz) clk_mgr_internal 131 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 157 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 198 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 233 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 272 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c static void dce_clock_read_integrated_info(struct clk_mgr_internal *clk_mgr_dce) clk_mgr_internal 325 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c void dce_clock_read_ss_info(struct clk_mgr_internal *clk_mgr_dce) clk_mgr_internal 399 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 436 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c struct clk_mgr_internal *clk_mgr) clk_mgr_internal 33 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.h int dce_adjust_dp_ref_freq_for_ss(struct clk_mgr_internal *clk_mgr_dce, int dp_ref_clk_khz); clk_mgr_internal 44 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.h struct clk_mgr_internal *clk_mgr_dce); clk_mgr_internal 46 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.h void dce_clock_read_ss_info(struct clk_mgr_internal *dccg_dce); clk_mgr_internal 252 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 282 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c struct clk_mgr_internal *clk_mgr) clk_mgr_internal 31 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.h struct clk_mgr_internal *clk_mgr); clk_mgr_internal 72 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 125 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz) clk_mgr_internal 168 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr) clk_mgr_internal 197 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 227 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c struct clk_mgr_internal *clk_mgr) clk_mgr_internal 32 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.h struct clk_mgr_internal *clk_mgr); clk_mgr_internal 36 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.h int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz); clk_mgr_internal 37 drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.h int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr); clk_mgr_internal 56 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c static void dce121_clock_patch_xgmi_ss_info(struct clk_mgr_internal *clk_mgr_dce) clk_mgr_internal 88 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 128 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) clk_mgr_internal 140 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) clk_mgr_internal 29 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.h void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr); clk_mgr_internal 30 drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.h void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr); clk_mgr_internal 42 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_clocks) clk_mgr_internal 88 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c static void ramp_up_dispclk_with_dpp(struct clk_mgr_internal *clk_mgr, struct dc *dc, struct dc_clocks *new_clocks) clk_mgr_internal 129 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 228 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 251 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c void rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) clk_mgr_internal 29 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.h void rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu); clk_mgr_internal 54 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 71 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c int rv1_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigned int param) clk_mgr_internal 88 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) clk_mgr_internal 114 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) clk_mgr_internal 29 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz); clk_mgr_internal 30 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr); clk_mgr_internal 37 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv2_clk_mgr.c void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) clk_mgr_internal 29 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv2_clk_mgr.h void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu); clk_mgr_internal 102 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, clk_mgr_internal 120 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c static void update_global_dpp_clk(struct clk_mgr_internal *clk_mgr, unsigned int khz) clk_mgr_internal 132 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c static void update_display_clk(struct clk_mgr_internal *clk_mgr, unsigned int khz) clk_mgr_internal 145 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 166 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 190 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 323 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c struct clk_mgr_internal *clk_mgr_int = TO_CLK_MGR_INTERNAL(clk_mgr); clk_mgr_internal 387 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 429 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c struct clk_mgr_internal *clk_mgr, clk_mgr_internal 36 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, clk_mgr_internal 42 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h struct clk_mgr_internal *clk_mgr, clk_mgr_internal 59 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 135 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) clk_mgr_internal 168 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 333 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); clk_mgr_internal 518 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c struct clk_mgr_internal *clk_mgr, clk_mgr_internal 35 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.h struct clk_mgr_internal *clk_mgr, clk_mgr_internal 56 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c int rn_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigned int param) clk_mgr_internal 73 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) clk_mgr_internal 82 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) clk_mgr_internal 109 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) clk_mgr_internal 123 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) clk_mgr_internal 138 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz) clk_mgr_internal 153 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz) clk_mgr_internal 161 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c int rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) clk_mgr_internal 178 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c void rn_vbios_smu_set_display_count(struct clk_mgr_internal *clk_mgr, int display_count) clk_mgr_internal 186 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c void rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr) clk_mgr_internal 194 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c void rn_vbios_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr) clk_mgr_internal 29 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr); clk_mgr_internal 30 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz); clk_mgr_internal 31 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr); clk_mgr_internal 32 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz); clk_mgr_internal 33 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz); clk_mgr_internal 34 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz); clk_mgr_internal 35 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h int rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz); clk_mgr_internal 36 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h void rn_vbios_smu_set_display_count(struct clk_mgr_internal *clk_mgr, int display_count); clk_mgr_internal 37 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h void rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr); clk_mgr_internal 38 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h void rn_vbios_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr); clk_mgr_internal 70 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h container_of(clk_mgr, struct clk_mgr_internal, base) clk_mgr_internal 265 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h int (*set_dispclk)(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz); clk_mgr_internal 266 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h int (*set_dprefclk)(struct clk_mgr_internal *clk_mgr);