clk_hw_register_divider_table 448 drivers/clk/clk-aspeed.c hw = clk_hw_register_divider_table(dev, "sd_extclk", "sd_extclk_gate", clk_hw_register_divider_table 457 drivers/clk/clk-aspeed.c hw = clk_hw_register_divider_table(dev, "mac", "hpll", 0, clk_hw_register_divider_table 466 drivers/clk/clk-aspeed.c hw = clk_hw_register_divider_table(dev, "lhclk", "hpll", 0, clk_hw_register_divider_table 475 drivers/clk/clk-aspeed.c hw = clk_hw_register_divider_table(dev, "bclk", "hpll", 0, clk_hw_register_divider_table 498 drivers/clk/clk-aspeed.c hw = clk_hw_register_divider_table(dev, "eclk", "eclk-mux", 0, clk_hw_register_divider_table 619 drivers/clk/clk-aspeed.c hw = clk_hw_register_divider_table(NULL, "apb", "hpll", 0, clk_hw_register_divider_table 467 drivers/clk/clk-ast2600.c hw = clk_hw_register_divider_table(dev, "emmc_extclk", "emmc_extclk_gate", 0, clk_hw_register_divider_table 481 drivers/clk/clk-ast2600.c hw = clk_hw_register_divider_table(dev, "sd_extclk", "sd_extclk_gate", clk_hw_register_divider_table 490 drivers/clk/clk-ast2600.c hw = clk_hw_register_divider_table(dev, "mac12", "hpll", 0, clk_hw_register_divider_table 499 drivers/clk/clk-ast2600.c hw = clk_hw_register_divider_table(dev, "mac34", "hpll", 0, clk_hw_register_divider_table 508 drivers/clk/clk-ast2600.c hw = clk_hw_register_divider_table(dev, "lhclk", "hpll", 0, clk_hw_register_divider_table 531 drivers/clk/clk-ast2600.c hw = clk_hw_register_divider_table(dev, "bclk", "hpll", 0, clk_hw_register_divider_table 549 drivers/clk/clk-ast2600.c hw = clk_hw_register_divider_table(dev, "eclk", NULL, 0, clk_hw_register_divider_table 117 drivers/clk/clk-clps711x.c clk_hw_register_divider_table(NULL, "timer1", "timer_ref", 0, clk_hw_register_divider_table 121 drivers/clk/clk-clps711x.c clk_hw_register_divider_table(NULL, "timer2", "timer_ref", 0, clk_hw_register_divider_table 129 drivers/clk/clk-clps711x.c clk_hw_register_divider_table(NULL, "spi", "spi_ref", 0, clk_hw_register_divider_table 620 drivers/clk/clk-divider.c EXPORT_SYMBOL_GPL(clk_hw_register_divider_table); clk_hw_register_divider_table 513 drivers/clk/clk-stm32h7.c hws[SYS_D1CPRE] = clk_hw_register_divider_table(NULL, "d1cpre", clk_hw_register_divider_table 517 drivers/clk/clk-stm32h7.c hws[HCLK] = clk_hw_register_divider_table(NULL, "hclk", "d1cpre", clk_hw_register_divider_table 527 drivers/clk/clk-stm32h7.c hws[PCLK3] = clk_hw_register_divider_table(NULL, "pclk3", "hclk", 0, clk_hw_register_divider_table 533 drivers/clk/clk-stm32h7.c hws[PCLK1] = clk_hw_register_divider_table(NULL, "pclk1", "hclk", 0, clk_hw_register_divider_table 542 drivers/clk/clk-stm32h7.c hws[PCLK2] = clk_hw_register_divider_table(NULL, "pclk2", "hclk", 0, clk_hw_register_divider_table 551 drivers/clk/clk-stm32h7.c hws[PCLK4] = clk_hw_register_divider_table(NULL, "pclk4", "hclk", 0, clk_hw_register_divider_table 418 drivers/clk/clk-stm32mp1.c return clk_hw_register_divider_table(dev, clk_hw_register_divider_table 547 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, clk_hw_register_divider_table 600 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); clk_hw_register_divider_table 602 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); clk_hw_register_divider_table 603 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock); clk_hw_register_divider_table 272 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); clk_hw_register_divider_table 274 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); clk_hw_register_divider_table 275 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock); clk_hw_register_divider_table 276 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, base + 0xe0, 0, 2, 0, clk_enet_ref_table, &imx_ccm_lock); clk_hw_register_divider_table 191 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", clk_hw_register_divider_table 195 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video", clk_hw_register_divider_table 197 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", clk_hw_register_divider_table 225 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, clk_hw_register_divider_table 228 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_ENET2_REF] = clk_hw_register_divider_table(NULL, "enet2_ref", "pll6_enet", 0, clk_hw_register_divider_table 254 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", clk_hw_register_divider_table 258 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video", clk_hw_register_divider_table 260 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", clk_hw_register_divider_table 209 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, clk_hw_register_divider_table 211 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_ENET2_REF] = clk_hw_register_divider_table(NULL, "enet2_ref", "pll6_enet", 0, clk_hw_register_divider_table 218 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", clk_hw_register_divider_table 222 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video", clk_hw_register_divider_table 224 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", clk_hw_register_divider_table 441 drivers/clk/imx/clk-imx7d.c hws[IMX7D_PLL_DRAM_TEST_DIV] = clk_hw_register_divider_table(NULL, "pll_dram_test_div", "pll_dram_main_bypass", clk_hw_register_divider_table 443 drivers/clk/imx/clk-imx7d.c hws[IMX7D_PLL_AUDIO_TEST_DIV] = clk_hw_register_divider_table(NULL, "pll_audio_test_div", "pll_audio_main_clk", clk_hw_register_divider_table 445 drivers/clk/imx/clk-imx7d.c hws[IMX7D_PLL_AUDIO_POST_DIV] = clk_hw_register_divider_table(NULL, "pll_audio_post_div", "pll_audio_test_div", clk_hw_register_divider_table 447 drivers/clk/imx/clk-imx7d.c hws[IMX7D_PLL_VIDEO_TEST_DIV] = clk_hw_register_divider_table(NULL, "pll_video_test_div", "pll_video_main_clk", clk_hw_register_divider_table 449 drivers/clk/imx/clk-imx7d.c hws[IMX7D_PLL_VIDEO_POST_DIV] = clk_hw_register_divider_table(NULL, "pll_video_post_div", "pll_video_test_div", clk_hw_register_divider_table 72 drivers/clk/loongson1/clk-loongson1c.c hw = clk_hw_register_divider_table(NULL, "ahb_clk_div", "cpu_clk_div", clk_hw_register_divider_table 209 drivers/clk/samsung/clk.c clk_hw = clk_hw_register_divider_table(ctx->dev, clk_hw_register_divider_table 499 include/linux/clk-provider.h struct clk_hw *clk_hw_register_divider_table(struct device *dev,