clk_div           210 arch/mips/ath25/ar2315.c 	unsigned int clk_div;
clk_div           223 arch/mips/ath25/ar2315.c 		clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKM_DIV);
clk_div           224 arch/mips/ath25/ar2315.c 		clk_div = pllc_divide_table[clk_div];
clk_div           227 arch/mips/ath25/ar2315.c 		clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKC_DIV);
clk_div           228 arch/mips/ath25/ar2315.c 		clk_div = pllc_divide_table[clk_div];
clk_div           232 arch/mips/ath25/ar2315.c 		clk_div = 1;
clk_div           239 arch/mips/ath25/ar2315.c 	return pllc_out / (clk_div * cpu_div);
clk_div            63 arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c 	jtgc.s.clk_div = clock_div;
clk_div           225 arch/mips/cavium-octeon/octeon-usb.c static uint8_t clk_div[OCTEON_H_CLKDIV_SEL] = {1, 2, 4, 6, 8, 16, 24, 32};
clk_div           372 arch/mips/cavium-octeon/octeon-usb.c 		h_clk_rate = octeon_get_io_clock_rate() / clk_div[div];
clk_div           118 arch/mips/include/asm/octeon/cvmx-ciu-defs.h 		__BITFIELD_FIELD(uint64_t clk_div:3,
clk_div           631 drivers/bus/sunxi-rsb.c 	int clk_div, irq, ret;
clk_div           700 drivers/bus/sunxi-rsb.c 	clk_div = p_clk_freq / clk_freq / 2;
clk_div           701 drivers/bus/sunxi-rsb.c 	if (!clk_div)
clk_div           702 drivers/bus/sunxi-rsb.c 		clk_div = 1;
clk_div           703 drivers/bus/sunxi-rsb.c 	else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
clk_div           704 drivers/bus/sunxi-rsb.c 		clk_div = RSB_CCR_MAX_CLK_DIV + 1;
clk_div           706 drivers/bus/sunxi-rsb.c 	clk_delay = clk_div >> 1;
clk_div           710 drivers/bus/sunxi-rsb.c 	dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
clk_div           711 drivers/bus/sunxi-rsb.c 	writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
clk_div            63 drivers/clk/berlin/berlin2-div.c static u8 clk_div[] = { 1, 2, 4, 6, 8, 12, 1, 1 };
clk_div           203 drivers/clk/berlin/berlin2-div.c 		divider = clk_div[reg];
clk_div            28 drivers/clk/mxs/clk-div.c static inline struct clk_div *to_clk_div(struct clk_hw *hw)
clk_div            32 drivers/clk/mxs/clk-div.c 	return container_of(divider, struct clk_div, divider);
clk_div            38 drivers/clk/mxs/clk-div.c 	struct clk_div *div = to_clk_div(hw);
clk_div            46 drivers/clk/mxs/clk-div.c 	struct clk_div *div = to_clk_div(hw);
clk_div            54 drivers/clk/mxs/clk-div.c 	struct clk_div *div = to_clk_div(hw);
clk_div            73 drivers/clk/mxs/clk-div.c 	struct clk_div *div;
clk_div          1750 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 			  struct bxt_clk_div *clk_div)
clk_div          1767 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	clk_div->p1 = best_clock.p1;
clk_div          1768 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	clk_div->p2 = best_clock.p2;
clk_div          1770 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	clk_div->n = best_clock.n;
clk_div          1771 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	clk_div->m2_int = best_clock.m2 >> 22;
clk_div          1772 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	clk_div->m2_frac = best_clock.m2 & ((1 << 22) - 1);
clk_div          1773 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	clk_div->m2_frac_en = clk_div->m2_frac != 0;
clk_div          1775 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	clk_div->vco = best_clock.vco;
clk_div          1781 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 				    struct bxt_clk_div *clk_div)
clk_div          1786 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	*clk_div = bxt_dp_clk_val[0];
clk_div          1789 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 			*clk_div = bxt_dp_clk_val[i];
clk_div          1794 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	clk_div->vco = clock * 10 / 2 * clk_div->p1 * clk_div->p2;
clk_div          1798 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 				      const struct bxt_clk_div *clk_div)
clk_div          1802 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	int vco = clk_div->vco;
clk_div          1840 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	dpll_hw_state->ebb0 = PORT_PLL_P1(clk_div->p1) | PORT_PLL_P2(clk_div->p2);
clk_div          1841 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	dpll_hw_state->pll0 = clk_div->m2_int;
clk_div          1842 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	dpll_hw_state->pll1 = PORT_PLL_N(clk_div->n);
clk_div          1843 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	dpll_hw_state->pll2 = clk_div->m2_frac;
clk_div          1845 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	if (clk_div->m2_frac_en)
clk_div          1869 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	struct bxt_clk_div clk_div = {};
clk_div          1871 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	bxt_ddi_dp_pll_dividers(crtc_state, &clk_div);
clk_div          1873 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	return bxt_ddi_set_dpll_hw_state(crtc_state, &clk_div);
clk_div          1879 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	struct bxt_clk_div clk_div = {};
clk_div          1881 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	bxt_ddi_hdmi_pll_dividers(crtc_state, &clk_div);
clk_div          1883 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	return bxt_ddi_set_dpll_hw_state(crtc_state, &clk_div);
clk_div           489 drivers/gpu/drm/pl111/pl111_display.c 		container_of(hw, struct pl111_drm_dev_private, clk_div);
clk_div           508 drivers/gpu/drm/pl111/pl111_display.c 		container_of(hw, struct pl111_drm_dev_private, clk_div);
clk_div           541 drivers/gpu/drm/pl111/pl111_display.c 	struct clk_hw *div = &priv->clk_div;
clk_div            74 drivers/gpu/drm/pl111/pl111_drm.h 	struct clk_hw clk_div;
clk_div           187 drivers/gpu/drm/shmobile/shmob_drm_crtc.c 	if (idata->clk_div) {
clk_div           192 drivers/gpu/drm/shmobile/shmob_drm_crtc.c 		lcdc_write(sdev, LDDCKPAT2R, (1 << (idata->clk_div / 2)) - 1);
clk_div           194 drivers/gpu/drm/shmobile/shmob_drm_crtc.c 		if (idata->clk_div == 1)
clk_div           197 drivers/gpu/drm/shmobile/shmob_drm_crtc.c 			value |= idata->clk_div;
clk_div           170 drivers/hwmon/g762.c 					u8 clk_div, u8 gear_mult)
clk_div           175 drivers/hwmon/g762.c 	return (clk_freq * 30 * gear_mult) / ((cnt ? cnt : 1) * p * clk_div);
clk_div           183 drivers/hwmon/g762.c 					 u8 clk_div, u8 gear_mult)
clk_div           186 drivers/hwmon/g762.c 	unsigned long f2 = p * clk_div;
clk_div           169 drivers/i2c/busses/i2c-imx.c 	struct imx_i2c_clk_pair	*clk_div;
clk_div           211 drivers/i2c/busses/i2c-imx.c 	.clk_div		= imx_i2c_clk_div,
clk_div           221 drivers/i2c/busses/i2c-imx.c 	.clk_div		= imx_i2c_clk_div,
clk_div           231 drivers/i2c/busses/i2c-imx.c 	.clk_div		= vf610_i2c_clk_div,
clk_div           480 drivers/i2c/busses/i2c-imx.c 	struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;
clk_div            64 drivers/i2c/busses/i2c-mt7621.c 	u32 clk_div;
clk_div            95 drivers/i2c/busses/i2c-mt7621.c 	iowrite32(((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN |
clk_div           262 drivers/i2c/busses/i2c-mt7621.c 	i2c->clk_div = clk_get_rate(i2c->clk) / i2c->bus_freq - 1;
clk_div           263 drivers/i2c/busses/i2c-mt7621.c 	if (i2c->clk_div < 99)
clk_div           264 drivers/i2c/busses/i2c-mt7621.c 		i2c->clk_div = 99;
clk_div           265 drivers/i2c/busses/i2c-mt7621.c 	if (i2c->clk_div > SM0CTL0_CLK_DIV_MAX)
clk_div           266 drivers/i2c/busses/i2c-mt7621.c 		i2c->clk_div = SM0CTL0_CLK_DIV_MAX;
clk_div           112 drivers/i2c/busses/i2c-qcom-geni.c 	u8	clk_div;
clk_div           157 drivers/i2c/busses/i2c-qcom-geni.c 	val = (itr->clk_div << CLK_DIV_SHFT) | SER_CLK_EN;
clk_div            81 drivers/i2c/busses/i2c-sirf.c 	u32 clk_div;
clk_div           428 drivers/i2c/busses/i2c-sirf.c 	siic->clk_div = readl(siic->base + SIRFSOC_I2C_CLK_CTRL);
clk_div           444 drivers/i2c/busses/i2c-sirf.c 	writel(siic->clk_div, siic->base + SIRFSOC_I2C_CLK_CTRL);
clk_div           193 drivers/i2c/busses/i2c-sun6i-p2wi.c 	int clk_div;
clk_div           291 drivers/i2c/busses/i2c-sun6i-p2wi.c 	clk_div = parent_clk_freq / clk_freq;
clk_div           292 drivers/i2c/busses/i2c-sun6i-p2wi.c 	if (!clk_div) {
clk_div           296 drivers/i2c/busses/i2c-sun6i-p2wi.c 		clk_div = 1;
clk_div           297 drivers/i2c/busses/i2c-sun6i-p2wi.c 	} else if (clk_div > P2WI_CCR_MAX_CLK_DIV) {
clk_div           301 drivers/i2c/busses/i2c-sun6i-p2wi.c 		clk_div = P2WI_CCR_MAX_CLK_DIV;
clk_div           304 drivers/i2c/busses/i2c-sun6i-p2wi.c 	writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div),
clk_div           368 drivers/i2c/busses/i2c-xlr.c 	unsigned long clk_div;
clk_div           416 drivers/i2c/busses/i2c-xlr.c 		clk_div = DIV_ROUND_UP(clk_rate, 2 * busfreq);
clk_div           417 drivers/i2c/busses/i2c-xlr.c 		xlr_i2c_wreg(priv->iobase, XLR_I2C_CLKDIV, clk_div);
clk_div           180 drivers/i2c/busses/i2c-zx2967.c 	u32 clk_div;
clk_div           185 drivers/i2c/busses/i2c-zx2967.c 	clk_div = clk_get_rate(i2c->clk) / i2c->clk_freq - 1;
clk_div           186 drivers/i2c/busses/i2c-zx2967.c 	zx2967_i2c_writel(i2c, clk_div, REG_CLK_DIV_FS);
clk_div           187 drivers/i2c/busses/i2c-zx2967.c 	zx2967_i2c_writel(i2c, clk_div, REG_CLK_DIV_HS);
clk_div           117 drivers/iio/adc/ad7768-1.c 	unsigned int clk_div;
clk_div           305 drivers/iio/adc/ad7768-1.c 		diff_new = abs(res - ad7768_clk_config[i].clk_div);
clk_div           327 drivers/iio/adc/ad7768-1.c 					  ad7768_clk_config[idx].clk_div);
clk_div           343 drivers/iio/adc/ad7768-1.c 					 ad7768_clk_config[i].clk_div);
clk_div           277 drivers/iio/adc/meson_saradc.c 	struct clk_divider			clk_div;
clk_div           669 drivers/iio/adc/meson_saradc.c 	priv->clk_div.reg = base + MESON_SAR_ADC_REG3;
clk_div           670 drivers/iio/adc/meson_saradc.c 	priv->clk_div.shift = MESON_SAR_ADC_REG3_ADC_CLK_DIV_SHIFT;
clk_div           671 drivers/iio/adc/meson_saradc.c 	priv->clk_div.width = MESON_SAR_ADC_REG3_ADC_CLK_DIV_WIDTH;
clk_div           672 drivers/iio/adc/meson_saradc.c 	priv->clk_div.hw.init = &init;
clk_div           673 drivers/iio/adc/meson_saradc.c 	priv->clk_div.flags = 0;
clk_div           676 drivers/iio/adc/meson_saradc.c 					      &priv->clk_div.hw);
clk_div           135 drivers/iio/adc/stm32-dfsdm-core.c 	unsigned int clk_div = priv->spi_clk_out_div, clk_src;
clk_div           156 drivers/iio/adc/stm32-dfsdm-core.c 					 DFSDM_CHCFGR1_CKOUTDIV(clk_div));
clk_div           145 drivers/iio/adc/vf610_adc.c 	int	clk_div;
clk_div           188 drivers/iio/adc/vf610_adc.c 		adc_feature->clk_div = 1 << fls(divisor + 1);
clk_div           191 drivers/iio/adc/vf610_adc.c 		adc_feature->clk_div = 8;
clk_div           194 drivers/iio/adc/vf610_adc.c 	adck_rate = ipg_rate / adc_feature->clk_div;
clk_div           359 drivers/iio/adc/vf610_adc.c 	switch (adc_feature->clk_div) {
clk_div           158 drivers/leds/leds-bcm6358.c 	u32 clk_div;
clk_div           178 drivers/leds/leds-bcm6358.c 	of_property_read_u32(np, "brcm,clk-div", &clk_div);
clk_div           179 drivers/leds/leds-bcm6358.c 	switch (clk_div) {
clk_div            29 drivers/media/dvb-frontends/stv6110.c 	u8 clk_div;
clk_div           214 drivers/media/dvb-frontends/stv6110.c 	priv->regs[RSTV6110_CTRL2] |= (priv->clk_div << 6);
clk_div           398 drivers/media/dvb-frontends/stv6110.c 	reg0[2] |= (config->clk_div << 6);
clk_div           418 drivers/media/dvb-frontends/stv6110.c 	priv->clk_div = config->clk_div;
clk_div            31 drivers/media/dvb-frontends/stv6110.h 	u8 clk_div;	/* divisor value for the output clock */
clk_div           345 drivers/media/dvb-frontends/stv6110x.c 	switch (stv6110x->config->clk_div) {
clk_div            17 drivers/media/dvb-frontends/stv6110x.h 	u8	clk_div; /* divisor value for the output clock */
clk_div           133 drivers/media/i2c/mt9p031.c 	unsigned int clk_div;
clk_div           204 drivers/media/i2c/mt9p031.c 			    MT9P031_PIXEL_CLOCK_DIVIDE(mt9p031->clk_div));
clk_div           251 drivers/media/i2c/mt9p031.c 		mt9p031->clk_div = min_t(unsigned int, div, 64);
clk_div           157 drivers/media/i2c/rj54n1cb0c.c 	struct rj54n1_clock_div clk_div;
clk_div           417 drivers/media/i2c/rj54n1cb0c.c static const struct rj54n1_clock_div clk_div = {
clk_div           839 drivers/media/i2c/rj54n1cb0c.c 				rj54n1->clk_div.ratio_tg);
clk_div           842 drivers/media/i2c/rj54n1cb0c.c 				rj54n1->clk_div.ratio_t);
clk_div           845 drivers/media/i2c/rj54n1cb0c.c 				rj54n1->clk_div.ratio_r);
clk_div           858 drivers/media/i2c/rj54n1cb0c.c 				rj54n1->clk_div.ratio_op);
clk_div           861 drivers/media/i2c/rj54n1cb0c.c 				rj54n1->clk_div.ratio_o);
clk_div          1339 drivers/media/i2c/rj54n1cb0c.c 	rj54n1->clk_div		= clk_div;
clk_div          1349 drivers/media/i2c/rj54n1cb0c.c 		(clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);
clk_div           486 drivers/media/pci/cx23885/cx23885-dvb.c 	.clk_div = 1,
clk_div           493 drivers/media/pci/cx23885/cx23885-dvb.c 	.clk_div = 1,
clk_div          1111 drivers/media/pci/ddbridge/ddbridge-core.c 	.clk_div = 1,
clk_div          1117 drivers/media/pci/ddbridge/ddbridge-core.c 	.clk_div = 1,
clk_div          1020 drivers/media/pci/ngene/ngene-cards.c 	.clk_div = 1,
clk_div          1026 drivers/media/pci/ngene/ngene-cards.c 	.clk_div = 1,
clk_div            55 drivers/media/pci/solo6x10/solo6x10-g723.c 	int clk_div;
clk_div            57 drivers/media/pci/solo6x10/solo6x10-g723.c 	clk_div = (solo_dev->clock_mhz * 1000000)
clk_div            62 drivers/media/pci/solo6x10/solo6x10-g723.c 		       | SOLO_AUDIO_CLK_DIV(clk_div));
clk_div           467 drivers/media/pci/ttpci/budget.c 	.clk_div		= 2,
clk_div           358 drivers/media/usb/dvb-usb-v2/anysee.c 	.clk_div = 1,
clk_div          1127 drivers/media/usb/dvb-usb/dw2102.c 	.clk_div = 1,
clk_div           515 drivers/media/usb/dvb-usb/technisat-usb2.c 	.clk_div        = 2,
clk_div            90 drivers/mfd/fsl-imx25-tsadc.c 	unsigned clk_div;
clk_div           102 drivers/mfd/fsl-imx25-tsadc.c 	clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000);
clk_div           103 drivers/mfd/fsl-imx25-tsadc.c 	dev_dbg(&pdev->dev, "Setting up ADC clock divider to %u\n", clk_div);
clk_div           106 drivers/mfd/fsl-imx25-tsadc.c 	clk_div -= 2;
clk_div           107 drivers/mfd/fsl-imx25-tsadc.c 	clk_div /= 2;
clk_div           113 drivers/mfd/fsl-imx25-tsadc.c 	clk_div = max_t(unsigned, 4, clk_div);
clk_div           116 drivers/mfd/fsl-imx25-tsadc.c 		clk_get_rate(tsadc->clk) / (2 * clk_div + 2));
clk_div           120 drivers/mfd/fsl-imx25-tsadc.c 			   MX25_TGCR_ADCCLKCFG(clk_div));
clk_div           219 drivers/mfd/ti_am335x_tscadc.c 	tscadc->clk_div = clock_rate / ADC_CLK;
clk_div           222 drivers/mfd/ti_am335x_tscadc.c 	tscadc->clk_div--;
clk_div           223 drivers/mfd/ti_am335x_tscadc.c 	regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
clk_div           341 drivers/mfd/ti_am335x_tscadc.c 	regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
clk_div           657 drivers/mmc/host/alcor.c 	u8 clk_div = 0;
clk_div           678 drivers/mmc/host/alcor.c 			clk_div = tmp_div;
clk_div           682 drivers/mmc/host/alcor.c 	clk_src |= ((clk_div - 1) << 8);
clk_div           686 drivers/mmc/host/alcor.c 			clock, tmp_clock, clk_div, clk_src);
clk_div          1187 drivers/mmc/host/s3cmci.c 		host->real_rate = host->clk_rate / (host->clk_div*(mci_psc+1));
clk_div          1580 drivers/mmc/host/s3cmci.c 		host->clk_div	= 1;
clk_div          1584 drivers/mmc/host/s3cmci.c 		host->clk_div	= 2;
clk_div          1668 drivers/mmc/host/s3cmci.c 	mmc->f_min 	= host->clk_rate / (host->clk_div * 256);
clk_div          1669 drivers/mmc/host/s3cmci.c 	mmc->f_max 	= host->clk_rate / host->clk_div;
clk_div            29 drivers/mmc/host/s3cmci.h 	unsigned long		clk_div;
clk_div            95 drivers/mmc/host/tifm_sd.c 	unsigned int          clk_div;
clk_div           600 drivers/mmc/host/tifm_sd.c 			((1000000000UL / host->clk_freq) * host->clk_div);
clk_div           832 drivers/mmc/host/tifm_sd.c 			host->clk_div = clk_div1;
clk_div           838 drivers/mmc/host/tifm_sd.c 			host->clk_div = clk_div2;
clk_div           844 drivers/mmc/host/tifm_sd.c 		host->clk_div = 0;
clk_div           846 drivers/mmc/host/tifm_sd.c 	host->clk_div &= TIFM_MMCSD_CLKMASK;
clk_div           847 drivers/mmc/host/tifm_sd.c 	writel(host->clk_div
clk_div           888 drivers/mmc/host/tifm_sd.c 	host->clk_div = 61;
clk_div           891 drivers/mmc/host/tifm_sd.c 	writel(host->clk_div | TIFM_MMCSD_POWER,
clk_div           910 drivers/mmc/host/tifm_sd.c 	writel(host->clk_div | TIFM_MMCSD_POWER,
clk_div          1900 drivers/mtd/devices/st_spi_fsm.c 	uint32_t clk_div;
clk_div          1908 drivers/mtd/devices/st_spi_fsm.c 	clk_div = 2 * DIV_ROUND_UP(emi_freq, 2 * spi_freq);
clk_div          1909 drivers/mtd/devices/st_spi_fsm.c 	if (clk_div < 2)
clk_div          1910 drivers/mtd/devices/st_spi_fsm.c 		clk_div = 2;
clk_div          1911 drivers/mtd/devices/st_spi_fsm.c 	else if (clk_div > 128)
clk_div          1912 drivers/mtd/devices/st_spi_fsm.c 		clk_div = 128;
clk_div          1920 drivers/mtd/devices/st_spi_fsm.c 	if (clk_div <= 4)
clk_div          1922 drivers/mtd/devices/st_spi_fsm.c 	else if (clk_div <= 10)
clk_div          1925 drivers/mtd/devices/st_spi_fsm.c 		fsm->fifo_dir_delay = DIV_ROUND_UP(clk_div, 10);
clk_div          1928 drivers/mtd/devices/st_spi_fsm.c 		emi_freq, spi_freq, clk_div);
clk_div          1930 drivers/mtd/devices/st_spi_fsm.c 	writel(clk_div, fsm->base + SPI_CLOCKDIV);
clk_div          1274 drivers/net/ethernet/aurora/nb8800.c 	int clk_div;
clk_div          1282 drivers/net/ethernet/aurora/nb8800.c 	clk_div = DIV_ROUND_UP(clk_get_rate(priv->clk), 2 * MAX_MDC_CLOCK);
clk_div          1283 drivers/net/ethernet/aurora/nb8800.c 	nb8800_writew(priv, NB8800_TANGOX_MDIO_CLKDIV, clk_div);
clk_div            92 drivers/net/ethernet/ti/davinci_mdio.c 	u32		clk_div;
clk_div           104 drivers/net/ethernet/ti/davinci_mdio.c 	data->clk_div = div;
clk_div           128 drivers/net/ethernet/ti/davinci_mdio.c 	writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);
clk_div            69 drivers/net/ethernet/xilinx/ll_temac_mdio.c 	int clk_div;
clk_div            81 drivers/net/ethernet/xilinx/ll_temac_mdio.c 	clk_div = 0x3f; /* worst-case default setting */
clk_div            83 drivers/net/ethernet/xilinx/ll_temac_mdio.c 		clk_div = bus_hz / (2500 * 1000 * 2) - 1;
clk_div            84 drivers/net/ethernet/xilinx/ll_temac_mdio.c 		if (clk_div < 1)
clk_div            85 drivers/net/ethernet/xilinx/ll_temac_mdio.c 			clk_div = 1;
clk_div            86 drivers/net/ethernet/xilinx/ll_temac_mdio.c 		if (clk_div > 0x3f)
clk_div            87 drivers/net/ethernet/xilinx/ll_temac_mdio.c 			clk_div = 0x3f;
clk_div            92 drivers/net/ethernet/xilinx/ll_temac_mdio.c 	temac_indirect_out32(lp, XTE_MC_OFFSET, 1 << 6 | clk_div);
clk_div           127 drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c 	u32 clk_div, host_clock;
clk_div           179 drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c 	clk_div = (host_clock / (MAX_MDIO_FREQ * 2)) - 1;
clk_div           185 drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c 		clk_div++;
clk_div           189 drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c 		   clk_div, host_clock);
clk_div           191 drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c 	axienet_iow(lp, XAE_MDIO_MC_OFFSET, clk_div | XAE_MDIO_MC_MDIOEN_MASK);
clk_div            71 drivers/pwm/pwm-crc.c 		int clk_div;
clk_div            75 drivers/pwm/pwm-crc.c 		clk_div = PWM_BASE_CLK * period_ns / NSEC_PER_SEC;
clk_div            78 drivers/pwm/pwm-crc.c 					clk_div | PWM_OUTPUT_ENABLE);
clk_div            73 drivers/pwm/pwm-mtk-disp.c 	u32 clk_div, period, high_width, value;
clk_div            88 drivers/pwm/pwm-mtk-disp.c 	clk_div = div_u64(rate * period_ns, NSEC_PER_SEC) >>
clk_div            90 drivers/pwm/pwm-mtk-disp.c 	if (clk_div > PWM_CLKDIV_MAX)
clk_div            93 drivers/pwm/pwm-mtk-disp.c 	div = NSEC_PER_SEC * (clk_div + 1);
clk_div           113 drivers/pwm/pwm-mtk-disp.c 				 clk_div << PWM_CLKDIV_SHIFT);
clk_div           133 drivers/spi/spi-axi-spi-engine.c 	unsigned int clk_div;
clk_div           135 drivers/spi/spi-axi-spi-engine.c 	clk_div = DIV_ROUND_UP(clk_get_rate(spi_engine->ref_clk),
clk_div           137 drivers/spi/spi-axi-spi-engine.c 	if (clk_div > 255)
clk_div           138 drivers/spi/spi-axi-spi-engine.c 		clk_div = 255;
clk_div           139 drivers/spi/spi-axi-spi-engine.c 	else if (clk_div > 0)
clk_div           140 drivers/spi/spi-axi-spi-engine.c 		clk_div -= 1;
clk_div           142 drivers/spi/spi-axi-spi-engine.c 	return clk_div;
clk_div           166 drivers/spi/spi-axi-spi-engine.c 	struct spi_engine *spi_engine, unsigned int clk_div, unsigned int delay)
clk_div           174 drivers/spi/spi-axi-spi-engine.c 	t = DIV_ROUND_UP(delay * spi_clk, (clk_div + 1) * 2);
clk_div           199 drivers/spi/spi-axi-spi-engine.c 	int clk_div, new_clk_div;
clk_div           202 drivers/spi/spi-axi-spi-engine.c 	clk_div = -1;
clk_div           210 drivers/spi/spi-axi-spi-engine.c 		if (new_clk_div != clk_div) {
clk_div           211 drivers/spi/spi-axi-spi-engine.c 			clk_div = new_clk_div;
clk_div           214 drivers/spi/spi-axi-spi-engine.c 					clk_div));
clk_div           221 drivers/spi/spi-axi-spi-engine.c 		spi_engine_gen_sleep(p, dry, spi_engine, clk_div,
clk_div            29 drivers/spi/spi-dw.c 	u16 clk_div;		/* baud rate divider */
clk_div           317 drivers/spi/spi-dw.c 			chip->clk_div = (DIV_ROUND_UP(dws->max_freq, transfer->speed_hz) + 1) & 0xfffe;
clk_div           321 drivers/spi/spi-dw.c 		spi_set_clk(dws, chip->clk_div);
clk_div            95 drivers/spi/spi-geni-qcom.c 			unsigned int *clk_div)
clk_div           111 drivers/spi/spi-geni-qcom.c 	*clk_div = DIV_ROUND_UP(sclk_freq, mas->oversampling * speed_hz);
clk_div           112 drivers/spi/spi-geni-qcom.c 	actual_hz = sclk_freq / (mas->oversampling * *clk_div);
clk_div           115 drivers/spi/spi-geni-qcom.c 				actual_hz, sclk_freq, *clk_idx, *clk_div);
clk_div           273 drivers/spi/spi-pxa2xx.c 				  u32 clk_div, u8 bits)
clk_div           277 drivers/spi/spi-pxa2xx.c 		return clk_div
clk_div           282 drivers/spi/spi-pxa2xx.c 		return clk_div
clk_div           916 drivers/spi/spi-pxa2xx.c 	unsigned int clk_div;
clk_div           920 drivers/spi/spi-pxa2xx.c 		clk_div = quark_x1000_get_clk_div(rate, &chip->dds_rate);
clk_div           923 drivers/spi/spi-pxa2xx.c 		clk_div = ssp_get_clk_div(drv_data, rate);
clk_div           926 drivers/spi/spi-pxa2xx.c 	return clk_div << 8;
clk_div           950 drivers/spi/spi-pxa2xx.c 	u32 clk_div;
clk_div           993 drivers/spi/spi-pxa2xx.c 	clk_div = pxa2xx_ssp_get_clk_div(drv_data, speed);
clk_div          1054 drivers/spi/spi-pxa2xx.c 	cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, bits);
clk_div           665 drivers/spi/spi-sprd.c 	u32 clk_div = DIV_ROUND_UP(ss->src_clk, speed_hz << 1) - 1;
clk_div           668 drivers/spi/spi-sprd.c 	ss->hw_speed_hz = (ss->src_clk >> 1) / (clk_div + 1);
clk_div           669 drivers/spi/spi-sprd.c 	writel_relaxed(clk_div, ss->base + SPRD_SPI_CLKD);
clk_div           146 drivers/spi/spi-ti-qspi.c 	int clk_div = 0, ret;
clk_div           161 drivers/spi/spi-ti-qspi.c 	clk_div = DIV_ROUND_UP(clk_rate, qspi->spi_max_frequency) - 1;
clk_div           163 drivers/spi/spi-ti-qspi.c 	if (clk_div < 0) {
clk_div           168 drivers/spi/spi-ti-qspi.c 	if (clk_div > QSPI_CLK_DIV_MAX) {
clk_div           175 drivers/spi/spi-ti-qspi.c 			qspi->spi_max_frequency, clk_div);
clk_div           191 drivers/spi/spi-ti-qspi.c 	clk_mask = QSPI_CLK_EN | clk_div;
clk_div           629 drivers/staging/rts5208/rtsx_chip.h 	u16 clk_div;
clk_div           577 drivers/staging/rts5208/sd.c static int sd_set_clock_divider(struct rtsx_chip *chip, u8 clk_div)
clk_div           583 drivers/staging/rts5208/sd.c 	if (clk_div == SD_CLK_DIVIDE_0)
clk_div           585 drivers/staging/rts5208/sd.c 	else if (clk_div == SD_CLK_DIVIDE_128)
clk_div           587 drivers/staging/rts5208/sd.c 	else if (clk_div == SD_CLK_DIVIDE_256)
clk_div            49 drivers/staging/rts5208/spi.c 				     (u8)(spi->clk_div >> 8));
clk_div            53 drivers/staging/rts5208/spi.c 				     (u8)(spi->clk_div));
clk_div           460 drivers/staging/rts5208/spi.c 	spi->clk_div = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5];
clk_div           465 drivers/staging/rts5208/spi.c 	dev_dbg(rtsx_dev(chip), "clk_div = %d, ", spi->clk_div);
clk_div           932 drivers/tty/serial/qcom_geni_serial.c 			unsigned int sampling_rate, unsigned int *clk_div)
clk_div           945 drivers/tty/serial/qcom_geni_serial.c 	*clk_div = ser_clk / desired_clk;
clk_div           959 drivers/tty/serial/qcom_geni_serial.c 	unsigned int clk_div;
clk_div           976 drivers/tty/serial/qcom_geni_serial.c 	clk_rate = get_clk_div_rate(baud, sampling_rate, &clk_div);
clk_div           983 drivers/tty/serial/qcom_geni_serial.c 	ser_clk_cfg |= clk_div << CLK_DIV_SHFT;
clk_div           641 drivers/video/fbdev/omap/hwa742.c 	t->clk_div = div;
clk_div           689 drivers/video/fbdev/omap/hwa742.c 	t->clk_div = div;
clk_div           103 drivers/video/fbdev/omap/omapfb.h 	int clk_div;
clk_div            58 drivers/video/fbdev/omap/sossi.c 	int		clk_div;
clk_div           122 drivers/video/fbdev/omap/sossi.c 	int div = t->clk_div;
clk_div           173 drivers/video/fbdev/omap/sossi.c 	int div = t->clk_div;
clk_div           256 drivers/video/fbdev/omap/sossi.c 		_set_timing(sossi.clk_div,
clk_div           315 drivers/video/fbdev/omap/sossi.c 	int div = t->clk_div;
clk_div           346 drivers/video/fbdev/omap/sossi.c 	sossi.clk_div = t->tim[4];
clk_div           181 include/linux/mfd/ti_am335x_tscadc.h 	unsigned int clk_div;
clk_div            80 include/linux/platform_data/shmob_drm.h 	unsigned int clk_div;
clk_div          1111 sound/soc/codecs/lm49453.c 	u16 clk_div = 0;
clk_div          1120 sound/soc/codecs/lm49453.c 		clk_div = 256;
clk_div          1125 sound/soc/codecs/lm49453.c 		clk_div = 216;
clk_div          1128 sound/soc/codecs/lm49453.c 		clk_div = 127;
clk_div          1134 sound/soc/codecs/lm49453.c 	snd_soc_component_write(component, LM49453_P0_ADC_CLK_DIV_REG, clk_div);
clk_div          1135 sound/soc/codecs/lm49453.c 	snd_soc_component_write(component, LM49453_P0_DAC_HP_CLK_DIV_REG, clk_div);
clk_div           154 sound/soc/fsl/fsl_micfil.c 	int clk_div;
clk_div           160 sound/soc/fsl/fsl_micfil.c 	clk_div = mclk_rate / (get_pdm_clk(micfil, rate) * 2);
clk_div           162 sound/soc/fsl/fsl_micfil.c 	return clk_div;
clk_div           298 sound/soc/fsl/fsl_micfil.c 	int clk_div;
clk_div           315 sound/soc/fsl/fsl_micfil.c 	clk_div = get_clk_div(micfil, rate);
clk_div           316 sound/soc/fsl/fsl_micfil.c 	if (clk_div < 0)
clk_div           320 sound/soc/fsl/fsl_micfil.c 				 MICFIL_CTRL2_CLKDIV_MASK, clk_div);
clk_div           151 sound/soc/rockchip/rockchip_pdm.c 	unsigned int clk_rate, clk_div, samplerate;
clk_div           186 sound/soc/rockchip/rockchip_pdm.c 		clk_div = n / m;
clk_div           187 sound/soc/rockchip/rockchip_pdm.c 		if (clk_div >= 40)
clk_div           189 sound/soc/rockchip/rockchip_pdm.c 		else if (clk_div <= 35)
clk_div            70 sound/soc/samsung/jive_wm8750.c 				     div.clk_div - 1);
clk_div           612 sound/soc/samsung/s3c-i2s-v2.c 	info->clk_div = best_div;
clk_div            71 sound/soc/samsung/s3c-i2s-v2.h 	unsigned int	clk_div;	/* for prescaler */
clk_div           316 sound/soc/sti/uniperif_player.c 	int clk_div;
clk_div           318 sound/soc/sti/uniperif_player.c 	clk_div = player->mclk / runtime->rate;
clk_div           321 sound/soc/sti/uniperif_player.c 	if ((clk_div % 128) || (clk_div <= 0)) {
clk_div           323 sound/soc/sti/uniperif_player.c 			__func__, clk_div);
clk_div           398 sound/soc/sti/uniperif_player.c 	SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / 128);
clk_div           419 sound/soc/sti/uniperif_player.c 	int output_frame_size, slot_width, clk_div;
clk_div           430 sound/soc/sti/uniperif_player.c 	clk_div = player->mclk / runtime->rate;
clk_div           435 sound/soc/sti/uniperif_player.c 	if ((slot_width == 32) && (clk_div % 128)) {
clk_div           440 sound/soc/sti/uniperif_player.c 	if ((slot_width == 16) && (clk_div % 64)) {
clk_div           487 sound/soc/sti/uniperif_player.c 	SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / (2 * output_frame_size));
clk_div           161 sound/soc/ti/davinci-i2s.c 	int clk_div;
clk_div           372 sound/soc/ti/davinci-i2s.c 	dev->clk_div = div;
clk_div           383 sound/soc/ti/davinci-i2s.c 	unsigned int rcr, xcr, srgr, clk_div, freq, framesize;
clk_div           410 sound/soc/ti/davinci-i2s.c 			clk_div = 256;
clk_div           412 sound/soc/ti/davinci-i2s.c 				framesize = (freq / (--clk_div)) /
clk_div           416 sound/soc/ti/davinci-i2s.c 				 (clk_div));
clk_div           417 sound/soc/ti/davinci-i2s.c 			clk_div--;
clk_div           421 sound/soc/ti/davinci-i2s.c 			clk_div = freq / (mcbsp_word_length * 16) /
clk_div           426 sound/soc/ti/davinci-i2s.c 		clk_div &= 0xFF;
clk_div           427 sound/soc/ti/davinci-i2s.c 		srgr |= clk_div;
clk_div           431 sound/soc/ti/davinci-i2s.c 		clk_div = dev->clk_div - 1;
clk_div           434 sound/soc/ti/davinci-i2s.c 		clk_div &= 0xFF;
clk_div           435 sound/soc/ti/davinci-i2s.c 		srgr |= clk_div;
clk_div            41 sound/soc/ti/omap-dmic.c 	int clk_div;
clk_div           194 sound/soc/ti/omap-dmic.c 	dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
clk_div           195 sound/soc/ti/omap-dmic.c 	if (dmic->clk_div < 0) {
clk_div           248 sound/soc/ti/omap-dmic.c 	ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div);
clk_div           276 sound/soc/ti/omap-mcbsp-priv.h 	int clk_div;
clk_div          1047 sound/soc/ti/omap-mcbsp.c 		div = mcbsp->clk_div ? mcbsp->clk_div : 1;
clk_div          1203 sound/soc/ti/omap-mcbsp.c 	mcbsp->clk_div = div;
clk_div           109 sound/soc/xilinx/xlnx_spdif.c 	u32 val, clk_div, clk_cfg;
clk_div           112 sound/soc/xilinx/xlnx_spdif.c 	clk_div = DIV_ROUND_CLOSEST(ctx->aclk, MAX_CHANNELS * AES_SAMPLE_WIDTH *
clk_div           115 sound/soc/xilinx/xlnx_spdif.c 	switch (clk_div) {